DE69809777D1 - Vefahren und vorrichtung zum einstellen von taktsignalen über fein- und grobbereiche - Google Patents

Vefahren und vorrichtung zum einstellen von taktsignalen über fein- und grobbereiche

Info

Publication number
DE69809777D1
DE69809777D1 DE69809777T DE69809777T DE69809777D1 DE 69809777 D1 DE69809777 D1 DE 69809777D1 DE 69809777 T DE69809777 T DE 69809777T DE 69809777 T DE69809777 T DE 69809777T DE 69809777 D1 DE69809777 D1 DE 69809777D1
Authority
DE
Germany
Prior art keywords
delay circuit
timing
fine
coarse
digital signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69809777T
Other languages
English (en)
Other versions
DE69809777T2 (de
Inventor
Brent Keeth
A Manning
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of DE69809777D1 publication Critical patent/DE69809777D1/de
Application granted granted Critical
Publication of DE69809777T2 publication Critical patent/DE69809777T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/131Digitally controlled
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0818Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter comprising coarse and fine delay or phase-shifting means
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2281Timing of a read operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/229Timing of a write operation
DE69809777T 1997-09-18 1998-09-18 Vefahren und vorrichtung zum einstellen von taktsignalen über fein- und grobbereiche Expired - Lifetime DE69809777T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/933,324 US6101197A (en) 1997-09-18 1997-09-18 Method and apparatus for adjusting the timing of signals over fine and coarse ranges
PCT/US1998/019575 WO1999014759A1 (en) 1997-09-18 1998-09-18 Method and apparatus for adjusting the timing of signals over fine and coarse ranges

Publications (2)

Publication Number Publication Date
DE69809777D1 true DE69809777D1 (de) 2003-01-09
DE69809777T2 DE69809777T2 (de) 2003-08-14

Family

ID=25463742

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69809777T Expired - Lifetime DE69809777T2 (de) 1997-09-18 1998-09-18 Vefahren und vorrichtung zum einstellen von taktsignalen über fein- und grobbereiche

Country Status (6)

Country Link
US (2) US6101197A (de)
EP (1) EP1016086B1 (de)
AT (1) ATE228709T1 (de)
AU (1) AU9571698A (de)
DE (1) DE69809777T2 (de)
WO (1) WO1999014759A1 (de)

Families Citing this family (106)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5796673A (en) 1994-10-06 1998-08-18 Mosaid Technologies Incorporated Delay locked loop implementation in a synchronous dynamic random access memory
US5940608A (en) 1997-02-11 1999-08-17 Micron Technology, Inc. Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal
US5946244A (en) 1997-03-05 1999-08-31 Micron Technology, Inc. Delay-locked loop with binary-coupled capacitor
US6173432B1 (en) 1997-06-20 2001-01-09 Micron Technology, Inc. Method and apparatus for generating a sequence of clock signals
US6487647B1 (en) * 1997-12-29 2002-11-26 Intel Corporation Adaptive memory interface timing generation
US6269451B1 (en) 1998-02-27 2001-07-31 Micron Technology, Inc. Method and apparatus for adjusting data timing by delaying clock signal
US7564283B1 (en) 1998-06-22 2009-07-21 Xilinx, Inc. Automatic tap delay calibration for precise digital phase shift
US6289068B1 (en) 1998-06-22 2001-09-11 Xilinx, Inc. Delay lock loop with clock phase shifter
KR100295051B1 (ko) * 1998-08-20 2001-07-12 윤종용 반도체메모리장치의입력버퍼및입력버퍼링방법
US6338127B1 (en) 1998-08-28 2002-01-08 Micron Technology, Inc. Method and apparatus for resynchronizing a plurality of clock signals used to latch respective digital signals, and memory device using same
US6279090B1 (en) 1998-09-03 2001-08-21 Micron Technology, Inc. Method and apparatus for resynchronizing a plurality of clock signals used in latching respective digital signals applied to a packetized memory device
US6577691B2 (en) * 1998-09-03 2003-06-10 Time Domain Corporation Precision timing generator apparatus and associated methods
US6304623B1 (en) * 1998-09-03 2001-10-16 Time Domain Corporation Precision timing generator system and method
US6349399B1 (en) 1998-09-03 2002-02-19 Micron Technology, Inc. Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6430696B1 (en) 1998-11-30 2002-08-06 Micron Technology, Inc. Method and apparatus for high speed data capture utilizing bit-to-bit timing correction, and memory device using same
US6374360B1 (en) 1998-12-11 2002-04-16 Micron Technology, Inc. Method and apparatus for bit-to-bit timing correction of a high speed memory bus
JP3733389B2 (ja) * 1999-02-08 2006-01-11 富士通株式会社 半導体集積回路装置及びそのテスト方法
US6470060B1 (en) 1999-03-01 2002-10-22 Micron Technology, Inc. Method and apparatus for generating a phase dependent control signal
US6625765B1 (en) * 1999-03-31 2003-09-23 Cypress Semiconductor Corp. Memory based phase locked loop
JP3259776B2 (ja) * 1999-08-24 2002-02-25 日本電気株式会社 送信回路
US6646953B1 (en) * 2000-07-06 2003-11-11 Rambus Inc. Single-clock, strobeless signaling system
US6643787B1 (en) 1999-10-19 2003-11-04 Rambus Inc. Bus system optimization
US6647027B1 (en) * 1999-11-10 2003-11-11 Lsi Logic Corporation Method and apparatus for multi-channel data delay equalization
US6731667B1 (en) * 1999-11-18 2004-05-04 Anapass Inc. Zero-delay buffer circuit for a spread spectrum clock system and method therefor
US6445231B1 (en) 2000-06-01 2002-09-03 Micron Technology, Inc. Digital dual-loop DLL design using coarse and fine loops
US7050467B1 (en) * 2000-08-07 2006-05-23 Motorola, Inc. Digital-to-phase-converter
KR100389916B1 (ko) * 2000-08-28 2003-07-04 삼성전자주식회사 메모리 모듈 및 메모리 컨트롤러
US6868504B1 (en) * 2000-08-31 2005-03-15 Micron Technology, Inc. Interleaved delay line for phase locked and delay locked loops
US7187742B1 (en) * 2000-10-06 2007-03-06 Xilinx, Inc. Synchronized multi-output digital clock manager
US6785180B2 (en) * 2001-03-15 2004-08-31 Micron Technology, Inc. Programmable soft-start control for charge pump
US6839860B2 (en) * 2001-04-19 2005-01-04 Mircon Technology, Inc. Capture clock generator using master and slave delay locked loops
US6570813B2 (en) 2001-05-25 2003-05-27 Micron Technology, Inc. Synchronous mirror delay with reduced delay line taps
US6788614B2 (en) * 2001-06-14 2004-09-07 Micron Technology, Inc. Semiconductor memory with wordline timing
US6801989B2 (en) 2001-06-28 2004-10-05 Micron Technology, Inc. Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
US7072433B2 (en) * 2001-07-11 2006-07-04 Micron Technology, Inc. Delay locked loop fine tune
US6628154B2 (en) * 2001-07-31 2003-09-30 Cypress Semiconductor Corp. Digitally controlled analog delay locked loop (DLL)
US6850107B2 (en) 2001-08-29 2005-02-01 Micron Technology, Inc. Variable delay circuit and method, and delay locked loop, memory device and computer system using same
KR100437611B1 (ko) 2001-09-20 2004-06-30 주식회사 하이닉스반도체 혼합형 지연 록 루프 회로
US6426662B1 (en) 2001-11-12 2002-07-30 Pericom Semiconductor Corp. Twisted-ring oscillator and delay line generating multiple phases using differential dividers and comparators to match delays
KR100408727B1 (ko) * 2001-12-28 2003-12-11 주식회사 하이닉스반도체 클럭 동기 장치
US7135903B2 (en) * 2002-09-03 2006-11-14 Rambus Inc. Phase jumping locked loop circuit
US6911853B2 (en) * 2002-03-22 2005-06-28 Rambus Inc. Locked loop with dual rail regulation
US6922091B2 (en) 2002-09-03 2005-07-26 Rambus Inc. Locked loop circuit with clock hold function
US6759881B2 (en) * 2002-03-22 2004-07-06 Rambus Inc. System with phase jumping locked loop circuit
US6952123B2 (en) 2002-03-22 2005-10-04 Rambus Inc. System with dual rail regulated locked loop
KR100500925B1 (ko) * 2002-11-27 2005-07-14 주식회사 하이닉스반도체 디지털 위상 혼합기를 갖는 2 코스 하프 딜레이 라인을이용한로우 지터 dll
US6836166B2 (en) 2003-01-08 2004-12-28 Micron Technology, Inc. Method and system for delay control in synchronization circuits
US7034596B2 (en) * 2003-02-11 2006-04-25 Lattice Semiconductor Corporation Adaptive input logic for phase adjustments
US6960950B2 (en) * 2003-03-25 2005-11-01 Intel Corporation Circuit and method for generating a clock signal
US6911872B2 (en) * 2003-03-25 2005-06-28 Intel Corporation Circuit and method for generating a clock signal
US7168027B2 (en) 2003-06-12 2007-01-23 Micron Technology, Inc. Dynamic synchronization of data capture on an optical or other high speed communications link
KR100543925B1 (ko) * 2003-06-27 2006-01-23 주식회사 하이닉스반도체 지연 고정 루프 및 지연 고정 루프에서의 클럭 지연 고정방법
US6812760B1 (en) * 2003-07-02 2004-11-02 Micron Technology, Inc. System and method for comparison and compensation of delay variations between fine delay and coarse delay circuits
US7292670B2 (en) * 2003-08-06 2007-11-06 Gennum Corporation System and method for automatically correcting duty cycle distortion
US7646835B1 (en) * 2003-11-17 2010-01-12 Rozas Guillermo J Method and system for automatically calibrating intra-cycle timing relationships for sampling signals for an integrated circuit device
US7555048B1 (en) * 2003-11-24 2009-06-30 Neascape, Inc. High-speed single-ended interface
US7299329B2 (en) * 2004-01-29 2007-11-20 Micron Technology, Inc. Dual edge command in DRAM
US7049873B2 (en) 2004-02-23 2006-05-23 International Business Machines Corporation System and method for implementing a micro-stepping delay chain for a delay locked loop
US7119583B2 (en) * 2004-03-31 2006-10-10 Micron Technology, Inc. Phase detector and method having hysteresis characteristics
DE102004015868A1 (de) * 2004-03-31 2005-10-27 Micron Technology, Inc. Rekonstruktion der Signalzeitgebung in integrierten Schaltungen
JP5156932B2 (ja) * 2004-03-31 2013-03-06 ラウンド ロック リサーチ、エルエルシー 集積回路における信号タイミングの再構成
US7038519B1 (en) 2004-04-30 2006-05-02 Xilinx, Inc. Digital clock manager having cascade voltage switch logic clock paths
US7157951B1 (en) 2004-04-30 2007-01-02 Xilinx, Inc. Digital clock manager capacitive trim unit
US7580481B2 (en) * 2004-04-30 2009-08-25 Silicon Laboratories Inc. I/Q timing mismatch compensation
US7046052B1 (en) 2004-04-30 2006-05-16 Xilinx, Inc. Phase matched clock divider
US7421606B2 (en) 2004-05-18 2008-09-02 Micron Technology, Inc. DLL phase detection using advanced phase equalization
JP4425722B2 (ja) * 2004-06-18 2010-03-03 Necエレクトロニクス株式会社 Smd任意逓倍回路
US7078950B2 (en) * 2004-07-20 2006-07-18 Micron Technology, Inc. Delay-locked loop with feedback compensation
US7138845B2 (en) * 2004-07-22 2006-11-21 Micron Technology, Inc. Method and apparatus to set a tuning range for an analog delay
US7660187B2 (en) * 2004-08-04 2010-02-09 Micron Technology, Inc. Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
US7065001B2 (en) * 2004-08-04 2006-06-20 Micron Technology, Inc. Method and apparatus for initialization of read latency tracking circuit in high-speed DRAM
US7088156B2 (en) * 2004-08-31 2006-08-08 Micron Technology, Inc. Delay-locked loop having a pre-shift phase detector
US7466607B2 (en) * 2004-09-30 2008-12-16 Analog Devices, Inc. Memory access system and method using de-coupled read and write circuits
US7116148B2 (en) * 2004-10-27 2006-10-03 Infineon Technologies Ag Variable delay line using two blender delays
US7353420B2 (en) * 2005-04-07 2008-04-01 Winbond Electronics Corp. Circuit and method for generating programmable clock signals with minimum skew
US7401246B2 (en) * 2005-06-30 2008-07-15 Intel Corporation Nibble de-skew method, apparatus, and system
KR100711547B1 (ko) * 2005-08-29 2007-04-27 주식회사 하이닉스반도체 지연 고정 루프
US7549092B2 (en) * 2005-09-29 2009-06-16 Hynix Semiconductor, Inc. Output controller with test unit
DE102005053486B4 (de) * 2005-11-09 2007-12-20 Qimonda Ag Schaltungsanordnung zur Erzeugung eines n-Bit Ausgangszeigers, Halbleiterspeicher und Verfahren
US7724589B2 (en) * 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US7773713B2 (en) * 2006-10-19 2010-08-10 Motorola, Inc. Clock data recovery systems and methods for direct digital synthesizers
US7423456B2 (en) * 2006-12-01 2008-09-09 Micron Technology, Inc. Fast response time, low power phase detector circuits, devices and systems incorporating the same, and associated methods
US7644226B1 (en) * 2006-12-19 2010-01-05 Spansion Llc System and method for maintaining RAM command timing across phase-shifted time domains
US8326252B2 (en) * 2008-12-30 2012-12-04 Silicon Laboratories Inc. Controllable image cancellation in a radio receiver
US8265584B2 (en) * 2009-06-29 2012-09-11 Silicon Laboratories Inc. Providing image rejection calibration for a receiver
KR101050403B1 (ko) * 2009-07-03 2011-07-19 주식회사 하이닉스반도체 지연라인
US8358994B2 (en) * 2009-08-19 2013-01-22 Silicon Laboratories Inc. Mitigating radio receiver multipath noise
JP2011081732A (ja) * 2009-10-09 2011-04-21 Elpida Memory Inc 半導体装置及びその調整方法並びにデータ処理システム
US8290457B2 (en) 2010-04-27 2012-10-16 Silicon Laboratories Inc. Performing impulse blanking based on blocker information
US8599642B2 (en) * 2010-06-23 2013-12-03 International Business Machines Corporation Port enable signal generation for gating a memory array device output
US9843315B2 (en) 2011-11-01 2017-12-12 Rambus Inc. Data transmission using delayed timing signals
US9036740B2 (en) 2013-06-19 2015-05-19 Silicon Laboratories Inc. Performing image rejection on bandpass signals
KR20160059126A (ko) * 2014-11-18 2016-05-26 에스케이하이닉스 주식회사 지연 회로
US9819524B2 (en) 2014-11-21 2017-11-14 Silicon Laboratories Inc. Image rejection calibration with a passive network
US9319027B1 (en) 2014-12-17 2016-04-19 Silicon Laboratories Inc. Injecting a tone for image rejection calibration
US9866208B2 (en) 2015-06-15 2018-01-09 Microsoft Technology Lincensing, LLC Precision measurements and calibrations for timing generators
EP3232278B1 (de) * 2016-04-11 2020-03-18 NXP USA, Inc. Kalibrierverfahren und vorrichtung für hohe tdc-auflösung
US10860052B2 (en) * 2018-01-12 2020-12-08 California Institute Of Technology Hybrid single loop feedback retiming circuit
US10367480B1 (en) 2018-03-12 2019-07-30 Honeywell International Inc. Systems and methods for generating high performance pulse width modulation (PWM) signals
US10937473B2 (en) * 2018-08-08 2021-03-02 Micron Technology, Inc. Clock signal drivers for read and write memory operations
US10901454B2 (en) 2019-02-06 2021-01-26 Qualcomm Incorporated Clock buffering to reduce memory hold time
US11282566B2 (en) * 2020-01-15 2022-03-22 Micron Technology, Inc. Apparatuses and methods for delay control
WO2021210090A1 (ja) * 2020-04-15 2021-10-21 三菱電機株式会社 遅延同期回路及びクロック送信回路
US11356112B1 (en) * 2021-01-27 2022-06-07 Infineon Technologies Ag Coarse-fine counting architecture for a VCO-ADC based on interlocked binary asynchronous counters
EP4099052A1 (de) * 2021-06-03 2022-12-07 Allegro MicroSystems, LLC Angeordneter zeit-digital-wandler
US11526453B1 (en) 2021-08-13 2022-12-13 Micron Technology, Inc. Apparatus including parallel pipelines and methods of manufacturing the same

Family Cites Families (147)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3633174A (en) 1970-04-14 1972-01-04 Us Navy Memory system having self-adjusting strobe timing
JPS5518085B2 (de) 1974-08-14 1980-05-16
US4096402A (en) * 1975-12-29 1978-06-20 Mostek Corporation MOSFET buffer for TTL logic input and method of operation
US4077016A (en) * 1977-02-22 1978-02-28 Ncr Corporation Apparatus and method for inhibiting false locking of a phase-locked loop
DE2945331C2 (de) 1979-11-09 1984-05-30 Nixdorf Computer Ag, 4790 Paderborn Vorrichtung in einer Signal-oder Datenverarbeitungsanlage zur Einstellung einer Signalverarbeitungsschaltung
US4404474A (en) * 1981-02-06 1983-09-13 Rca Corporation Active load pulse generating circuit
US4481625A (en) * 1981-10-21 1984-11-06 Elxsi High speed data bus system
US4511846A (en) * 1982-05-24 1985-04-16 Fairchild Camera And Instrument Corporation Deskewing time-critical signals in automatic test equipment
US4508983A (en) 1983-02-10 1985-04-02 Motorola, Inc. MOS Analog switch driven by complementary, minimally skewed clock signals
US4603320A (en) 1983-04-13 1986-07-29 Anico Research, Ltd. Inc. Connector interface
US4638451A (en) 1983-05-03 1987-01-20 Texas Instruments Incorporated Microprocessor system with programmable interface
US4514647A (en) * 1983-08-01 1985-04-30 At&T Bell Laboratories Chipset synchronization arrangement
US4573017A (en) 1984-01-03 1986-02-25 Motorola, Inc. Unitary phase and frequency adjust network for a multiple frequency digital phase locked loop
JPH084336B2 (ja) 1984-06-26 1996-01-17 株式会社日立製作所 スキユ−歪除去装置
US4687951A (en) * 1984-10-29 1987-08-18 Texas Instruments Incorporated Fuse link for varying chip operating parameters
JPS61135243A (ja) 1984-12-06 1986-06-23 Fujitsu Ltd 多重伝送方法
US4600895A (en) 1985-04-26 1986-07-15 Minnesota Mining And Manufacturing Company Precision phase synchronization of free-running oscillator output signal to reference signal
US4638187A (en) * 1985-10-01 1987-01-20 Vtc Incorporated CMOS output buffer providing high drive current with minimum output signal distortion
GB2184622B (en) * 1985-12-23 1989-10-18 Philips Nv Outputbuffer and control circuit providing limited current rate at the output
JPH07105818B2 (ja) 1986-05-19 1995-11-13 株式会社日立製作所 並列伝送方式
JPS6337894A (ja) * 1986-07-30 1988-02-18 Mitsubishi Electric Corp ランダムアクセスメモリ
JPS63276795A (ja) 1986-12-16 1988-11-15 Mitsubishi Electric Corp 可変長シフトレジスタ
US4773085A (en) * 1987-06-12 1988-09-20 Bell Communications Research, Inc. Phase and frequency detector circuits
US4972470A (en) 1987-08-06 1990-11-20 Steven Farago Programmable connector
US5086500A (en) * 1987-08-07 1992-02-04 Tektronix, Inc. Synchronized system by adjusting independently clock signals arriving at a plurality of integrated circuits
US4893087A (en) * 1988-01-07 1990-01-09 Motorola, Inc. Low voltage and low power frequency synthesizer
KR0141494B1 (ko) * 1988-01-28 1998-07-15 미다 가쓰시게 레벨시프트회로를 사용한 고속센스 방식의 반도체장치
US5367649A (en) 1988-05-20 1994-11-22 Waferscale Integration, Inc. Programmable controller
US4902986B1 (en) * 1989-01-30 1998-09-01 Credence Systems Corp Phased locked loop to provide precise frequency and phase tracking of two signals
US5020023A (en) * 1989-02-23 1991-05-28 International Business Machines Corporation Automatic vernier synchronization of skewed data streams
US5075569A (en) 1989-03-17 1991-12-24 Tektronix, Inc. Output device circuit and method to minimize impedance fluctuations during crossover
US4958088A (en) * 1989-06-19 1990-09-18 Micron Technology, Inc. Low power three-stage CMOS input buffer with controlled switching
US5165046A (en) * 1989-11-06 1992-11-17 Micron Technology, Inc. High speed CMOS driver circuit
US4984255A (en) 1989-11-15 1991-01-08 National Semiconductor Corporation Edge transition insensitive delay line system and method
JP2671538B2 (ja) * 1990-01-17 1997-10-29 松下電器産業株式会社 入力バッファ回路
JP2787725B2 (ja) * 1990-02-14 1998-08-20 第一電子工業株式会社 データ・クロックのタイミング合わせ回路
US5408640A (en) * 1990-02-21 1995-04-18 Digital Equipment Corporation Phase delay compensator using gating signal generated by a synchronizer for loading and shifting of bit pattern to produce clock phases corresponding to frequency changes
US5239206A (en) * 1990-03-06 1993-08-24 Advanced Micro Devices, Inc. Synchronous circuit with clock skew compensating function and circuits utilizing same
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
US5243703A (en) * 1990-04-18 1993-09-07 Rambus, Inc. Apparatus for synchronously generating clock signals in a data processing system
US5038115A (en) * 1990-05-29 1991-08-06 Myers Glen A Method and apparatus for frequency independent phase tracking of input signals in receiving systems and the like
US5134311A (en) * 1990-06-07 1992-07-28 International Business Machines Corporation Self-adjusting impedance matching driver
DE69116230T2 (de) 1990-06-08 1996-07-04 Toshiba Kawasaki Kk Halbleiterspeicher mit Fehlerbehandlungsschaltung
US5120990A (en) 1990-06-29 1992-06-09 Analog Devices, Inc. Apparatus for generating multiple phase clock signals and phase detector therefor
KR930006622B1 (ko) 1990-09-04 1993-07-21 삼성전자 주식회사 반도체 메모리장치
US5416909A (en) 1990-09-14 1995-05-16 Vlsi Technology, Inc. Input/output controller circuit using a single transceiver to serve multiple input/output ports and method therefor
US5122690A (en) * 1990-10-16 1992-06-16 General Electric Company Interface circuits including driver circuits with switching noise reduction
US5257294A (en) * 1990-11-13 1993-10-26 National Semiconductor Corporation Phase-locked loop circuit and method
TW198135B (de) * 1990-11-20 1993-01-11 Oki Electric Ind Co Ltd
US5281865A (en) * 1990-11-28 1994-01-25 Hitachi, Ltd. Flip-flop circuit
US5128563A (en) * 1990-11-28 1992-07-07 Micron Technology, Inc. CMOS bootstrapped output driver method and circuit
US5229929A (en) 1990-11-30 1993-07-20 Honda Giken Kogyo Kabushiki Kaisha Output peak current correction for PWM invertors
US5223755A (en) 1990-12-26 1993-06-29 Xerox Corporation Extended frequency range variable delay locked loop for clock synchronization
US5150186A (en) * 1991-03-06 1992-09-22 Micron Technology, Inc. CMOS output pull-up driver
US5128560A (en) * 1991-03-22 1992-07-07 Micron Technology, Inc. Boosted supply output driver circuit for driving an all N-channel output stage
US5220208A (en) * 1991-04-29 1993-06-15 Texas Instruments Incorporated Circuitry and method for controlling current in an electronic circuit
US5256989A (en) * 1991-05-03 1993-10-26 Motorola, Inc. Lock detection for a phase lock loop
US5212601A (en) * 1991-05-03 1993-05-18 Western Digital Corporation Disk drive data synchronizer with window shift synthesis
US5289580A (en) 1991-05-10 1994-02-22 Unisys Corporation Programmable multiple I/O interface controller
US5341405A (en) 1991-06-11 1994-08-23 Digital Equipment Corporation Data recovery apparatus and methods
US5194765A (en) * 1991-06-28 1993-03-16 At&T Bell Laboratories Digitally controlled element sizing
US5276642A (en) * 1991-07-15 1994-01-04 Micron Technology, Inc. Method for performing a split read/write operation in a dynamic random access memory
JP2993200B2 (ja) 1991-07-31 1999-12-20 日本電気株式会社 位相同期ループ
KR970005124B1 (ko) * 1991-08-14 1997-04-12 가부시끼가이샤 아드반테스트 가변지연회로
US5168199A (en) 1991-08-14 1992-12-01 Loral Corporation Horizontal linearity correction circuitry for cathode ray tube display
US5130565A (en) 1991-09-06 1992-07-14 Xerox Corporation Self calibrating PWM utilizing feedback loop for adjusting duty cycles of output signal
US5272729A (en) 1991-09-20 1993-12-21 International Business Machines Corporation Clock signal latency elimination network
US5465076A (en) * 1991-10-04 1995-11-07 Nippondenso Co., Ltd. Programmable delay line programmable delay circuit and digital controlled oscillator
US5283631A (en) * 1991-11-01 1994-02-01 Hewlett-Packard Co. Programmable capacitance delay element having inverters controlled by adjustable voltage to offset temperature and voltage supply variations
US5498990A (en) * 1991-11-05 1996-03-12 Monolithic System Technology, Inc. Reduced CMOS-swing clamping circuit for bus lines
US5315388A (en) 1991-11-19 1994-05-24 General Instrument Corporation Multiple serial access memory for use in feedback systems such as motion compensated television
US5295164A (en) * 1991-12-23 1994-03-15 Apple Computer, Inc. Apparatus for providing a system clock locked to an external clock over a wide range of frequencies
JPH05225774A (ja) 1992-02-13 1993-09-03 Mitsubishi Electric Corp マルチポート半導体記憶装置
DE4206082C1 (de) * 1992-02-27 1993-04-08 Siemens Ag, 8000 Muenchen, De
JP3517237B2 (ja) * 1992-03-06 2004-04-12 ラムバス・インコーポレーテッド 同期バス・システムおよびそのためのメモリ装置
US5355391A (en) * 1992-03-06 1994-10-11 Rambus, Inc. High speed bus system
US5182524A (en) 1992-03-10 1993-01-26 The Regents Of The University Of Calif. Method and apparatus for stabilizing pulsed microwave amplifiers
US5233314A (en) 1992-03-27 1993-08-03 Cyrix Corporation Integrated charge-pump phase-locked loop circuit
US5278460A (en) * 1992-04-07 1994-01-11 Micron Technology, Inc. Voltage compensating CMOS input buffer
US5390308A (en) * 1992-04-15 1995-02-14 Rambus, Inc. Method and apparatus for address mapping of dynamic random access memory
US5379299A (en) 1992-04-16 1995-01-03 The Johns Hopkins University High speed propagation delay compensation network
US5254883A (en) * 1992-04-22 1993-10-19 Rambus, Inc. Electrical current source circuitry for a bus
US5485490A (en) * 1992-05-28 1996-01-16 Rambus, Inc. Method and circuitry for clock synchronization
US5317202A (en) * 1992-05-28 1994-05-31 Intel Corporation Delay line loop for 1X on-chip clock generation with zero skew and 50% duty cycle
US5268639A (en) * 1992-06-05 1993-12-07 Rambus, Inc. Testing timing parameters of high speed integrated circuit devices
US5274276A (en) * 1992-06-26 1993-12-28 Micron Technology, Inc. Output driver circuit comprising a programmable circuit for determining the potential at the output node and the method of implementing the circuit
US5473274A (en) * 1992-09-14 1995-12-05 Nec America, Inc. Local clock generator
FR2696061B1 (fr) 1992-09-22 1994-12-02 Rainard Jean Luc Procédé pour retarder temporellement un signal et circuit à retard correspondant.
EP0596657A3 (de) * 1992-11-05 1994-12-07 American Telephone & Telegraph Normalisierung der sichtbaren Fortpflanzungsverzögerung.
US5311481A (en) * 1992-12-17 1994-05-10 Micron Technology, Inc. Wordline driver circuit having a directly gated pull-down device
JP2792801B2 (ja) * 1992-12-28 1998-09-03 三菱電機株式会社 半導体集積回路並びにその設計方法及び製造方法
US5539345A (en) * 1992-12-30 1996-07-23 Digital Equipment Corporation Phase detector apparatus
US5347177A (en) * 1993-01-14 1994-09-13 Lipp Robert J System for interconnecting VLSI circuits with transmission line characteristics
US5544203A (en) * 1993-02-17 1996-08-06 Texas Instruments Incorporated Fine resolution digital delay line with coarse and fine adjustment stages
US5430408A (en) 1993-03-08 1995-07-04 Texas Instruments Incorporated Transmission gate circuit
JP2605576B2 (ja) 1993-04-02 1997-04-30 日本電気株式会社 同期型半導体メモリ
US5488321A (en) * 1993-04-07 1996-01-30 Rambus, Inc. Static high speed comparator
US5347179A (en) * 1993-04-15 1994-09-13 Micron Semiconductor, Inc. Inverting output driver circuit for reducing electron injection into the substrate
US5304952A (en) 1993-05-10 1994-04-19 National Semiconductor Corporation Lock sensor circuit and method for phase lock loop circuits
US5337285A (en) * 1993-05-21 1994-08-09 Rambus, Inc. Method and apparatus for power control in devices
US5506814A (en) * 1993-05-28 1996-04-09 Micron Technology, Inc. Video random access memory device and method implementing independent two WE nibble control
AU6988494A (en) * 1993-05-28 1994-12-20 Rambus Inc. Method and apparatus for implementing refresh in a synchronous dram system
JP2636677B2 (ja) * 1993-06-02 1997-07-30 日本電気株式会社 半導体集積回路
US5511024A (en) * 1993-06-02 1996-04-23 Rambus, Inc. Dynamic random access memory system
US5428311A (en) * 1993-06-30 1995-06-27 Sgs-Thomson Microelectronics, Inc. Fuse circuitry to control the propagation delay of an IC
US5473639A (en) * 1993-07-26 1995-12-05 Hewlett-Packard Company Clock recovery apparatus with means for sensing an out of lock condition
JP3033654B2 (ja) 1993-08-23 2000-04-17 日本電気株式会社 Pll周波数シンセサイザ
JP3232351B2 (ja) * 1993-10-06 2001-11-26 三菱電機株式会社 デジタル回路装置
US5451898A (en) * 1993-11-12 1995-09-19 Rambus, Inc. Bias circuit and differential amplifier having stabilized output swing
JPH07153286A (ja) * 1993-11-30 1995-06-16 Sony Corp 半導体不揮発性記憶装置
US5400283A (en) * 1993-12-13 1995-03-21 Micron Semiconductor, Inc. RAM row decode circuitry that utilizes a precharge circuit that is deactivated by a feedback from an activated word line driver
KR0132504B1 (ko) * 1993-12-21 1998-10-01 문정환 데이타 출력버퍼
WO1995022206A1 (en) * 1994-02-15 1995-08-17 Rambus, Inc. Delay-locked loop
US5424672A (en) * 1994-02-24 1995-06-13 Micron Semiconductor, Inc. Low current redundancy fuse assembly
US5440514A (en) * 1994-03-08 1995-08-08 Motorola Inc. Write control for a memory using a delay locked loop
US5402389A (en) 1994-03-08 1995-03-28 Motorola, Inc. Synchronous memory having parallel output data paths
US5554946A (en) * 1994-04-08 1996-09-10 International Business Machines Corporation Timing signal generator
JP3553639B2 (ja) * 1994-05-12 2004-08-11 アジレント・テクノロジーズ・インク タイミング調整回路
US5515403A (en) * 1994-06-21 1996-05-07 Dsc Communications Corporation Apparatus and method for clock alignment and switching
US5457407A (en) * 1994-07-06 1995-10-10 Sony Electronics Inc. Binary weighted reference circuit for a variable impedance output buffer
JP3537500B2 (ja) 1994-08-16 2004-06-14 バー−ブラウン・コーポレーション インバータ装置
JP3176228B2 (ja) * 1994-08-23 2001-06-11 シャープ株式会社 半導体記憶装置
GB9417266D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Testing a non-volatile memory
US5428317A (en) 1994-09-06 1995-06-27 Motorola, Inc. Phase locked loop with low power feedback path and method of operation
JPH08139572A (ja) * 1994-11-07 1996-05-31 Mitsubishi Electric Corp ラッチ回路
US5497127A (en) * 1994-12-14 1996-03-05 David Sarnoff Research Center, Inc. Wide frequency range CMOS relaxation oscillator with variable hysteresis
US5577236A (en) * 1994-12-30 1996-11-19 International Business Machines Corporation Memory controller for reading data from synchronous RAM
US5489864A (en) * 1995-02-24 1996-02-06 Intel Corporation Delay interpolation circuitry
US5578940A (en) * 1995-04-04 1996-11-26 Rambus, Inc. Modular bus with single or double parallel termination
US5621690A (en) * 1995-04-28 1997-04-15 Intel Corporation Nonvolatile memory blocking architecture and redundancy
JP3386924B2 (ja) * 1995-05-22 2003-03-17 株式会社日立製作所 半導体装置
US5581197A (en) * 1995-05-31 1996-12-03 Hewlett-Packard Co. Method of programming a desired source resistance for a driver stage
US5576645A (en) * 1995-06-05 1996-11-19 Hughes Aircraft Company Sample and hold flip-flop for CMOS logic
US5636173A (en) * 1995-06-07 1997-06-03 Micron Technology, Inc. Auto-precharge during bank selection
JP3403551B2 (ja) 1995-07-14 2003-05-06 沖電気工業株式会社 クロック分配回路
US5621340A (en) * 1995-08-02 1997-04-15 Rambus Inc. Differential comparator for amplifying small swing signals to a full swing output
JP3252666B2 (ja) * 1995-08-14 2002-02-04 日本電気株式会社 半導体記憶装置
US5578941A (en) * 1995-08-23 1996-11-26 Micron Technology, Inc. Voltage compensating CMOS input buffer circuit
US5692165A (en) 1995-09-12 1997-11-25 Micron Electronics Inc. Memory controller with low skew control signal
US5636174A (en) * 1996-01-11 1997-06-03 Cirrus Logic, Inc. Fast cycle time-low latency dynamic random access memories and systems and methods using the same
US5712580A (en) 1996-02-14 1998-01-27 International Business Machines Corporation Linear phase detector for half-speed quadrature clocking architecture
US5627791A (en) * 1996-02-16 1997-05-06 Micron Technology, Inc. Multiple bank memory with auto refresh to specified bank
US5668763A (en) 1996-02-26 1997-09-16 Fujitsu Limited Semiconductor memory for increasing the number of half good memories by selecting and using good memory blocks
US6115318A (en) * 1996-12-03 2000-09-05 Micron Technology, Inc. Clock vernier adjustment
US6172935B1 (en) * 1997-04-25 2001-01-09 Micron Technology, Inc. Synchronous dynamic random access memory device
US6173432B1 (en) * 1997-06-20 2001-01-09 Micron Technology, Inc. Method and apparatus for generating a sequence of clock signals
US6442644B1 (en) * 1997-08-11 2002-08-27 Advanced Memory International, Inc. Memory system having synchronous-link DRAM (SLDRAM) devices and controller

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EP1016086B1 (de) 2002-11-27
US6101197A (en) 2000-08-08
EP1016086A1 (de) 2000-07-05
ATE228709T1 (de) 2002-12-15
US6959016B1 (en) 2005-10-25
WO1999014759A1 (en) 1999-03-25
DE69809777T2 (de) 2003-08-14
AU9571698A (en) 1999-04-05

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