DE69817955D1 - Assoziativspeicher - Google Patents

Assoziativspeicher

Info

Publication number
DE69817955D1
DE69817955D1 DE69817955T DE69817955T DE69817955D1 DE 69817955 D1 DE69817955 D1 DE 69817955D1 DE 69817955 T DE69817955 T DE 69817955T DE 69817955 T DE69817955 T DE 69817955T DE 69817955 D1 DE69817955 D1 DE 69817955D1
Authority
DE
Germany
Prior art keywords
associative memory
associative
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69817955T
Other languages
English (en)
Other versions
DE69817955T2 (de
Inventor
Kenneth James Schultz
Farhad Shafai
Garnet Frederick Randal Gibson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zarbana Digital Fund LLC
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Application granted granted Critical
Publication of DE69817955D1 publication Critical patent/DE69817955D1/de
Publication of DE69817955T2 publication Critical patent/DE69817955T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
DE69817955T 1997-09-04 1998-06-18 Assoziativspeicher Expired - Lifetime DE69817955T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US923824 1997-09-04
US08/923,824 US5943252A (en) 1997-09-04 1997-09-04 Content addressable memory

Publications (2)

Publication Number Publication Date
DE69817955D1 true DE69817955D1 (de) 2003-10-16
DE69817955T2 DE69817955T2 (de) 2004-05-19

Family

ID=25449314

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69817955T Expired - Lifetime DE69817955T2 (de) 1997-09-04 1998-06-18 Assoziativspeicher

Country Status (5)

Country Link
US (1) US5943252A (de)
EP (1) EP0901130B1 (de)
JP (1) JP4603103B2 (de)
KR (1) KR100553632B1 (de)
DE (1) DE69817955T2 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6160419A (en) * 1997-11-03 2000-12-12 Altera Corporation Programmable logic architecture incorporating a content addressable embedded array block
EP0936625A3 (de) * 1998-02-17 2003-09-03 Texas Instruments Incorporated Assoziativspeicher (CAM)
US6392910B1 (en) * 1999-09-10 2002-05-21 Sibercore Technologies, Inc. Priority encoder with multiple match function for content addressable memories and methods for implementing the same
US6801981B1 (en) * 2000-06-14 2004-10-05 Netlogic Microsystems, Inc. Intra-row configurability of content addressable memory
US6542391B2 (en) * 2000-06-08 2003-04-01 Netlogic Microsystems, Inc. Content addressable memory with configurable class-based storage partition
US6799243B1 (en) * 2000-06-14 2004-09-28 Netlogic Microsystems, Inc. Method and apparatus for detecting a match in an intra-row configurable cam system
US6751701B1 (en) * 2000-06-14 2004-06-15 Netlogic Microsystems, Inc. Method and apparatus for detecting a multiple match in an intra-row configurable CAM system
US6757779B1 (en) 1999-09-23 2004-06-29 Netlogic Microsystems, Inc. Content addressable memory with selectable mask write mode
US6813680B1 (en) * 2000-06-14 2004-11-02 Netlogic Microsystems, Inc. Method and apparatus for loading comparand data into a content addressable memory system
US6795892B1 (en) * 2000-06-14 2004-09-21 Netlogic Microsystems, Inc. Method and apparatus for determining a match address in an intra-row configurable cam device
US6487131B1 (en) * 1999-12-30 2002-11-26 Intel Corporation Method and apparatus for testing a CAM addressed cache
US6243281B1 (en) * 2000-06-14 2001-06-05 Netlogic Microsystems, Inc. Method and apparatus for accessing a segment of CAM cells in an intra-row configurable CAM system
US6252789B1 (en) 2000-06-14 2001-06-26 Netlogic Microsystems, Inc. Inter-row configurability of content addressable memory
US6560670B1 (en) 2000-06-14 2003-05-06 Netlogic Microsystems, Inc. Inter-row configurability of content addressable memory
US6246601B1 (en) 2000-06-14 2001-06-12 Netlogic Microsystems, Inc. Method and apparatus for using an inter-row configurable content addressable memory
US6718521B1 (en) 2000-08-14 2004-04-06 International Business Machines Corporation Method and system for measuring and reporting test coverage of logic designs
WO2003038834A1 (en) * 2001-10-31 2003-05-08 Mosaid Technologies Incorporated Column redundancy for content addressable memory
CA2360897C (en) 2001-10-31 2011-01-25 Mosaid Technologies Incorporated Column redundancy for content addressable memory
US6717876B2 (en) 2001-12-28 2004-04-06 Mosaid Technologies Incorporated Matchline sensing for content addressable memories
US7512918B2 (en) * 2005-08-17 2009-03-31 Lsi Corporation Multimode delay analysis for simplifying integrated circuit design timing models
KR20130046125A (ko) * 2011-10-27 2013-05-07 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 구동 방법
US10460822B2 (en) * 2017-08-23 2019-10-29 Arm Limited Memory with a controllable I/O functional unit
CN111491018B (zh) * 2020-04-07 2022-06-10 中国建设银行股份有限公司 模型下载方法及系统

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6045503B2 (ja) * 1979-10-03 1985-10-09 日本電信電話株式会社 連想メモリ装置
JPH071636B2 (ja) * 1986-03-20 1995-01-11 松下電器産業株式会社 変換バツフア装置
JPH0721957B2 (ja) * 1987-01-22 1995-03-08 日本電気株式会社 選択的連想記憶装置
CA1286803C (en) * 1989-02-28 1991-07-23 Benoit Nadeau-Dostie Serial testing technique for embedded memories
US5072422A (en) * 1989-05-15 1991-12-10 E-Systems, Inc. Content-addressed memory system with word cells having select and match bits
US5491806A (en) * 1990-06-26 1996-02-13 Lsi Logic Corporation Optimized translation lookaside buffer slice having stored mask bits
US5220526A (en) * 1991-03-01 1993-06-15 Motorola, Inc. Method and apparatus for indicating a duplication of entries in a content addressable storage device
US5289403A (en) * 1991-07-08 1994-02-22 Hewlett-Packard Company Self-timed content addressable memory access mechanism with built-in margin test feature
GB2259589A (en) * 1991-09-12 1993-03-17 Motorola Inc Self - timed random access memories
TW211094B (en) * 1992-04-30 1993-08-11 American Telephone & Telegraph Built-in self-test network
JP3528927B2 (ja) * 1993-06-22 2004-05-24 川崎マイクロエレクトロニクス株式会社 半導体記憶装置
US5450351A (en) * 1993-11-19 1995-09-12 International Business Machines Corporation Content addressable memory implementation with random access memory
JP3114957B2 (ja) * 1993-12-13 2000-12-04 川崎製鉄株式会社 連想メモリ
US5428565A (en) * 1994-03-11 1995-06-27 Intel Corporation Single stage sensing apparatus for a content addressable memory
US5596539A (en) * 1995-12-28 1997-01-21 Lsi Logic Corporation Method and apparatus for a low power self-timed memory control system
US5706224A (en) * 1996-10-10 1998-01-06 Quality Semiconductor, Inc. Content addressable memory and random access memory partition circuit

Also Published As

Publication number Publication date
EP0901130A2 (de) 1999-03-10
KR19990029488A (ko) 1999-04-26
DE69817955T2 (de) 2004-05-19
US5943252A (en) 1999-08-24
EP0901130A3 (de) 2000-01-05
EP0901130B1 (de) 2003-09-10
JP4603103B2 (ja) 2010-12-22
JPH1196773A (ja) 1999-04-09
KR100553632B1 (ko) 2006-04-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: INDEPENDENCE MANZANAR LLC, LAS VEGAS, NEV., US