DE69833087D1 - Verfahren zur Herstellung von Dickfilmschaltungen - Google Patents

Verfahren zur Herstellung von Dickfilmschaltungen

Info

Publication number
DE69833087D1
DE69833087D1 DE69833087T DE69833087T DE69833087D1 DE 69833087 D1 DE69833087 D1 DE 69833087D1 DE 69833087 T DE69833087 T DE 69833087T DE 69833087 T DE69833087 T DE 69833087T DE 69833087 D1 DE69833087 D1 DE 69833087D1
Authority
DE
Germany
Prior art keywords
film circuits
producing thick
thick
producing
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69833087T
Other languages
English (en)
Other versions
DE69833087T2 (de
Inventor
James Edward Walsh
John Karl Isenberg
Frans Peter Lautzenhiser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Delphi Technologies Inc
Original Assignee
Delphi Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Delphi Technologies Inc filed Critical Delphi Technologies Inc
Publication of DE69833087D1 publication Critical patent/DE69833087D1/de
Application granted granted Critical
Publication of DE69833087T2 publication Critical patent/DE69833087T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/166—Alignment or registration; Control of registration
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/23907—Pile or nap type surface or component
    • Y10T428/23986—With coating, impregnation, or bond
DE1998633087 1997-10-08 1998-09-14 Verfahren zur Herstellung von Dickfilmschaltungen Expired - Lifetime DE69833087T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94693197A 1997-10-08 1997-10-08
US946931 1997-10-08

Publications (2)

Publication Number Publication Date
DE69833087D1 true DE69833087D1 (de) 2006-03-30
DE69833087T2 DE69833087T2 (de) 2006-07-20

Family

ID=25485205

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1998633087 Expired - Lifetime DE69833087T2 (de) 1997-10-08 1998-09-14 Verfahren zur Herstellung von Dickfilmschaltungen

Country Status (3)

Country Link
US (1) US6143355A (de)
EP (1) EP0909117B1 (de)
DE (1) DE69833087T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6348742B1 (en) * 1999-01-25 2002-02-19 Clear Logic, Inc. Sacrificial bond pads for laser configured integrated circuits
IT1311277B1 (it) * 1999-12-23 2002-03-12 St Microelectronics Srl Dispositivo elettronico con collegamenti a doppio filo, metodo difabbricazione di tale dispositivo elettronico e metodo di verifica
AU2001253142A1 (en) * 2000-04-04 2001-10-30 Parlex Corporation High speed flip chip assembly process
US6476332B1 (en) * 2001-09-12 2002-11-05 Visteon Global Technologies, Inc. Conductor systems for thick film electronic circuits
DE60109937T2 (de) * 2001-10-22 2006-02-23 Agilent Technologies, Inc. (n.d.Ges.d.Staates Delaware), Palo Alto Positionieren mit leitfähigen Marken
TWI573496B (zh) * 2009-08-05 2017-03-01 薄膜電子Ａｓａ公司 印刷電子之印刷相容設計及佈局方式
DE102018214520A1 (de) * 2018-08-28 2020-03-05 Siemens Aktiengesellschaft Qualitätsmanagement für den Lotpastendruck auf Leiterbahnen
CN109496061A (zh) * 2018-12-10 2019-03-19 浪潮(北京)电子信息产业有限公司 一种电路板的损坏判别方法和系统

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2835353C2 (de) * 1978-08-11 1982-05-13 Luther & Maelzer Gmbh, 3050 Wunstorf Verfahren zur Feststellung des Versatzes zwischen Kontaktlöchern und Leiterbahnen bei einer Leiterplatte sowie eine Leiterplatte zur Verwendung in diesem Verfahren
JPS58135692A (ja) * 1982-02-06 1983-08-12 松下電器産業株式会社 印刷の位置決め方法
FR2560437B1 (fr) * 1984-02-28 1987-05-29 Citroen Sa Procede de report a plat d'elements de puissance sur un reseau conducteur par brasage de leurs connexions
US4914829A (en) * 1988-12-16 1990-04-10 Ag Communication Systems Corporation Image alignment indicators
US5028867A (en) * 1989-08-31 1991-07-02 Nippon Seiki Co., Ltd. Printed-wiring board
JPH03131087A (ja) * 1989-10-17 1991-06-04 Hitachi Aic Inc プリント配線板の印刷ズレ検出方法
JP2752486B2 (ja) * 1989-12-29 1998-05-18 キヤノン株式会社 インクジェット記録ヘッドおよびその検査方法ならびにインクジェット記録装置
JPH0521923A (ja) * 1990-12-04 1993-01-29 Nec Corp 印刷配線板
JPH0580104A (ja) * 1991-09-20 1993-04-02 Cmk Corp モータ用プリント配線板の製造方法
JPH05267813A (ja) * 1992-03-24 1993-10-15 Ngk Insulators Ltd 厚膜回路基板、その製造方法および厚膜回路基板製造用基板

Also Published As

Publication number Publication date
EP0909117A3 (de) 2000-09-06
EP0909117B1 (de) 2006-01-04
EP0909117A2 (de) 1999-04-14
US6143355A (en) 2000-11-07
DE69833087T2 (de) 2006-07-20

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Legal Events

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8364 No opposition during term of opposition