DE69928898D1 - Kodierte Ausgänge eines Inhaltsadressierbaren Speichers - Google Patents
Kodierte Ausgänge eines Inhaltsadressierbaren SpeichersInfo
- Publication number
- DE69928898D1 DE69928898D1 DE69928898T DE69928898T DE69928898D1 DE 69928898 D1 DE69928898 D1 DE 69928898D1 DE 69928898 T DE69928898 T DE 69928898T DE 69928898 T DE69928898 T DE 69928898T DE 69928898 D1 DE69928898 D1 DE 69928898D1
- Authority
- DE
- Germany
- Prior art keywords
- content
- addressable memory
- encoded outputs
- encoded
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10719798P | 1998-11-05 | 1998-11-05 | |
US09/389,995 US6453382B1 (en) | 1998-11-05 | 1999-09-02 | Content addressable memory encoded outputs |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69928898D1 true DE69928898D1 (de) | 2006-01-19 |
Family
ID=26804501
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69928898T Expired - Lifetime DE69928898D1 (de) | 1998-11-05 | 1999-10-25 | Kodierte Ausgänge eines Inhaltsadressierbaren Speichers |
Country Status (4)
Country | Link |
---|---|
US (1) | US6453382B1 (de) |
EP (1) | EP0999554B1 (de) |
JP (1) | JP4726098B2 (de) |
DE (1) | DE69928898D1 (de) |
Families Citing this family (62)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6407576B1 (en) * | 1999-03-04 | 2002-06-18 | Altera Corporation | Interconnection and input/output resources for programmable logic integrated circuit devices |
US6781408B1 (en) | 2002-04-24 | 2004-08-24 | Altera Corporation | Programmable logic device with routing channels |
US7142011B1 (en) | 2002-04-24 | 2006-11-28 | Altera Corporation | Programmable logic device with routing channels |
US7230451B1 (en) | 2005-08-22 | 2007-06-12 | Altera Corporation | Programmable logic device with routing channels |
US8620980B1 (en) | 2005-09-27 | 2013-12-31 | Altera Corporation | Programmable device with specialized multiplier blocks |
US7590676B1 (en) | 2005-09-27 | 2009-09-15 | Altera Corporation | Programmable logic device with specialized multiplier blocks |
US7902864B1 (en) | 2005-12-01 | 2011-03-08 | Altera Corporation | Heterogeneous labs |
US8266199B2 (en) | 2006-02-09 | 2012-09-11 | Altera Corporation | Specialized processing block for programmable logic device |
US8041759B1 (en) | 2006-02-09 | 2011-10-18 | Altera Corporation | Specialized processing block for programmable logic device |
US8301681B1 (en) | 2006-02-09 | 2012-10-30 | Altera Corporation | Specialized processing block for programmable logic device |
US8266198B2 (en) | 2006-02-09 | 2012-09-11 | Altera Corporation | Specialized processing block for programmable logic device |
US7836117B1 (en) | 2006-04-07 | 2010-11-16 | Altera Corporation | Specialized processing block for programmable logic device |
US7822799B1 (en) | 2006-06-26 | 2010-10-26 | Altera Corporation | Adder-rounder circuitry for specialized processing block in programmable logic device |
US8386550B1 (en) | 2006-09-20 | 2013-02-26 | Altera Corporation | Method for configuring a finite impulse response filter in a programmable logic device |
US7930336B2 (en) | 2006-12-05 | 2011-04-19 | Altera Corporation | Large multiplier for programmable logic device |
US8386553B1 (en) | 2006-12-05 | 2013-02-26 | Altera Corporation | Large multiplier for programmable logic device |
US7814137B1 (en) | 2007-01-09 | 2010-10-12 | Altera Corporation | Combined interpolation and decimation filter for programmable logic device |
US8650231B1 (en) | 2007-01-22 | 2014-02-11 | Altera Corporation | Configuring floating point operations in a programmable device |
US7865541B1 (en) | 2007-01-22 | 2011-01-04 | Altera Corporation | Configuring floating point operations in a programmable logic device |
US8645450B1 (en) | 2007-03-02 | 2014-02-04 | Altera Corporation | Multiplier-accumulator circuitry and methods |
US7949699B1 (en) | 2007-08-30 | 2011-05-24 | Altera Corporation | Implementation of decimation filter in integrated circuit device using ram-based data storage |
US8959137B1 (en) | 2008-02-20 | 2015-02-17 | Altera Corporation | Implementing large multipliers in a programmable integrated circuit device |
US8244789B1 (en) | 2008-03-14 | 2012-08-14 | Altera Corporation | Normalization of floating point operations in a programmable integrated circuit device |
US8626815B1 (en) | 2008-07-14 | 2014-01-07 | Altera Corporation | Configuring a programmable integrated circuit device to perform matrix multiplication |
US8255448B1 (en) | 2008-10-02 | 2012-08-28 | Altera Corporation | Implementing division in a programmable integrated circuit device |
US8307023B1 (en) | 2008-10-10 | 2012-11-06 | Altera Corporation | DSP block for implementing large multiplier on a programmable integrated circuit device |
US8468192B1 (en) | 2009-03-03 | 2013-06-18 | Altera Corporation | Implementing multipliers in a programmable integrated circuit device |
US8549055B2 (en) | 2009-03-03 | 2013-10-01 | Altera Corporation | Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry |
US8706790B1 (en) | 2009-03-03 | 2014-04-22 | Altera Corporation | Implementing mixed-precision floating-point operations in a programmable integrated circuit device |
US8805916B2 (en) | 2009-03-03 | 2014-08-12 | Altera Corporation | Digital signal processing circuitry with redundancy and bidirectional data paths |
US8886696B1 (en) | 2009-03-03 | 2014-11-11 | Altera Corporation | Digital signal processing circuitry with redundancy and ability to support larger multipliers |
US8645449B1 (en) | 2009-03-03 | 2014-02-04 | Altera Corporation | Combined floating point adder and subtractor |
US8650236B1 (en) | 2009-08-04 | 2014-02-11 | Altera Corporation | High-rate interpolation or decimation filter in integrated circuit device |
US8396914B1 (en) | 2009-09-11 | 2013-03-12 | Altera Corporation | Matrix decomposition in an integrated circuit device |
US8412756B1 (en) | 2009-09-11 | 2013-04-02 | Altera Corporation | Multi-operand floating point operations in a programmable integrated circuit device |
US8539016B1 (en) | 2010-02-09 | 2013-09-17 | Altera Corporation | QR decomposition in an integrated circuit device |
US7948267B1 (en) | 2010-02-09 | 2011-05-24 | Altera Corporation | Efficient rounding circuits and methods in configurable integrated circuit devices |
US8601044B2 (en) | 2010-03-02 | 2013-12-03 | Altera Corporation | Discrete Fourier Transform in an integrated circuit device |
US8458243B1 (en) | 2010-03-03 | 2013-06-04 | Altera Corporation | Digital signal processing circuit blocks with support for systolic finite-impulse-response digital filtering |
US8484265B1 (en) | 2010-03-04 | 2013-07-09 | Altera Corporation | Angular range reduction in an integrated circuit device |
US8510354B1 (en) | 2010-03-12 | 2013-08-13 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8539014B2 (en) | 2010-03-25 | 2013-09-17 | Altera Corporation | Solving linear matrices in an integrated circuit device |
US8589463B2 (en) | 2010-06-25 | 2013-11-19 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8862650B2 (en) | 2010-06-25 | 2014-10-14 | Altera Corporation | Calculation of trigonometric functions in an integrated circuit device |
US8577951B1 (en) | 2010-08-19 | 2013-11-05 | Altera Corporation | Matrix operations in an integrated circuit device |
US8645451B2 (en) | 2011-03-10 | 2014-02-04 | Altera Corporation | Double-clocked specialized processing block in an integrated circuit device |
US9600278B1 (en) | 2011-05-09 | 2017-03-21 | Altera Corporation | Programmable device using fixed and configurable logic to implement recursive trees |
US8812576B1 (en) | 2011-09-12 | 2014-08-19 | Altera Corporation | QR decomposition in an integrated circuit device |
US8949298B1 (en) | 2011-09-16 | 2015-02-03 | Altera Corporation | Computing floating-point polynomials in an integrated circuit device |
US9053045B1 (en) | 2011-09-16 | 2015-06-09 | Altera Corporation | Computing floating-point polynomials in an integrated circuit device |
US8762443B1 (en) | 2011-11-15 | 2014-06-24 | Altera Corporation | Matrix operations in an integrated circuit device |
US8543634B1 (en) | 2012-03-30 | 2013-09-24 | Altera Corporation | Specialized processing block for programmable integrated circuit device |
US9098332B1 (en) | 2012-06-01 | 2015-08-04 | Altera Corporation | Specialized processing block with fixed- and floating-point structures |
US8996600B1 (en) | 2012-08-03 | 2015-03-31 | Altera Corporation | Specialized processing block for implementing floating-point multiplier with subnormal operation support |
US9207909B1 (en) | 2012-11-26 | 2015-12-08 | Altera Corporation | Polynomial calculations optimized for programmable integrated circuit device structures |
US9189200B1 (en) | 2013-03-14 | 2015-11-17 | Altera Corporation | Multiple-precision processing block in a programmable integrated circuit device |
US9348795B1 (en) | 2013-07-03 | 2016-05-24 | Altera Corporation | Programmable device using fixed and configurable logic to implement floating-point rounding |
US9379687B1 (en) | 2014-01-14 | 2016-06-28 | Altera Corporation | Pipelined systolic finite impulse response filter |
US9792988B2 (en) | 2014-08-12 | 2017-10-17 | Ciena Corporation | Parallel turbine ternary content addressable memory for high-speed applications |
US9684488B2 (en) | 2015-03-26 | 2017-06-20 | Altera Corporation | Combined adder and pre-adder for high-radix multiplier circuit |
US9779785B2 (en) | 2015-05-11 | 2017-10-03 | Wisconsin Alumni Research Foundation | Computer architecture using compute/storage tiles |
US10942706B2 (en) | 2017-05-05 | 2021-03-09 | Intel Corporation | Implementation of floating-point trigonometric functions in an integrated circuit device |
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US3473160A (en) | 1966-10-10 | 1969-10-14 | Stanford Research Inst | Electronically controlled microelectronic cellular logic array |
US3634829A (en) | 1970-10-08 | 1972-01-11 | Us Army | Resolution of address information in a content addressable memory |
US3849638A (en) | 1973-07-18 | 1974-11-19 | Gen Electric | Segmented associative logic circuits |
DE2842288A1 (de) * | 1978-09-28 | 1980-04-17 | Siemens Ag | Datentransferschalter mit assoziativer adressauswahl in einem virtuellen speicher |
USRE34363E (en) | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
DE3477622D1 (en) | 1984-11-30 | 1989-05-11 | Ibm | Memory using conventional cells to perform a ram or an associative memory function |
JP2541248B2 (ja) | 1987-11-20 | 1996-10-09 | 三菱電機株式会社 | プログラマブル・ロジック・アレイ |
US4912345A (en) | 1988-12-29 | 1990-03-27 | Sgs-Thomson Microelectronics, Inc. | Programmable summing functions for programmable logic devices |
JPH0312896A (ja) * | 1989-06-09 | 1991-01-21 | Fujitsu Ltd | 半導体記憶装置 |
US5099150A (en) | 1989-09-29 | 1992-03-24 | Sgs-Thomson Microelectronics, Inc. | Circuit block for programmable logic devices, configurable as a user-writable memory or a logic circuit |
US5128559A (en) | 1989-09-29 | 1992-07-07 | Sgs-Thomson Microelectronics, Inc. | Logic block for programmable logic devices |
US4975601A (en) | 1989-09-29 | 1990-12-04 | Sgs-Thomson Microelectronics, Inc. | User-writable random access memory logic block for programmable logic devices |
US5027011A (en) | 1989-10-31 | 1991-06-25 | Sgs-Thomson Microelectronics, Inc. | Input row drivers for programmable logic devices |
US5144582A (en) | 1990-03-30 | 1992-09-01 | Sgs-Thomson Microelectronics, Inc. | Sram based cell for programmable logic devices |
WO1992002879A1 (en) * | 1990-08-03 | 1992-02-20 | Du Pont Pixel Systems Limited | Virtual memory system |
JP2544020B2 (ja) | 1990-11-19 | 1996-10-16 | 川崎製鉄株式会社 | プログラマブル論理素子 |
US5121006A (en) | 1991-04-22 | 1992-06-09 | Altera Corporation | Registered logic macrocell with product term allocation and adjacent product term stealing |
US5550782A (en) | 1991-09-03 | 1996-08-27 | Altera Corporation | Programmable logic array integrated circuits |
US5270587A (en) | 1992-01-06 | 1993-12-14 | Micron Technology, Inc. | CMOS logic cell for high-speed, zero-power programmable array logic devices |
JP3103421B2 (ja) * | 1992-02-28 | 2000-10-30 | 川崎製鉄株式会社 | 符号化回路 |
US5383146A (en) | 1992-06-08 | 1995-01-17 | Music Semiconductors, Inc. | Memory with CAM and RAM partitions |
GB9303084D0 (en) | 1993-02-16 | 1993-03-31 | Inmos Ltd | Programmable logic circuit |
US5302865A (en) | 1993-02-16 | 1994-04-12 | Intel Corporation | High-speed comparator logic for wide compares in programmable logic devices |
US5362999A (en) | 1993-03-18 | 1994-11-08 | Xilinx, Inc. | EPLD chip with hybrid architecture optimized for both speed and flexibility |
US5809281A (en) | 1993-03-30 | 1998-09-15 | Altera Corporation | Field programmable gate array with high speed SRAM based configurable function block configurable as high performance logic or block of SRAM |
US5386155A (en) | 1993-03-30 | 1995-01-31 | Intel Corporation | Apparatus and method for selecting polarity and output type in a programmable logic device |
US5450608A (en) | 1993-04-15 | 1995-09-12 | Intel Corporation | Programmable logic having selectable output states for initialization and resets asynchronously using control bit associated with each product term |
JP3605168B2 (ja) * | 1994-02-10 | 2004-12-22 | 川崎マイクロエレクトロニクス株式会社 | 連想メモリ |
KR950034265A (ko) | 1994-02-10 | 1995-12-28 | 도자끼 시노부 | 연상메모리 |
US5689195A (en) | 1995-05-17 | 1997-11-18 | Altera Corporation | Programmable logic array integrated circuit devices |
KR0120579B1 (ko) | 1994-07-14 | 1997-10-30 | 김주용 | 리 프로그램가능한 프로그램어블 로직 어래이 |
US5574930A (en) | 1994-08-12 | 1996-11-12 | University Of Hawaii | Computer system and method using functional memory |
JPH0863975A (ja) | 1994-08-25 | 1996-03-08 | Fujitsu Ltd | スタティックramおよびこのスタティックramを有する処理装置 |
US5815726A (en) | 1994-11-04 | 1998-09-29 | Altera Corporation | Coarse-grained look-up table architecture |
US5532957A (en) | 1995-01-31 | 1996-07-02 | Texas Instruments Incorporated | Field reconfigurable logic/memory array |
US5909126A (en) | 1995-05-17 | 1999-06-01 | Altera Corporation | Programmable logic array integrated circuit devices with interleaved logic array blocks |
-
1999
- 1999-09-02 US US09/389,995 patent/US6453382B1/en not_active Expired - Fee Related
- 1999-10-25 EP EP99308429A patent/EP0999554B1/de not_active Expired - Lifetime
- 1999-10-25 DE DE69928898T patent/DE69928898D1/de not_active Expired - Lifetime
- 1999-11-04 JP JP31443999A patent/JP4726098B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2000149572A (ja) | 2000-05-30 |
US6453382B1 (en) | 2002-09-17 |
EP0999554A1 (de) | 2000-05-10 |
EP0999554B1 (de) | 2005-12-14 |
JP4726098B2 (ja) | 2011-07-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |