DE69930102D1 - Verfahren zur herstellung von integrierten schaltungen - Google Patents

Verfahren zur herstellung von integrierten schaltungen

Info

Publication number
DE69930102D1
DE69930102D1 DE69930102T DE69930102T DE69930102D1 DE 69930102 D1 DE69930102 D1 DE 69930102D1 DE 69930102 T DE69930102 T DE 69930102T DE 69930102 T DE69930102 T DE 69930102T DE 69930102 D1 DE69930102 D1 DE 69930102D1
Authority
DE
Germany
Prior art keywords
integrated circuits
producing integrated
producing
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69930102T
Other languages
English (en)
Other versions
DE69930102T2 (de
Inventor
R Nagaswami
Gessel G Van
Wezep A Van
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of DE69930102D1 publication Critical patent/DE69930102D1/de
Application granted granted Critical
Publication of DE69930102T2 publication Critical patent/DE69930102T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
DE69930102T 1998-02-10 1999-01-28 Verfahren zur herstellung von integrierten schaltungen Expired - Lifetime DE69930102T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP98200413 1998-02-10
EP98200413 1998-02-10
PCT/IB1999/000157 WO1999041774A2 (en) 1998-02-10 1999-01-28 Method of manufacturing integrated circuits in which malfunctioning apparatuses are detected

Publications (2)

Publication Number Publication Date
DE69930102D1 true DE69930102D1 (de) 2006-04-27
DE69930102T2 DE69930102T2 (de) 2006-08-31

Family

ID=8233378

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930102T Expired - Lifetime DE69930102T2 (de) 1998-02-10 1999-01-28 Verfahren zur herstellung von integrierten schaltungen

Country Status (5)

Country Link
US (1) US6242270B1 (de)
EP (1) EP0972300B1 (de)
JP (1) JP2001522541A (de)
DE (1) DE69930102T2 (de)
WO (1) WO1999041774A2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6560504B1 (en) * 1999-09-29 2003-05-06 Advanced Micro Devices, Inc. Use of contamination-free manufacturing data in fault detection and classification as well as in run-to-run control
JP2002270667A (ja) * 2001-03-12 2002-09-20 Sony Corp 半導体製造方法及び半導体製造装置
US6749720B2 (en) * 2001-03-21 2004-06-15 Owens Corning Fiberglas Technology, Inc. Wet-formed mat applications for cement backerboards
JP2003022945A (ja) * 2001-07-06 2003-01-24 Mitsubishi Electric Corp 工程管理装置、工程管理方法および工程を管理するためのプログラム
US7194366B2 (en) * 2001-10-19 2007-03-20 Auburn University System and method for estimating reliability of components for testing and quality optimization
JP3699960B2 (ja) * 2003-03-14 2005-09-28 株式会社東芝 検査レシピ作成システム、欠陥レビューシステム、検査レシピ作成方法及び欠陥レビュー方法
WO2005096688A1 (en) * 2004-04-02 2005-10-13 Original Solutions Inc. System and method for defect detection and process improvement for printed circuit board assemblies
US8108805B2 (en) * 2010-03-26 2012-01-31 Tokyo Electron Limited Simplified micro-bridging and roughness analysis
US9639774B2 (en) * 2012-12-07 2017-05-02 Taiwan Semiconductor Manufacturing Co., Ltd. Method for determining applicabilty of a processing device, a processing path and a processing pattern
WO2020179000A1 (ja) * 2019-03-06 2020-09-10 株式会社日立ハイテク 欠陥検査装置、欠陥検査プログラム

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4144493A (en) * 1976-06-30 1979-03-13 International Business Machines Corporation Integrated circuit test structure
US5495417A (en) * 1990-08-14 1996-02-27 Kabushiki Kaisha Toshiba System for automatically producing different semiconductor products in different quantities through a plurality of processes along a production line
JPH05259015A (ja) 1991-04-19 1993-10-08 Matsushita Electron Corp 半導体装置の製造方法
JPH05121521A (ja) * 1991-10-29 1993-05-18 Komatsu Electron Metals Co Ltd 半導体ウエハ製造装置および製造方法
US5544256A (en) * 1993-10-22 1996-08-06 International Business Machines Corporation Automated defect classification system
JPH07201946A (ja) * 1993-12-28 1995-08-04 Hitachi Ltd 半導体装置等の製造方法及びその装置並びに検査方法及びその装置
US5787190A (en) * 1995-06-07 1998-07-28 Advanced Micro Devices, Inc. Method and apparatus for pattern recognition of wafer test bins
US5726920A (en) * 1995-09-29 1998-03-10 Advanced Micro Devices, Inc. Watchdog system having data differentiating means for use in monitoring of semiconductor wafer testing line
US6091846A (en) * 1996-05-31 2000-07-18 Texas Instruments Incorporated Method and system for anomaly detection
US6021380A (en) * 1996-07-09 2000-02-01 Scanis, Inc. Automatic semiconductor wafer sorter/prober with extended optical inspection
JPH10123202A (ja) * 1996-10-21 1998-05-15 Nec Ic Microcomput Syst Ltd 半導体集積回路装置
US6072574A (en) * 1997-01-30 2000-06-06 Micron Technology, Inc. Integrated circuit defect review and classification process
US5862055A (en) * 1997-07-18 1999-01-19 Advanced Micro Devices, Inc. Automatic defect classification individual defect predicate value retention
US6084420A (en) * 1998-11-25 2000-07-04 Chee; Wan Soo Probe assembly for testing

Also Published As

Publication number Publication date
WO1999041774A3 (en) 1999-10-28
EP0972300B1 (de) 2006-03-01
EP0972300A2 (de) 2000-01-19
JP2001522541A (ja) 2001-11-13
US6242270B1 (en) 2001-06-05
DE69930102T2 (de) 2006-08-31
WO1999041774A2 (en) 1999-08-19

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL