DE69930700D1 - Halbleitersubstrat und Verfahren zu seiner Herstellung - Google Patents

Halbleitersubstrat und Verfahren zu seiner Herstellung

Info

Publication number
DE69930700D1
DE69930700D1 DE69930700T DE69930700T DE69930700D1 DE 69930700 D1 DE69930700 D1 DE 69930700D1 DE 69930700 T DE69930700 T DE 69930700T DE 69930700 T DE69930700 T DE 69930700T DE 69930700 D1 DE69930700 D1 DE 69930700D1
Authority
DE
Germany
Prior art keywords
production
semiconductor substrate
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69930700T
Other languages
English (en)
Other versions
DE69930700T2 (de
Inventor
Nobuhiko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of DE69930700D1 publication Critical patent/DE69930700D1/de
Application granted granted Critical
Publication of DE69930700T2 publication Critical patent/DE69930700T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H01L21/02661—In-situ cleaning
DE69930700T 1998-09-04 1999-09-03 Halbleitersubstrat und Verfahren zu seiner Herstellung Expired - Lifetime DE69930700T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25127198 1998-09-04
JP25127198 1998-09-04

Publications (2)

Publication Number Publication Date
DE69930700D1 true DE69930700D1 (de) 2006-05-18
DE69930700T2 DE69930700T2 (de) 2006-11-09

Family

ID=17220319

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69930700T Expired - Lifetime DE69930700T2 (de) 1998-09-04 1999-09-03 Halbleitersubstrat und Verfahren zu seiner Herstellung

Country Status (6)

Country Link
US (1) US6335269B1 (de)
EP (1) EP0984483B1 (de)
KR (1) KR100376658B1 (de)
CN (1) CN1127120C (de)
DE (1) DE69930700T2 (de)
TW (1) TW459390B (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6162705A (en) * 1997-05-12 2000-12-19 Silicon Genesis Corporation Controlled cleavage process and resulting device using beta annealing
US20070122997A1 (en) * 1998-02-19 2007-05-31 Silicon Genesis Corporation Controlled process and resulting device
US6287941B1 (en) * 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6660606B2 (en) * 2000-09-29 2003-12-09 Canon Kabushiki Kaisha Semiconductor-on-insulator annealing method
US7101772B2 (en) * 2000-12-30 2006-09-05 Texas Instruments Incorporated Means for forming SOI
US6524170B2 (en) * 2001-03-19 2003-02-25 Brookhaven Science Associates, Llc Method of surface preparation of niobium
JP2002305293A (ja) * 2001-04-06 2002-10-18 Canon Inc 半導体部材の製造方法及び半導体装置の製造方法
US6743722B2 (en) 2002-01-29 2004-06-01 Strasbaugh Method of spin etching wafers with an alkali solution
JP4464033B2 (ja) * 2002-06-13 2010-05-19 信越半導体株式会社 半導体ウエーハの形状評価方法及び形状評価装置
US7332417B2 (en) * 2003-01-27 2008-02-19 Amberwave Systems Corporation Semiconductor structures with structural homogeneity
TWI242232B (en) * 2003-06-09 2005-10-21 Canon Kk Semiconductor substrate, semiconductor device, and method of manufacturing the same
JP2005136383A (ja) * 2003-10-09 2005-05-26 Canon Inc 有機半導体素子、その製造方法および有機半導体装置
US7542197B2 (en) * 2003-11-01 2009-06-02 Silicon Quest Kabushiki-Kaisha Spatial light modulator featured with an anti-reflective structure
US7354815B2 (en) * 2003-11-18 2008-04-08 Silicon Genesis Corporation Method for fabricating semiconductor devices using strained silicon bearing material
KR100993979B1 (ko) * 2003-12-02 2010-11-11 주식회사 실트론 반도체 웨이퍼의 제조방법
US8993410B2 (en) 2006-09-08 2015-03-31 Silicon Genesis Corporation Substrate cleaving under controlled stress conditions
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
US7811900B2 (en) * 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
TW200818327A (en) * 2006-09-29 2008-04-16 Sumco Techxiv Corp Silicon wafer heat treatment method
US8124916B2 (en) * 2007-04-16 2012-02-28 Maxim Integrated Products, Inc. Thermal processing of silicon wafers
DE102008030679B4 (de) * 2008-04-17 2016-01-28 Von Ardenne Gmbh Vorrichtung zur Diffusionsbehandlung von Werkstücken
US8330126B2 (en) * 2008-08-25 2012-12-11 Silicon Genesis Corporation Race track configuration and method for wafering silicon solar substrates
US8329557B2 (en) * 2009-05-13 2012-12-11 Silicon Genesis Corporation Techniques for forming thin films by implantation with reduced channeling
WO2012102755A1 (en) * 2011-01-28 2012-08-02 Applied Materials, Inc. Carbon addition for low resistivity in situ doped silicon epitaxy
JP6299668B2 (ja) * 2015-05-13 2018-03-28 信越半導体株式会社 ヘイズの評価方法
US20180068886A1 (en) * 2016-09-02 2018-03-08 Qualcomm Incorporated Porous semiconductor layer transfer for an integrated circuit structure
JP6834932B2 (ja) * 2017-12-19 2021-02-24 株式会社Sumco 貼り合わせウェーハ用の支持基板の製造方法および貼り合わせウェーハの製造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2608351B2 (ja) 1990-08-03 1997-05-07 キヤノン株式会社 半導体部材及び半導体部材の製造方法
DE69133359T2 (de) 1990-08-03 2004-12-16 Canon K.K. Verfahren zur Herstellung eines SOI-Substrats
US5750000A (en) 1990-08-03 1998-05-12 Canon Kabushiki Kaisha Semiconductor member, and process for preparing same and semiconductor device formed by use of same
EP1251556B1 (de) 1992-01-30 2010-03-24 Canon Kabushiki Kaisha Herstellungsverfahren für Halbleitersubstrat
JP3214631B2 (ja) 1992-01-31 2001-10-02 キヤノン株式会社 半導体基体及びその作製方法
JPH06295945A (ja) 1993-04-08 1994-10-21 Shin Etsu Handotai Co Ltd 半導体製造プロセスの評価方法および装置
JP3260516B2 (ja) * 1993-09-09 2002-02-25 コマツ電子金属株式会社 貼合せｓｏｉとその製造方法
JP3257580B2 (ja) 1994-03-10 2002-02-18 キヤノン株式会社 半導体基板の作製方法
DE69628505T2 (de) 1995-07-21 2004-05-06 Canon K.K. Halbleitendes Substrat und dessen Herstellungsverfahren
JP3216078B2 (ja) 1995-07-21 2001-10-09 キヤノン株式会社 半導体基材及び半導体基材の製造方法
JPH1032234A (ja) * 1996-07-17 1998-02-03 Toshiba Corp Ｓｏｉ基板の評価方法
EP0996145A3 (de) 1998-09-04 2000-11-08 Canon Kabushiki Kaisha Verfahren zur Herstellung von Halbleitersubstraten

Also Published As

Publication number Publication date
KR100376658B1 (ko) 2003-03-19
US6335269B1 (en) 2002-01-01
EP0984483A3 (de) 2000-11-15
CN1250944A (zh) 2000-04-19
DE69930700T2 (de) 2006-11-09
EP0984483B1 (de) 2006-04-05
CN1127120C (zh) 2003-11-05
KR20000022995A (ko) 2000-04-25
TW459390B (en) 2001-10-11
EP0984483A2 (de) 2000-03-08

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