DE69936097D1 - Hochgeschwindigkeitssignalisierung zur schnittstellenbildung von vlsi cmos-schaltungsanordnungen - Google Patents

Hochgeschwindigkeitssignalisierung zur schnittstellenbildung von vlsi cmos-schaltungsanordnungen

Info

Publication number
DE69936097D1
DE69936097D1 DE69936097T DE69936097T DE69936097D1 DE 69936097 D1 DE69936097 D1 DE 69936097D1 DE 69936097 T DE69936097 T DE 69936097T DE 69936097 T DE69936097 T DE 69936097T DE 69936097 D1 DE69936097 D1 DE 69936097D1
Authority
DE
Germany
Prior art keywords
ssvtr
signals
signal
comparator
master device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69936097T
Other languages
English (en)
Other versions
DE69936097T2 (de
Inventor
Ul Haq Ejaz
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jazio Inc
Original Assignee
Jazio Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/057,158 external-priority patent/US6160423A/en
Application filed by Jazio Inc filed Critical Jazio Inc
Publication of DE69936097D1 publication Critical patent/DE69936097D1/de
Application granted granted Critical
Publication of DE69936097T2 publication Critical patent/DE69936097T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/028—Arrangements specific to the transmitter end
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0278—Arrangements for impedance matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0292—Arrangements specific to the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
DE69936097T 1998-03-16 1999-03-08 Hochgeschwindigkeitssignalisierung zur schnittstellenbildung von vlsi cmos-schaltungsanordnungen Expired - Lifetime DE69936097T2 (de)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
US7821398P 1998-03-16 1998-03-16
US78213P 1998-03-16
US09/057,158 US6160423A (en) 1998-03-16 1998-04-07 High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines
US57158 1998-04-07
US09/165,705 US6151648A (en) 1998-03-16 1998-10-02 High speed bus system and method for using voltage and timing oscillating references for signal detection
US165705 1998-10-02
PCT/US1999/005120 WO1999048260A1 (en) 1998-03-16 1999-03-08 High speed signaling for interfacing vlsi cmos circuits

Publications (2)

Publication Number Publication Date
DE69936097D1 true DE69936097D1 (de) 2007-06-28
DE69936097T2 DE69936097T2 (de) 2008-01-17

Family

ID=27369178

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69936097T Expired - Lifetime DE69936097T2 (de) 1998-03-16 1999-03-08 Hochgeschwindigkeitssignalisierung zur schnittstellenbildung von vlsi cmos-schaltungsanordnungen

Country Status (17)

Country Link
US (2) US6430606B1 (de)
EP (1) EP1064767B8 (de)
JP (1) JP3960752B2 (de)
CN (1) CN100452787C (de)
AT (1) ATE362682T1 (de)
AU (1) AU759089B2 (de)
BR (1) BRPI9908836B1 (de)
CA (1) CA2323446C (de)
DE (1) DE69936097T2 (de)
GB (1) GB2352375B (de)
HU (1) HUP0301259A2 (de)
ID (1) ID26398A (de)
IL (1) IL138411A (de)
PL (1) PL343258A1 (de)
TR (2) TR200101184T2 (de)
TW (1) TW461208B (de)
WO (1) WO1999048260A1 (de)

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Also Published As

Publication number Publication date
GB2352375A (en) 2001-01-24
GB2352375B (en) 2003-06-04
US6513080B1 (en) 2003-01-28
BR9908836A (pt) 2000-11-21
ID26398A (id) 2000-12-21
EP1064767B8 (de) 2007-06-27
TW461208B (en) 2001-10-21
CA2323446C (en) 2016-11-08
BRPI9908836B1 (pt) 2017-04-18
WO1999048260A9 (en) 2001-05-31
EP1064767B1 (de) 2007-05-16
WO1999048260A8 (en) 1999-12-02
IL138411A (en) 2005-11-20
TR200101184T2 (tr) 2002-06-21
WO1999048260A1 (en) 1999-09-23
PL343258A1 (en) 2001-07-30
DE69936097T2 (de) 2008-01-17
AU759089B2 (en) 2003-04-03
CN1297638A (zh) 2001-05-30
ATE362682T1 (de) 2007-06-15
US6430606B1 (en) 2002-08-06
GB0023356D0 (en) 2000-11-08
CN100452787C (zh) 2009-01-14
CA2323446A1 (en) 1999-09-23
JP2002507860A (ja) 2002-03-12
HUP0301259A2 (en) 2003-08-28
JP3960752B2 (ja) 2007-08-15
EP1064767A1 (de) 2001-01-03
AU2992699A (en) 1999-10-11
TR200002649T2 (tr) 2000-11-21
IL138411A0 (en) 2001-10-31

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