DE69937808D1 - Verfahren und vorrichtung zur konfiguration und initialisierung einer speichervorrichtung und eines speicherkanals - Google Patents

Verfahren und vorrichtung zur konfiguration und initialisierung einer speichervorrichtung und eines speicherkanals

Info

Publication number
DE69937808D1
DE69937808D1 DE69937808T DE69937808T DE69937808D1 DE 69937808 D1 DE69937808 D1 DE 69937808D1 DE 69937808 T DE69937808 T DE 69937808T DE 69937808 T DE69937808 T DE 69937808T DE 69937808 D1 DE69937808 D1 DE 69937808D1
Authority
DE
Germany
Prior art keywords
memory
initializing
configuring
channel
memory channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69937808T
Other languages
English (en)
Other versions
DE69937808T2 (de
Inventor
William A Stevens
Puthiya K Nizar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE69937808D1 publication Critical patent/DE69937808D1/de
Application granted granted Critical
Publication of DE69937808T2 publication Critical patent/DE69937808T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Logic Circuits (AREA)
DE69937808T 1998-11-03 1999-10-22 Verfahren und vorrichtung zur konfiguration und initialisierung einer speichervorrichtung und eines speicherkanals Expired - Lifetime DE69937808T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US186051 1998-11-03
US09/186,051 US6226729B1 (en) 1998-11-03 1998-11-03 Method and apparatus for configuring and initializing a memory device and a memory channel
PCT/US1999/024752 WO2000026788A1 (en) 1998-11-03 1999-10-22 A method and apparatus for configuring and initializing a memory device and memory channel

Publications (2)

Publication Number Publication Date
DE69937808D1 true DE69937808D1 (de) 2008-01-31
DE69937808T2 DE69937808T2 (de) 2008-12-04

Family

ID=22683465

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69937808T Expired - Lifetime DE69937808T2 (de) 1998-11-03 1999-10-22 Verfahren und vorrichtung zur konfiguration und initialisierung einer speichervorrichtung und eines speicherkanals

Country Status (9)

Country Link
US (2) US6226729B1 (de)
EP (1) EP1135728B1 (de)
CN (2) CN100492318C (de)
AU (1) AU1221100A (de)
BR (1) BR9915823B1 (de)
DE (1) DE69937808T2 (de)
HK (1) HK1036858A1 (de)
TW (1) TW460782B (de)
WO (1) WO2000026788A1 (de)

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US7663939B2 (en) * 2006-05-30 2010-02-16 Kingston Technology Corporation Voltage stabilizer memory module
US7669086B2 (en) 2006-08-02 2010-02-23 International Business Machines Corporation Systems and methods for providing collision detection in a memory system
US7870459B2 (en) * 2006-10-23 2011-01-11 International Business Machines Corporation High density high reliability memory module with power gating and a fault tolerant address and command bus
US7721140B2 (en) 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
US7606988B2 (en) * 2007-01-29 2009-10-20 International Business Machines Corporation Systems and methods for providing a dynamic memory bank page policy
US7877590B2 (en) * 2007-08-13 2011-01-25 International Business Machines Corporation Consistent data storage subsystem configuration replication
EP2513743B1 (de) 2009-12-17 2017-11-15 Toshiba Memory Corporation Halbleitersystem, halbleitervorrichtung und verfahren zur initialisierung einer elektronischen vorrichtung
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CN113867803A (zh) * 2020-06-30 2021-12-31 华为技术有限公司 一种内存初始化装置、方法及计算机系统

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Also Published As

Publication number Publication date
CN101520766B (zh) 2012-09-19
AU1221100A (en) 2000-05-22
EP1135728A1 (de) 2001-09-26
HK1036858A1 (en) 2002-01-18
CN101520766A (zh) 2009-09-02
DE69937808T2 (de) 2008-12-04
EP1135728B1 (de) 2007-12-19
US6636957B2 (en) 2003-10-21
TW460782B (en) 2001-10-21
CN100492318C (zh) 2009-05-27
BR9915823A (pt) 2001-08-14
BR9915823B1 (pt) 2011-06-28
CN1342282A (zh) 2002-03-27
US6226729B1 (en) 2001-05-01
WO2000026788A1 (en) 2000-05-11
US20010008005A1 (en) 2001-07-12
EP1135728A4 (de) 2004-08-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806