DE69940580D1 - Netzwerk-Sende-Empfänger mit medienunabhängiger Schnittstelle - Google Patents
Netzwerk-Sende-Empfänger mit medienunabhängiger SchnittstelleInfo
- Publication number
- DE69940580D1 DE69940580D1 DE69940580T DE69940580T DE69940580D1 DE 69940580 D1 DE69940580 D1 DE 69940580D1 DE 69940580 T DE69940580 T DE 69940580T DE 69940580 T DE69940580 T DE 69940580T DE 69940580 D1 DE69940580 D1 DE 69940580D1
- Authority
- DE
- Germany
- Prior art keywords
- media
- network transceiver
- independent interface
- independent
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/46—Monitoring; Testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/02—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring length, width or thickness
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
- H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/46—Interconnection of networks
- H04L12/4604—LAN interconnection over a backbone network, e.g. Internet, Frame Relay
- H04L12/462—LAN interconnection over a bridge based backbone
- H04L12/4625—Single bridge functionality, e.g. connection of two networks over a single bridge
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03878—Line equalisers; line build-out devices
- H04L25/03885—Line equalisers; line build-out devices adaptive
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/04—Network management architectures or arrangements
- H04L41/046—Network management architectures or arrangements comprising network management agents or mobile agents therefor
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/18—Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
- H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
- H04L69/323—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the physical layer [OSI layer 1]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/08—Locating faults in cables, transmission lines, or networks
- G01R31/081—Locating faults in cables, transmission lines, or networks according to type of conductors
- G01R31/086—Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution networks, i.e. with interconnected conductors
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3054—Auto-negotiation, e.g. access control between switch gigabit interface connector [GBIC] and link
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US8218398P | 1998-04-17 | 1998-04-17 | |
US09/289,950 US6529961B1 (en) | 1998-04-17 | 1999-04-13 | Network transceiver having media independent interface operable in a general purpose serial interface mode |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69940580D1 true DE69940580D1 (de) | 2009-04-30 |
Family
ID=26767171
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69940580T Expired - Lifetime DE69940580D1 (de) | 1998-04-17 | 1999-04-15 | Netzwerk-Sende-Empfänger mit medienunabhängiger Schnittstelle |
Country Status (3)
Country | Link |
---|---|
US (1) | US6529961B1 (de) |
EP (1) | EP0963080B1 (de) |
DE (1) | DE69940580D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6937571B1 (en) * | 2000-06-19 | 2005-08-30 | Advanced Micro Devices, Inc. | Method of testing a network device through a medium independent interface (MII) |
US6973043B1 (en) * | 2000-10-20 | 2005-12-06 | Advanced Micro Devices, Inc. | Arrangement for converting between a media independent interface and a twisted pair medium using a field programmable gate array |
DE10100363A1 (de) * | 2001-01-05 | 2002-08-01 | Infineon Technologies Ag | Ethernet-Anpaßvorrichtung |
US7466668B2 (en) * | 2001-08-24 | 2008-12-16 | Hewlett-Packard Development Company, L.P. | Reduced pin-count system interface for gigabit ethernet physical layer devices |
US20030061341A1 (en) * | 2001-09-26 | 2003-03-27 | Infineon Technologies North America Corp. | Media cross conversion interface |
US7283481B2 (en) | 2002-03-21 | 2007-10-16 | Broadcom Corporation | Auto detection of copper and fiber mode |
US7787387B2 (en) | 2002-03-21 | 2010-08-31 | Broadcom Corporation | Auto-selection of SGMII or SerDes pass-through modes |
US7362797B2 (en) | 2002-03-21 | 2008-04-22 | Broadcom Corporation | Physical layer device having an analog SERDES pass through mode |
US7334068B2 (en) | 2002-07-26 | 2008-02-19 | Broadcom Corporation | Physical layer device having a SERDES pass through mode |
US7496671B2 (en) | 2003-10-06 | 2009-02-24 | Avago Technologies Fiber Ip (Singapore) Pte. Ltd. | Self-configuring communications module adaptive to different host system types |
US7277031B1 (en) * | 2003-12-15 | 2007-10-02 | Marvell International Ltd. | 100Base-FX serializer/deserializer using 10000Base-X serializer/deserializer |
US7746883B2 (en) * | 2005-03-01 | 2010-06-29 | Hewlett-Packard Development Company, L.P. | Multi-drop ethernet |
JP4423453B2 (ja) * | 2005-05-25 | 2010-03-03 | エルピーダメモリ株式会社 | 半導体記憶装置 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5784370A (en) * | 1995-12-29 | 1998-07-21 | Cypress Semiconductor Corp. | Method and apparatus for regenerating a control signal at an asynchronous transfer mode (ATM) layer or a physical (PHY) layer |
US5907719A (en) * | 1996-01-22 | 1999-05-25 | Cirrus Logic, Inc. | Communication interface unit employing two multiplexer circuits and control logic for performing parallel-to-serial data conversion of a selected asynchronous protocol |
DE69638175D1 (de) * | 1996-02-09 | 2010-06-10 | Level One Comm Inc | Zwischenverstärker mit automatischer geschwindigkeitsumschaltung |
US5905870A (en) * | 1996-09-11 | 1999-05-18 | Advanced Micro Devices, Inc | Arrangement for initiating and maintaining flow control in shared-medium, full-duplex, and switched networks |
US6108726A (en) * | 1996-09-13 | 2000-08-22 | Advanced Micro Devices. Inc. | Reducing the pin count within a switching element through the use of a multiplexer |
US6704296B1 (en) * | 1996-09-16 | 2004-03-09 | Advanced Micro Devices, Inc. | Optimized MII for 802.3u (100 BASE-T) fast ethernet PHYs |
US6031767A (en) * | 1996-09-18 | 2000-02-29 | International Business Machines Corporation | Integrated circuit I/O interface that uses excess data I/O pin bandwidth to input control signals or output status information |
US5864309A (en) * | 1996-10-17 | 1999-01-26 | Winbond Electronics Corp. | Serial data timing base modulator |
US5995514A (en) * | 1997-01-31 | 1999-11-30 | Advanced Micro Devices, Inc. | Reversible media independent interface |
US6249521B1 (en) * | 1997-02-14 | 2001-06-19 | Advanced Micro Devices, Inc. | Method and apparatus for creating a port vector |
US6130891A (en) * | 1997-02-14 | 2000-10-10 | Advanced Micro Devices, Inc. | Integrated multiport switch having management information base (MIB) interface temporary storage |
US6459700B1 (en) * | 1997-06-23 | 2002-10-01 | Compaq Computer Corporation | Multiple segment network device configured for a stacked arrangement |
US6044087A (en) * | 1997-06-30 | 2000-03-28 | Sun Microsystems, Inc. | Interface for a highly integrated ethernet network element |
US6069897A (en) * | 1997-07-09 | 2000-05-30 | Compaq Computer Corporation | Interface with dual mode of operation |
US6222852B1 (en) * | 1997-10-10 | 2001-04-24 | Nortel Networks Limited | Method and apparatus for transmitting dual speed ethernet information (10BASE-T and 100BASE-TX) across a physical layer device service interface |
US6430695B1 (en) * | 1998-04-17 | 2002-08-06 | Advanced Micro Devices, Inc. | Network transceiver having circuitry for referencing transmit data to a selected input clock |
US6269104B1 (en) * | 1998-04-21 | 2001-07-31 | Hewlett- Packard Company | Link control state machine for controlling a media access controller, a serial physical layer device and a media independent interface physical layer device |
-
1999
- 1999-04-13 US US09/289,950 patent/US6529961B1/en not_active Expired - Lifetime
- 1999-04-15 DE DE69940580T patent/DE69940580D1/de not_active Expired - Lifetime
- 1999-04-15 EP EP99302936A patent/EP0963080B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0963080B1 (de) | 2009-03-18 |
EP0963080A3 (de) | 2005-10-12 |
US6529961B1 (en) | 2003-03-04 |
EP0963080A2 (de) | 1999-12-08 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |