EP0042649A1 - Service apparatus with digital programming apparatus which is protected against disturbances at any switch-on - Google Patents

Abstract

An appliance including a digital programming device for forming a sequence of control signals. When the device is switched on by way of the power supply plug, an unpredictable switch-on phenomenon occurs and the program memory is liable to be addressed in a variety of locations. Therefore, during a preparation routine the start conditions are realized. Furthermore, a multi-bit code is generated and stored in a volatile section of the memory. The operative routine comprises a sub-routine which tests this code. If the code is not correct, the preparation routine has not been followed when the appliance was switched-on. The operative routine is then interrupted and first the preparation routine is executed. All further locations in the non-volatile memory section preferably refer to the preparation routine.

Description

FIELD OF THE INVENTION

• a) einem Anschluss mit einem lösbaren Kontaktelement für eine elektrische Netzspeisequelle, mit einem Verteilerelement zum Abgreifen einer ersten und einer zweiten Speisespannung an der Netzspeisequelle,
• b) einer Steuerschaltung mit einem ersten Eingang zum Empfangen der ersten Speisespannung, einem ersten Eingang zum Empfangen eines spezifischen Steuersignals und einem ersten Ausgang für ein gesteuertes Erregersignal,
• c) einem Dienstleistungselement mit einem zweiten Eingang zum Empfang des Erregersignals,
• d) einer digital arbeitenden Programmieranordnung mit einem nicht flüchtigen Speicherabschnitt, der an ersten Speicherstellen ein Steuerprogramm für das Dienstleistungselement und weiter einen flüchtigen Speicherabschnitt für variable Daten, einen dritten Eingang zum Empfang der zweiten Speisespannung, direkt aus dem Verteilerelement, einen vierten Eingang für ein Spezifikationssignal für das Dienstleistungselement und einen zweiten Ausgang für das spezifische Steuersignal enthält,
• e) extern aktivierbaren Mitteln zur Bildung des erwähnten Spezifikationssignals.

The invention relates to a service island arrangement for general use

• a) a connection with a detachable contact element for an electrical supply source, with a distributor element for tapping a first and a second supply voltage at the supply source,
• b) a control circuit with a first input for receiving the first supply voltage, a first input for receiving a specific control signal and a first output for a controlled excitation signal,
• c) a service element with a second input for receiving the excitation signal,
• d) a digitally working programming arrangement with a non-volatile memory section, a control program for the service element at first memory locations and further a volatile memory section for variable data, a third input for receiving the second supply voltage, directly from the distributor element, a fourth input for a specification signal for the service element and a second output for the specific control signal,
• e) externally activatable means for forming the specified specification signal.

• - Geschirrspüler und elektrische/elektronische Ofen: es gelten hierfür entsprechende Situationen;
• - Fernsehempfänger mit eingebauten Generatoren für Spiele, Vorwahlanordnungen für bestimmte Sender, für Einstellgrössen und dergleichen;
• - Staubsauger deren Saugleistung in Abhängigkeit von einem oder mehreren gemessenen Parametern bestimmt wird;
• - Bestrahlungsanordnungen für den Hausgebrauch mit voreinstellbarer Bestrahlungszeit. Das nachstehende Ausführungsbeispiel ist die aus der Sicht des Erfinders beste Ausführungsform;

Such service arrangements have gradually become established. A service arrangement is understood to be a commodity for the operation of which no special knowledge is required; the arrangement is divided, so to speak, into two: the service element, which performs the actual use function, and the control, which determines how this use function is operated. Examples of such service arrangements are: Washing machines with several washing programs (the choice is determined by selective setting and / or by measurement signals from sensors of certain parameters, for example depending on the type and amount of laundry);

• - Dishwashers and electric / electronic ovens: corresponding situations apply;
• - TV receivers with built-in generators for games, preselection arrangements for certain transmitters, for setting parameters and the like;
• - Vacuum cleaners whose suction power is determined as a function of one or more measured parameters;
• - Irradiation arrangements for home use with a preset irradiation time. The following embodiment is the best embodiment from the inventor's point of view;

A large subdivision of the service arrangement can therefore be identified as household appliances. "Island ..." means that the service arrangement can work independently without being subordinate to an external arrangement. So it does not work in the manner of a peripheral device that is subordinate to a central computer.

Such arrangements can basically be put into operation in two ways. Firstly, by means of a switch or something like this, whereby the program is started under normal conditions. This is also how professional devices such as a digital computer and its peripheral devices (terminals) work. The second type of commissioning is the voltage supply for arrangement by plugging or the like of the contact element into a contact point (for example the wall socket) of the mains supply source. Especially with easily transportable arrangements that are used only for a relatively short time, the latter will often take place, because they can be put away after use. Also, such service arrangements are often not equipped with such a price-increasing switch. This second type of commissioning results in a particularly unpredictable, long-lasting and bouncing Switch-on phenomenon in the supply voltage. For a corresponding execution of the program, it is necessary for the program control arrangement to start at a predetermined address. As will be described in the following, a microprocessor of the TMS 1000 type is used in the exemplary embodiment as the program control arrangement. The start address can be formed by special measures, either when the supply voltage reaches a sufficiently high level within 3ms and no longer becomes low (this condition is therefore not met), or when a specific voltage pulse is generated at a designated initialization input becomes. Similar conditions apply to other program control arrangements. Such a program control arrangement generally contains a memory section with the (fixed) program. There is also a memory space for variable data, such as one or more addresses for the program memory, intermediate results, parameter signals and the like. These variable data are lost if the mains voltage is interrupted.

A particular problem with many of the household appliances mentioned is that they affect a physical parameter value, e.g. an engine speed or temperature. If any content of the memory with non-fixed content can arise, the above-mentioned influencing can take place in an incorrect manner and / or at an incorrect time (for example, the washing machine runs "directly" or the irradiation lamp should be in operation for an inadmissibly long irradiation time).

PRESENTATION OF THE INVENTION

The invention has for its object to achieve the start address automatically and regardless of the fact that by strong and long-lasting interference signals or in particular the second supply voltage, any memory address can be reached, so that in particular no operational state with regard to influencing he mentioned parameter values can be reached, which state cannot be left or can only be left by special actions or only after a too long time.

• _f) ersten Mitteln zum Durchführen einer Arbeitsroutine zur Bildung des spezifischen Steuersignals mit einer Teilroutine in jeder Dauerschleife, wobei die Teilroutine einen an einer vorgegebenen Stelle des flüchtigen Speicherabschnitts gespeicherten,,nicht als Steuersignal arbeitenden Mehrbitcode prüft;
• g) zweiten Mitteln zum Durchführen einer Vorbereitungsroutine mit einem Anfang und einem Ende versehen ist, das mit einem Anfang der Arbeitsroutine verbunden ist, wobei die Vorbereitungsroutine den Mehrbitcode unbedingt erzeugt und anschliessend eine Anfangsbedingung für die Arbeitsroutine bildet, wobei unter der Steuerung eines negativen Ergebnisses der erwähnten Prüfung der Anfang der Vorbereitungsroutine von der Programmsteueranordnung angezeigt wird.

The object is achieved in that the program control arrangement with

• _f ) first means for carrying out a work routine for forming the specific control signal with a subroutine in each continuous loop, the subroutine checking a multi-bit code which is stored at a predetermined location in the volatile memory section and which does not work as a control signal;
• g) second means for carrying out a preparation routine is provided with a start and an end which is connected to a start of the work routine, the preparation routine necessarily generating the multi-bit code and subsequently forming an initial condition for the work routine, the control being carried out under the control of a negative result check mentioned the beginning of the preparation routine is displayed by the program control arrangement.

A continuous loop is often a loop that cannot be left without a specific external measure. In certain cases, loops that are run through for a finite time are also equipped with a subroutine for checking. In many cases of use, a stay time of t seconds is not experienced by the user as disturbing. However, if this is a burning source condition, such a time will be far too long.

It is advantageous if the work routine is provided with only one loop that can be carried out for a long time with a subroutine contained therein. This results in a simple program structure and, in particular, a small occupancy of the memory space by the preparation routine.

It is advantageous if the multi-bit code contains a number of multi-bit elements and that an indicator is provided which, when running through the subroutine, only displays a single following multi-bit element of the row for checking. On the one hand, such an extended code can be used: This has the advantage that it is particularly unlikely that the code will be formed "accidentally" when switched on: for example, a four-bit code will usually offer insufficient protection. If, in the case of such a sequence, one of the multi-bit elements "accidentally" receives the corresponding value when switched on, another multi-bit element of the sequence will be checked again when the relevant loop is run through again. However, only a small portion of the code is now checked each time the loop is run, so this takes up little time. In this way, continuous, yet simple, monitoring for faults (for example network faults) that could influence the content of the volatile memory section in an impermissible manner continues to take place during operation. The elements of the series can have all kinds of values. They preferably do not always have the same value and preferably not all bits of a multi-bit code element have the same value. However, this preference does not have to be fulfilled for all code elements. A simple sequence can look like this: 010101, 101010.

It is advantageous if a number of further storage locations of the non-volatile section also contain display information for the start of the preparation routine. This increases security. In particular, program is understood to mean the entirety of permanently stored information for controlling the cooperation between the program control arrangement and the service element, ie including the test and measurement functions (if available). Even if the service element can run through several programs, such as washing programs in a washing machine, they all belong to the above-mentioned machine program. If the program control arrangement during the commissioning of the service arrangement except half of the program, the beginning of the program is reached quickly, particularly as soon as such display information is reached when passing through the nonvolatile section of the memory. If the program memory is divided into pages, display information is arranged at least at the end of each page or at the end of an unused part of a page.

It is advantageous if each separately addressable location of the non-volatile section contains either a word from the control program or display information for the start of the preparation routine. In this way, the beginning is reached more quickly because it is no longer necessary to query several address locations of the non-volatile memory section.

The measures described can be implemented in several ways. If the capacity of the volatile memory section is not sufficient to hold the multi-bit code, it must be expanded. In other cases, the existing memory can be used. However, a service arrangement is always obtained which begins directly or almost directly with the preparation routine, even if the commissioning of the service arrangement would take place in an extremely uncontrolled manner.

DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

• Fig. 1 einePrinzipblockschaltung einer Dienstleistungsanordnung,
• Fig. 2 ein ausgearbeitetes Schaltbild einer Bestrahlungsanordnung,
• Fig. 3 ein elementares Flussdiagramm,
• Fig. 4 den allgemeinen Zusammenhang der Subroutinen, nach denen die Anordnung nach Fig. 2 arbeitet,
• Fig. 5 einen ersten Teil einer Ausarbeitung der Fig. 4,
• Fig. 6 einen zweiten Teil der Ausarbeitung der Fig. 4,
• Fig. 7 einen dritten Teil der Ausarbeitung der Fig. 4,
• Fig. 8 den Inhalt eines Teils des flüchtigen Speichers der Programmieranordnung.

The invention is explained below with reference to the drawing. Show it

• 1 shows a basic block circuit of a service arrangement,
• 2 shows a circuit diagram of an irradiation arrangement,
• 3 shows an elementary flow chart,
• 4 shows the general relationship of the subroutines according to which the arrangement according to FIG. 2 operates,
• 5 shows a first part of an elaboration of FIG. 4,
• 6 shows a second part of the elaboration of FIG. 4,
• 7 shows a third part of the elaboration of FIG. 4,
• 8 shows the content of a part of the volatile memory of the programming arrangement.

1 shows a basic block circuit of a service arrangement with a program control arrangement. The whole is located in a housing 400 and can be connected to the public electricity network by means of the mains cable 402 and mains plug 404. Cable 402 passes through opening 406 and is connected to distribution circuit (distribution element) 408, which includes a fuse, voltage converter, a power switch, and the like. The unit is not grounded for brevity. The digitally operating programming arrangement 412 is fed via the possibly multiple line 410. The latter receives specification signals using buttons 414, 416 and 418. They relate, for example, to the duration and the start of the radiation. In another application, these specification signals can also refer to one or more parameter signals; in this case the elements 414, 416 and 418 can also be sensors which, for example, indicate the water temperature and / or the degree of filling in a washing machine. These sensors can then be connected to the service element 426. The control circuit 422 also receives supply power via the line 420. Furthermore, the control circuit receives a specific control signal on line 424, which has been specified several times here. In a simple case, line 424 is simple and the specific control signal only affects the two options "on" and "off". It is also possible for this control signal to have a single analog value which, for example, indicates a speed. In the exemplary embodiment, the control signal relates both to an on / off signal and to a number of control signals for representing an irradiation time. In a washing machine, these control signals can Control various sub-functions of the washing process, such as energizing the motor, activating the heating coil and several taps and valves. In a simple case, the control circuit 422 thus contains one or more electromechanical or electronic switches. However, it can also be equipped with analog-controlled elements, for example for regulating a current.

The controlled excitation signals appear on line 425: This line can also be implemented multiple times. It can therefore be feed signals (for example 220 volts, 50 Hz) or pulse signals. Element 426 here represents the service function, that is to say in the exemplary embodiment the irradiation lamp (s) and the display elements for the irradiation time. All functions within block 426 are known per se.

2 shows a configured circuit diagram of an irradiation arrangement including the control circuit and programming arrangement. When connected, connections 10 and 12 carry mains voltage, for example 200 volts, 50 Hz. The circuit is double insulated, the means for this are not specified. This means that the controls in the remaining part of the circuit float against earth. There are also two parallel irradiation lamps 14 and 16 for alternating voltage of a type known per se, each with a smoothing coil 18 or 20 connected in series therewith. Furthermore, there is a parallel resistor 22 of 220 kOhm for testing the switches (whether they are open in the corresponding state / Closed) are provided. Other parts are gone for simplicity calmly. The two lamps are energized when both series-connected switches 24 and 26 of the type LCICE, 24 V, manufactured by OMRON, are closed. The circuit also contains a DC voltage generator. The arrangement 28 is a bridge rectifier with four BY 179 diodes. Smoothing is achieved by means of the resistor 30 (560 ohms) and the capacitor 32 (2.5 microfarads). There is a voltage difference of approximately 265 V between the connections 34 and 36. The Zener diode 40, of the BZX 79 C 15 type, generates a voltage difference of 15 volts between the connections 36 and 38. The Zener diode 42 of the type BZW 87 C 51 generates a voltage difference of 51 volts between the connections 38 and 44. Resistors 46 and 48 each have a value of 4700 ohms. The connection 38 is connected to the connection 12 via the diode 50 of the type BZW 72 and the resistor 52 of 150 kOhn and in this way defines a voltage level of approximately 0 volts. In the following description, this has the meaning of a logical "1". The voltage level at connection 36 is thus approximately -15 volts, which has the meaning of a logical "0" in the following description. The connections 35, 36, 38 and 44 are connected to further circuit parts by connections not shown. The connection point between the diode 50 and the resistor 52 is connected to the input K8 of the program control unit 56.

Program control unit 56 is a TMS 1000 (Texas Instruments) type microprocessor. This microprocessor has, inter alia, a logic arrangement, not shown, which can be used to excite a digit display arrangement DP, further connections for querying a (simple) keypad and for reading out the data obtained, and a number of control connections for carrying out further functions. First, the energization process for the switches 24 and 26 will be described. The connection 74 is connected to the voltage of +51 volts (connection 44). In the idle state, transistor 66 (BC 639) is blocked and capacitor 72 carries (47 microfarads) almost the full voltage of +51 volts. Terminal 82 carries a potential of 0 volts (terminal 38) and coils 23 and 25 are not energized. The base electrode of the transistor 66 carries 0 volts via the resistor 64 (2200 ohms). In operation (see below), the microprocessor 56 continuously generates pulse-shaped signals with a pulse width of 1 ms and a frequency of 50 Hz. They appear at the output R9 and pass through the coupling capacitor 69 (2.2 microfarads) and the resistor 62 (5600 Ohm) to the base electrode of transistor 66. Line 58 is also connected via resistor 59 (10 kOhm) to a potential of -15 volts (element 56 is a PMOS microprocessor with open outputs). Under the control of the pulse-shaped signal mentioned, the transistor 66 becomes conductive and the capacitor 72 discharges. This situation makes the diode 76 (type BAW 62) conductive, so that the capacitor 80 (capacitance 22 Microfarad) with a charge obtained from a capacitor 72. At the end of the pulse on line 58, transistor 66 blocks and capacitor 72 is recharged. The uppermost electrode (on the side of the diode 76) of the capacitor 72 cannot receive a positive potential due to the diode (type BAW 62). Diode 76 is also opaque at the end of the pulse on line 58. The charge on the capacitor 80 flows through the coils 23 and 25 with an RC time constant of several tens of milliseconds. In addition, switches 24 and 26 only open when the voltage across the coils drops to a low value (4 volts) against the nominal voltage. Thus, a number of pulses on line 58 (on the order of 10) may be underpowered: Only then do switches 24 and 26 open. A pulse can be absent due to the regular continuation of the working cycles in programming unit 56. As will be described further below, this progress is coupled with the resetting of the working time still to be passed, so that the irradiation is quickly ended.

Then the circuit regarding of the keypad. The keypad 84 contains ten number keys 0 to 9 for supplying duration information, a key ST for supplying a start signal and a key CORR for canceling an incorrectly actuated key. It is still assumed that at most one key is pressed at a time. In a certain program phase of the arrangement 56 (see below), the output connections RO ... R4 are successively excited for an interrogation signal. For example, if button 7 is pressed and port R2 is energized, it is forwarded to input port K2. The excitation of the connections RO, R1, R3 and R4 results in no forwarding. The key pressed is then known to the microprocessor by decoding. The connection K1 still receives a signal from point 88 and the connection K8 receives one from the correction key CORR. The further control and supply of the microprocessor have the following course. The connections OSC1 and OSC2 are interconnected. The connection VSS is connected to a voltage level of 0 volt (substrate). VDD is connected to a voltage level of -15 volts (supply voltage). A capacitor 90 of 47 pF and a resistor 92 of 47 kOhm are connected between the connections Oscl / 2 on the one hand and the connection VSS on the other. These two parts determine the clock pulse cycle of the microprocessor, according to the manufacturer, to a value of approximately 300 kHz.

The circuit for detecting the possible closed state of one of the switches 24 and 26 outside the operating time of the lighting lamps 14 ′ and 16 is described below. The means for this are: resistors 100, 102 (330 kOhm), 104 (39 kohm), furthermore the transistor 106 of the type BC 546 and the capacitor 108 (0.22 mF). Assume switch 24 is open and switch 26 is closed. The potential of point 29 is decisive, which is higher on average than that of point 31. At the moment, it can never be more than about 1 volt lower because the diode 33 then becomes conductive. On the other hand, it can currently be higher than the potential of point 31 depending on the phase of the AC supply voltage. As a result, the capacitor 108 charges with an RC time constant of approximately 0.07 s. on. When the terminal R10 of the microprocessor 56 is driven by a signal "1" (approximately 0 volts), the transistor 106 conducts, so that the point 88. also assumes a potential of logic "1". This last signal is detected at the connection K1 of the microprocessor 56. If, in the situation described, both switches are open (24, 26), the signal at point 88, on the other hand, is approximately -15 volts via resistor 104, as a result of which a logic "0" is constantly signaled. In this context it should be noted that the tolerances are quite large with regard to the value -15 volts: a difference of a few volts still gives the logical value "0". The deviation from the value 0 volts may only be a few tenths of a volt. The evaluation of the intermediate area (eg between -½ and -10 volts) is not guaranteed. On the other hand, if the switch 24 is closed and the switch 26 is open, the potential of point 3.5 is decisive. This point is connected to the point 31 via an identical diode and therefore has a higher potential than the connection 36. With regard to the conductive state of the transistor 106, what has already been said above applies: here too the connection K1 receives a logic "1". When the two switches 24 and 26 are closed, apart from other operations, the radiation tube is excited. If the two switches become defective in the period of effect, so that they can no longer interrupt, the fuse has failed. The possibility of such a double defect is particularly small and negligible.

The description of the display circuit follows below. For this purpose, the microprocessor 56 is equipped with two selection outputs R5 and R6. In addition, 7 code signal outputs 00 ... 06 are provided, which are controlled via an internal logical arrangement for exciting a seven-segment display arrangement. For the sake of brevity, this arrangement is indicated as block DB. Selector outputs R5 and R6 are connected via resistors 110, 112 (27 kohm) and 114, 116, 118, 120 (all 33 kOhm) to a potential of -15 volts and the base electrodes of transistors 122, 124 (of the BF 422 type). Their emitter electrodes are connected to point 82 (potential 0 volt). Their collector electrodes are connected via resistors 126 and 128 (value 330 kohm) to a supply potential of 250 volts (connection 34). The latter is suitable for controlling the actual display elements. When the terminals R5 and R6 have a low potential, the transistors 122 and 124 are controlled by the supply voltage of -15 volts so that their collector electrodes carry a low potential. This blocks transistors 130 and 132 and lines 134 and 136 are kept at a low potential via resistors 138 and 140 (value 681kOhm): the display elements are in the unselected state. When transistors 122 and 124 are made conductive by a high signal at terminals R4 and R5 (about 0 volts), the high potential of their collector electrode also saturates and becomes the corresponding transistor 130 or 132 (BF 422 type) relevant line 134 or 136 driven at a high potential; The display power is supplied to the display elements on this line.

3 shows an elementary flow chart of the organization of the arrangement according to the exemplary embodiment. This flowchart initially includes block 432: the preparation routine, the specific sub-functions of which are described below. Block 434 also contains the remaining or "work" routines, which are also described below. The latter consist of a large number of different subroutines, which are repeated through the fact that the program has a loop structure. The executive. example has only one such loop, and the circulation continues as long as the supply voltage is present. In another version, there could be two different loops: one loop, the constant is run through when the radiation sources are switched on, and a second loop which is continuously run through when the radiation sources are switched off. The entirety of the work routines is symbolically indicated here as a single block 434. In a continuous loop in the work routine inventory and, for example, at the end of such a loop, it is checked whether a part of the microprocessor's read / write memory to be specified contains a predetermined 16-word code. This test is symbolized by diamond 436: code OK? if the answer is "yes" (Y), the program may continue via path 438 after a subsequent work routine. After an appropriate initialization, this will be the case. The effect of the radiation may have ended or has not started yet: so-called waiting routines are running. Such waiting routines, as will be explained in more detail, are included in the same loop. On the other hand, the execution of the program can be ended by turning the power switch to the off state or pulling the plug (404) out of the socket. If, on the other hand, the code in the above description is incorrect, the program goes via path 440 to block 430. In block 430, the code to be checked later is written to a number of memory locations to be specified in the read / write memory of the microprocessor TMS 1000. The possibility that this code is generated randomly can be made negligibly small by choosing a sufficiently extended code. After generating the code in block 430, the program returns to the preparation routine. Once the code has been formed, loop 434/438 is always run through, be it with alternating copies of the work routine pool.

When the arrangement is put into operation by plugging in the power plug, the program control arrangement can be brought into any position of its address counter for the fixed value program memory. Due to the structure of the control program shown, each leads memory address occurring therein for rapid entry (via block 436) into the preparation routine. It is possible that there are still unused positions in the program memory. Several solutions are possible for this. The simplest of these is that all of these program positions contain an empty code: The address counter must run through all addresses until the first non-empty command is reached: It is preferably the first command of block 430: The formation of the code in the volatile section of the Memory. It may take a long time for these addresses to expire. It is also possible for the program memory to be divided into pages, as a result of which the address counter would continuously run through the memory locations of the same page: a completely stuck state would then result in a completely empty page. It is therefore advantageous if the content of a number of unused storage locations (at least one completely empty page) or even all unused storage locations in the program memory immediately indicates the first address of block 430, which is symbolized by the figure (block 428, which is the indicates unused locations). In principle, the unused locations can display any other address of blocks 430, 432, 434 and 436, but such non-direct indication of the beginning of block 430 is less quick.

FIG. 4 schematically shows the relationship between the subroutines of the flow chart according to which the arrangement according to FIG. 2 operates; the scheme will be elaborated later with reference to FIGS. 5 to 8. The flowchart begins with block 200: a code is generated therein, which consists of 16 words of four bits each, which is stored in the read / write memory of the TMS 1000 microprocessor. The first address of block 200 is indicated by all addresses that are symbolized in FIG. 3, block 428. Block 202 is reached by block 200: This works as preparation for the actual program: the work routines. Blocks 200 and 202 thus work with block 430 in Fig. 3 together. From there a way goes to 204: The sampling routine of the input signals. From there, paths go to 206: relay energization routine, to 216: input information detection routine, and to 222: the time indicator (or note arrangement) routine. From 206 there is a way to 208: waiting routine. From 208 there is a way to 210: display routine. From 210 there is a way to 212: code check routine (only one word of the 16 code words is checked). From there, a path goes to block 200. Another path follows from block 212. Block 214: The state detection of the switches. From block 214, a first route goes back to block 212: switch unsafe, and so loop 212-214 works as a final loop. From block 214, a second path goes back to 204 (see above). From 216 there is a way to 218: read-in routine, and one to 224: routine of the start condition. From 218 there is a way to 220: reading routine for the time display. From 220 there is a route to 206. From 222 there is a route to 206, one to 220, and a second route 223 to 206. From 224 there is a route to 206. The processes are illustrated in FIGS. 5, 6 and 7 explained.

FIG. 8 illustrates the content of the read / write memory of the microprocessor 56 according to FIG. 1. The capacity is 4 banks of 16 words of 4 bits each. The bank addresses are provided by the so-called X register, and the so-called Y register provides the word addresses. In bank 0, the words Y6 ... Y11 contain the time still to be passed: the number of tens of minutes, the number of minutes above, the number of tens of seconds above, the number of seconds above, the number 1/5 seconds above and finally the number Number fiftieth of a second above. Word Y9 is the start word and contains the start bit (for the time indicator), 0, 0, and the enable bit for starting. The word Y10 contains x (don't care), the "first time" bit, the "50 Hz block" bit and. x. The word Y11 contains the rescue bit for the time note arrangement, x, x, the "waiting time over" bit and the display blanking bit (blanking) in succession. The word Y12 contains that Sampling bit for the output information, x, x, x. The word Y13 contains three bits that act as counters against touch contact bounces and the input disable bit. The word YO contains the information of the last R output signal when the input information is sampled. In bank X1, the words Y5 and Y6 are time setting information in minutes and tens of minutes, respectively, on the type of words Y5 and Y6 in bank XO. The word YO contains a display information pppp (pointer) for checking a code word in parallel, which is written in the bank X3. Bank X2 contains 16 code words for checking whether the preparation routine has been carried out in a corresponding manner. The word YO contains the information "6", the word Y1 contains the information "7" etc.: In particular, the word content is not the same as the word address. Bank X3 is not used in this version.

• 1. Der erste Befehl, der durchgeführt wird, gehört nicht zum eigentlichen Programm. Alle diese Befehle (428) steuern einen Adressprung zur ersten Adresse der Teilroutine 200;
• 2. Der erste durchgeführte Befehl gehört tatsächlich zum eigentlichen Programm: Beim Passieren des Blocks 212 (Fig. 4) wird geprüft, ob die Vorbereitungsroutine zuvor bereits durchgeführt wurde. Wenn das Ergebnis der Prüfung negativ ist, wird wiederum ein Sprung (Eingang "6") zur ersten Adresse des Blocks 200 ausgeführt, also wird der 64-Bit-Code für die Speicherbank X2 erzeugt (Fig. 8).

FIG. 5 shows a first part of a detailed description of the diagram according to FIG. 4. When the voltage between Vdd and Vss has become large enough, the internal clock is started. A jump to the preparation routine in block 202 is required for the corresponding execution of the program. There are two ways to do this jump:

• 1. The first command that is executed does not belong to the actual program. All of these commands (428) control an address jump to the first address of subroutine 200;
• 2. The first command actually executed belongs to the actual program: when passing block 212 (FIG. 4) it is checked whether the preparation routine has already been carried out. If the result of the check is negative, a jump (input "6") is again made to the first address of block 200, so the 64-bit code for memory bank X2 is generated (FIG. 8).

• 1. Die Register der Mikroprozessoren werden zurückgestellt;
• 2. die Zeitanzeige (die sich im Minutenabschnitt der Notizanordnung befindet, siehe weiter unten) ist dabei "00", aber an der Anzeigeanordnung wird diese Information als zwei Striche an den mittleren horizontalen Segmenten angezeigt: So steht "nichts" da. Dies geschieht dadurch, dass das Austastbit für die Anzeigeanordnung (Wort Yll) gleich "1" gemacht wird - der eigentliche 4-Bit-Code für die Anzeigeelemente ist dann "1111". Uber die Ausgangsanordnung des Mikroprozessors 56 wird dies in den 8-Bit-Code 0100-0000 übersetzt. Der Block 202 hat einen einzigen Ausgang zum Block 204: Die Abtastroutine der Eingangssignale. Im Block 230 wird geprüft, ob das Startbit (Wort Y9) des Zeitgebers gesetzt und die positive Phase der 50 Hz Netzspannung vorhanden ist. Zunächst werden diese beiden, von einer UND-Funktion zu kombinierenden Bedingung nicht erfüllt (insbesondere ist das Startbit = 0). Im Block 232 werden die Tasteneingänge des Tastenfelds 84 in Fig. 2 durch Abfragen der Ausgänge RO ... R4 des Mikroprozessors abgetastet. Die erhaltene Information wird in das Akkumulatorregister des Mikroprozessors 56 gespeichert. Im Block 234 wird detektiert, ob eine Taste gedrückt ist, d.h. ob der Inhalt des Akkumulatorregisters ungleich Null ist. Zunächst ist keine Taste gedrückt (Ergebnis der Prüfung: negativ). In diesem Fall folgt ein Übergang zum Block 206: Die Relais- _erregungsroutine. Im Block 236 wird der Ausgang R9 des Mikroprozessors 56 logisch "0" gemacht. Zunächst ist dies eine leere Operation, weil diese Information bereits den Wert "O" hatte. Dann folgt ein Ubergang zum Block 208 in Fig. 6: Die Wartezeitroutine: Die Wartezeit ist die Zeit, die zwischen dem Betätigen der Starttaste und der faktischen Einschaltung der Strahlungsquelle vergeht. Im Block 238 wird geprüft, ob das Startbit gesetzt ist (vergleiche weiter Block 230). Zunächst wird dies nicht der Fall sein. Im Block 240 wird der Sekundenabschnitt (Wort Y3) des Registers des Zeitanzeigers mit der Information gefüllt: 15 Sekunden. Dies ist der Wert (1111) der Wartezeit. Ausserdem wird ein weiterer Teil (Wort Y4) des Registers des Zeitanzeigers mit der Information gefüllt: 60 Sekunden (0110): Dadurch wird die am Register eingestellte Bestrahlungszeit um 1 Minute zu lang. Dies bietet den Vorteil, dass die Stellung 0 Minuten, 60 Sekunden dazu benutzt werden kann, das Ende der Bestrahlungszeit zu detektieren. Es folgt darauf der Ubergang zum Block 210: Die Anzeigeroutine. Im Block 242 wird zunächst geprüft, ob das Austastbit für die Anzeigeanordnung auf 1 eingestellt ist. Dieses Bit steuert das Blinken der Anzeige in der Wartezeit. Zunächst ist dieses Bit Y5 (im Wort Yll) nicht auf 1 gesetzt. Im Block 284 gelangt über eine Multiplexorganisation in zwei Schritten die Information des Minutenregisters des Zeitanzeigers zur Anzeigeanordnung. Zunächst hat dies (siehe Block 202, oben) die Anzeige der mittleren zwei horizontalen Elemente der Anzeigeanordnung zur Folge. Der Multiplexvorgang wird vom ersten Bit des Worts Y12 gesteuert. Wenn das Austastbit tatsächlich den Wert "1" hat (dies geschieht im Warten abwechselnd für eine Sekunde und die nächste Sekunde nicht), wird im Block 244 die Anzeige unterdrückt. Die Nachleuchtdauer der Anzeigeelemente ist viel kürzer als 1 Sekunde, so dass dabei die Anzeige blinkt. Es folgt darauf der Übergang zum Block 212: Dabei wird geprüft, ob eines der Wörter des 16-Wortcodes in der Speicherbank X2 entsprechenden Wert besitzt. Die Wahl des betreffenden Worts erfolgt durch den Anzeiger (Wort YO, Bank Xl), dessen Inhalt für die Prüfung um 1 inkrementiert wird. Wenn das Codewort nicht richtig ist, folgt über den Ausgang 6 ein Adressprung zum Block 200 in Fig. 5. Ist das Codewort richtig, wird im Block 247 geprüft, ob das Startbit gesetzt ist (vgl. Block 238). Wenn das Startbit nicht auf "1" eingestellt ist (dies wird also anfänglich der Fall sein), wird im Block 248 geprüft, ob die Schalter "sicher" (über Ausgang R10 und Eingang Kl), also beide offen sind (die Möglichkeit, dass sie beide geschlossen sind, wird vernachlässigt). Normalerweise sind die Schalter sicher und folgt ein Übergang zum Block 249. Sind jedoch die Schalter unsicher, wird im .Block 250 die Anzeige verdunkelt. Dies wird durch den Vierbit-Code "1110" bewirkt: Unter seiner Steuerung erzeugt die programmierte logische Anordnung an -ihrem Eingang die Information 0000-0000. Über die Blöcke 212, 247, 248 und 250 ist dann eine Dauerschleife gebildet. Sie wird durchlaufen, solange der Fehler in den Schaltern vorhanden ist. Wenn die Schalter sicher (247) sind, wird im Block 249 das Sicherheitsbit geprüft. Es ist Jogisch "1", wenn die Register der Zeitanzeige nicht auf entsprechende Weise anzeigen. In einem unsicheren Zustand wird eine Schleife über die Blöcke 212, 247, 248, 249 und 250 gebildet. Die so beschriebene Schleife (die Blöcke 204, 206, 208, 210, 212) kann beliebig oft durchlaufen werden und bildet so eine Initialwarteschleife. Wenn eine Taste gedrückt wird, geht das Programm vom Block 234 zum Block 216 (Fig. 7): Die Detektionsroutine für die Eingangsinformation. Im Block 254 wird detektiert, welche Taste gedrückt wurde und wird weiter das vierte Bit des Worts Y13 (Bank XO) gleich "0" gemacht. Wenn beim Durchlaufen der Schleife die gleiche Taste nochmals detektiert wird, wird das Saldo der ersten drei Bits des Worts Y13 um eine Einheit inkrementiert. Wenn eine Uberlaufbedingung entsteht, ist es eine echte Taste, die verarbeitet werden darf. Wenn beim Durchlaufen der Schleife keine oder eine andere Taste detektiert wird, wird Y13 auf Null zurückgestellt. So stört das Prellen der Tasten nicht. Wenn die Taste verarbeitet ist, wird das vierte Bit des Worts auf "1" eingestellt, um eine zweite Verarbeitung abzublocken. Im Block 255 wird detektiert, ob es sich um die Korrekturtaste (CORR) handelt. Wenn dies so ist, geht das Programm zum Block 200 zurück. Implizite arbeitet so die Korrekturtaste als Rückstelltaste, auch für das ganze Programm. Anders wird anschliessend geprüft im Block 256, ob die Starttaste (ST) betätigt wurde. Wenn dies nicht so ist, wird im Block 258 die Zifferntaste decodiert und erfolgt ein Übergang zum Block 218: Die Leseroutine. Zunächst wird dabei im Block 260 die eingetastete Ziffer in die Speicherbank X1, Wort Y5 eingeschrieben Die erste Taste gilt als die der höchsten Ziffernw_ertigkeit. Im Block 262 wird geprüft, ob die Taste zulässig ist. Die erste ist immer zulässig, die "0" gibt wiederum die Anzeige "nichts". Weiter wird im Block 260 noch das Wiederholungsbit (im Wort Y10, zweites Bit) in der Stellung "Wiederholung möglich", d.h. "0" eingestellt. Wenn eine Taste mit zulässigem Ziffernwert betätigt wurde, wird anschliessend im Block 264 das Freigabebit zum Starten gleich "1" gemacht. Danach erfolt ein Übergang zum Block 220: Laderoutine für den Zeitanzeiger. Im Block 266 wird dann ausschliesslich die eingetastete Ziffer im Register (Minutenabschnitt) des Zeitanzeigers geschrieben: Bank XO, Wort Y5 des Speichers. Dabei erfolgt ein Übergang zum Block 206 in Fig. 5. Der folgende Übergang nach Fig. 7 erfolgt für jedes Drücken nur einmal. Solange die Taste nicht freigegeben wird und eine weitere Taste (es kann die gleiche Taste sein) wieder gedrückt wird, wird danach jeweils die bereits erwähnte Hauptschleife der Blöcke 204-206-208-210-212 durchlaufen. Dabei wird die erste gedrückte Taste an der Stelle niedrigster Wertigkeit angezeigt. Wenn eine zweite Zifferntaste gedrückt wird, geschieht dasselbe wie beim ' Drücken der ersten: Die zweite Ziffer erhält die geringste Wertigkeit, während die zuerst gedrückte Ziffer auf die Stelle höherer Wertigkeit übertragen (Wortstelle Y6) und entsprechend angezeigt wird. Im Block 262 wird geprüft, auf entsprechende Bedienung: Sie ist in Ordnung, wenn höchstens zwei Zifferntasten nacheinander gedrückt werden (eine jedoch reicht bereits aus). Wenn der Wert der eingestellten Bestrahlungszeit länger als 40 Minuten ist, wird im Block 268 das Freigabebit zum Starten auf Null zurückgestellt und wiederum die Information "nichts" durch zwei Horizontalstriche abgebildet (letzteres im Block 270): Aus dem Block 270 gibt es wieder einen Übergang zum Block 266 und weiter zum Block 206 in Fig. 5.

It is this code that one word at a time is examined in the test mentioned. The following unconditional operations are then carried out in block 202:

• 1. The microprocessor registers are reset;
• 2. The time display (which is in the minutes section of the note arrangement, see below) is "00", but this information is shown on the display arrangement as two dashes on the central horizontal segments: "nothing" is there. This is done by making the blanking bit for the display arrangement (word Yll) equal to "1" - the actual 4-bit code for the display elements is then "1111". This is translated into the 8-bit code 0100-0000 via the output arrangement of the microprocessor 56. Block 202 has a single output to block 204: the sampling routine of the input signals. In block 230 it is checked whether the start bit (word Y9) of the timer is set and the positive phase of the 50 Hz mains voltage is present. First of all, these two conditions to be combined by an AND function are not met (in particular, the start bit = 0). In block 232, the key inputs of the keypad 84 in FIG. 2 are scanned by querying the outputs RO ... R4 of the microprocessor. The information obtained is stored in the accumulator register of the microprocessor 56. In block 234 it is detected whether a key is pressed, ie whether the content of the accumulator register is not equal to zero. Initially, no key was pressed (test result: negative). In this case, a transition to the block 206 follows: rregungsroutine The relay _e. In block 236, the output R9 of the microprocessor 56 is made logic "0". First of all, this is an empty operation because this information already had the value "O". Then there is a transition to block 208 in FIG. 6: The waiting time routine: The waiting time is the time that elapses between the actuation of the start button and the actual activation of the radiation source. In block 238 it is checked whether the start bit is set (see also block 230). Initially, this will not be the case. At block 240, the second portion (word Y3) of the time indicator register is filled with the information: 15 seconds. This is the waiting time value (1111). In addition, another part (word Y4) of the register of the time indicator is filled with the information: 60 seconds (0110): This means that the radiation set on the register is irradiated 1 minute too long. This has the advantage that the position 0 minutes, 60 seconds can be used to detect the end of the irradiation time. This is followed by the transition to block 210: the display routine. In block 242 it is first checked whether the blanking bit for the display arrangement is set to 1. This bit controls the blinking of the display during the waiting time. Initially, this bit Y5 (in word Yll) is not set to 1. In block 284, the information of the minute register of the time indicator reaches the display arrangement via a multiplex organization in two steps. First, this (see block 202, above) results in the display of the middle two horizontal elements of the display arrangement. The multiplexing process is controlled by the first bit of word Y12. If the blanking bit is actually "1" (this happens alternately while waiting for one second and not for the next second), the display is suppressed in block 244. The persistence of the display elements is much shorter than 1 second, so that the display flashes. This is followed by the transition to block 212: It is checked whether one of the words of the 16-word code in memory bank X2 has the corresponding value. The word concerned is selected by the indicator (word YO, Bank Xl), the content of which is incremented by 1 for the test. If the code word is not correct, an address jump to block 200 in FIG. 5 follows via output 6. If the code word is correct, it is checked in block 247 whether the start bit is set (cf. block 238). If the start bit is not set to "1" (this will be the case initially), a check is made in block 248 as to whether the switches are "safe" (via output R10 and input K1), that is to say both are open (the possibility that they are both closed is neglected). The switches are normally safe and a transition to block 249 follows. However, if the switches are unsafe, the display in block 250 is darkened. This is caused by the four-bit code "1110": Under its control, the programmed logical arrangement at its input generates the Information 0000-0000. A continuous loop is then formed over the blocks 212, 247, 248 and 250. It is run through as long as the error is present in the switches. If the switches are secure (247), the security bit is checked in block 249. It is logical "1" if the registers of the time display do not show the appropriate way. In an unsafe state, a loop is formed across blocks 212, 247, 248, 249 and 250. The loop described in this way (blocks 204, 206, 208, 210, 212) can be run through as often as desired and thus forms an initial waiting loop. When a key is pressed, the program goes from block 234 to block 216 (Fig. 7): the detection routine for the input information. In block 254 it is detected which key has been pressed and the fourth bit of the word Y13 (bank XO) is further made equal to "0". If the same key is detected again when the loop is run through, the balance of the first three bits of word Y13 is incremented by one unit. If an overflow condition occurs, it is a real key that can be processed. If no key or another key is detected while running through the loop, Y13 is reset to zero. So the bouncing of the keys does not bother. When the key is processed, the fourth bit of the word is set to "1" to block a second processing. In block 255 it is detected whether the correction key (CORR) is concerned. If so, the program returns to block 200. The correction key works implicitly as a reset key, also for the entire program. Another check is then made in block 256 to determine whether the start button (ST) has been pressed. If this is not the case, the number key is decoded in block 258 and a transition is made to block 218: the reading routine. First, the keyed-in number is written into the memory bank X1, word Y5 in block 260. The first key is considered to have the highest number value. In block 262 it is checked whether the key is permissible. The first is always permissible, the "0" again indicates "nothing". The repetition continues in block 260 bit (in word Y10, second bit) set to "Repeat possible", ie "0". If a key with a permissible numerical value has been actuated, the release bit for starting is then made equal to "1" in block 264. Then there is a transition to block 220: loading routine for the time indicator. In block 266, only the keyed-in digit is then written in the register (minute section) of the time indicator: bank XO, word Y5 of the memory. A transition to block 206 in FIG. 5 takes place. The following transition to FIG. 7 occurs only once for each push. As long as the key is not released and another key (it can be the same key) is pressed again, the above-mentioned main loop of blocks 204-206-208-210-212 is run through. The first key pressed is displayed at the lowest value. When a second number key is pressed, the same happens as when the first number is pressed: the second number is assigned the lowest value, while the number pressed first is transferred to the higher value (word position Y6) and displayed accordingly. A check is made in block 262 to determine whether it is operated appropriately: it is OK if a maximum of two number keys are pressed in succession (one is sufficient, however). If the value of the set irradiation time is longer than 40 minutes, the release bit for starting is reset to zero in block 268 and the information "nothing" is represented by two horizontal lines (the latter in block 270): there is again a transition from block 270 to block 266 and further to block 206 in FIG. 5.

By pressing the correction button, the time already keyed in can be reset to zero. 7, a transition from block 255 to block 202 occurs in the preparation routine: all registers are reset to their initial state. If no correction is required, the start button can be pressed in second or third position. 7 there is a transition from block 216 to block 224: the routine of Start condition. First, it is checked in block 272 whether the release bit for starting has the value 1. It was set to "1" in block 264. However, if it was not set to "1", a return is made to block 206 in FIG. 5. If the enable bit was set to "1", the start bit is set to "1" in block 274. In block 276 it is checked whether the bit "Repeat possible" (2nd bit of word position Y10) has the value 0 or 1. It was set to zero in block 260. If it is the first time, this bit is now set to "1", indicating that a repeat is possible (block 278). If it was "1", however, it is reset in block 280: repetition is no longer possible. The output of blocks 278 and 280 goes to block 206 in FIG. 4. This "repeat possible" bit enables two irradiations of the same length to be activated in succession without the time programming having to be set again the second time. When switching on and when changing the set duration, this bit is always set to zero (in block 260). The repetition mentioned can therefore be omitted.

So the start bit is now set. As mentioned earlier, it can be checked in blocks 230, 238 and 246 in FIGS. 5 and 6. First, branching to block 281 can now take place in block 238. It is checked here whether the time of 15 seconds that was generated in block 240 has already passed (this time is counted back down in block 222). If the start bit is not yet set to "1", this time is reset by block 240 each time. If the 15 seconds mentioned are not yet over, a transition follows from block 281 to block 282. This detects whether the time value in seconds (in word Y3) is even or odd. If the time is even, the display blanking bit is set to "1" and to zero if the time is odd. The transition to block 210 then follows again: The display routine: Now in block 210 the display blanking bit is "0" or "l", so that either block 244 (the display is suppressed) or block 284 is run. At block 284, the digits in the minutes section of the time indicator register are passed to the display arrangement. So the display flashes for 15 seconds. When the 15 seconds have passed (check in block 281), the "wait time over" bit is set in block 286. Otherwise, the loop closed via output "5" is always run through. The safe state of the switches (block 248) is no longer checked, but instead, for security reasons, the note register for the time display is checked in block 252. If the content shows more than 40 minutes, all registers in the preparation routine are reset to the starting position. Due to the multiplexing process in block 284, two loops are to be run through for the display of the integer.

• a. hat das Startwort (Wort Y9) den entsprechenden Wert (also "1001")
• b. hat das Bit "Wartezeit vorüber" den Wert 1 (im Block 286 gesetzt).

The already mentioned down counting takes place in block 222. Furthermore, in block 230 the start bit for the time indicator is now "1" and has a 50% possibility that the mains voltage 50 Hz is also in the positive phase. If the latter is the case, a transition follows from block 230 to block 288. Here it is detected whether a "first time" bit (third bit of word Y10) has the value "0". If it has the value "0", a transition to block 290 follows. In block 290, the content of the count register (word positions YO ... Y6) is counted down with 1/50 second. In addition, in block 290 the aforementioned "first time" bit is set to 1. This "first time" bit is reset (to "O") in block 232. In block 291, it is detected whether the counting registers are working properly. This is done as follows: First the counter reading is read from the memory, transferred to the accumulator of the microprocessor and decremented by 1 (i.e. 1/50 second). This status is then written back into the memory. Finally, it is checked whether the balance in the accumulator is equal to the balance rewritten in the memory. If this is not the case, a transition to block 293 follows, in which the security bit is reset. As already mentioned, its examination takes place in the Block 284. In this way the note process is checked. If the check is "good", it is checked in block 292 whether the minute value of the time indicator is "0". If this is not the case, an exit to block 294 follows. In block 294 the following conditions are checked:

• a. the start word (word Y9) has the corresponding value ("1001")
• b. the "Wait time over" bit has the value 1 (set in block 286).

If the test is "false", a transition to block 236 follows: output R9, and thus switches 24 and 26 are no longer excited by the 1 kHz pulse sequence already mentioned. If they have been aroused so far, this arousal will cease. If the test at block 294 is "good", a transition to block 296 follows: output R9 is energized and radiation begins. If the time indicator in block 292 indicates the value "0 minutes", this means that the irradiation time has expired (because previously 60 seconds were included). This is followed by a transition to block 298: The bits: start bit for the time indicator the release bit for the start and the bit "waiting time over" are set to "0" and the irradiation has ended: output R9 is no longer excited after the next pass through block 206. This is followed again by a transition to block 220 in FIG. 7: loading routine for the time indicator. First, in block 300 it is checked whether the bit "repeat possible" has the value "good". If so, block 302 sets the start enable bit again. This is followed by a transition to block 266. If the aforementioned enable bit has the value "false", the time setting is reset to zero in block 270 with the blanking of the display, as in the case of the output of block 202. In block 266, the minute section of the register (values Y5, Y6 in bank X1) is then reset to zero. So the initial condition is restored. The word YO from bank XO also serves as a counter register to indicate which of the R outputs was last excited to be sampled.

According to the described embodiment, the program contains only a subroutine in which the multi-bit code is checked. The program can be run in many loops, all of which have the subroutine in common. In the case of loops that do not coincide at all, it is also possible to use such a test routine at several locations, possibly using the same multi-bit code.

Claims (5)

1. Service island arrangement for general use with a) a connection (402) with a detachable contact element (404) for an electrical supply source, with a distributor element (408) for tapping a first and a second supply voltage at the mains supply source, b) a control circuit (422) with a first input (420) for receiving the first supply voltage, a second input (424) for receiving a specific control signal and a first output (425) for a controlled excitation signal, c) a service element (426) with a second input for receiving the excitation signal, d) a digitally operating program control arrangement (412) with a non-volatile memory section which has a control program for the service element at first storage locations and further a volatile memory section XO ... X3 for variable data, a third input (410) for receiving the second supply voltage directly from the mentioned distributor element, contains a fourth input for a specification signal for the service element and a second output for the specific control signal, e) externally activatable means for forming the specification signal (414, 416, 418),
characterized in that the program control arrangement with f) first means for carrying out a work routine (434) for forming the specific control signal with a subroutine (436) in each continuous loop, the subroutine checking a multi-bit code which is stored at a predefined location in the volatile memory section and does not work as a control signal, g) second means for carrying out a preparation routine is provided with a start and an end, which is connected to a start of the work routine, the preparation routine necessarily generating (430) the multibit code and then forming an initial condition (432) for the work routine, the multibit code being controlled by a negative result - Checking the beginning of the preparation routine is displayed by the program control arrangement. 2. Service arrangement according to claim 1, characterized in that the work routine is provided with only one, long time feasible loop with a subroutine contained therein. 3. Service arrangement according to claim 1 or 2, characterized in that the multi-bit code contains a number of multi-bit elements and that an indicator (Xl, O) is provided which, when running through the subroutine, only shows a single following multi-bit element of the series for checking. 4. Service arrangement according to claim 1, 2 or 3, characterized in that a number of further storage locations of the non-volatile section also contain display information for the start of the preparation routine. 5. Service arrangement according to claim 4, characterized in that each separately addressable location of the non-volatile section contains a word of the control program or a display information (428) for the beginning of the preparation routine.

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