EP0756223A1 - Reference voltage and/or current generator in integrated circuit - Google Patents

Abstract

The circuit has a diode-connected transistor (T1) and a resistive transistor (T2) in series in a first (current source) branch, and two similar transistors (T3,T4) in a current-mirror relationship to them in a second branch. A third branch, producing a stable voltage (VB) at the midpoint (B) of the second, tends to reduce the equivalent resistive load. The three p-channel MOSFETs (T1,T3,T5) have their gate electrodes connected together. The output voltage tends to fall with rising temperature, but this effect is substantially cancelled by the falling threshold voltage of the third n-channel MOSFET (T6) which is almost equivalent to a short-circuit.

Description

The present invention relates to a reference generator in integrated circuit for delivering a reference voltage and / or current which are stable with the manufacturing process, stable in temperature and independent of the supply voltage.

Reference current or voltage generators are used in integrated circuits, in particular for reading or writing memory cells. In particular, it is known to use two pairs of MOS transistors in a circuit with two current mirrors to generate a current independent of the supply voltage of the circuit. However, the reference current obtained is very dependent on the temperature.

The object of the invention is to propose a particularly stable reference generator, despite variations in process, temperature or supply voltage.

• une première branche source de courant avec un premier transistor monté en diode, en série avec un deuxième transistor natif et résistif;
• une deuxième branche avec un troisième transistor, en série avec un quatrième transistor monté en diode.

As characterized, the invention relates to a reference generator in integrated circuit in MOS technology which comprises a current mirror device.
This device includes:

• a first current source branch with a first transistor mounted as a diode, in series with a second native and resistive transistor;
• a second branch with a third transistor, in series with a fourth transistor mounted as a diode.

• les premier, troisième et cinquième transistors ayant le même type de conductivité et leurs grilles reliées ensemble,
• les deuxième, quatrième et sixième transistors ayant le même type de conductivité et les deuxième et quatrième transistors ayant leurs grilles reliées ensemble,
• le quatrième transistor ayant un seuil de conduction supérieur à celui du deuxième et du sixième transistors,
• pour fournir une tension stable au dit point milieu de la deuxième branche.

According to the invention, this device also comprises a third branch, connected to a midpoint of the second branch, with a fifth transistor, in series with a sixth transistor, mounted as a diode and connected to said midpoint;

• the first, third and fifth transistors having the same type of conductivity and their gates connected together,
• the second, fourth and sixth transistors having the same type of conductivity and the second and fourth transistors having their gates connected together,
• the fourth transistor having a conduction threshold higher than that of the second and of the sixth transistors,
• to provide a stable voltage at the said midpoint of the second branch.

• ce septième transistor ayant une tension de seuil inférieure à celle du quatrième transistor et recevant la tension stable sur sa grille,
• pour obtenir un courant stable dans cette quatrième branche.

In a variant, the reference generator according to the invention also makes it possible to supply a stable current. The generator then comprises a fourth branch comprising a seventh transistor, of the same type of conductivity as the second transistor, not very resistive, in series with a resistance,

• this seventh transistor having a threshold voltage lower than that of the fourth transistor and receiving the stable voltage on its gate,
• to obtain a stable current in this fourth branch.

• la figure 1, représente un schéma électronique d'un générateur de référence selon l'invention,
• la figure 2 représente un schéma électronique d'un générateur de référence selon l'invention, pour délivrer un courant stable,
• la figure 3 représente une variante du générateur représenté à la figure 2 et
• les figures 4 et 5 sont des schémas plus détaillés des figures 1 et 3, avec des circuits de polarisation.

Other characteristics and advantages of the invention are detailed in the following description, given by way of indication and without limitation of the invention and with reference to the appended drawings, in which:

• FIG. 1 represents an electronic diagram of a reference generator according to the invention,
• FIG. 2 represents an electronic diagram of a reference generator according to the invention, for delivering a stable current,
• FIG. 3 represents a variant of the generator represented in FIG. 2 and
• Figures 4 and 5 are more detailed diagrams of Figures 1 and 3, with bias circuits.

FIG. 1 represents a diagram of a voltage generator in integrated circuit according to the invention. In this example shown, all the transistors are in MOS technology.
The generator includes a three-branch current mirror device.
A first branch is a source of current. It comprises a first transistor T1, mounted as a direct diode (that is to say with its gate connected to its drain) and in series with a second resistive transistor T2 (W / L << 1).
A second branch comprises a third transistor T3 in series with a fourth transistor T4, mounted as a direct diode.
A third branch comprises a fifth transistor T5 in series with a sixth transistor T6, mounted as a direct diode, and connected to a midpoint B of the second branch.
The third transistor and the fifth transistor are respectively mounted as a current mirror with respect to the first transistor.
The second transistor is mounted as a current mirror with respect to the fourth transistor.

The transistor T4 has a threshold voltage Vt _n greater than that of the transistors T2 and T6. In the example, the transistor T4 is enriched and the transistors T2 and T6 are native (that is to say with a threshold voltage Vt _na positive and close to zero volts).

It is recalled that a current mirror assembly consists in controlling the gate of a transistor by a transistor of the same type of conductivity and mounted as a direct diode (gate connected to the drain). In this way, the current flow in the first transistor is controlled. The ratio of the currents in the two transistors essentially depends on the ratio of their W / L geometries. The first, third and fifth transistors are thus of the same type of conductivity and the second, fourth and sixth transistors are of the same type of conductivity.

In the figures, the reference generator according to the invention is shown in CMOS technology. Thus the first, third and fifth transistors are of the conductivity type P. Their sources are connected to a logic supply voltage Vcc. The second, fourth and sixth transistors are of the N conductivity type. The sources of the second and fourth transistors are connected to the electrical ground. The source of the sixth transistor is connected to node B of the second branch, that is to say to the drains of the third and fourth transistors.

$${\text{et on note : Vt}}_{\text{n}}{\text{= Vt}}_{\text{4}}$$

Où Vt_p est la tension de seuil d'un transistor de type P, de l'ordre de 1 volt, où Vt_na est la tension de seuil d'un transistor de type N natif, de l'ordre de 0.2 volt et où Vt_n est la tension de seuil d'un transistor de type N enrichi, de l'ordre de 0.8 volt. Les valeurs sont données à titre d'exemple non limitatif pour une technologie 1,2 et 1,0 microns et à température ambiante (25°C).
Le transistor T2 est résistif (W/L<<1), en sorte que le transistor T1 se retrouve avec une tension de drain proche de Vcc - Vt_p. C'est la tension V_A au noeud A. Le transistor T3 est résistif, en sorte que l'on retrouve sur son drain une tension V_B, proche de la tension de seuil du transistor T4.
Comme par ailleurs la tension V_A = Vcc - Vt_p est appliquée sur la grille du transistor T3, ce dernier se retrouve polarisé en limite de conduction (tension grille-source de l'ordre de sa tension de seuil). Ceci accentue son caractère résistif pour maintenir V_B égale à Vt_n = Vt₄.
Comme le transistor T2 est monté en miroir de courant par rapport au transistor T4, on retrouve la tension V_B sur la grille du transistor T2. Or on a vu que la tension de seuil du transistor T2 est inférieure à la tension de seuil du transistor T4. Dans l'exemple on a Vt_n = 0.8V et Vt_na = 0.2V.
Le transistor T2 est donc fortement conducteur. Comme il a été choisi suffisamment résistif pour avoir V_A = Vcc - Vt_p sur son drain, le transistor T2 a aussi une tension drain-source V_DS = Vcc - Vt_p très supérieure à sa tension grille-source V_GS = Vt₄. Le transistor T2 est donc saturé, ce qui assure un courant relativement constant dans la branche T1, T2 et donc aussi dans la branche T3, T4, même si la tension d'alimentation varie.The operation of the reference generator in steady state is described below. $${\text{We assume that we have: Vt}}_{\text{p}}{\text{= <figure-callout id="1" label="Vt" filenames="imgf0004.png,imgf0005.png" state="{{state}}">Vt</figure-callout>}}_{\text{1}}{\text{= Vt}}_{\text{3}}{\text{= <figure-callout id="5" label="Vt" filenames="imgf0004.png,imgf0005.png" state="{{state}}">Vt</figure-callout>}}_{\text{5}}{\text{and Vt}}_{\text{n / A}}{\text{= <figure-callout id="2" label="Vt" filenames="imgf0004.png,imgf0005.png" state="{{state}}">Vt</figure-callout>}}_{\text{2}}{\text{= Vt}}_{\text{6}}$$

$${\text{and we note: Vt}}_{\text{not}}{\text{= Vt}}_{\text{4}}$$

Where Vt _p is the threshold voltage of a P-type transistor, on the order of 1 volt, where Vt _na is the threshold voltage of a native N-type transistor, on the order of 0.2 volt and where Vt _n is the threshold voltage of an enriched type N transistor, of the order of 0.8 volts. The values are given by way of nonlimiting example for a 1.2 and 1.0 micron technology and at ambient temperature (25 ° C.).
The transistor T2 is resistive (W / L << 1), so that the transistor T1 is left with a drain voltage close to Vcc - Vt _p . It is the voltage V _A at the node A. The transistor T3 is resistive, so that one finds on its drain a voltage V _B , close to the threshold voltage of the transistor T4.
As also the voltage V _A = Vcc - Vt _p is applied to the gate of the transistor T3, the latter finds itself biased at the conduction limit (gate-source voltage of the order of its threshold voltage). This accentuates its resistive nature to maintain V _B equal to Vt _n = Vt ₄ .
As the transistor T2 is mounted as a current mirror with respect to the transistor T4, the voltage V _{B is found} on the gate of the transistor T2. However, we have seen that the threshold voltage of transistor T2 is lower than the threshold voltage of transistor T4. In the example we have Vt _n = 0.8V and Vt _na = 0.2V.
The transistor T2 is therefore highly conductive. As it was chosen sufficiently resistive to have V _A = Vcc - Vt _p on its drain, the transistor T2 also has a drain-source voltage V _DS = Vcc - Vt _p very much higher than its gate-source voltage V _GS = Vt ₄ . The transistor T2 is therefore saturated, which ensures a relatively constant current in the branch T1, T2 and therefore also in branch T3, T4, even if the supply voltage varies.

The transistor T5 is polarized like the transistor T3, that is to say at the conduction limit.
The transistor T6 is mounted as a direct diode. As its threshold voltage is low, close to zero, the branch (T5, T6) which is in parallel on the transistor T3, tends to decrease the equivalent resistance (T3 // T5 + T6) which charges the transistor T4 and therefore slightly raise the level of voltage V _B.

What happens when there are variations in temperature, process or supply voltage?

If the temperature increases, we know that the threshold voltages decrease, around 2 millivolts per degree Celsius. The voltage V _A therefore increases, which would make the transistor T3 more resistive, likewise for the transistor T5, but their threshold voltages also decrease. As the threshold voltage of transistor T4 decreases, the level of voltage V _B therefore tends to decrease. But the threshold voltage of the transistor T6 also decreases, (the transistor is almost equivalent to a short circuit): the resistance equivalent to T3 // T5 + T6 therefore decreases, which tends to pull the level of V _B upwards and stabilize it.
In practice, it has been possible to verify that the variation with the temperature of the level of V _B follows at worst that of a threshold voltage of the transistor. It was thus possible to obtain a variation of 13% between 25 ° C and 90 ° C, which is very satisfactory.

The process for manufacturing the transistors corresponds to an interval of values of the threshold voltages, knowing that two close transistors will in practice have the same threshold voltage.
In an example, we obtain for Vt _p the interval [0.9V - 1.3V] and for Vt _n the interval [0.7V - 1.0V].
If threshold voltages corresponding to the maximum values of the process are obtained for all the transistors, the voltage V _A tends to decrease, which increases the current in the transistor T3. But at the same time the threshold voltage of transistor T3 is also higher, which decreases the current in transistor T3. At the same time, the threshold voltage of transistor T4 increases, and the level of voltage V _B tends to increase. As the threshold voltage of transistor T6 also increases, the equivalent resistance of T3 // T5 + T6 increases, which tends to stabilize the level of voltage V _B. In practice, it has been possible to verify that the voltage V _B follows at worst the variation of a threshold voltage of an N type transistor (T4).
The opposite reasoning applies in the case where the threshold voltages are minimum.

We can also have crossed variations, for example maximum Vt _n and minimum Vt _p . In this case, there is self-compensation in the transistor T3, as seen previously. The level of V _B therefore tends to increase, like the threshold voltage of transistor T4. But since transistor T6 also has its higher threshold voltage, the equivalent resistance of T3 // T5 + T6 decreases, which prevents the level of voltage V _B from increasing.

The opposite reasoning applies for minimum Vt _n and maximum Vt _p .

This stability of the voltage V _B with the method makes it possible to have a perfectly reproducible reference generator from one integrated circuit to the other. There is no adjustment to be made. There is less rejection in manufacturing.

If it is the supply voltage which varies, it is the input resistance Ron of the transistors which varies. In particular, if Vcc increases, the voltage input resistance of transistor T1 increases and V _A decreases. V _A being applied to the gate of transistor T3, the voltage V _B would tend to increase, but as at the same time, the input resistance of transistor T3 increases, the effects compensate each other.

The structure with three branches according to the invention makes it possible in practice to obtain a voltage level V _B which varies at worst like the threshold voltage of a transistor.

In an improvement represented in FIG. 1, a fourth branch is provided, connected to the node B to compensate for the variation of the voltage V _B with the threshold voltage Vt _n .

Theory and experience show indeed that the different threshold voltages of two transistors of the same type of conductivity having undergone a different ion implantation vary with the temperature and the process, but that their difference does not vary, neither in temperature, nor in process.

In the invention, it is proposed to exploit this property to obtain a reference voltage V _C invariant with the temperature and the process.
The fourth branch thus comprises a transistor T7 of type N in series with a transistor T8 of type N and enriched (normally doped). And transistor T7 has a lower threshold voltage than that of transistor T8. In the example the transistor T7 is native.
The transistor T7 receives the voltage V _B on its gate. The transistor T8 is mounted as a direct diode (gate connected to its drain).
A reference voltage V _C is obtained at point C between the two transistors T7 and T8, equal to: $${\text{V}}_{\text{VS}}{\text{= V}}_{\text{B}}{\text{-Vt}}_{\text{n / A}}{\text{= Vt}}_{\text{not}}{\text{-Vt}}_{\text{n / A}}\text{.}$$

This voltage is lower than V _B , but it is completely self-compensated in temperature. In practice we show that it is also self-compensated in process.
If, in addition, a sufficiently resistive transistor T8 and a transistor T7 with a low input resistance Ron (high conductance) are chosen, good compensation is also obtained for variations in supply voltage.
The reference voltages obtained V _B or V _C are quite low (for example, of the order of 1 volt for V _B and 0.8 volt for V _C ), but they are sufficient for the polarization of the grids of memory cells.

You can obtain slightly higher levels (1.2 to 1.6 volts) by increasing the W / L ratio of one or the other transistor T3, T5.

We then lose a little stability in supply voltage, but without losing stability in process or temperature, which is interesting.

In a variant, the reference generator according to the invention also makes it possible to deliver a reference current.
This is what is shown in FIG. 2. The same elements are used in FIG. 1, except for replacing the transistor T8 with a real resistance in a resistive material chosen to be very stable in temperature in the technology used, for example of diffusion N.
An invariant current is obtained with the supply voltage Vcc, with the temperature and the manufacturing process. The current I obtained is proportional to the ratio of the voltage at the node C, V _C = Vt _n -Vt _na on the resistance R.
The only variation in current is therefore that due to resistance R.
Advantageously, to obtain several reference currents capable of supplying several devices, it suffices to use successive assemblies with current mirror with respect to this fourth branch.
This is what has been shown in FIG. 3.
For this, a transistor T9 is placed in series between the supply voltage Vcc and the transistor T7. This transistor is mounted in direct diode and it is of type P in the example.
A fifth branch comprises a transistor T10 in series with a transistor T11. The transistor T10 is of the same type of conductivity as the transistor T9 and it has its gate connected to that of the transistor T9. The transistor T11 is of the same type of conductivity as the transistor T7, but with a higher threshold voltage (Vt _n ) and it is mounted as a direct diode. We can put several other branches of the same type as this fifth branch, to obtain as many reference currents.

Figures 4 and 5 show more detailed diagrams than those of Figures 1 and 3. They indeed show an example of a bias circuit of the reference generator according to the invention.
Thus, in FIG. 4, a pair 1 of transistors of opposite conductivity types is placed in parallel between the gate and the drain (A) of the transistor T1. When the generator is activated (ON = 1), this pair 1 draws the voltage VA towards a positive potential. This phenomenon is accentuated by a transistor 2, here of type N, which isolates at the same time the gate voltage of the transistor T1, from the mass.
Another transistor 3, here of type P, isolates the gate voltage of the transistors T2 and T4 from the supply voltage Vcc to prevent it from rising too much.
A transistor 4, here of type P, transmits the supply voltage on the drain of transistor T7. This transistor 4 makes it possible to prevent current consumption when the generator is not active (ON = 0). Transistors 5 and 6, here of type N, each in series with the transistors T2 and T4 respectively, draw the sources of these two transistors towards ground.
Finally, a transistor 7 in parallel on the transistor T8 pulls the node C towards the ground, when the generator is not under tension (ON = 0).

In the example, the generator activation signal ON, delivered by a control circuit not shown of the integrated circuit, controls the gate of the transistors 5 and 6 and of the N type transistor of the pair 1. An inverter 8 allows '' obtain the corresponding reverse / ON command for transistors 2, 4, 7, and the P-type transistor of pair 1.

The bias circuit enables the transistors T1 and T4 to be biased at the conduction limit, while preventing current consumption when the generator is not activated.

FIG. 5 represents a bias circuit for the reference generator used to deliver a stable current as shown in FIG. 2. This bias circuit comprises the elements 1, 2, 5 and 6, of the bias circuit of FIG. 4 It further comprises two transistors 8 and 9, here of type N, in series on each branch for generating the reference current in order to draw them to ground. It does not include the elements 4 and 7 of the polarization circuit of FIG. 4.

The various figures represent a reference generator produced in CMOS technology. However, the invention is not limited to this particular technology. The invention is more generally achievable in MOS technology, with the only constraints that the transistors mounted in current mirror are of the same type of conductivity, and that the fifth branch uses two transistors (T7, T8) of the same type to obtain compensation. in desired temperature.

soit $${\text{Vcc > Vt}}_{\text{n}}{\text{- Vt}}_{\text{na}}$$

et pour la figure 3, il faut: $${\text{Vcc > V}}_{\text{C}}$$

soit $${\text{Vcc > Vt}}_{\text{p}}{\text{+ Vt}}_{\text{n}}{\text{- Vt}}_{\text{na}}\text{.}$$

The only technological constraint for using the reference generator according to the invention relates to the supply voltage Vcc.
Indeed, for Figures 1 and 2, it is necessary: $${\text{Vcc> V}}_{\text{VS}}$$

is $${\text{Vcc> Vt}}_{\text{not}}{\text{- Vt}}_{\text{n / A}}$$

and for figure 3, it is necessary: $${\text{Vcc> V}}_{\text{VS}}$$

is $${\text{Vcc> Vt}}_{\text{p}}{\text{+ Vt}}_{\text{not}}{\text{- Vt}}_{\text{n / A}}\text{.}$$

Claims (7)

Reference generator in integrated circuit in MOS technology comprising a current mirror device comprising: a first current source branch with a first transistor (T1) mounted as a direct diode, in series with a second native and resistive transistor (T2); a second branch with a third transistor (T3), in series with a fourth transistor (T4) mounted as a direct diode; characterized in that said device comprises a third branch, connected to a midpoint (B) of the second branch, with a fifth transistor (T5), in series with a sixth transistor (T6), mounted as a direct diode and connected to the says midpoint; the first, third and fifth transistors having the same type of conductivity and their gates connected together, and the second, fourth and sixth transistors having the same type of conductivity and the second and fourth transistors having their gates connected together, the fourth transistor having a conduction threshold (Vt _n ) greater than that of the second and sixth transistors (Vt _na ), to provide a stable voltage (V _B ) at the midpoint of the second branch. Reference generator according to claim 1, characterized in that it comprises an output stage comprising in series a seventh transistor (T7), and a eighth transistor (T8) with the same types of conductivity as the second transistor, the seventh transistor being not very resistive, and receiving on its gate the stable voltage (V _B ), the eighth transistor (T8) being mounted as a direct diode and very resistive , and having a conduction threshold (Vt _n ) greater than that of the seventh transistor (Vt _na ),
to provide an output voltage (V _C ) at an output point (C) taken between the seventh and eighth transistors. Reference generator according to claim 2, characterized in that the seventh transistor has a low input resistance. Reference generator according to claim 1, characterized in that it comprises a fourth branch comprising a seventh transistor (T7), of the same type of conductivity as the second transistor, not very resistive, in series with a resistance (R), this seventh transistor having a threshold voltage (Vt _na ) lower than that (Vt _n ) of the fourth transistor and receiving the stable voltage (V _B ) on its gate, to obtain a stable current (I) in this fourth branch. Current generator according to claim 4, characterized in that it comprises at least a fifth branch mounted as a current mirror with the fourth branch, the fourth branch further comprising a ninth transistor (T9) mounted as a direct diode and of the same type of conductivity as the first transistor (T1). Reference generator according to any one of the preceding claims, characterized in that the geometry ratios of the third and of the fifth transistor are used to modify the level of the output voltage. Reference generator according to any one of the preceding claims, characterized in that it is produced in CMOS technology, the first transistor having a P type conductivity and the second transistor having a N type conductivity.

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