EP0886200A3 - Circuit arrangement for generating a load-independent DC voltage - Google Patents

Circuit arrangement for generating a load-independent DC voltage Download PDF

Info

Publication number
EP0886200A3
EP0886200A3 EP98110544A EP98110544A EP0886200A3 EP 0886200 A3 EP0886200 A3 EP 0886200A3 EP 98110544 A EP98110544 A EP 98110544A EP 98110544 A EP98110544 A EP 98110544A EP 0886200 A3 EP0886200 A3 EP 0886200A3
Authority
EP
European Patent Office
Prior art keywords
voltage
load
generating
circuit arrangement
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP98110544A
Other languages
German (de)
French (fr)
Other versions
EP0886200B1 (en
EP0886200A2 (en
Inventor
Martin Feldtkeller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of EP0886200A2 publication Critical patent/EP0886200A2/en
Publication of EP0886200A3 publication Critical patent/EP0886200A3/en
Application granted granted Critical
Publication of EP0886200B1 publication Critical patent/EP0886200B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/613—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in parallel with the load as final control devices

Abstract

Schaltungsanordnung zur Erzeugung einer lastunabhängigen Gleichspannung mit einer durch eine Stromregelanordnung (SRA) geregelten Netzstromaufnahme, wobei in einem Rückkopplungszweig (RZ) von einer zur Messung einer Ausgangsspannung (Ua) dienenden Spannungsmeßanordnung (MA1) zu der Stromregelanordnung (SRA) ein Funktionsgenerator (FG) enthalten ist, der ein von einem Eingangssignal (x) gemäß einer Funktion y=f(x) abhängiges Ausgangssignal (y) erzeugt, wobei die Ableitung der Funktion f(x) von dem Eingangssignal (x) abhängig ist und wobei die Ableitung wenigstens abschnittsweise mit wachsendem Eingangssignal (x) zunimmt.

Figure 00000001
Circuit arrangement for generating a load-independent direct voltage with a mains current consumption regulated by a current regulating arrangement (SRA), a function generator (FG) in a feedback branch (RZ) from a voltage measuring arrangement (MA1) serving to measure an output voltage (U a ) to the current regulating arrangement (SRA) is included which is one of an input signal (x) according to a function y = f (x) dependent output signal (y) is generated, the derivative of the function f (x) being dependent on the input signal (x) and the derivative increasing at least in sections with an increasing input signal (x).
Figure 00000001
EP98110544A 1997-06-18 1998-06-09 Circuit arrangement for generating a load-independent DC voltage Expired - Lifetime EP0886200B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19725842A DE19725842C2 (en) 1997-06-18 1997-06-18 Circuit arrangement for generating a load-independent DC voltage
DE19725842 1997-06-18

Publications (3)

Publication Number Publication Date
EP0886200A2 EP0886200A2 (en) 1998-12-23
EP0886200A3 true EP0886200A3 (en) 2000-03-29
EP0886200B1 EP0886200B1 (en) 2002-05-02

Family

ID=7832895

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98110544A Expired - Lifetime EP0886200B1 (en) 1997-06-18 1998-06-09 Circuit arrangement for generating a load-independent DC voltage

Country Status (4)

Country Link
US (1) US6069470A (en)
EP (1) EP0886200B1 (en)
JP (1) JP3538320B2 (en)
DE (2) DE19725842C2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100333973B1 (en) * 1999-06-14 2002-04-24 김덕중 Power Factor Compensation Controller
CN2402549Y (en) * 1999-12-02 2000-10-25 杜顺兴 Double-loop safety belt automatic warning device for car
JP4692704B2 (en) * 2001-06-11 2011-06-01 株式会社富士通ゼネラル Power factor correction power circuit
DE10162274A1 (en) * 2001-12-19 2003-07-10 Philips Intellectual Property Regulating current supply for current load(s) with low supply voltage involves regulating d.c. voltage source supply voltage depending on voltage regulator input voltage and reference value
DE10225406B4 (en) * 2002-06-07 2005-07-14 Infineon Technologies Ag Method for driving a switch in a switching converter and drive circuit for controlling a switch
JP2004080553A (en) 2002-08-21 2004-03-11 Nec Corp Circuit and method for data output
KR100544186B1 (en) * 2003-06-12 2006-01-23 삼성전자주식회사 Apparatus for providing power
DE10355670B4 (en) 2003-11-28 2005-12-08 Infineon Technologies Ag Method for driving a switch in a power factor correction circuit and drive circuit
DE102004036522A1 (en) 2004-07-28 2006-03-23 Infineon Technologies Ag Control circuit for a switch in a switching converter to improve the step response
DE102004038353B4 (en) * 2004-08-06 2009-01-15 Infineon Technologies Austria Ag Control circuit for a switch in a switching converter and circuit arrangement with a switching converter and a load
DE102004053144B4 (en) * 2004-11-03 2011-05-19 Infineon Technologies Ag Boost converter with improved dynamic behavior
US7362599B2 (en) * 2004-12-13 2008-04-22 Thomas & Betts International, Inc. Switching power supply with capacitor input for a wide range of AC input voltages
US7888917B2 (en) * 2008-04-23 2011-02-15 Honeywell International Inc. Systems and methods for producing a substantially constant output voltage in a power source boost system
JP4924659B2 (en) 2009-05-27 2012-04-25 サンケン電気株式会社 DC-DC converter
CN103516191B (en) * 2012-06-29 2015-11-04 珠海格力电器股份有限公司 Power factor correcting method, circuit and Switching Power Supply
US8917076B2 (en) * 2012-08-10 2014-12-23 Monolithic Power Systems, Inc. Off-line regulator with pass device and associated method
EP3761494A1 (en) 2019-07-02 2021-01-06 Infineon Technologies Austria AG Method for driving an electronic switch in a power converter circuit and power converter circuit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5359276A (en) * 1993-05-12 1994-10-25 Unitrode Corporation Automatic gain selection for high power factor
US5532918A (en) * 1992-06-10 1996-07-02 Digital Equipment Corporation High power factor switched DC power supply
US5619405A (en) * 1995-12-21 1997-04-08 Reltec Corporation Variable bandwith control for power factor correction

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371667A (en) * 1993-06-14 1994-12-06 Fuji Electrochemical Co., Ltd. Electric power supply

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5532918A (en) * 1992-06-10 1996-07-02 Digital Equipment Corporation High power factor switched DC power supply
US5359276A (en) * 1993-05-12 1994-10-25 Unitrode Corporation Automatic gain selection for high power factor
US5619405A (en) * 1995-12-21 1997-04-08 Reltec Corporation Variable bandwith control for power factor correction

Also Published As

Publication number Publication date
DE19725842A1 (en) 1999-01-07
EP0886200B1 (en) 2002-05-02
US6069470A (en) 2000-05-30
DE59803965D1 (en) 2002-06-06
JP3538320B2 (en) 2004-06-14
EP0886200A2 (en) 1998-12-23
DE19725842C2 (en) 1999-04-22
JPH1155939A (en) 1999-02-26

Similar Documents

Publication Publication Date Title
EP0886200A3 (en) Circuit arrangement for generating a load-independent DC voltage
DE102007028568B4 (en) switching regulators
DE2356838C3 (en) Measuring device for determining a resistance deviation
EP0522659A3 (en) Dc-dc converter with microprocessor control
GB1560350A (en) Pulse-width modulators
DE19720214A1 (en) Output maximum point detection circuit having output detection unit
RU94021632A (en) Diagnostic device and method of amperometric determination of current
EP0939494A3 (en) Circuit arrangement with current type digital to analogue converters
EP0401225B1 (en) Circuit controlled flow probe
ATE129367T1 (en) CIRCUIT ARRANGEMENT FOR APPROACHING A NON-LINEAR TRANSMISSION FUNCTION.
SE8604821D0 (en) FINAL STEP WITH AUTOMATIC LEVEL CONTROL FOR NETWORK SIGNAL
ATE6328T1 (en) METHOD OF REGULATION AND CURRENT LIMITING OF A D.C. Flyback CONVERTER.
AU604955B2 (en) Multiphase multiplier
EP0199979B1 (en) Measuring method for determining the loop or internal resistance of an alternating current network and apparatus for using the method
EP0818877A3 (en) Offset compensation circuit
EP0774705A3 (en) Comparator with hysteresis for use in a voltage regulating circuit
SU961121A1 (en) Pulse width amplifier
SU1644043A2 (en) Rectified voltage value converter
SU1337906A1 (en) Device for checking parameters of electric energy
EP0930603A3 (en) Device for avoiding overheating the display driver components of a plasma display
EP0257305A3 (en) Circuit arrangement for a position-sensitive radiation detector
KR200141188Y1 (en) Current output circuit of d/a converter
EP0860762A3 (en) Circuit and method for generating a DC output voltage
SU1367004A1 (en) D.c.voltage stabilized source
JPS55140327A (en) Pulse width modulator

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB IE IT

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

RIC1 Information provided on ipc code assigned before grant

Free format text: 7G 05F 1/613 A, 7H 02M 1/00 B

17P Request for examination filed

Effective date: 20000503

AKX Designation fees paid

Free format text: DE FR GB IE IT

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: INFINEON TECHNOLOGIES AG

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

17Q First examination report despatched

Effective date: 20011002

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB IE IT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20020502

Ref country code: GB

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20020502

Ref country code: FR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20020502

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REF Corresponds to:

Ref document number: 59803965

Country of ref document: DE

Date of ref document: 20020606

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

Free format text: GERMAN

GBV Gb: ep patent (uk) treated as always having been void in accordance with gb section 77(7)/1977 [no translation filed]

Effective date: 20020502

REG Reference to a national code

Ref country code: IE

Ref legal event code: FD4D

Ref document number: 0886200E

Country of ref document: IE

EN Fr: translation not filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20030204

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20160816

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20170622

Year of fee payment: 20

REG Reference to a national code

Ref country code: DE

Ref legal event code: R119

Ref document number: 59803965

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20180103