EP1080413A4 - Method and apparatus for programming a graphics subsystem register set - Google Patents

Method and apparatus for programming a graphics subsystem register set

Info

Publication number: EP1080413A4
Authority: EP; European Patent Office
Prior art keywords: programming; register set; graphics subsystem; subsystem register; graphics
Prior art date: 1998-05-12
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Withdrawn

Application number

EP98921155A

Other languages

German (de)

French (fr)

Other versions

EP1080413A1 (en

Inventor

Michael K Larson

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

S3 Graphics Co Ltd

Original Assignee

S3 Graphics Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1998-05-12

Filing date

1998-05-12

Publication date

2006-02-01

1998-05-12 Application filed by S3 Graphics Co Ltd filed Critical S3 Graphics Co Ltd

2001-03-07 Publication of EP1080413A1 publication Critical patent/EP1080413A1/en

2006-02-01 Publication of EP1080413A4 publication Critical patent/EP1080413A4/en

Status Withdrawn legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

EP98921155A 1998-05-12 1998-05-12 Method and apparatus for programming a graphics subsystem register set Withdrawn EP1080413A4 (en)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
PCT/US1998/009688 WO1999059068A1 (en)	1998-05-12	1998-05-12	Method and apparatus for programming a graphics subsystem register set

Publications (2)

Publication Number	Publication Date
EP1080413A1 EP1080413A1 (en)	2001-03-07
EP1080413A4 true EP1080413A4 (en)	2006-02-01

Family

ID=22267044

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP98921155A Withdrawn EP1080413A4 (en)	1998-05-12	1998-05-12	Method and apparatus for programming a graphics subsystem register set

Country Status (4)

Country	Link
EP (1)	EP1080413A4 (en)
JP (1)	JP4846097B2 (en)
AU (1)	AU7383198A (en)
WO (1)	WO1999059068A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0447145A2 (en) *	1990-03-12	1991-09-18	Hewlett-Packard Company	User scheduled direct memory access using virtual addresses
EP0627699A2 (en) *	1993-06-04	1994-12-07	Sun Microsystems, Inc.	Command preprocessor for a high performance three dimensional graphics accelerator
US5657479A (en) *	1995-12-04	1997-08-12	Silicon Graphics, Inc.	Hierarchical display list processing in graphics data retrieval system
US5706478A (en) *	1994-05-23	1998-01-06	Cirrus Logic, Inc.	Display list processor for operating in processor and coprocessor modes

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5524265A (en) *	1994-03-08	1996-06-04	Texas Instruments Incorporated	Architecture of transfer processor

1998
- 1998-05-12 AU AU73831/98A patent/AU7383198A/en not_active Abandoned
- 1998-05-12 EP EP98921155A patent/EP1080413A4/en not_active Withdrawn
- 1998-05-12 WO PCT/US1998/009688 patent/WO1999059068A1/en not_active Application Discontinuation
- 1998-05-12 JP JP2000548810A patent/JP4846097B2/en not_active Expired - Lifetime

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
EP0447145A2 (en) *	1990-03-12	1991-09-18	Hewlett-Packard Company	User scheduled direct memory access using virtual addresses
EP0627699A2 (en) *	1993-06-04	1994-12-07	Sun Microsystems, Inc.	Command preprocessor for a high performance three dimensional graphics accelerator
US5706478A (en) *	1994-05-23	1998-01-06	Cirrus Logic, Inc.	Display list processor for operating in processor and coprocessor modes
US5657479A (en) *	1995-12-04	1997-08-12	Silicon Graphics, Inc.	Hierarchical display list processing in graphics data retrieval system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of WO9959068A1 *

Also Published As

Publication number	Publication date
EP1080413A1 (en)	2001-03-07
JP4846097B2 (en)	2011-12-28
WO1999059068A1 (en)	1999-11-18
JP2002514817A (en)	2002-05-21
AU7383198A (en)	1999-11-29

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Legal Events

Date	Code	Title	Description
2001-01-19	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
2001-03-07	17P	Request for examination filed	Effective date: 20001212
2001-03-07	AK	Designated contracting states	Kind code of ref document: A1 Designated state(s): GB
2004-08-18	RAP1	Party data changed (applicant data changed or rights of an application transferred)	Owner name: S3 GRAPHICS CO., LTD.
2006-02-01	A4	Supplementary search report drawn up and despatched	Effective date: 20051221
2006-02-01	RIC1	Information provided on ipc code assigned before grant	Ipc: G06F 12/06 20060101ALI20051215BHEP Ipc: G06T 1/20 20060101AFI20051215BHEP
2007-03-23	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN
2007-04-25	18D	Application deemed to be withdrawn	Effective date: 20060913