EP1439522A3 - Frame buffer control circuit - Google Patents

Frame buffer control circuit Download PDF

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Publication number
EP1439522A3
EP1439522A3 EP04000243A EP04000243A EP1439522A3 EP 1439522 A3 EP1439522 A3 EP 1439522A3 EP 04000243 A EP04000243 A EP 04000243A EP 04000243 A EP04000243 A EP 04000243A EP 1439522 A3 EP1439522 A3 EP 1439522A3
Authority
EP
European Patent Office
Prior art keywords
image data
image memory
monitoring
image
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04000243A
Other languages
German (de)
French (fr)
Other versions
EP1439522A2 (en
Inventor
Ulrich Brüggemann
Mathias Schmidt
Holger Milnikel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conrac GmbH
Original Assignee
Conrac GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Conrac GmbH filed Critical Conrac GmbH
Publication of EP1439522A2 publication Critical patent/EP1439522A2/en
Publication of EP1439522A3 publication Critical patent/EP1439522A3/en
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Abstract

Bildspeicherüberwachungssystem, mit mindestens einem Bildspeicher zum Abspeichern von Bilddaten, mit mindestens einer Steuereinrichtung, die eine Empfangseinrichtung zum Empfangen von Bilddaten, eine Schnittstelle zum zyklischen Übertragen der empfangenen Bilddaten an den Bildspeicher sowie zum zyklischen Abrufen der gespeicherten Bilddaten aus dem Bildspeicher, und eine Ausgabeeinrichtung zur Ausgabe der aus dem Bildspeicher abgerufenen Bilddaten an eine Anzeigeeinrichtung umfasst. Das Bildspeicherüberwachungssystem beinhaltet darüber hinaus mindestens einer Überwachungseinrichtung zur Überwachung der zyklischen Bilddatenübertragung zwischen der Schnittstelle und dem Bildspeicher, wobei die Überwachungseinrichtung über eine Detektionseinrichtung verfügt zum Messen eines Zeitintervalls zwischen aufeinanderfolgenden Bilddatenübertragungen der Schnittstelle an den Bildspeicher, wobei die Überwachungseinrichtung ein Warnsignal generiert, für den Fall dass das von der Detektionseinrichtung gemessene Zeitintervall einen vorgesehenen Wert überschreitet.

Figure imgaf001
An image memory monitoring system, comprising at least one image memory for storing image data, having at least one control device, a receiving device for receiving image data, an interface for cyclically transmitting the received image data to the image memory and for cyclically retrieving the stored image data from the image memory, and an output device for Output of the retrieved from the image memory image data to a display device comprises. The image memory monitoring system further includes at least one monitoring device for monitoring the cyclic image data transmission between the interface and the image memory, wherein the monitoring device has a detection device for measuring a time interval between successive image data transmissions of the interface to the image memory, wherein the monitoring device generates a warning signal for the case the time interval measured by the detection device exceeds a predetermined value.
Figure imgaf001
EP04000243A 2003-01-16 2004-01-08 Frame buffer control circuit Withdrawn EP1439522A3 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10301494 2003-01-16
DE2003101494 DE10301494B3 (en) 2003-01-16 2003-01-16 Image storage monitoring system

Publications (2)

Publication Number Publication Date
EP1439522A2 EP1439522A2 (en) 2004-07-21
EP1439522A3 true EP1439522A3 (en) 2009-02-25

Family

ID=32520004

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04000243A Withdrawn EP1439522A3 (en) 2003-01-16 2004-01-08 Frame buffer control circuit

Country Status (2)

Country Link
EP (1) EP1439522A3 (en)
DE (1) DE10301494B3 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839638A (en) * 1985-03-06 1989-06-13 Createc Gesellschaft fur Elektrotechnik mgH Programmable circuit for controlling a liquid crystal display

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4009446A1 (en) * 1990-03-23 1991-09-26 Siemens Ag METHOD FOR CHECKING VIEWING DEVICE CONTROLS FOR ERROR-FREE IN SECURITY TECHNICAL SYSTEMS AND DEVICES FOR CARRYING OUT THIS METHOD
DE19703574A1 (en) * 1997-01-31 1998-08-06 Alsthom Cge Alcatel Process for the safe display of an image on a monitor

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4839638A (en) * 1985-03-06 1989-06-13 Createc Gesellschaft fur Elektrotechnik mgH Programmable circuit for controlling a liquid crystal display

Also Published As

Publication number Publication date
DE10301494B3 (en) 2004-08-26
EP1439522A2 (en) 2004-07-21

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