EP2156304A4 - Solid state memory utilizing analog communication of data values - Google Patents

Solid state memory utilizing analog communication of data values

Info

Publication number
EP2156304A4
EP2156304A4 EP08770154A EP08770154A EP2156304A4 EP 2156304 A4 EP2156304 A4 EP 2156304A4 EP 08770154 A EP08770154 A EP 08770154A EP 08770154 A EP08770154 A EP 08770154A EP 2156304 A4 EP2156304 A4 EP 2156304A4
Authority
EP
European Patent Office
Prior art keywords
solid state
data values
state memory
analog communication
memory utilizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP08770154A
Other languages
German (de)
French (fr)
Other versions
EP2156304A2 (en
EP2156304B1 (en
Inventor
Frankie F Roohparvar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP2156304A2 publication Critical patent/EP2156304A2/en
Publication of EP2156304A4 publication Critical patent/EP2156304A4/en
Application granted granted Critical
Publication of EP2156304B1 publication Critical patent/EP2156304B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/16—Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters 

Abstract

Memory devices and bulk storage devices configured to program a memory cell to a target threshold voltage representing a data pattern of more than one bit and read the data pattern of more than one bit of the memory cell in a single read operation by generating a signal that is representative of an actual threshold voltage of the memory cell.
EP08770154A 2007-06-05 2008-06-05 Solid state memory utilizing analog communication of data values Active EP2156304B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/758,307 US7719901B2 (en) 2007-06-05 2007-06-05 Solid state memory utilizing analog communication of data values
PCT/US2008/065846 WO2008151262A2 (en) 2007-06-05 2008-06-05 Solid state memory utilizing analog communication of data values

Publications (3)

Publication Number Publication Date
EP2156304A2 EP2156304A2 (en) 2010-02-24
EP2156304A4 true EP2156304A4 (en) 2010-07-21
EP2156304B1 EP2156304B1 (en) 2011-11-16

Family

ID=40094416

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08770154A Active EP2156304B1 (en) 2007-06-05 2008-06-05 Solid state memory utilizing analog communication of data values

Country Status (8)

Country Link
US (4) US7719901B2 (en)
EP (1) EP2156304B1 (en)
JP (2) JP2010529586A (en)
KR (1) KR101120248B1 (en)
CN (1) CN101681321B (en)
AT (1) ATE534079T1 (en)
TW (1) TWI370970B (en)
WO (1) WO2008151262A2 (en)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7719901B2 (en) 2007-06-05 2010-05-18 Micron Technology, Inc. Solid state memory utilizing analog communication of data values
US7995412B2 (en) 2007-09-07 2011-08-09 Micron Technology, Inc. Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device
US7782674B2 (en) 2007-10-18 2010-08-24 Micron Technology, Inc. Sensing of memory cells in NAND flash
US7751253B2 (en) 2008-03-17 2010-07-06 Micron Technology, Inc. Analog sensing of memory cells with a source follower driver in a semiconductor memory device
US7768832B2 (en) 2008-04-07 2010-08-03 Micron Technology, Inc. Analog read and write paths in a solid state memory device
US9892800B2 (en) 2015-09-30 2018-02-13 Sunrise Memory Corporation Multi-gate NOR flash thin-film transistor strings arranged in stacked horizontal active strips with vertical control gates
US10121553B2 (en) 2015-09-30 2018-11-06 Sunrise Memory Corporation Capacitive-coupled non-volatile thin-film transistor NOR strings in three-dimensional arrays
KR101751407B1 (en) * 2016-02-16 2017-07-11 단국대학교 산학협력단 Analog information based emulation method for investigating reliability of flash memory and apparatus of the same
US10347329B2 (en) * 2017-08-29 2019-07-09 Micron Technology, Inc. Reflow protection
US10614899B2 (en) * 2018-06-29 2020-04-07 Micron Technology, Inc. Program progress monitoring in a memory array
AU2019428297B2 (en) 2019-02-06 2023-03-09 Hewlett-Packard Development Company, L.P. Multiple circuits coupled to an interface
US11787173B2 (en) 2019-02-06 2023-10-17 Hewlett-Packard Development Company, L.P. Print component with memory circuit
MX2021009125A (en) 2019-02-06 2021-09-21 Hewlett Packard Development Co Print component with memory circuit.
KR102621218B1 (en) 2019-02-06 2024-01-04 휴렛-팩커드 디벨롭먼트 컴퍼니, 엘.피. Memory in fluid die
SG11202107300YA (en) 2019-02-06 2021-08-30 Hewlett Packard Development Co Lp Communicating print component
CN110610739B (en) * 2019-09-17 2021-06-18 珠海创飞芯科技有限公司 Threshold voltage adjusting method
TWI768496B (en) * 2020-10-07 2022-06-21 群聯電子股份有限公司 Read voltage control method, memory storage device and memory control circuit unit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0801398A2 (en) * 1996-04-09 1997-10-15 Information Storage Devices, Inc. Method and apparatus for analog storage using floating gate NAND structures
US5745414A (en) * 1994-09-14 1998-04-28 Information Storage Devices, Inc. Integrated circuit system having reference cells for improving the reading of storage cells
US5801980A (en) * 1995-09-28 1998-09-01 Invox Technology Testing of an analog memory using an on-chip digital input/output interface

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4890259A (en) 1988-07-13 1989-12-26 Information Storage Devices High density integrated circuit analog signal recording and playback system
US5386132A (en) * 1992-11-02 1995-01-31 Wong; Chun C. D. Multimedia storage system with highly compact memory device
JPH06243580A (en) * 1993-02-15 1994-09-02 Hitachi Ltd Agc circuit
JPH06290543A (en) * 1993-03-31 1994-10-18 Hitachi Ltd Hdd data reproducing circuit
US5694356A (en) * 1994-11-02 1997-12-02 Invoice Technology, Inc. High resolution analog storage EPROM and flash EPROM
JPH0969295A (en) * 1995-08-31 1997-03-11 Sanyo Electric Co Ltd Non-volatile multi-value memory device
JPH1031559A (en) * 1996-07-17 1998-02-03 Matsushita Electric Ind Co Ltd Bit stream storage reader
US6084538A (en) 1997-09-05 2000-07-04 Cirrus Logic, Inc. Offset calibration of a flash ADC array
JP3006683B2 (en) * 1997-10-30 2000-02-07 日本電気株式会社 Reproduction signal waveform control device for MR head
US5969986A (en) * 1998-06-23 1999-10-19 Invox Technology High-bandwidth read and write architectures for non-volatile memories
US6061751A (en) 1998-03-09 2000-05-09 Texas Instruments Incorporated Computer system with controller circuit of an associated mass storage peripheral device located remotely from the device in the host computer
US6208542B1 (en) * 1998-06-30 2001-03-27 Sandisk Corporation Techniques for storing digital data in an analog or multilevel memory
JP2001319433A (en) * 2000-05-01 2001-11-16 Fujitsu Ltd Data reproducing device
US7291878B2 (en) * 2003-06-03 2007-11-06 Hitachi Global Storage Technologies Netherlands B.V. Ultra low-cost solid-state memory
JP2005018892A (en) * 2003-06-25 2005-01-20 Fujitsu Ltd Data recording and reproducing signal processor
JP3884448B2 (en) 2004-05-17 2007-02-21 株式会社東芝 Semiconductor memory device
US7471552B2 (en) * 2003-08-04 2008-12-30 Ovonyx, Inc. Analog phase change memory
JP2005122775A (en) * 2003-10-14 2005-05-12 Matsushita Electric Ind Co Ltd Recording medium reproducing device
JP4322686B2 (en) * 2004-01-07 2009-09-02 株式会社東芝 Nonvolatile semiconductor memory device
US7817469B2 (en) * 2004-07-26 2010-10-19 Sandisk Il Ltd. Drift compensation in a flash memory
JP4410188B2 (en) 2004-11-12 2010-02-03 株式会社東芝 Data writing method for semiconductor memory device
JP2006221719A (en) * 2005-02-09 2006-08-24 Sony Corp Prml decoding device, prml decoding method, and reproducing device
US7152335B2 (en) * 2005-03-05 2006-12-26 Nichols Michael P Omnidirectional torpedo level having magnetic mounts and adjustable protractor
JP4660243B2 (en) 2005-03-28 2011-03-30 株式会社東芝 Semiconductor memory device
US7158335B2 (en) 2005-04-01 2007-01-02 Samsung Electronics Co., Ltd. Method for resonance identification in hard disk drives
JP4382012B2 (en) * 2005-07-08 2009-12-09 シャープ株式会社 DATA RECORDING DEVICE AND ITS CONTROL METHOD, DATA RECORDING DEVICE CONTROL PROGRAM, AND RECORDING MEDIUM CONTAINING THE PROGRAM
JP2007042181A (en) * 2005-08-01 2007-02-15 Sony Corp Automatic equalizer and automatic equalizing method, and reproducing apparatus
US7355892B2 (en) * 2006-06-30 2008-04-08 Sandisk Corporation Partial page fail bit detection in flash memory devices
US7567461B2 (en) * 2006-08-18 2009-07-28 Micron Technology, Inc. Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
US7280398B1 (en) * 2006-08-31 2007-10-09 Micron Technology, Inc. System and memory for sequential multi-plane page memory operations
US7719901B2 (en) * 2007-06-05 2010-05-18 Micron Technology, Inc. Solid state memory utilizing analog communication of data values
US7995412B2 (en) 2007-09-07 2011-08-09 Micron Technology, Inc. Analog-to-digital and digital-to-analog conversion window adjustment based on reference cells in a memory device
US7782674B2 (en) 2007-10-18 2010-08-24 Micron Technology, Inc. Sensing of memory cells in NAND flash
US7751253B2 (en) 2008-03-17 2010-07-06 Micron Technology, Inc. Analog sensing of memory cells with a source follower driver in a semiconductor memory device
US7768832B2 (en) 2008-04-07 2010-08-03 Micron Technology, Inc. Analog read and write paths in a solid state memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5745414A (en) * 1994-09-14 1998-04-28 Information Storage Devices, Inc. Integrated circuit system having reference cells for improving the reading of storage cells
US5801980A (en) * 1995-09-28 1998-09-01 Invox Technology Testing of an analog memory using an on-chip digital input/output interface
EP0801398A2 (en) * 1996-04-09 1997-10-15 Information Storage Devices, Inc. Method and apparatus for analog storage using floating gate NAND structures

Also Published As

Publication number Publication date
US8811092B2 (en) 2014-08-19
CN101681321B (en) 2012-10-10
WO2008151262A3 (en) 2009-02-26
KR20100028091A (en) 2010-03-11
JP2013175276A (en) 2013-09-05
US20100226175A1 (en) 2010-09-09
US8064266B2 (en) 2011-11-22
EP2156304A2 (en) 2010-02-24
ATE534079T1 (en) 2011-12-15
US8411511B2 (en) 2013-04-02
TW200912653A (en) 2009-03-16
KR101120248B1 (en) 2012-03-19
US7719901B2 (en) 2010-05-18
US20120063225A1 (en) 2012-03-15
JP2010529586A (en) 2010-08-26
US20080304317A1 (en) 2008-12-11
US20130223145A1 (en) 2013-08-29
CN101681321A (en) 2010-03-24
WO2008151262A2 (en) 2008-12-11
TWI370970B (en) 2012-08-21
EP2156304B1 (en) 2011-11-16

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