US20010009167A1 - Methods of fabricating gallium nitride semiconductor layers by lateral overgrowth through offset masks - Google Patents
Methods of fabricating gallium nitride semiconductor layers by lateral overgrowth through offset masks Download PDFInfo
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- US20010009167A1 US20010009167A1 US09/780,071 US78007101A US2001009167A1 US 20010009167 A1 US20010009167 A1 US 20010009167A1 US 78007101 A US78007101 A US 78007101A US 2001009167 A1 US2001009167 A1 US 2001009167A1
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- H01L21/02617—Deposition types
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Definitions
- This invention relates to microelectronic devices and fabrication methods, and more particularly to gallium nitride semiconductor devices and fabrication methods therefor.
- gallium nitride is being widely investigated for microelectronic devices including but not limited to transistors, field emitters and optoelectronic devices. It will be understood that, as used herein, gallium nitride also includes alloys of gallium nitride such as aluminum gallium nitride, indium gallium nitride and aluminum indium gallium nitride.
- a major problem in fabricating gallium nitride-based microelectronic devices is the fabrication of gallium nitride semiconductor layers having low defect densities. It is known that one contributor to defect density is the substrate on which the gallium nitride layer is grown. Accordingly, although gallium nitride layers have been grown on sapphire substrates, it is known to reduce defect density by growing gallium nitride layers on aluminum nitride buffer layers which are themselves formed on silicon carbide substrates. Notwithstanding these advances, continued reduction in defect density is desirable.
- gallium nitride structures through openings in a mask.
- undesired ridge growth or lateral overgrowth may occur under certain conditions.
- a gallium nitride semiconductor layer by laterally growing an underlying gallium nitride layer to thereby form a first laterally grown gallium nitride semiconductor layer, and laterally growing the first laterally grown gallium nitride layer to thereby form a second laterally grown gallium nitride semiconductor layer.
- Microelectronic devices may then be formed in the second laterally grown gallium nitride semiconductor layer.
- a gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a first mask that includes a first array of openings therein and growing the underlying gallium nitride layer through the first array of openings and onto the first mask, to thereby form a first overgrown gallium nitride semiconductor layer.
- the first overgrown layer is then masked with the second mask that includes a second array of openings therein.
- the second array of openings is laterally offset from the first array of openings.
- the first overgrown gallium nitride layer is then grown through the second array of openings and onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer.
- Microelectronic devices may then be formed in the second overgrown gallium nitride semiconductor layer.
- the first overgrown gallium nitride layer is relatively defect-free.
- the second array of mask openings is laterally offset from the first array of mask openings, the relatively defect-free overgrown first gallium nitride layer propagates through the second array of openings and onto the second mask. Accordingly, high performance microelectronic devices may be formed in the second overgrown gallium nitride semiconductor layer.
- the second overgrown gallium nitride semiconductor layer is overgrown until the second overgrown gallium nitride layer coalesces on the second mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer.
- the entire continuous overgrown layer can thus be relatively defect-free compared to the underlying gallium nitride layer.
- the first and second gallium nitride semiconductor layers may be grown using metalorganic vapor phase epitaxy (MOVPE).
- MOVPE metalorganic vapor phase epitaxy
- the openings in the masks are stripes that are oriented along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction of the underlying gallium nitride layer.
- the overgrown gallium nitride layers may be grown using triethylgallium (TEG) and ammonia (NH 3 ) precursors at 1000-1100° C. and 45 Torr.
- TEG at 13-39 ⁇ mol/min and NH 3 at 1500 sccm are used in combination with 3000 sccm H 2 diluent.
- TEG at 26 ⁇ mol/min, NH 3 at 1500 sccm and H 2 at 3000 sccm at a temperature of 1100° C. and 45 Torr are used.
- the underlying gallium nitride layer preferably is formed on a substrate, which itself includes a buffer layer such as aluminum nitride, on a substrate such as 6H—SiC(0001).
- Gallium nitride semiconductor structures include an underlying gallium nitride layer, a first lateral gallium nitride layer that extends from the underlying gallium nitride layer and a second lateral gallium nitride layer that extends from the first lateral gallium nitride layer.
- a plurality of microelectronic devices are provided in the second lateral gallium nitride layer.
- gallium nitride semiconductor structures include an underlying gallium nitride layer and a first mask that includes a first array of openings therein, on the underlying gallium nitride layer.
- a first vertical gallium nitride layer extends from the underlying gallium nitride layer through the first array of openings.
- a first lateral gallium nitride layer extends from the vertical gallium nitride layer onto the mask, opposite the underlying gallium nitride layer.
- a second mask on the first lateral gallium nitride layer includes a second array of openings therein that are laterally offset from the first array of openings.
- a second vertical gallium nitride layer extends from the first lateral gallium nitride layer and through the second array of openings.
- a second lateral gallium nitride layer extends from the second vertical gallium nitride layer onto the second mask, opposite the first lateral gallium nitride layer.
- a plurality of microelectronic devices including but not limited to optoelectronic devices and field emitters, are formed in the second vertical gallium nitride layer and in the second lateral gallium nitride layer.
- the second lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer.
- the underlying gallium nitride layer includes a predetermined defect density, and the second vertical and lateral gallium nitride semiconductor layers are of lower defect density than the predetermined defect density. Accordingly, continuous low defect density gallium nitride semiconductor layers may be produced, to thereby allow the production of high-performance microelectronic devices, using laterally offset masks.
- FIG. 1 is a cross-sectional view of gallium nitride semiconductor structures according to the present invention.
- FIGS. 2 - 9 are cross-sectional views of structures of FIG. 1 during intermediate fabrication steps, according to the present invention.
- the gallium nitride structures 200 include a substrate 102 .
- the substrate may be sapphire or gallium nitride.
- the substrate includes a 6H—SiC(0001) substrate 102 a and an aluminum nitride buffer layer 102 b on the silicon carbide substrate 102 a
- the aluminum nitride buffer layer 102 b may 0.01 ⁇ m thick.
- substrate 102 The fabrication of substrate 102 is well known to those having skill in the art and need not be described further. Fabrication of silicon carbide substrates are described, for example, in U.S. Pat. No. 4,865,685 to Palmour; Re 34 , 861 to Davis et al.; U.S. Pat. No. 4,912,064 to Kong et al. and U.S. Pat. No. 4,946,547 to Palmour et al., the disclosures of which are hereby incorporated herein by reference. Also, the crystallographic designation conventions used herein are well known to those having skill in the art, and need not be described further.
- An underlying gallium nitride layer 104 is also included on buffer layer 102 b opposite substrate 102 a .
- the underlying gallium nitride layer 104 may be between about 1.0 and 2.0 ⁇ m thick, and may be formed using heated metalorganic vapor phase epitaxy (MOVPE).
- MOVPE heated metalorganic vapor phase epitaxy
- the underlying gallium nitride layer generally has an undesired relatively high defect density, for example dislocation densities of between about 10 8 and 10 10 cm ⁇ 2 . These high defect densities may result from mismatches in lattice parameters between the buffer layer 102 b and the underlying gallium nitride layer 104 . These high defect densities may impact performance of microelectronic devices formed in the underlying gallium nitride layer 104 .
- a first mask such as a first silicon dioxide mask 106 is included on the underlying gallium nitride layer 104 .
- the first mask 106 includes a first array of openings therein.
- the first openings are first stripes that extend along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction of the underlying gallium nitride layer 104 .
- the first mask 106 may have a thickness of about 1000 ⁇ and may be formed on the underlying gallium nitride layer 104 using low pressure chemical vapor deposition (CVD) at 410° C.
- the first mask 106 may be patterned using standard photolithography techniques and etched in a buffered hydrofluoric acid (HF) solution.
- HF buffered hydrofluoric acid
- a first vertical gallium nitride layer 108 a extends from the underlying gallium nitride layer 104 and through the first array of openings in the first mask 106 .
- the term “vertical” means a direction that is orthogonal to the faces of the substrate 102 .
- the first vertical gallium nitride layer 108 a may be formed using metalorganic vapor phase epitaxy at about 1000-1100° C. and 45 Torr.
- Precursors of triethygallium (TEG) at 13-39 ⁇ mol/min and ammonia (NH 3 ) at 1500 sccm may be used in combination with a 3000 sccm H 2 diluent, to form the first vertical gallium nitride layer 108 a.
- the gallium nitride semiconductor structure 200 also includes a first lateral gallium nitride layer 108 b that extends laterally from the first vertical gallium nitride layer 108 a onto the first mask 106 opposite the underlying gallium nitride layer 104 .
- the first lateral gallium nitride layer 108 b may be formed using metalorganic vapor phase epitaxy as described above.
- the term “lateral” denotes a direction parallel to the faces of substrate 102 .
- first lateral gallium nitride layer 108 b coalesces at first interfaces 108 c to form a first continuous monocrystalline gallium nitride semiconductor layer 108 . It has been found that the dislocation densities in the first underlying gallium nitride layer 104 generally do not propagate laterally with the same intensity as vertically. Thus, first lateral gallium nitride layer 108 b can have a relatively low defect density, for example less that 10 4 cm ⁇ 2 . It will also be understood that the first lateral gallium nitride layer 108 b need not coalesce on the first mask 206 .
- a second mask such as a second silicon dioxide mask 206 is included on the first vertical gallium nitride layer 108 a .
- second mask 206 is laterally offset from first mask 106 .
- second mask 206 may also extend onto first vertical gallium nitride layer 108 b .
- second mask 206 covers all of first vertical gallium nitride layer 108 b such that defects in this layer do not propagate further.
- the second mask 206 need not be symmetrically offset with respect to first mask 106 .
- the second mask 206 includes a second array of openings therein. The second openings are preferably oriented as described in connection with the first mask 106 .
- the second mask 206 also may be fabricated similar to first mask 106 .
- a second vertical gallium nitride layer 208 a extends from the first lateral gallium nitride layer 108 a and through the second array of openings in the second mask 206 .
- the second vertical gallium nitride layer 208 a may be formed similar to first vertical gallium nitride layer 108 a .
- the gallium nitride semiconductor structure 200 also includes a second lateral gallium nitride layer 208 b that extends laterally from the second vertical gallium nitride layer 208 a onto the second mask 206 opposite the first gallium nitride layer 108 .
- the second lateral gallium nitride layer 208 b may be formed using metalorganic vapor phase epitaxy as was described above.
- the second lateral gallium nitride layer 208 b coalesces at second interfaces 208 c , to form a second continuous monocrystalline gallium nitride semiconductor layer 208 . It has been found that since the first lateral gallium nitride layer 108 b is used to grow second gallium nitride layer 208 , the second gallium nitride layer 208 including second vertical gallium nitride layer 208 a and second lateral gallium nitride layer 208 b , can have a relatively low defect density, for example less than 10 4 cm ⁇ 2 .
- the entire gallium nitride layer 208 can form device quality gallium nitride semiconductor material.
- microelectronic devices 210 may be formed in both the second vertical gallium nitride layer 208 a and the second lateral gallium nitride layer 208 b , and may bridge these layers as well.
- a continuous device quality gallium nitride layer may be obtained.
- an underlying gallium nitride layer 104 is grown on a substrate 102 .
- the substrate 102 may include a 6H—SiC(0001) substrate 102 a and an aluminum nitride buffer layer 102 b .
- the gallium nitride layer 104 may be between 1.0 and 2.0 ⁇ m thick, and may be grown at 1000° C.
- the underlying gallium nitride layer 104 is masked with a first mask 106 that includes a first array of openings 107 therein.
- the first mask may comprise silicon dioxide at thickness of 1000 ⁇ and may be deposited using low pressure chemical vapor deposition at 410° C. Other masking materials may be used.
- the first mask may be patterned using standard photolithography techniques and etching in a buffered HF solution.
- the first openings 107 are 3 ⁇ m-wide openings that extend in parallel at distances of between 3 and 40 ⁇ m and that are oriented along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction on the underlying gallium nitride layer 104 .
- the structure Prior to further processing, the structure may be dipped in a 50% buffered hydrochloric acid (HCl) solution to remove surface oxides from the underlying gallium nitride layer 104 .
- HCl 50% buffered hydrochloric acid
- the underlying gallium nitride layer 104 is grown through the first array of openings 107 to form first vertical gallium nitride layer 108 a in the first openings.
- Growth of gallium nitride may be obtained at 1000-1100° C. and 45 Torr.
- the precursors TEG at 13-39 ⁇ mol/min and NH 3 at 1500 sccm may be used in combination with a 3000 sccm H 2 diluent. If gallium nitride alloys are formed, additional conventional precursors of aluminum or indium, for example, may also be used.
- the first gallium nitride layer 108 a grows vertically to the top of the first mask 106 .
- underlying gallium nitride layer 104 may also be grown laterally without using a mask 106 , by appropriately controlling growth parameters and/or by appropriately patterning the underlying gallium nitride layer 104 .
- a patterned layer may be formed on the underlying gallium nitride layer after vertical growth or lateral growth, and need not function as a mask.
- lateral growth in two dimensions may be used to form an overgrown gallium nitride semiconductor layer.
- mask 106 may be patterned to include an array of openings 107 that extend along two orthogonal directions such as ⁇ 1 ⁇ overscore (1) ⁇ 00> and ⁇ 11 ⁇ overscore (2) ⁇ 0>.
- the openings can form a rectangle of orthogonal striped patterns.
- the ratio of the edges of the rectangle is preferably proportional to the ratio of the growth rates of the ⁇ 11 ⁇ overscore (2) ⁇ 0 ⁇ and ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ facets, for example, in a ratio of 1.4:1.
- first gallium nitride layer 108 a causes lateral overgrowth onto the first mask 106 , to form first lateral gallium nitride layer 108 b .
- Growth conditions for overgrowth may be maintained as was described in connection with FIG. 3.
- lateral overgrowth is optionally allowed to continue until the lateral growth fronts coalesce at first interfaces 108 c , to form a first continuous gallium nitride layer 108 .
- the total growth time may be approximately 60 minutes.
- the first vertical gallium nitride layer 108 a is masked with a second mask 206 that includes a second array of openings 207 therein.
- the second mask may be fabricated as was described in connection with the first mask.
- the second mask may also be eliminated , as was described in connection with the first mask of FIG. 3.
- the second mask may also be eliminated, as was described in connection with FIG. 3.
- the second mask 206 preferably covers the entire first vertical gallium nitride layer 108 a , so as to prevent defects therein from propagating vertically or laterally.
- mask 206 may extend onto first lateral gallium nitride layer 108 b as well.
- the first lateral gallium nitride layer 108 c is grown vertically through the second array of openings 207 , to form second vertical gallium nitride layer 208 a in the second openings. Growth may be obtained as was described in connection with FIG. 3.
- second gallium nitride layer 208 a causes lateral overgrowth onto the second mask 206 , to form second lateral gallium nitride layer 208 b .
- Lateral growth may be obtained as was described in connection with FIG. 3.
- lateral overgrowth preferably continues until the lateral growth fronts coalesce at second interfaces 208 c to form a second continuous gallium nitride layer 208 .
- Total growth time may be approximately 60 minutes.
- Microelectronic devices may then be formed in regions 208 a and in regions 208 b as shown in FIG. 1, because both of these regions are of relatively low defect density. Devices may bridge these regions as well, as shown. Accordingly, a continuous device quality gallium nitride layer 208 may be formed.
- the openings 107 and 207 in the masks are preferably rectangular stripes that preferably extend along the ⁇ 11 ⁇ overscore (2) ⁇ 0> and/or ⁇ 1 ⁇ overscore (1) ⁇ 00> directions relative to the underlying gallium nitride layer 104 .
- Truncated triangular stripes having (1 ⁇ overscore (1) ⁇ 01) slant facets and a narrow (0001) top facet may be obtained for mask openings 107 and 207 along the ⁇ 11 ⁇ overscore (2) ⁇ 0> direction.
- Rectangular stripes having a (0001) top facet, (11 ⁇ overscore (2) ⁇ 0) vertical side faces and (1 ⁇ overscore (1) ⁇ 01) slant facets may be grown along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction. For growth times up to 3 minutes, similar morphologies may be obtained regardless of orientation. The stripes develop into different shapes if the growth is continued.
- the amount of lateral growth generally exhibits a strong dependence on stripe orientation.
- the lateral growth rate of the ⁇ 1 ⁇ overscore (1) ⁇ 00> oriented stripes is generally much faster than those along ⁇ 11 ⁇ overscore (2) ⁇ 0>. Accordingly, it is most preferred to orient the openings 107 and 207 so that they extend along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction of the underlying gallium nitride layer 104 .
- Stripes oriented along ⁇ 11 ⁇ overscore (2) ⁇ 0> may have wide (1 ⁇ overscore (1) ⁇ 00) slant facets and either a very narrow or no (0001) top facet depending on the growth conditions. This may be because (1 ⁇ overscore (1) ⁇ 01) is the most stable plane in the gallium nitride wurtzite crystal structure, and the growth rate of this plane is lower than that of others.
- the ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ planes of the ⁇ 1 ⁇ overscore (1) ⁇ 00> oriented stripes may be wavy, which implies the existence of more than one Miller index. It appears that competitive growth of selected ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ planes occurs during the deposition which causes these planes to become unstable and which causes their growth rate to increase relative to that of the (1 ⁇ overscore (1) ⁇ 01) of stripes oriented along ⁇ 11 ⁇ overscore (2) ⁇ 0>.
- the morphologies of the gallium nitride layers selectively grown on openings oriented along ⁇ 1 ⁇ overscore (1) ⁇ 00> are also generally a strong function of the growth temperatures. Layers grown at 1000° C. may possess a truncated triangular shape. This morphology may gradually change to a rectangular cross-section as the growth temperature is increased. This shape change may occur as a result of the increase in the diffusion coefficient and therefore the flux of the gallium species along the (0001) top plane onto the ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ planes with an increase in growth temperature. This may result in a decrease in the growth rate of the (0001) plane and an increase in that of the ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ . This phenomenon has also been observed in the selective growth of gallium arsenide on silicon dioxide. Accordingly, temperatures of 1100° C. appear to be most preferred.
- the morphological development of the gallium nitride regions also appears to depend on the flow rate of the TEG.
- An increase in the supply of TEG generally increases the growth rate of the stripes in both the lateral and the vertical directions.
- the lateral/vertical growth rate ratio decrease from 1.7 at the TEG flow rate of 13 ⁇ mol/min to 0.86 at 39 ⁇ mol.min.
- This increased influence on growth rate along ⁇ 0001> relative to that of ⁇ 11 ⁇ overscore (2) ⁇ 0> with TEG flow rate may be related to the type of reactor employed, wherein the reactant gases flow vertically and perpendicular to the substrate.
- the considerable increase in the concentration of the gallium species on the surface may sufficiently impede their diffusion to the ⁇ 1 ⁇ overscore (1) ⁇ 01 ⁇ planes such that chemisorption and gallium nitride growth occur more readily on the (0001) plane.
- Continuous 2 ⁇ m thick gallium nitride layers 108 and 208 may be obtained using 3 ⁇ m wide stripe openings 107 and 207 spaced 7 ⁇ m apart and oriented along ⁇ 1 ⁇ overscore (1) ⁇ 00>, at 1100° C. and a TEG flow rate of 26 ⁇ mol/min.
- the overgrown gallium nitride layers 108 b and 208 b may include subsurface voids that form when two growth fronts coalesce. These voids may occur most often using lateral growth conditions wherein rectangular stripes having vertical ⁇ 11 ⁇ overscore (2) ⁇ 0 ⁇ side facets developed.
- the coalesced gallium nitride layers 108 and 208 may have a microscopically flat and pit-free surface.
- the surfaces of the laterally grown gallium nitride layers may include a terrace structure having an average step height of 0.32 nm. This terrace structure may be related to the laterally grown gallium nitride, because it is generally not included in much larger area films grown only on aluminum nitride buffer layers.
- the average RMS roughness values may be similar to the values obtained for the underlying gallium nitride layers 104 .
- Threading dislocations originating from the interface between the gallium nitride underlayer 104 and the buffer layer 102 b , appear to propagate to the top surface of the first vertical gallium nitride layer 108 a within the first openings 107 of the first mask 106 .
- the dislocation density within these regions is approximately 10 9 cm ⁇ 2 .
- threading dislocations do not appear to readily propagate into the first overgrown regions 108 b . Rather, the first overgrown gallium nitride regions 108 b contain only a few dislocations. These few dislocations may be formed parallel to the (0001) plane via the extension of the vertical threading dislocations after a 90° bend in the regrown region.
- the formation mechanism of the selectively grown gallium nitride layer is lateral epitaxy.
- the two main stages of this mechanism are vertical growth and lateral growth.
- Ga or N atoms should not readily bond to the mask surface in numbers and for a time sufficient to cause gallium nitride nuclei to form. They would either evaporate or diffuse along the mask surface to the openings 107 or 207 in the masks or to the vertical gallium nitride surfaces 108 a or 208 a which have emerged. During lateral growth, the gallium nitride grows simultaneously both vertically and laterally over the mask from the material which emerges over the openings.
- the laterally grown gallium nitride layers 108 b and 208 b bond to the underlying masks 106 and 206 sufficiently strongly so that they generally do not break away on cooling.
- lateral cracking within the SiO 2 may take place due to thermal stresses generated on cooling.
- the viscosity ( ⁇ ) of the SiO 2 at 1050° C. is about 10 15.5 poise which is one order of magnitude greater than the strain point (about 10 14.5 poise) where stress relief in a bulk amorphous material occurs within approximately six hours.
- the SiO 2 mask may provide limited compliance on cooling.
- chemical bonding may occur only when appropriate pairs of atoms are in close proximity. Extremely small relaxations of the silicon and oxygen and gallium and nitrogen atoms on the respective surfaces and/or within the bulk of the SiO 2 may accommodate the gallium nitride and cause it to bond to the oxide.
- regions of lateral epitaxial overgrowth through mask openings from an underlying gallium nitride layer may be achieved via MOVPE.
- the growth may depend strongly on the opening orientation, growth temperature and TEG flow rate.
- Coalescence of overgrown gallium nitride regions to form regions with both extremely low densities of dislocations and smooth and pit-free surfaces may be achieved through 3 ⁇ m wide mask openings spaced 7 ⁇ m apart and extending along the ⁇ 1 ⁇ overscore (1) ⁇ 00> direction, at 1100° C. and a TEG flow rate of 26 ⁇ mol/min.
- the lateral overgrowth of gallium nitride via MOVPE may be used to obtain low defect density continuous gallium nitride layers for microelectronic devices.
Abstract
A gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a first mask that includes a first array of openings therein and growing the underlying gallium nitride layer through the first array of openings and onto the first mask, to thereby form a first overgrown gallium nitride semiconductor layer. The first overgrown layer is then masked with the second mask that includes a second array of openings therein. The second array of openings is laterally offset from the first array of openings. The first overgrown gallium nitride layer is then grown through the second array of openings and onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the second overgrown gallium nitride semiconductor layer.
Description
- [0001] This invention was made with Government support under Office of Naval Research Contact No. N00014-96-1-0765. The Government has certain rights to this invention.
- This invention relates to microelectronic devices and fabrication methods, and more particularly to gallium nitride semiconductor devices and fabrication methods therefor.
- Gallium nitride is being widely investigated for microelectronic devices including but not limited to transistors, field emitters and optoelectronic devices. It will be understood that, as used herein, gallium nitride also includes alloys of gallium nitride such as aluminum gallium nitride, indium gallium nitride and aluminum indium gallium nitride.
- A major problem in fabricating gallium nitride-based microelectronic devices is the fabrication of gallium nitride semiconductor layers having low defect densities. It is known that one contributor to defect density is the substrate on which the gallium nitride layer is grown. Accordingly, although gallium nitride layers have been grown on sapphire substrates, it is known to reduce defect density by growing gallium nitride layers on aluminum nitride buffer layers which are themselves formed on silicon carbide substrates. Notwithstanding these advances, continued reduction in defect density is desirable.
- It is also known to fabricate gallium nitride structures through openings in a mask. For example, in fabricating field emitter arrays, it is known to selectively grow gallium nitride on stripe or circular patterned substrates. See, for example, the publications by coinventor Nam et al. entitled “Selective Growth of GaN and Al 0.2 Ga 0.8 N on GaN/AlN/6H—SiC(0001) Multilayer Substrates Via Organometallic Vapor Phase Epitaxy”, Proceedings of the Materials Research Society, December 1996, and “Growth of GaN and Al 0.2 Ga 0.8 N on Patterened Substrates via Organometallic Vapor Phase Epitaxy”, Japanese Journal of Applied Physics., Vol. 36,
Part 2, No. 5A, May 1997, pp. L-532-L535. As disclosed in these publications, undesired ridge growth or lateral overgrowth may occur under certain conditions. - It is therefore an object of the present invention to provide improved methods of fabricating gallium nitride semiconductor layers, and improved gallium nitride layers so fabricated.
- It is another object of the invention to provide methods of fabricating gallium nitride semiconductor layers that can have low defect densities, and gallium nitride semiconductor layers so fabricated.
- These and other objects are provided, according to the present invention, by fabricating a gallium nitride semiconductor layer by laterally growing an underlying gallium nitride layer to thereby form a first laterally grown gallium nitride semiconductor layer, and laterally growing the first laterally grown gallium nitride layer to thereby form a second laterally grown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the second laterally grown gallium nitride semiconductor layer.
- More specifically, in a preferred embodiment, a gallium nitride semiconductor layer is fabricated by masking an underlying gallium nitride layer with a first mask that includes a first array of openings therein and growing the underlying gallium nitride layer through the first array of openings and onto the first mask, to thereby form a first overgrown gallium nitride semiconductor layer. The first overgrown layer is then masked with the second mask that includes a second array of openings therein. The second array of openings is laterally offset from the first array of openings. The first overgrown gallium nitride layer is then grown through the second array of openings and onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer. Microelectronic devices may then be formed in the second overgrown gallium nitride semiconductor layer.
- It has been found, according to the present invention, that although dislocation defects may propagate vertically from the underlying gallium nitride layer to the grown gallium nitride layer above the first mask openings, the first overgrown gallium nitride layer is relatively defect-free. Moreover, since the second array of mask openings is laterally offset from the first array of mask openings, the relatively defect-free overgrown first gallium nitride layer propagates through the second array of openings and onto the second mask. Accordingly, high performance microelectronic devices may be formed in the second overgrown gallium nitride semiconductor layer.
- According to another aspect of the present invention, the second overgrown gallium nitride semiconductor layer is overgrown until the second overgrown gallium nitride layer coalesces on the second mask, to form a continuous overgrown monocrystalline gallium nitride semiconductor layer. The entire continuous overgrown layer can thus be relatively defect-free compared to the underlying gallium nitride layer.
- The first and second gallium nitride semiconductor layers may be grown using metalorganic vapor phase epitaxy (MOVPE). Preferably, the openings in the masks are stripes that are oriented along the <1{overscore (1)}00> direction of the underlying gallium nitride layer. The overgrown gallium nitride layers may be grown using triethylgallium (TEG) and ammonia (NH3) precursors at 1000-1100° C. and 45 Torr. Preferably, TEG at 13-39 μmol/min and NH3 at 1500 sccm are used in combination with 3000 sccm H2 diluent. Most preferably, TEG at 26 μmol/min, NH3 at 1500 sccm and H2 at 3000 sccm at a temperature of 1100° C. and 45 Torr are used. The underlying gallium nitride layer preferably is formed on a substrate, which itself includes a buffer layer such as aluminum nitride, on a substrate such as 6H—SiC(0001).
- Gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer, a first lateral gallium nitride layer that extends from the underlying gallium nitride layer and a second lateral gallium nitride layer that extends from the first lateral gallium nitride layer. A plurality of microelectronic devices are provided in the second lateral gallium nitride layer.
- In a preferred embodiment, gallium nitride semiconductor structures according to the present invention include an underlying gallium nitride layer and a first mask that includes a first array of openings therein, on the underlying gallium nitride layer. A first vertical gallium nitride layer extends from the underlying gallium nitride layer through the first array of openings. A first lateral gallium nitride layer extends from the vertical gallium nitride layer onto the mask, opposite the underlying gallium nitride layer. A second mask on the first lateral gallium nitride layer includes a second array of openings therein that are laterally offset from the first array of openings. A second vertical gallium nitride layer extends from the first lateral gallium nitride layer and through the second array of openings. A second lateral gallium nitride layer extends from the second vertical gallium nitride layer onto the second mask, opposite the first lateral gallium nitride layer. A plurality of microelectronic devices including but not limited to optoelectronic devices and field emitters, are formed in the second vertical gallium nitride layer and in the second lateral gallium nitride layer.
- Preferably, the second lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer. The underlying gallium nitride layer includes a predetermined defect density, and the second vertical and lateral gallium nitride semiconductor layers are of lower defect density than the predetermined defect density. Accordingly, continuous low defect density gallium nitride semiconductor layers may be produced, to thereby allow the production of high-performance microelectronic devices, using laterally offset masks.
- FIG. 1 is a cross-sectional view of gallium nitride semiconductor structures according to the present invention.
- FIGS.2-9 are cross-sectional views of structures of FIG. 1 during intermediate fabrication steps, according to the present invention.
- The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the thickness of layers and regions are exaggerated for clarity. Like numbers refer to like elements throughout. It will be understood that when an element such as a layer, region or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. Moreover, each embodiment described and illustrated herein includes its complementary conductivity type embodiment as well.
- Referring now to FIG. 1, gallium nitride semiconductor structures according to the present invention are illustrated. The gallium nitride structures200 include a
substrate 102. The substrate may be sapphire or gallium nitride. However, preferably, the substrate includes a 6H—SiC(0001)substrate 102 a and an aluminumnitride buffer layer 102 b on thesilicon carbide substrate 102 a The aluminumnitride buffer layer 102 b may 0.01 μm thick. - The fabrication of
substrate 102 is well known to those having skill in the art and need not be described further. Fabrication of silicon carbide substrates are described, for example, in U.S. Pat. No. 4,865,685 to Palmour; Re 34,861 to Davis et al.; U.S. Pat. No. 4,912,064 to Kong et al. and U.S. Pat. No. 4,946,547 to Palmour et al., the disclosures of which are hereby incorporated herein by reference. Also, the crystallographic designation conventions used herein are well known to those having skill in the art, and need not be described further. - An underlying
gallium nitride layer 104 is also included onbuffer layer 102 b oppositesubstrate 102 a. The underlyinggallium nitride layer 104 may be between about 1.0 and 2.0 μm thick, and may be formed using heated metalorganic vapor phase epitaxy (MOVPE). The underlying gallium nitride layer generally has an undesired relatively high defect density, for example dislocation densities of between about 108 and 1010 cm−2. These high defect densities may result from mismatches in lattice parameters between thebuffer layer 102 b and the underlyinggallium nitride layer 104. These high defect densities may impact performance of microelectronic devices formed in the underlyinggallium nitride layer 104. - Still continuing with the description of FIG. 1, a first mask such as a first
silicon dioxide mask 106 is included on the underlyinggallium nitride layer 104. Thefirst mask 106 includes a first array of openings therein. Preferably, the first openings are first stripes that extend along the <1{overscore (1)}00> direction of the underlyinggallium nitride layer 104. Thefirst mask 106 may have a thickness of about 1000 Å and may be formed on the underlyinggallium nitride layer 104 using low pressure chemical vapor deposition (CVD) at 410° C. Thefirst mask 106 may be patterned using standard photolithography techniques and etched in a buffered hydrofluoric acid (HF) solution. - Continuing with the description of FIG. 1, a first vertical
gallium nitride layer 108 a extends from the underlyinggallium nitride layer 104 and through the first array of openings in thefirst mask 106. As used herein, the term “vertical” means a direction that is orthogonal to the faces of thesubstrate 102. The first verticalgallium nitride layer 108 a may be formed using metalorganic vapor phase epitaxy at about 1000-1100° C. and 45 Torr. Precursors of triethygallium (TEG) at 13-39 μmol/min and ammonia (NH3) at 1500 sccm may be used in combination with a 3000 sccm H2 diluent, to form the first verticalgallium nitride layer 108 a. - Still continuing with the description of FIG. 1, the gallium nitride semiconductor structure200 also includes a first lateral
gallium nitride layer 108 b that extends laterally from the first verticalgallium nitride layer 108 a onto thefirst mask 106 opposite the underlyinggallium nitride layer 104. The first lateralgallium nitride layer 108 b may be formed using metalorganic vapor phase epitaxy as described above. As used herein, the term “lateral” denotes a direction parallel to the faces ofsubstrate 102. - As shown in FIG. 1, first lateral
gallium nitride layer 108 b coalesces atfirst interfaces 108 c to form a first continuous monocrystalline galliumnitride semiconductor layer 108. It has been found that the dislocation densities in the first underlyinggallium nitride layer 104 generally do not propagate laterally with the same intensity as vertically. Thus, first lateralgallium nitride layer 108 b can have a relatively low defect density, for example less that 10 4 cm−2. It will also be understood that the first lateralgallium nitride layer 108 b need not coalesce on thefirst mask 206. - Still continuing with the description of FIG. 1, a second mask such as a second
silicon dioxide mask 206 is included on the first verticalgallium nitride layer 108 a. As shown,second mask 206 is laterally offset fromfirst mask 106. It will also be understood thatsecond mask 206 may also extend onto first verticalgallium nitride layer 108 b. Preferably,second mask 206 covers all of first verticalgallium nitride layer 108 b such that defects in this layer do not propagate further. It will also be understood that thesecond mask 206 need not be symmetrically offset with respect tofirst mask 106. Thesecond mask 206 includes a second array of openings therein. The second openings are preferably oriented as described in connection with thefirst mask 106. Thesecond mask 206 also may be fabricated similar tofirst mask 106. - Continuing with the description of FIG. 1, a second vertical
gallium nitride layer 208 a extends from the first lateralgallium nitride layer 108 a and through the second array of openings in thesecond mask 206. The second verticalgallium nitride layer 208 a may be formed similar to first verticalgallium nitride layer 108 a. The gallium nitride semiconductor structure 200 also includes a second lateralgallium nitride layer 208 b that extends laterally from the second verticalgallium nitride layer 208 a onto thesecond mask 206 opposite the firstgallium nitride layer 108. The second lateralgallium nitride layer 208 b may be formed using metalorganic vapor phase epitaxy as was described above. - As shown in FIG. 1, the second lateral
gallium nitride layer 208 b coalesces atsecond interfaces 208 c, to form a second continuous monocrystalline galliumnitride semiconductor layer 208. It has been found that since the first lateralgallium nitride layer 108 b is used to grow secondgallium nitride layer 208, the secondgallium nitride layer 208 including second verticalgallium nitride layer 208 a and second lateralgallium nitride layer 208 b, can have a relatively low defect density, for example less than 104 cm−2. Accordingly, the entiregallium nitride layer 208 can form device quality gallium nitride semiconductor material. Thus, as shown in FIG. 1,microelectronic devices 210 may be formed in both the second verticalgallium nitride layer 208 a and the second lateralgallium nitride layer 208 b, and may bridge these layers as well. By offsettingmasks - Referring now to FIGS.2-9, methods of fabricating gallium nitride semiconductor structures according to the present invention will now be described. As shown in FIG. 2, an underlying
gallium nitride layer 104 is grown on asubstrate 102. Thesubstrate 102 may include a 6H—SiC(0001)substrate 102 a and an aluminumnitride buffer layer 102 b. Thegallium nitride layer 104 may be between 1.0 and 2.0 μm thick, and may be grown at 1000° C. on a high temperature (1100° C.) aluminumnitride buffer layer 102 b that was deposited on 6H—SiC substrate 102 a in a cold wall vertical and inductively heated metalorganic vapor phase epitaxy system using triethylgallium at 26 μmol/min, ammonia at 1500 sccm and 3000 sccm hydrogen diluent. Additional details of this growth technique may be found in a publication by T. W. Weeks et al. entitled “GaN Thin Films Deposited Via Organometallic Vapor Phase Epitaxy on α(6H)—SiC(0001) Using High-Temperature Monocrystalline AlN Buffer Layers”, Applied Physics Letters, Vol. 67, No. 3, Jul. 17, 1995, pp. 401-403, the disclosure of which is hereby incorporated herein by reference. Other substrates, with or without buffer layers, may be used. - Still referring to FIG. 2, the underlying
gallium nitride layer 104 is masked with afirst mask 106 that includes a first array ofopenings 107 therein. The first mask may comprise silicon dioxide at thickness of 1000 Å and may be deposited using low pressure chemical vapor deposition at 410° C. Other masking materials may be used. The first mask may be patterned using standard photolithography techniques and etching in a buffered HF solution. In one embodiment, thefirst openings 107 are 3 μm-wide openings that extend in parallel at distances of between 3 and 40 μm and that are oriented along the <1{overscore (1)}00> direction on the underlyinggallium nitride layer 104. Prior to further processing, the structure may be dipped in a 50% buffered hydrochloric acid (HCl) solution to remove surface oxides from the underlyinggallium nitride layer 104. - Referring now to FIG. 3, the underlying
gallium nitride layer 104 is grown through the first array ofopenings 107 to form first verticalgallium nitride layer 108 a in the first openings. Growth of gallium nitride may be obtained at 1000-1100° C. and 45 Torr. The precursors TEG at 13-39 μmol/min and NH3 at 1500 sccm may be used in combination with a 3000 sccm H2 diluent. If gallium nitride alloys are formed, additional conventional precursors of aluminum or indium, for example, may also be used. As shown in FIG. 3, the firstgallium nitride layer 108 a grows vertically to the top of thefirst mask 106. - It will be understood that underlying
gallium nitride layer 104 may also be grown laterally without using amask 106, by appropriately controlling growth parameters and/or by appropriately patterning the underlyinggallium nitride layer 104. A patterned layer may be formed on the underlying gallium nitride layer after vertical growth or lateral growth, and need not function as a mask. - It will also be understood that lateral growth in two dimensions may be used to form an overgrown gallium nitride semiconductor layer. Specifically,
mask 106 may be patterned to include an array ofopenings 107 that extend along two orthogonal directions such as <1{overscore (1)}00> and <11{overscore (2)}0>. Thus, the openings can form a rectangle of orthogonal striped patterns. In this case, the ratio of the edges of the rectangle is preferably proportional to the ratio of the growth rates of the {11{overscore (2)}0} and {1{overscore (1)}01} facets, for example, in a ratio of 1.4:1. - Referring now to FIG. 4, continued growth of the first
gallium nitride layer 108 a causes lateral overgrowth onto thefirst mask 106, to form first lateralgallium nitride layer 108 b. Growth conditions for overgrowth may be maintained as was described in connection with FIG. 3. - Referring now to FIG. 5, lateral overgrowth is optionally allowed to continue until the lateral growth fronts coalesce at
first interfaces 108 c, to form a first continuousgallium nitride layer 108. The total growth time may be approximately 60 minutes. - Referring now to FIG. 6, the first vertical
gallium nitride layer 108 a is masked with asecond mask 206 that includes a second array ofopenings 207 therein. The second mask may be fabricated as was described in connection with the first mask. The second mask may also be eliminated , as was described in connection with the first mask of FIG. 3. The second mask may also be eliminated, as was described in connection with FIG. 3. As already noted, thesecond mask 206 preferably covers the entire first verticalgallium nitride layer 108 a, so as to prevent defects therein from propagating vertically or laterally. In order to provide defect-free propagation,mask 206 may extend onto first lateralgallium nitride layer 108 b as well. - Referring now to FIG. 7, the first lateral
gallium nitride layer 108 c is grown vertically through the second array ofopenings 207, to form second verticalgallium nitride layer 208 a in the second openings. Growth may be obtained as was described in connection with FIG. 3. - Referring now to FIG. 8, continued growth of the second
gallium nitride layer 208 a causes lateral overgrowth onto thesecond mask 206, to form second lateralgallium nitride layer 208 b. Lateral growth may be obtained as was described in connection with FIG. 3. - Referring now to FIG. 9, lateral overgrowth preferably continues until the lateral growth fronts coalesce at
second interfaces 208 c to form a second continuousgallium nitride layer 208. Total growth time may be approximately 60 minutes. Microelectronic devices may then be formed inregions 208 a and inregions 208 b as shown in FIG. 1, because both of these regions are of relatively low defect density. Devices may bridge these regions as well, as shown. Accordingly, a continuous device qualitygallium nitride layer 208 may be formed. - Additional discussion of the methods and structures of the present invention will now be provided. As described above, the
openings gallium nitride layer 104. Truncated triangular stripes having (1{overscore (1)}01) slant facets and a narrow (0001) top facet may be obtained formask openings - The amount of lateral growth generally exhibits a strong dependence on stripe orientation. The lateral growth rate of the <1{overscore (1)}00> oriented stripes is generally much faster than those along <11{overscore (2)}0>. Accordingly, it is most preferred to orient the
openings gallium nitride layer 104. - The different morphological development as a function of opening orientation appears to be related to the stability of the crystallographic planes in the gallium nitride structure. Stripes oriented along <11{overscore (2)}0> may have wide (1{overscore (1)}00) slant facets and either a very narrow or no (0001) top facet depending on the growth conditions. This may be because (1{overscore (1)}01) is the most stable plane in the gallium nitride wurtzite crystal structure, and the growth rate of this plane is lower than that of others. The {1{overscore (1)}01} planes of the <1{overscore (1)}00> oriented stripes may be wavy, which implies the existence of more than one Miller index. It appears that competitive growth of selected {1{overscore (1)}01} planes occurs during the deposition which causes these planes to become unstable and which causes their growth rate to increase relative to that of the (1{overscore (1)}01) of stripes oriented along <11{overscore (2)}0>.
- The morphologies of the gallium nitride layers selectively grown on openings oriented along <1{overscore (1)}00> are also generally a strong function of the growth temperatures. Layers grown at 1000° C. may possess a truncated triangular shape. This morphology may gradually change to a rectangular cross-section as the growth temperature is increased. This shape change may occur as a result of the increase in the diffusion coefficient and therefore the flux of the gallium species along the (0001) top plane onto the {1{overscore (1)}01} planes with an increase in growth temperature. This may result in a decrease in the growth rate of the (0001) plane and an increase in that of the {1{overscore (1)}01}. This phenomenon has also been observed in the selective growth of gallium arsenide on silicon dioxide. Accordingly, temperatures of 1100° C. appear to be most preferred.
- The morphological development of the gallium nitride regions also appears to depend on the flow rate of the TEG. An increase in the supply of TEG generally increases the growth rate of the stripes in both the lateral and the vertical directions. However, the lateral/vertical growth rate ratio decrease from 1.7 at the TEG flow rate of 13 μmol/min to 0.86 at 39 μmol.min. This increased influence on growth rate along <0001> relative to that of <11{overscore (2)}0> with TEG flow rate may be related to the type of reactor employed, wherein the reactant gases flow vertically and perpendicular to the substrate. The considerable increase in the concentration of the gallium species on the surface may sufficiently impede their diffusion to the {1{overscore (1)}01} planes such that chemisorption and gallium nitride growth occur more readily on the (0001) plane.
- Continuous 2 μm thick gallium nitride layers108 and 208 may be obtained using 3 μm
wide stripe openings - The coalesced gallium nitride layers108 and 208 may have a microscopically flat and pit-free surface. The surfaces of the laterally grown gallium nitride layers may include a terrace structure having an average step height of 0.32 nm. This terrace structure may be related to the laterally grown gallium nitride, because it is generally not included in much larger area films grown only on aluminum nitride buffer layers. The average RMS roughness values may be similar to the values obtained for the underlying gallium nitride layers 104.
- Threading dislocations, originating from the interface between the
gallium nitride underlayer 104 and thebuffer layer 102 b, appear to propagate to the top surface of the first verticalgallium nitride layer 108 a within thefirst openings 107 of thefirst mask 106. The dislocation density within these regions is approximately 109 cm−2. By contrast, threading dislocations do not appear to readily propagate into the firstovergrown regions 108 b. Rather, the first overgrowngallium nitride regions 108 b contain only a few dislocations. These few dislocations may be formed parallel to the (0001) plane via the extension of the vertical threading dislocations after a 90° bend in the regrown region. These dislocations do not appear to propagate to the top surface of the first overgrown GaN layer. Since both the second verticalgallium nitride layer 208 a and the second lateralgallium nitride layer 208 b propagate from the low defect first overgrowngallium nitride layer 108 b, theentire layer 208 can have low defect density. - As described, the formation mechanism of the selectively grown gallium nitride layer is lateral epitaxy. The two main stages of this mechanism are vertical growth and lateral growth. During vertical growth, the deposited gallium nitride grows selectively within the
mask openings masks openings - Surface diffusion of gallium and nitrogen on the masks may play a minor role in gallium nitride selective growth. The major source of material appears to be derived from the gas phase. This may be demonstrated by the fact that an increase in the TEG flow rate causes the growth rate of the (0001) top facets to develop faster than the (1{overscore (1)}01) side facets and thus controls the lateral growth.
- The laterally grown gallium nitride layers108 b and 208 b bond to the
underlying masks - Accordingly, regions of lateral epitaxial overgrowth through mask openings from an underlying gallium nitride layer may be achieved via MOVPE. The growth may depend strongly on the opening orientation, growth temperature and TEG flow rate. Coalescence of overgrown gallium nitride regions to form regions with both extremely low densities of dislocations and smooth and pit-free surfaces may be achieved through 3 μm wide mask openings spaced 7 μm apart and extending along the <1{overscore (1)}00> direction, at 1100° C. and a TEG flow rate of 26 μmol/min. The lateral overgrowth of gallium nitride via MOVPE may be used to obtain low defect density continuous gallium nitride layers for microelectronic devices.
- In the drawings and specification, there have been disclosed typical preferred embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.
Claims (32)
1. A method of fabricating a gallium nitride semiconductor layer comprising the steps of:
masking an underlying gallium nitride layer with a first mask that includes a first array of openings therein;
growing the underlying gallium nitride layer through the first array of openings and onto the mask to thereby form a first overgrown gallium nitride semiconductor layer;
masking the first overgrown gallium nitride layer with a second mask that includes a second array of openings therein, the second array of openings being laterally offset from the first array of openings; and
growing the first overgrown gallium nitride layer through the second array of openings and onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer.
2. A method according to wherein the step of growing the first overgrown gallium nitride layer is followed by the step of forming microelectronic devices in the second overgrown gallium nitride semiconductor layer.
claim 1
3. A method according to wherein the step of growing the first overgrown gallium nitride layer comprises the step of growing the first overgrown gallium nitride layer through the second array of openings and onto the second mask until the second overgrown gallium nitride layer coalesces on the second mask to form a continuous overgrown monocrystalline gallium nitride semiconductor layer.
claim 1
4. A method according to wherein the growing steps comprise the steps of growing the underlying gallium nitride layer and growing the first overgrown gallium nitride layer using metalorganic vapor phase epitaxy.
claim 1
5. A method according to wherein the first masking step is preceded by the step of forming the underlying gallium nitride layer on a substrate.
claim 1
6. A method according to wherein the forming step comprises the steps of:
claim 5
forming a buffer layer on a substrate; and
forming the underlying gallium nitride layer on the buffer layer opposite the substrate.
7. A method according to wherein the first and second masking steps comprise the steps of:
claim 1
masking the underlying gallium nitride layer and the first overgrown gallium nitride layer with a first mask and a second mask respectively, that include respective first and second arrays of stripe openings therein, the stripe openings extending along a <1{overscore (1)}00> direction of the underlying gallium nitride layer.
8. A method according to wherein the underlying gallium nitride layer includes a predetermined defect density, and wherein the step of growing the underlying gallium nitride layer through the first array of openings and onto the mask to thereby form a first overgrown gallium nitride semiconductor layer comprises the steps of:
claim 1
vertically growing the underlying gallium nitride layer through the first array of openings while propagating the predetermined defect density; and
laterally growing the underlying gallium nitride layer from the first array of openings onto the first mask to thereby form a first overgrown gallium nitride semiconductor layer of lower defect density than the predetermined defect density.
9. A method according to wherein the step of growing the first overgrown gallium nitride layer comprises the steps of:
claim 8
vertically growing the first overgrown gallium nitride semiconductor layer through the second array of openings; and
laterally growing the first overgrown gallium nitride semiconductor layer from the second array of openings onto the second mask, to thereby form a second overgrown gallium nitride semiconductor layer of lower defect density than the predetermined defect density.
10. A method according to wherein the underlying gallium nitride layer includes a predetermined defect density, and wherein the second overgrown gallium nitride semiconductor layer is of lower defect density than the predetermined defect density.
claim 1
11. A method according to wherein the growing steps comprise the steps of growing the underlying gallium nitride layer and growing the first overgrown gallium nitride layer using metalorganic vapor phase epitaxy of triethylgallium at 13-39 μmol/min and ammonia at 1500 sccm at a temperature of 1000° C.-1100° C.
claim 1
12. A method according to wherein the steps of growing the underlying gallium nitride layer and growing the first overgrown gallium nitride layer comprise the steps of growing the underlying gallium nitride layer and the first overgrown gallium nitride layer using metalorganic vapor phase epitaxy of triethylgallium at 26 μmol/min and ammonia at 1500 sccm at a temperature of 1100° C.
claim 7
13. A method of fabricating a gallium nitride semiconductor layer comprising the steps of:
laterally growing an underlying gallium nitride layer to thereby form a first laterally grown gallium nitride semiconductor layer; and
laterally growing the first laterally grown gallium nitride layer, to thereby form a second laterally grown gallium nitride semiconductor layer.
14. A method according to wherein the step of laterally growing the first laterally grown gallium nitride layer is followed by the step of forming microelectronic devices in the second laterally grown gallium nitride semiconductor layer.
claim 13
15. A method according to wherein the step of laterally growing the first laterally grown gallium nitride layer comprises the step of laterally growing the first laterally grown gallium nitride layer until the second laterally grown gallium nitride layer coalesces to form a continuous laterally grown monocrystalline gallium nitride semiconductor layer.
claim 13
16. A method according to wherein the laterally growing steps comprise the steps of laterally growing the underlying gallium nitride layer and laterally growing the first laterally grown gallium nitride layer using metalorganic vapor phase epitaxy.
claim 13
17. A method according to wherein the step of laterally growing the first laterally grown gallium nitride layer comprises the step of laterally overgrowing the first laterally grown gallium nitride layer.
claim 13
18. A method according to wherein the underlying gallium nitride layer includes a predetermined defect density, and wherein the step of laterally growing the first laterally grown gallium nitride layer comprises the step of:
claim 13
laterally growing the first laterally grown gallium nitride semiconductor layer, to thereby form a second laterally grown gallium nitride semiconductor layer of lower defect density than the predetermined defect density.
19. A gallium nitride semiconductor structure comprising:
an underlying gallium nitride layer;
a first patterned layer that includes a first array of openings therein, on the underlying gallium nitride layer;
a first vertical gallium nitride layer that extends from the underlying gallium nitride layer and through the first array of openings;
a first lateral gallium nitride layer that extends from the first vertical gallium nitride layer onto the first patterned layer opposite the underlying gallium nitride layer;
a second patterned layer that includes a second array of openings therein, on the first lateral gallium nitride layer, the second array of openings being laterally offset from the first array of openings;
a second vertical gallium nitride layer that extends from the first lateral gallium nitride layer and through the second array of openings; and
a second lateral gallium nitride layer that extends from the second vertical gallium nitride layer onto the second patterned layer opposite the first lateral gallium nitride layer
20. A structure according to further comprising:
claim 19
a plurality of microelectronic devices in the second lateral gallium nitride layer.
21. A structure according to wherein the second lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer.
claim 19
22. A structure according to further comprising a substrate, and wherein the underlying gallium nitride layer is on the substrate.
claim 19
23. A structure according to further comprising a buffer layer between the substrate and the underlying gallium nitride layer.
claim 22
24. A structure according to wherein the first and second arrays of openings extend along a <1{overscore (1)}00> direction of the underlying gallium nitride layer.
claim 19
25. A structure according to wherein the underlying gallium nitride layer includes a predetermined defect density and wherein the second vertical gallium nitride layer and the second lateral gallium nitride semiconductor layer are of lower defect density than the predetermined defect density.
claim 19
26. A continuous monocrystalline gallium nitride layer on an underlying gallium nitride layer of a predetermined defect density, the continuous monocrystalline gallium nitride layer having lower defect density than the predetermined defect density.
27. A layer according to wherein the predetermined defect density is at least 108 cm−2 and wherein the lower defect density is less than 104 cm−2.
claim 26
28. A gallium nitride semiconductor structure comprising:
an underlying gallium nitride layer;
a first lateral gallium nitride layer that extends from the underlying gallium nitride layer;
a second lateral gallium nitride layer that extends from the first lateral gallium nitride layer; and
a plurality of microelectronic devices in the second lateral gallium nitride layer.
29. A structure according to wherein the second lateral gallium nitride layer is a continuous monocrystalline gallium nitride semiconductor layer.
claim 28
30. A structure according to further comprising a substrate, and wherein the underlying gallium nitride layer is on the substrate.
claim 28
31. A structure according to wherein the underlying gallium nitride layer includes a predetermined defect density and wherein the second lateral gallium nitride semiconductor layer is of lower defect density than the predetermined defect density.
claim 28
32. A structure according to further comprising:
claim 13
a first vertical gallium nitride layer between the underlying gallium nitride layer and the first lateral gallium nitride layer; and
a second vertical gallium nitride layer between the first lateral gallium nitride layer and the second lateral gallium nitride layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US09/780,071 US20020148534A2 (en) | 1998-02-27 | 2001-02-09 | Methods of fabricating gallium nitride semiconductor layers by lateral overgrowth through offset masks |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US09/031,843 US6608327B1 (en) | 1998-02-27 | 1998-02-27 | Gallium nitride semiconductor structure including laterally offset patterned layers |
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US6051849A (en) | 1998-02-27 | 2000-04-18 | North Carolina State University | Gallium nitride semiconductor structures including a lateral gallium nitride layer that extends from an underlying gallium nitride layer |
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1998
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2001
- 2001-02-09 US US09/780,071 patent/US20020148534A2/en not_active Abandoned
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