US20010045865A1 - Common-mode feedback circuit and method - Google Patents
Common-mode feedback circuit and method Download PDFInfo
- Publication number
- US20010045865A1 US20010045865A1 US09/107,480 US10748098A US2001045865A1 US 20010045865 A1 US20010045865 A1 US 20010045865A1 US 10748098 A US10748098 A US 10748098A US 2001045865 A1 US2001045865 A1 US 2001045865A1
- Authority
- US
- United States
- Prior art keywords
- circuit
- current
- feedback
- comparison
- differential amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45636—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by using feedback means
- H03F3/45641—Measuring at the loading circuit of the differential amplifier
- H03F3/45659—Controlling the loading circuit of the differential amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
- H03F3/45192—Folded cascode stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45402—Indexing scheme relating to differential amplifiers the CMCL comprising a buffered addition circuit, i.e. the signals are buffered before addition, e.g. by a follower
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45418—Indexing scheme relating to differential amplifiers the CMCL comprising a resistor addition circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45651—Indexing scheme relating to differential amplifiers the LC comprising two cascode current sources
Definitions
- the present invention relates to a common-mode feedback circuit.
- a common-mode feedback circuit The purpose of a common-mode feedback circuit is to stabilize an associated filly differential amplifier.
- a stable filly differential amplifier can only be achieved when the bandwidth of the common-mode feedback circuit is greater than the bandwidth of the fully differential amplifier.
- the common-mode feedback circuit needs to be stable as well. Instability within a common-mode feedback circuit is caused by, for example, high impedance nodes. Traditionally, capacitors are used to compensate for high impedance nodes, but the addition of capacitors decreases the bandwidth of the common-mode feedback circuit, and, thus, places a restriction on the bandwidth of the filly differential amplifier.
- a common-mode feedback circuit includes a converting circuit converting the output voltages of a fully differential amplifier into currents, and a summation circuit summing the currents to produce a summation current. The summation current is then compared by a comparison circuit to reference current. A feedback circuit generates a feedback voltage for controlling the fully differential amplifier based on the results of the comparison.
- the common mode feedback circuit according to the present invention does not include any high impedance nodes or suffer from the problems and disadvantages associated therewith.
- FIG. 1 illustrates an embodiment of the common-mode feedback circuit according to the present invention applied to a conventional fully differential amplifier
- FIG. 2 illustrates another embodiment of the common-mode feedback circuit according to the present invention applied to the conventional fully differential amplifier.
- FIG. 1 illustrates an embodiment of the common-mode feedback circuit according to the present invention applied to the fully differential amplifier 10 . Because the fully differential amplifier 10 in FIG. 1 is well-known, a description of the structure and operation of the fully differential amplifier 10 will be omitted.
- the common-mode feedback circuit 100 includes first and second bipolar transistors 102 and 104 , which receive the output voltages of the fully differential amplifier 10 at their gates, respectively.
- the first bipolar transistor 102 is connected in series with a first N-MOS transistor 106 between the power source voltage VDD and ground.
- the second bipolar transistor 104 is connected in series with a second N-MOS transistor 108 between the power source voltage VDD and ground.
- the gates of the first and second N-MOS transistors 106 and 108 are connected to the fourth fixed bias.
- a first and second resister 110 and 112 are connected in series between the emitters of the first and second bipolar transistors 102 and 104 .
- a first constant current source 114 is connected between the junction of the first and second resisters 110 and 112 and ground.
- node 122 the junction between the first and second resistors 110 and 112 will be referred to as node 122 .
- a second constant current source 116 is connected in series with a reference bipolar transistor 118 between the power source voltage VDD and the node 122 .
- a feedback P-MOS transistor 120 is connected in parallel to the second constant current source 116 and the reference bipolar transistor 118 .
- the gate of the reference bipolar transistor 118 receives a reference voltage Vref which places the reference bipolar transistor 118 in the active state.
- the gate of the feedback P-MOS transistor 120 is connected to the junction between the second constant current source 116 and the reference bipolar transistor 118 .
- a feedback path 124 supplies the voltage at the gate of the feedback P-MOS transistor 120 to the gates of the first and second resistive P-MOS transistors 18 and 26 in the fully differential amplifier 10 .
- the current flowing from the node 122 to ground is fixed by the first constant current source 114 .
- the current flowing to the node 122 via the reference bipolar transistor 118 is substantially fixed by the application of the reference voltage Vref to the gate of the reference bipolar transistor 118 and the provision of the second constant current source 116 except for a negligible base current in the reference bipolar transistor 118 .
- the common-mode feedback circuit 100 While the operation of the common-mode feedback circuit 100 has been described respect to an increase in the output voltages of the fully differential amplifier 10 , it is to be understood that the common-mode feedback circuit 100 operates in a similar, but opposite, manner when the output voltages of the fully differential amplifier 10 decrease. Both increases and decreases in the output voltages of the differential amplifier 10 are made with respect to the reference voltage Vref. Namely, the common-mode feedback circuit 100 serves to stabilize the output voltages around the reference voltage Vref.
- the common-mode feedback circuit 100 does not rely upon a comparison of voltages to generate the feedback voltage. Instead, the common-mode feedback circuit 100 is a current-mode common-mode feedback circuit that generates a feedback voltage based on the comparison of currents representing the output voltages of fully differential amplifier with a reference current.
- the reference current in the common-mode feedback circuit 100 corresponds to the reference voltage Vref; and therefore, the common-mood feedback circuit 100 stabilizes the output voltages of the fully differential amplifier 10 about this reference voltage Vref.
- the common mode feedback circuit 100 does not include any high impedance nodes, or suffer from the problems and disadvantages related thereto.
- the gain of the feedback transistor 120 controls the input impedance at the emitter of the reference bipolar transistor 118 .
- the gain of the feedback transistor 120 decreases and the effect of this gain on the input impedance at the emitter of the reference bipolar transistor 118 decreases.
- the input impedance at the emitter of the reference bipolar transistor 118 is determined by the transconductance of the reference bipolar transistor 118 and the parasitic capacitance with respect thereto.
- the two poles associated with the emitter of the reference bipolar transistor 118 and the gate of the feedback P-MOS transistor 120 interact with each other, and a complex-pole pair may be created, which is accompanied by undesirable peaking in the frequency response.
- the transconductance of the reference bipolar transistor 118 should be larger than that of the feedback P-MOS transistor 120 . This is easily accomplished in the BiCMOS (Bipolar-CMOS) implementation discussed above with respect to FIG. 1, because higher transconductances can be achieved with bipolar transistors than with their MOS counterparts. It should be understood however, that implementations of the present invention can be made using any other silicon technologies as long as the above rule is maintained.
- FIG. 2 illustrates another embodiment of the common-mode feedback circuit according to the present invention, which is applicable to low-power fully differential amplifiers. For ease of description, however, the common-mode feedback circuit 200 of FIG. 2 has been shown applied to the fully differential amplifier 10 .
- the output voltages of the fully differential amplifier 10 are respectfully connected to the gates of a first P-MOS transistor 202 and a second P-MOS transistor 204 in the common-mode feedback circuit 200 .
- the first P-MOS transistor 202 is connected in series with a third P-MOS transistor 206 between the power source voltage VDD and ground.
- the second P-MOS transistor 204 is also connected in series with a fourth P-MOS transistor 208 between the power source voltage VDD and ground.
- the gates of the third and fourth P-MOS transistors 206 and 208 are connected to the first fixed bias of the fully differential amplifier 10 .
- a first and second resister 210 and 212 are connected in series between the sources of the first and second P-MOS transistors 202 and 204 .
- a feedback P-MOS transistor 214 a reference P-MOS transistor 216 , and a constant current source 218 are connected in series between the power source voltage VDD and ground.
- the source of the reference P-MOS transistor 216 is connected to the junction between the first and second resisters 210 and 212 .
- node 222 the junction between the first and second resisters 210 and 212 and the junction between the feedback P-MOS transistor 214 and the reference P-MOS transistor 216 are collectively referred to as node 222 .
- the gate of the reference P-MOS transistor 216 is connected to a reference voltage Vref, while the gate of the feedback P-MOS transistor 214 is connected to the drain of the reference P-MOS transistor 216 .
- a feedback path 220 also connects the gate of the feedback P-MOS transistor 214 to the gates of the first and second resistive PMOS transistors 18 and 26 in the fully differential amplifier 10 .
- the current flow from the node 222 to ground is fixed by the application of the reference voltage Vref to the reference P-MOS transistor 216 and the constant current source 218 . Accordingly, any difference between (1) the current flowing from the node 222 through the reference P-MOS transistor 216 and (2) the current flowing to the node 222 from the first and second resistors 210 and 212 affects the current flowing through the feedback P-MOS transistor 214 . Consequently, the current flowing through the feedback P-MOS transistor 214 decreases by the same amount of increase in total current through the first and second resistors 210 and 212 . With a decrease in the current flowing through the feedback P-MOS transistor 214 , the voltage at the gate of the feedback P-MOS transistor 214 increases.
- the feedback path 220 supplies this increased voltage to the gates of the first and second resistive P-MOS transistors 18 and 26 in the fully differential amplifier 10 . As a result, less current flows through the first and second resistive P-MOS transistors 18 and 26 , and the output voltages from the fully differential amplifier 10 decrease.
- the common-mode feedback circuit 200 does not rely upon a comparison of voltages to generate the feedback voltage. Instead, the common-mode feedback circuit 200 is a current-mode common-mode feedback circuit that generates a feedback voltage based on the comparison of currents representing the output voltages of the fully differential amplifier with a reference current.
- the reference current in the common-mode feedback circuit 200 corresponds to the reference voltage Vref; and therefore, the common-mode feedback circuit 200 stabilizes the output voltages of the fully differential amplifier 10 about this reference voltage Vref.
- the common mode feedback circuit 200 does not include any high impedance nodes, or suffer from the problems and disadvantages related thereto. Furthermore, the common-mode feedback circuit 200 operates even when powered at low voltage levels.
Abstract
Description
- 1. Field of the Invention
- The present invention relates to a common-mode feedback circuit.
- 2. Description of the Prior Art
- The purpose of a common-mode feedback circuit is to stabilize an associated filly differential amplifier. A stable filly differential amplifier can only be achieved when the bandwidth of the common-mode feedback circuit is greater than the bandwidth of the fully differential amplifier. Also, the common-mode feedback circuit needs to be stable as well. Instability within a common-mode feedback circuit is caused by, for example, high impedance nodes. Traditionally, capacitors are used to compensate for high impedance nodes, but the addition of capacitors decreases the bandwidth of the common-mode feedback circuit, and, thus, places a restriction on the bandwidth of the filly differential amplifier.
- A common-mode feedback circuit according to the present invention includes a converting circuit converting the output voltages of a fully differential amplifier into currents, and a summation circuit summing the currents to produce a summation current. The summation current is then compared by a comparison circuit to reference current. A feedback circuit generates a feedback voltage for controlling the fully differential amplifier based on the results of the comparison. Advantageously, the common mode feedback circuit according to the present invention does not include any high impedance nodes or suffer from the problems and disadvantages associated therewith.
- The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings which are given by way of illustration only, wherein like reference numerals designate corresponding parts in the various drawings, and wherein:
- FIG. 1 illustrates an embodiment of the common-mode feedback circuit according to the present invention applied to a conventional fully differential amplifier; and
- FIG. 2 illustrates another embodiment of the common-mode feedback circuit according to the present invention applied to the conventional fully differential amplifier.
- FIG. 1 illustrates an embodiment of the common-mode feedback circuit according to the present invention applied to the fully
differential amplifier 10. Because the fullydifferential amplifier 10 in FIG. 1 is well-known, a description of the structure and operation of the fullydifferential amplifier 10 will be omitted. - The common-mode feedback circuit100 includes first and second
bipolar transistors 102 and 104, which receive the output voltages of the fullydifferential amplifier 10 at their gates, respectively. The first bipolar transistor 102 is connected in series with a first N-MOS transistor 106 between the power source voltage VDD and ground. The secondbipolar transistor 104 is connected in series with a second N-MOS transistor 108 between the power source voltage VDD and ground. The gates of the first and second N-MOS transistors 106 and 108 are connected to the fourth fixed bias. - A first and
second resister 110 and 112 are connected in series between the emitters of the first and secondbipolar transistors 102 and 104. A first constant current source 114 is connected between the junction of the first andsecond resisters 110 and 112 and ground. Hereinafter, the junction between the first andsecond resistors 110 and 112 will be referred to as node 122. - As further shown in FIG. 1, a second constant current source116 is connected in series with a reference
bipolar transistor 118 between the power source voltage VDD and the node 122. A feedback P-MOS transistor 120 is connected in parallel to the second constant current source 116 and the referencebipolar transistor 118. The gate of the referencebipolar transistor 118 receives a reference voltage Vref which places the referencebipolar transistor 118 in the active state. The gate of the feedback P-MOS transistor 120 is connected to the junction between the second constant current source 116 and the referencebipolar transistor 118. Furthermore, afeedback path 124 supplies the voltage at the gate of the feedback P-MOS transistor 120 to the gates of the first and second resistive P-MOS transistors 18 and 26 in the fullydifferential amplifier 10. - The operation of the common-mode feedback circuit100 will now be described with respect to an increase in the output voltages of the fully
differential amplifier 10. As the output voltages of the fullydifferential amplifier 10 increase, more current flows through the first and secondbipolar transistors 102 and 104. As a result, the currents flowing through the first andsecond resisters 110 and 112 to the node 122 increases. - The current flowing from the node122 to ground is fixed by the first constant current source 114. The current flowing to the node 122 via the reference
bipolar transistor 118 is substantially fixed by the application of the reference voltage Vref to the gate of the referencebipolar transistor 118 and the provision of the second constant current source 116 except for a negligible base current in the referencebipolar transistor 118. - Accordingly, any difference between (1) the current flowing through the reference
bipolar transistor 118 to the node 122 and (2) the current through the first andsecond resisters 110 and 112 to the node 122 affects the current flowing through of the feedback P-MOS transistor 122 to the node 122. Consequently, the current flowing through the feedback P-MOS transistor 120 decreases by the same amount of increase in total current through the first andsecond resistors 110 and 112. With a decrease in the current flowing through the feedback P-MOS transistor 120, the voltage at the gate of the feedback P-MOS transistor 120 increases. Thefeedback path 124 supplies this increased voltage to the first and second resistive P-MOS transistors 18 and 26 of the fullydifferential amplifier 10. As a result, less current flows through the second and fourth resistive P-MOS transistors 18 and 26, and the output voltages from the fullydifferential amplifier 10 decrease. - While the operation of the common-mode feedback circuit100 has been described respect to an increase in the output voltages of the fully
differential amplifier 10, it is to be understood that the common-mode feedback circuit 100 operates in a similar, but opposite, manner when the output voltages of the fullydifferential amplifier 10 decrease. Both increases and decreases in the output voltages of thedifferential amplifier 10 are made with respect to the reference voltage Vref. Namely, the common-mode feedback circuit 100 serves to stabilize the output voltages around the reference voltage Vref. - Unlike conventional common-mode feedback circuits, the common-mode feedback circuit100 does not rely upon a comparison of voltages to generate the feedback voltage. Instead, the common-mode feedback circuit 100 is a current-mode common-mode feedback circuit that generates a feedback voltage based on the comparison of currents representing the output voltages of fully differential amplifier with a reference current. The reference current in the common-mode feedback circuit 100 corresponds to the reference voltage Vref; and therefore, the common-mood feedback circuit 100 stabilizes the output voltages of the fully
differential amplifier 10 about this reference voltage Vref. Also, in contrast to conventional common-mode feedback circuits, the common mode feedback circuit 100 does not include any high impedance nodes, or suffer from the problems and disadvantages related thereto. - Furthermore, it should be noted in that at low frequencies the gain of the feedback transistor120 controls the input impedance at the emitter of the reference
bipolar transistor 118. However, as the frequency increases, the gain of the feedback transistor 120 decreases and the effect of this gain on the input impedance at the emitter of the referencebipolar transistor 118 decreases. At higher frequencies, the input impedance at the emitter of the referencebipolar transistor 118 is determined by the transconductance of the referencebipolar transistor 118 and the parasitic capacitance with respect thereto. The two poles associated with the emitter of the referencebipolar transistor 118 and the gate of the feedback P-MOS transistor 120 interact with each other, and a complex-pole pair may be created, which is accompanied by undesirable peaking in the frequency response. To avoid this complex-pole pair, the transconductance of the referencebipolar transistor 118 should be larger than that of the feedback P-MOS transistor 120. This is easily accomplished in the BiCMOS (Bipolar-CMOS) implementation discussed above with respect to FIG. 1, because higher transconductances can be achieved with bipolar transistors than with their MOS counterparts. It should be understood however, that implementations of the present invention can be made using any other silicon technologies as long as the above rule is maintained. - While the embodiment of the present invention discussed above with respect to FIG. 1 operates well when the power source voltage VDD is greater than or equal to 3 volts, the common-mode feedback circuit of FIG. 1 is not applicable to low-power fully differential amplifiers. FIG. 2 illustrates another embodiment of the common-mode feedback circuit according to the present invention, which is applicable to low-power fully differential amplifiers. For ease of description, however, the common-
mode feedback circuit 200 of FIG. 2 has been shown applied to the fullydifferential amplifier 10. - As shown in FIG. 2, the output voltages of the fully
differential amplifier 10 are respectfully connected to the gates of a first P-MOS transistor 202 and a second P-MOS transistor 204 in the common-mode feedback circuit 200. The first P-MOS transistor 202 is connected in series with a third P-MOS transistor 206 between the power source voltage VDD and ground. The second P-MOS transistor 204 is also connected in series with a fourth P-MOS transistor 208 between the power source voltage VDD and ground. The gates of the third and fourth P-MOS transistors differential amplifier 10. - A first and
second resister MOS transistors MOS transistor 214, a reference P-MOS transistor 216, and a constantcurrent source 218 are connected in series between the power source voltage VDD and ground. The source of the reference P-MOS transistor 216 is connected to the junction between the first andsecond resisters second resisters MOS transistor 214 and the reference P-MOS transistor 216 are collectively referred to asnode 222. - The gate of the reference P-
MOS transistor 216 is connected to a reference voltage Vref, while the gate of the feedback P-MOS transistor 214 is connected to the drain of the reference P-MOS transistor 216. Afeedback path 220 also connects the gate of the feedback P-MOS transistor 214 to the gates of the first and secondresistive PMOS transistors 18 and 26 in the fullydifferential amplifier 10. - The operation of the common-
mode feedback circuit 200 will now be described with respect to an increase in the output voltages of the fullydifferential amplifier 10. As the output voltages of the fullydifferential amplifier 10 increase, more current flows through the first and second P-MOS transistors second resisters - The current flow from the
node 222 to ground is fixed by the application of the reference voltage Vref to the reference P-MOS transistor 216 and the constantcurrent source 218. Accordingly, any difference between (1) the current flowing from thenode 222 through the reference P-MOS transistor 216 and (2) the current flowing to thenode 222 from the first andsecond resistors MOS transistor 214. Consequently, the current flowing through the feedback P-MOS transistor 214 decreases by the same amount of increase in total current through the first andsecond resistors MOS transistor 214, the voltage at the gate of the feedback P-MOS transistor 214 increases. Thefeedback path 220 supplies this increased voltage to the gates of the first and second resistive P-MOS transistors 18 and 26 in the fullydifferential amplifier 10. As a result, less current flows through the first and second resistive P-MOS transistors 18 and 26, and the output voltages from the fullydifferential amplifier 10 decrease. - Unlike conventional common-mode feedback circuits, the common-
mode feedback circuit 200 does not rely upon a comparison of voltages to generate the feedback voltage. Instead, the common-mode feedback circuit 200 is a current-mode common-mode feedback circuit that generates a feedback voltage based on the comparison of currents representing the output voltages of the fully differential amplifier with a reference current. The reference current in the common-mode feedback circuit 200 corresponds to the reference voltage Vref; and therefore, the common-mode feedback circuit 200 stabilizes the output voltages of the fullydifferential amplifier 10 about this reference voltage Vref. Also, in contrast to conventional common-mode feedback circuits, the commonmode feedback circuit 200 does not include any high impedance nodes, or suffer from the problems and disadvantages related thereto. Furthermore, the common-mode feedback circuit 200 operates even when powered at low voltage levels. - The invention being thus described, it will be obvious that the same may be varied in many ways. Such variations are not to be regarded as a departure from the spirit and scope of the invention, and all such modifications are intended to be included within the scope of the following claims.
Claims (16)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/107,480 US6362682B2 (en) | 1998-06-30 | 1998-06-30 | Common-mode feedback circuit and method |
EP99304915A EP0969594B1 (en) | 1998-06-30 | 1999-06-23 | A common-mode feedback circuit and method |
DE69937428T DE69937428T2 (en) | 1998-06-30 | 1999-06-23 | Common mode feedback circuit and method |
JP11178610A JP2000101365A (en) | 1998-06-30 | 1999-06-24 | Common mode feedback circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/107,480 US6362682B2 (en) | 1998-06-30 | 1998-06-30 | Common-mode feedback circuit and method |
Publications (2)
Publication Number | Publication Date |
---|---|
US20010045865A1 true US20010045865A1 (en) | 2001-11-29 |
US6362682B2 US6362682B2 (en) | 2002-03-26 |
Family
ID=22316837
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/107,480 Expired - Lifetime US6362682B2 (en) | 1998-06-30 | 1998-06-30 | Common-mode feedback circuit and method |
Country Status (4)
Country | Link |
---|---|
US (1) | US6362682B2 (en) |
EP (1) | EP0969594B1 (en) |
JP (1) | JP2000101365A (en) |
DE (1) | DE69937428T2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060022753A1 (en) * | 2004-07-30 | 2006-02-02 | International Business Machines Corporation | Method and apparatus for controlling common-mode output voltage in fully differential amplifiers |
CN106656079A (en) * | 2016-09-30 | 2017-05-10 | 天津大学 | Robust fully-differential amplifier device |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2371159A (en) * | 2001-01-12 | 2002-07-17 | Jennic Ltd | A high-speed CMOS low-voltage differential signal receiver |
US6590436B2 (en) * | 2001-10-12 | 2003-07-08 | Texas Instruments Incorporated | System and method of translating wide common mode voltage ranges into narrow common mode voltage ranges |
JP3935777B2 (en) * | 2002-05-28 | 2007-06-27 | 富士通株式会社 | Output circuit device |
US7012463B2 (en) * | 2003-12-23 | 2006-03-14 | Analog Devices, Inc. | Switched capacitor circuit with reduced common-mode variations |
US7116132B2 (en) * | 2004-03-18 | 2006-10-03 | Intersil Americas Inc. | Current feedback amplifiers with separate common-mode and differential-mode inputs |
US7132860B2 (en) * | 2004-03-18 | 2006-11-07 | Intersil Americas Inc. | Differential-mode current feedback amplifiers |
US7132859B2 (en) * | 2004-03-18 | 2006-11-07 | Intersil Americas Inc. | Common-mode current feedback amplifiers |
US8009744B2 (en) * | 2005-06-17 | 2011-08-30 | Freescale Semiconductor, Inc. | Twisted pair communication system, apparatus and method thereof |
US7683717B2 (en) * | 2005-12-15 | 2010-03-23 | Intelleflex Corporation | Fully differential amplifier with continuous-time offset reduction |
US8076973B2 (en) * | 2007-02-22 | 2011-12-13 | Intelleflex Corporation | Fully differential amplifier with continuous-time offset reduction |
US9628028B2 (en) | 2014-09-09 | 2017-04-18 | Stmicroelectronics S.R.L. | Common-mode feedback circuit, corresponding signal processing circuit and method |
JP2018174477A (en) * | 2017-03-31 | 2018-11-08 | エイブリック株式会社 | Transconductance amplifier |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4105942A (en) * | 1976-12-14 | 1978-08-08 | Motorola, Inc. | Differential amplifier circuit having common mode compensation |
JPS5591219A (en) * | 1978-12-28 | 1980-07-10 | Nippon Gakki Seizo Kk | Amplifier |
US4616189A (en) * | 1985-04-26 | 1986-10-07 | Triquint Semiconductor, Inc. | Gallium arsenide differential amplifier with closed loop bias stabilization |
JP3078039B2 (en) | 1991-06-28 | 2000-08-21 | 株式会社東芝 | Integrator circuit |
KR960011407B1 (en) | 1994-04-26 | 1996-08-22 | 한국전기통신공사 | Cmos of amp |
-
1998
- 1998-06-30 US US09/107,480 patent/US6362682B2/en not_active Expired - Lifetime
-
1999
- 1999-06-23 EP EP99304915A patent/EP0969594B1/en not_active Expired - Lifetime
- 1999-06-23 DE DE69937428T patent/DE69937428T2/en not_active Expired - Lifetime
- 1999-06-24 JP JP11178610A patent/JP2000101365A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060022753A1 (en) * | 2004-07-30 | 2006-02-02 | International Business Machines Corporation | Method and apparatus for controlling common-mode output voltage in fully differential amplifiers |
US7053712B2 (en) | 2004-07-30 | 2006-05-30 | International Business Machines Corporation | Method and apparatus for controlling common-mode output voltage in fully differential amplifiers |
CN106656079A (en) * | 2016-09-30 | 2017-05-10 | 天津大学 | Robust fully-differential amplifier device |
Also Published As
Publication number | Publication date |
---|---|
JP2000101365A (en) | 2000-04-07 |
US6362682B2 (en) | 2002-03-26 |
EP0969594B1 (en) | 2007-10-31 |
DE69937428T2 (en) | 2008-02-21 |
EP0969594A1 (en) | 2000-01-05 |
DE69937428D1 (en) | 2007-12-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3549302B2 (en) | Offset comparator with common-mode voltage stability | |
US5896063A (en) | Variable gain amplifier with improved linearity and bandwidth | |
US5220207A (en) | Load current monitor for MOS driver | |
US6437645B1 (en) | Slew rate boost circuitry and method | |
US7564306B2 (en) | Amplifier with common-mode feedback circuit | |
US6118266A (en) | Low voltage reference with power supply rejection ratio | |
US6362682B2 (en) | Common-mode feedback circuit and method | |
US5475343A (en) | Class AB complementary output stage | |
US7317358B2 (en) | Differential amplifier circuit | |
US5847556A (en) | Precision current source | |
US5793194A (en) | Bias circuit having process variation compensation and power supply variation compensation | |
WO2000020942A1 (en) | Current mirror utilizing amplifier to match operating voltages of input and output transconductance devices | |
US6891433B2 (en) | Low voltage high gain amplifier circuits | |
US5412344A (en) | Class AB amplifier with improved phase margin | |
US6642788B1 (en) | Differential cascode amplifier | |
US4628280A (en) | Amplifier arrangement | |
US6538513B2 (en) | Common mode output current control circuit and method | |
EP0522786B1 (en) | Dynamic biasing for class A amplifier | |
US6657496B2 (en) | Amplifier circuit with regenerative biasing | |
US7109794B2 (en) | Differential gain stage for low voltage supply | |
US5028882A (en) | Multiple output operational amplifier | |
JP5129260B2 (en) | Adaptive feedback cascode | |
US6583665B2 (en) | Differential amplifier having active load device scaling | |
US7012465B2 (en) | Low-voltage class-AB output stage amplifier | |
US6903607B2 (en) | Operational amplifier |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: LUCENT TECHNOLOGIES INC., NEW JERSEY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SHULMAN, DIMA D.;REEL/FRAME:009290/0175 Effective date: 19980626 |
|
AS | Assignment |
Owner name: AGERE SYSTEMS GUARDIAN CORP., PENNSYLVANIA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LUCENT TECHNOLOGIES INC.;REEL/FRAME:012379/0336 Effective date: 20010130 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AG Free format text: PATENT SECURITY AGREEMENT;ASSIGNORS:LSI CORPORATION;AGERE SYSTEMS LLC;REEL/FRAME:032856/0031 Effective date: 20140506 |
|
AS | Assignment |
Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AGERE SYSTEMS LLC;REEL/FRAME:035365/0634 Effective date: 20140804 |
|
AS | Assignment |
Owner name: AGERE SYSTEMS LLC, PENNSYLVANIA Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031);ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:037684/0039 Effective date: 20160201 Owner name: LSI CORPORATION, CALIFORNIA Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031);ASSIGNOR:DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT;REEL/FRAME:037684/0039 Effective date: 20160201 |
|
AS | Assignment |
Owner name: BANK OF AMERICA, N.A., AS COLLATERAL AGENT, NORTH CAROLINA Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.;REEL/FRAME:037808/0001 Effective date: 20160201 Owner name: BANK OF AMERICA, N.A., AS COLLATERAL AGENT, NORTH Free format text: PATENT SECURITY AGREEMENT;ASSIGNOR:AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.;REEL/FRAME:037808/0001 Effective date: 20160201 |
|
AS | Assignment |
Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD., SINGAPORE Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS;ASSIGNOR:BANK OF AMERICA, N.A., AS COLLATERAL AGENT;REEL/FRAME:041710/0001 Effective date: 20170119 Owner name: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD Free format text: TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS;ASSIGNOR:BANK OF AMERICA, N.A., AS COLLATERAL AGENT;REEL/FRAME:041710/0001 Effective date: 20170119 |
|
AS | Assignment |
Owner name: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITE Free format text: MERGER;ASSIGNOR:AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.;REEL/FRAME:047195/0026 Effective date: 20180509 |
|
AS | Assignment |
Owner name: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITE Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0026. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER;ASSIGNOR:AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.;REEL/FRAME:047477/0423 Effective date: 20180905 |