US20010052653A1 - Semiconductor device and method of producing the same - Google Patents

Semiconductor device and method of producing the same Download PDF

Info

Publication number
US20010052653A1
US20010052653A1 US09/903,604 US90360401A US2001052653A1 US 20010052653 A1 US20010052653 A1 US 20010052653A1 US 90360401 A US90360401 A US 90360401A US 2001052653 A1 US2001052653 A1 US 2001052653A1
Authority
US
United States
Prior art keywords
wiring board
semiconductor device
sealing resin
heat spreading
spreading plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US09/903,604
Inventor
Mitsuo Abe
Yoshihiro Kubota
Yoshitsugu Katoh
Michio Hayakawa
Ryuji Nomoto
Mitsutaka Sato
Seiichi Orimo
Hiroshi Inoue
Toshio Hamano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to US09/903,604 priority Critical patent/US20010052653A1/en
Publication of US20010052653A1 publication Critical patent/US20010052653A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details
    • H04N23/55—Optical parts specially adapted for electronic image sensors; Mounting thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32057—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01061—Promethium [Pm]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention generally relates to a semiconductor device and a method of producing the semiconductor device. More particularly, the present invention relates to a semiconductor device suitable for mounting a semiconductor chip which generates heat during an operation and to a method producing such a semiconductor device.
  • FIG. 1 illustrates a conventional fine-pitch type semiconductor device 1 .
  • This semiconductor device 1 has a package structure called FBGA (Fine-pitch Ball Grid Array).
  • FBGA Fe-pitch Ball Grid Array
  • This structure includes a semiconductor chip 2 , a wiring board 3 , solder balls 7 , and a sealing resin 8 .
  • the semiconductor chip 2 has a high density, and is fixed with an adhesive 5 onto the upper surface of the wiring board 3 , which functions as an interposer.
  • the wiring board 3 is a printed wiring board or a flexible printed board (in FIG. 1, a flexible printed board is shown).
  • the wiring board 3 has a wiring layer 4 formed on a polyimide tape.
  • the wiring layer 4 and the semiconductor chip 2 are electrically connected by a wire 6 .
  • An opening is formed in a predetermined position of the polyimide tape, and the solder balls 7 are bonded to the wiring layer 4 through the opening.
  • the semiconductor chip 2 is electrically connected to the solder balls 7 as external connecting terminals via the wiring layer 4 .
  • the sealing resin 8 is molded to cover the semiconductor chip mounting surface of the wiring board 3 , so as to protect the semiconductor chip 2 , the wiring layer 4 , and the wire 6 .
  • a fine pitch is obtained by arranging the solder balls 7 in a grid pattern on the wiring board 3 , so that the semiconductor device 1 is compatible with the large number of terminals.
  • the semiconductor chip As a semiconductor chip has a higher density, the semiconductor chip generates a larger amount of heat.
  • the only heat releasing passage for the heat generated from the semiconductor chip 2 is the sealing resin 8 or the wiring board 3 .
  • the resin material used for the sealing resin 8 and the wiring board 3 is poor in thermal conductivity.
  • the heat releasing efficiency of the semiconductor device 1 is low, and the heat generated from the semiconductor chip 2 stays inside the device. As a result, the semiconductor chip 2 is overheated, and causes a faulty operation.
  • the principal object of the present invention is to provide a semiconductor device and a method of producing the semiconductor device, which semiconductor device is smaller than a conventional semiconductor device while maintaining high heat spreading properties.
  • the object of the present invention is achieved by a semiconductor device including a semiconductor chip, a heat spreading plate, a wiring board, and a sealing resin.
  • the semiconductor chip is mounted on the heat spreading plate having a stage portion.
  • the sealing resin seals the semiconductor chip and the heat spreading plate so that the stage portion is exposed from the sealing resin.
  • heat generated from the semiconductor chip can be efficiently released through the stage portion to the outside, so that the semiconductor chip can be efficiently cooled to avoid faulty operations.
  • the object of the present invention is also achieved by a method of producing a semiconductor device which includes the following steps of: forming a wiring board having a first wiring layer and an opening portion; forming a heat spreading plate having a fixed portion and a stage portion; temporarily fixing the heat spreading plate to the wiring board so that the stage portion facing the opening portion; mounting a semiconductor chip onto the stage portion; forming a sealing resin for permanently fixing the heat spreading plate to the wiring board so that the stage portion is exposed from the sealing resin; and cutting collectively the heat spreading plate, the wiring board, and the sealing resin, to form individual semiconductor devices.
  • the heat spreading plate formed in the heat spreading plate forming step is temporarily fixed to the wiring board formed in the wiring board forming step, so that the heat spreading plate and the wiring board can be collectively assembled. In this manner, the workability is improved compared with a method in which the heat spreading plate and the wiring board are handled and assembled separately.
  • FIG. 1 illustrates one example of a conventional semiconductor device
  • FIG. 2 illustrates a first embodiment of a semiconductor device of the present invention
  • FIG. 3 is a flowchart of a method of producing the semiconductor device of the first embodiment
  • FIG. 4 illustrates the semiconductor device of the first embodiment in a heat spreader forming step
  • FIG. 5 illustrates the semiconductor device of the first embodiment in the heat spreader forming step
  • FIG. 6 illustrates the semiconductor device of the first embodiment in the heat spreader forming step
  • FIG. 7 illustrates the semiconductor device of the first embodiment in the heat spreader forming step
  • FIG. 8 illustrates the semiconductor device of the first embodiment in a printed wiring board forming step
  • FIG. 9 illustrates the semiconductor device of the first embodiment in a heat spreader temporary fixing step
  • FIG. 10 illustrates the semiconductor device of the first embodiment in a semiconductor chip mounting step and a wire bonding step
  • FIGS. 11A and 11B illustrate the semiconductor device of the first embodiment in a sealing resin forming step
  • FIG. 12 illustrates the semiconductor device of the first embodiment in the sealing resin forming step
  • FIG. 13 illustrates the semiconductor device of the first embodiment in the sealing resin forming step
  • FIG. 14 illustrates a second embodiment of the semiconductor device of the present invention
  • FIGS. 15A and 15B illustrate third and fourth embodiments of the semiconductor device of the present invention
  • FIGS. 16A and 16B illustrate fifth and sixth embodiments of the semiconductor device of the present invention
  • FIGS. 17A and 17B illustrate seventh and eighth embodiments of the semiconductor device of the present invention
  • FIGS. 18A and 18B illustrate ninth and tenth embodiments of the semiconductor device of the present invention
  • FIG. 19 illustrates an eleventh embodiment of the semiconductor device of the present invention
  • FIG. 20 illustrates a twelfth embodiment of the semiconductor device of the present invention
  • FIG. 21 illustrates a thirteenth embodiment of the semiconductor device of the present invention
  • FIG. 22 illustrates a fourteenth embodiment of the semiconductor device of the present invention
  • FIG. 23 illustrates a fifteenth embodiment of the semiconductor device of the present invention
  • FIG. 24 illustrates a sixteenth embodiment of the semiconductor device of the present invention
  • FIG. 25 illustrates a seventeenth embodiment of the semiconductor device of the present invention
  • FIG. 26 illustrates an eighteenth embodiment of the semiconductor device of the present invention
  • FIG. 27 illustrates a nineteenth embodiment of the semiconductor device of the present invention
  • FIG. 28 illustrates a twentieth embodiment of the semiconductor device of the present invention
  • FIG. 29 is an enlarged view of a heat spreader in the semiconductor device of the twentieth embodiment.
  • FIG. 30 illustrates a twenty-first embodiment of the semiconductor device of the present invention.
  • FIG. 31 illustrates a twenty-second embodiment of the semiconductor device of the present invention.
  • FIG. 2 shows a semiconductor device 10 A of a first embodiment of the present invention.
  • the semiconductor device 10 A comprises a semiconductor chip 11 , a printed wiring board 12 A, a heat spreader 13 A, a sealing resin 14 A, and solder balls 15 .
  • the semiconductor chip 11 is a high density and high power dissipation device. When operated, the semiconductor chip 11 generates a large amount of heat.
  • the printed wiring board 12 A is used as a wiring board.
  • the printed wiring board 12 A is a glass-epoxy resin substrate, and a wiring layer 16 is formed on the side of the wiring board 12 A provided with the solder balls 15 (hereinafter referred to as a packaging side surface 28 ).
  • the wiring layer 16 is made of copper (Cu), for instance, and its surface is protected by a resist 20 .
  • solder balls 15 which serve as external connecting terminals, are connected to the outer portion of the wiring layer 16 via holes 42 (shown in FIG. 10) formed through the resist 20 .
  • Bonding pads 17 to which wires 19 to be electrically connected to the semiconductor chip 11 are bonded, are formed on the inner portion of the wiring layer 16 .
  • a rectangular opening 40 is formed in the center of the printed wiring board 12 A.
  • the size of the opening 40 seen on a plane is larger than the size of the semiconductor chip 11 seen on a plane, so that the semiconductor chip 11 can be attached within the opening 40 .
  • the heat spreader 13 A functions as a heat radiating plate, and therefore is made of a metallic material having excellent thermal conductivity, such as copper (Cu) or aluminum (Al).
  • the heat spreader 13 A is integrally made up of a fixed portion 23 A, a stage portion 24 A, and connecting portions 25 A.
  • FIG. 5 is a plan view of the heat spreader 13 A.
  • the heat spreader 13 A shown in FIG. 5 is not yet integrated into the semiconductor device 10 A (FIG. 5 is an enlarged view of the region circled by a broken line A in FIG. 4).
  • the fixed portion 23 A is fixed onto the upper surface 29 of the printed wiring board 12 A.
  • the upper surface 29 is the opposite surface to the packaging side surface 28 , and provided with a plurality of anchor holes 33 A.
  • the fixed portion 23 A extends to the outer periphery of the printed wiring board 12 A, and the peripheral portion is exposed to the outside.
  • a first adhesive 21 for temporarily fixing the heat spreader 13 A to the printed wiring board 12 A in a heat spreader temporary fixing process is disposed between the fixed portion 23 A and the printed wiring board 12 A.
  • the stage portion 24 A faces the opening 40 formed in the printed wiring board 12 A, and is caved in the direction of an arrow Z shown in FIG. 2 with respect to the fixed portion 23 A.
  • the semiconductor chip 11 is mounted onto the stage portion 24 A, and a concave portion 35 is formed in the position where the semiconductor chip 11 is to be disposed, as indicated by the shaded portion in FIG. 5.
  • a second adhesive 22 is used in bonding the semiconductor chip 11 to the stage portion 24 A.
  • the second adhesive 22 contains metallic powder so as to have high thermal conductivity.
  • the stage portion 24 A and the semiconductor chip 11 are thermally bonded with the second adhesive 22 .
  • Other types of adhesive can be used as the second adhesive 22 , as long as they have high thermal conductivity.
  • the semiconductor chip mounting surface of the stage portion 24 A is not flat.
  • the second adhesive 22 fills in the uneven portions, so that a larger amount of adhesive assures the sealing between the stage portion 24 A and the semiconductor chip 11 .
  • the concave portion 35 has a grid pattern
  • the design of the concave portion 35 is not limited to this.
  • the concave portion 35 can have other shapes, such as circles or triangles.
  • the connecting portions 25 A connect the fixed portion 23 A and the stage portion 24 A, and are situated between the fixed portion 23 A and the four corners of the stage portion 24 A. As shown in FIG. 2, the connecting portions 25 A, the fixed portion 23 A, and the stage portion 24 A are at angles so that the stage portion 24 A is caved in the direction of the arrow Z with respect to the fixed portion 23 A. Furthermore, the inner rims of the fixed portion 23 A conform to the rim of the opening 40 . Because of this, the connecting portions 25 A extend from the rim of the opening 40 formed in the printed wiring board 12 A.
  • a space (a cavity portion 41 ) is formed in the center of the semiconductor device 10 A.
  • the semiconductor chip 11 is disposed in the cavity portion 41 .
  • the sealing resin 14 A is made up of a first sealing resin portion 26 A and a second sealing resin portion 27 A.
  • the first sealing resin portion 26 A and the second sealing resin portion 27 A are integrally formed via resin filling openings 43 A (shown in FIG. 5) formed on the sides of the connecting portions 25 .
  • the first sealing resin portion 26 A is formed on the bonding side of the semiconductor chip 11 of the heat spreader 13 A to protect the semiconductor chip 11 and the wires 19 .
  • the second sealing resin portion 27 A is formed on the opposite surface to the bonding side of the semiconductor chip 11 , and the stage portion 24 A is exposed from the second sealing resin portion 27 A.
  • the second sealing resin portion 27 A bonds the heat spreader 13 A to the printed wiring board 12 A.
  • the solder balls 15 are used as the external connecting terminals, and are electrically connected to the wiring layer 16 via the holes 42 formed through the resist 20 .
  • the solder balls 15 can be formed on the entire surface of the packaging side surface 28 of the printed wiring board 12 A (except the position of the opening 40 ), and can have grid patterns. Because of this, a large number of solder balls 15 can be arranged on the printed wiring board 12 A while maintaining relatively wide intervals between the balls.
  • the semiconductor chip 11 has high density, and is compatible with a large number of terminals.
  • the semiconductor chip 11 is thermally bonded to the heat spreader 13 A, and the stage portion 24 A of the heat spreader 13 A, to which stage portion 24 A the semiconductor chip 11 is bonded, is exposed from the sealing resin (the second sealing resin portion 27 A). With this structure, heat generated from the semiconductor chip 11 is efficiently released from the stage portion 24 A to the outside.
  • the fixed portion 23 A is exposed to the outside from the second sealing resin portion 27 A so as to release the heat from this end also.
  • the semiconductor chip 11 can be efficiently cooled down so as to surely avoid faulty operation of the semiconductor chip 11 .
  • the cavity portion 41 is formed in the position of the semiconductor chip 11 .
  • the semiconductor chip 11 being placed on the heat spreader 13 A, a part of the semiconductor chip 11 is situated inside the printed wiring board 12 A.
  • the circuit formation surface (the surface to which the wires 19 are bonded) of the semiconductor chip 11 becomes level with the packaging side surface 28 of the printed wiring board 12 A or slightly caved from the packaging side surface 28 .
  • the semiconductor device 10 A can be thinner than the conventional semiconductor device 1 shown in FIG. 1 having the semiconductor chip 2 on the circuit board 3 .
  • the sealing resin 14 A is made up of the first and second sealing resin portions 26 A and 27 A, which sandwich the heat spreader 13 A. As a result, when subjected to heat, the first and second sealing resin portions 26 A and 27 A are heat-deformed in the same manner. Thus, the heat spreader 13 A (the semiconductor device 10 A) can be well prevented from being deformed, compared with a structure having the sealing resin 14 A only on one surface of the heat spreader 13 A.
  • the inner rim of the fixed portion 23 A conforms to the rim of the opening 40 , so that the connecting portions 25 A extend outward from the rim of the opening formed through the printed wiring board 12 A.
  • the bonding pads 17 to which the wires 19 are bonded, are formed around the outer periphery of the opening 40 of the printed wiring board 12 A. Accordingly, the fixed portion 23 A of the heat spreader 13 A is always situated on the side of the printed wiring board 12 A reverse to the positions of the bonding pads 17 .
  • the fixed portion 23 A of the heat spreader 13 A functions as a backing board at the time of wire bonding.
  • the fixed portion 23 A can accurately transmit ultrasonic vibration applied at the time of wire bonding to the wires 19 and the printed wiring board 12 A, thereby maintaining good wire bonding workability.
  • the connecting portions 25 A extend outward from the rim of the opening 40 , so that the rim of the opening 40 does not face the connecting portions 25 A and the stage portion 24 A of the heat spreader 13 A.
  • the printed wiring board 12 A does not face the connecting portions 25 A and the stage portion 24 A.
  • FIG. 3 is a flowchart of the method of producing the semiconductor device 10 A.
  • the method of producing the semiconductor device 10 A comprises a printed wiring board forming step (step 1 : “step” will be hereinafter referred to as “S”), a heat spreader forming step (S 2 ), a heat spreader temporary fixing step (S 3 ), a semiconductor chip mounting step (S 4 ), a wire bonding step (S 5 ), a sealing resin forming step (S 6 ), a marking step (S 7 ), an external connecting terminal arranging step (S 8 ), and a cutting step (S 9 ).
  • the printed wiring board forming step (S 1 ) is a step of forming the printed wiring board 12 A.
  • the wiring layer 16 having junction electrodes 18 (shown in FIG. 8) to which the solder balls 15 are attached are formed on a glass-epoxy resin basic material by a plating method and an etching method.
  • the opening 40 through which the semiconductor chip 11 is attached, is formed in the center of the wiring layer 16 .
  • the opening 40 is formed by stamping. The stamping can be carried out before or after the formation of the wiring layer 16 .
  • a so-called multi-cavity molding is performed to form a basic material into a plurality of printed wiring boards 12 A. More specifically, twenty printed wiring boards 12 A are formed from one basic material.
  • FIG. 8 is a partially enlarged view of one of the printed wiring boards 12 A formed in the printed wiring board forming step (S 1 ). As shown in FIG. 8, the bonding pads 17 are arranged in a grid pattern, and gap portions 37 are formed at intervals in the bonding pad formation area.
  • the larger the number of terminals of the semiconductor chip 11 the larger the number of bonding pads formed on the printed wiring board 12 A.
  • the area in which the bonding pads 17 are formed needs to be small.
  • the bolding pads 17 are arranged in a grid pattern so as to make the bonding pad formation area small.
  • the gap portions 37 are formed at intervals in the bonding pad formation area. The gap portions 37 reverse the wire bonding positions in the gap portions 37 , thereby allowing more space of the wires 19 . Thus, crossings of the wires 19 can be avoided.
  • the heat spreader forming step (S 2 ) is a step of forming the heat spreader 13 A.
  • stamping is carried out on a basic material, such as a copper plate or an aluminum plate having good thermal conductivity, to form the heat spreader 31 A.
  • FIG. 4 shows a heat spreader 13 formed in the heat spreader temporary fixing step. As shown in FIG. 4, multi-cavity molding is performed in this embodiment, and one heat spreader 13 includes twenty heat spreaders 13 A.
  • each thermal conducting plate disposed in the semiconductor device 10 A is referred to as the heat spreader 13 A, and thermal conducting plates connected to each other (as shown in FIG. 4) are referred to as the heat spreader 13 .
  • the twenty heat spreaders 13 A are surrounded by outer periphery anchor holes 31 A on the outer periphery of the heat spreader 13 .
  • Cutting slits are also formed in a grid pattern.
  • Positioning holes 32 A are also formed, and the stage portion 24 A is formed in the center of each heat spreader 13 A. The stage portion 24 A is caved with respect to the fixed portion 23 A.
  • the outer periphery anchor holes 31 A improve the bond between the sealing resin 14 A and the heat spreader 13 in the sealing resin forming step (S 6 ).
  • the cutting slits 30 are formed along the cutting positions of a blade used in cutting the semiconductor device 10 A in the cutting step (S 9 ).
  • the positioning holes 32 A position the printed wiring board 12 A with respect to the heat spreader 13 , and metal molds 45 and 46 (shown in FIG. 11) with respect to the heat spreader 13 , in the heat spreader temporary fixing step (S 3 ) and the sealing resin forming step (S 6 ).
  • the outer periphery anchor holes 31 A are circular on a plan view, and the cutting slits 30 are narrow rectangular on a plan view in this embodiment.
  • the outer periphery anchor holes 31 A and the cutting slits 30 may have other shapes.
  • FIG. 5 shows one of the heat spreaders 13 A in the heat spreader 13 .
  • Each heat spreader 13 A comprises the fixed portion 23 A, the stage portion 24 A, connecting portions 25 A, cutting slits 30 , anchor holes 33 A, slits 34 , and resin filling openings 43 A.
  • the fixed portion 23 A, the stage portion 24 A, the connecting portions 25 A, the cutting slits 30 , and the resin filling openings 43 A have already been explained in the foregoing description.
  • Each of the anchor holes 33 A is circular on a plan view in this embodiment. Eighty of the anchor holes 33 A are formed through the fixed portion 23 A, surrounding the stage portion 24 A. Each of the heat spreaders 13 A is bonded to one printed wiring board 12 A, and in the bonded condition, anchor grooves or anchor holes (not shown) of the printed wiring board 12 A face the anchor holes 33 A of he heat spreader 13 A.
  • the slits 34 are formed in the bonding positions between the fixed portion 23 A and the connecting portions 25 A.
  • Each slit 34 is U-shaped, and 0.15 mm in width and 0.5 mm in length.
  • the slits 34 formed in the stress applied positions become deformed to absorb the applied stress. Thus, unwanted deformation or distortion is not caused to the fixed portion 23 A, the stage portion 24 A, and the connecting portions 25 A.
  • the slits 34 are formed at the bonding positions between the connecting portions 25 A and the fixed portion 23 A in this embodiment, the slits 34 may be formed at the bonding positions between the stage portion 24 a and the connecting portions 25 A.
  • FIGS. 6 and 7 illustrate heat spreaders 13 B and 13 C which are modifications of the heat spreader 13 A shown in FIG. 5.
  • the heat spreader 13 B of FIG. 6 is characterized by rectangular anchor holes 33 B.
  • the anchor holes 33 A in the heat spreader 13 A of FIG. 5 are circular, but the anchor holes 33 A may have rectangular shapes as shown in FIG. 6 or other shapes.
  • the heat spreader 13 C of FIG. 7 has connecting portions 25 C which are smaller in area.
  • anchor holes 33 C can also function as the resin filling openings. Accordingly, the anchor holes 33 C can improve the bond with the printed wiring board 12 A, and as the resin filling openings, the anchor holes 33 C can improve the performance in filling the sealing resin 14 A in the sealing resin forming step.
  • the printed wiring board forming step (S 1 ) and the heat spreader forming step (S 2 ) can be carried out at the same time as separate steps.
  • the order of the two steps is not particularly fixed.
  • the printed wiring board forming step (S 1 ) and the heat spreader forming step (S 2 ) are followed by the heat spreader temporary fixing step (S 3 ).
  • the heat spreader 13 ( 13 A) is temporarily fixed to the printed wiring board 12 A.
  • the stage portion 24 A of the heat spreader 13 A is positioned by the positioning openings 32 and others so as to face the opening 40 formed through the printed wiring board 12 A.
  • the heat spreader 13 ( 13 A) is then temporarily fixed to the printed wiring board 12 A.
  • the first adhesive 21 is used in temporarily fixing the heat spreader 13 ( 13 A) to the printed wiring board 12 A.
  • the heat spreader 13 ( 13 A) and the printed wiring board 12 A can be handled as a unit, and the workability in assembling the semiconductor device 10 A is improved.
  • the means for temporarily fixing the heat spreader is not limited to the adhesive 21 . It is also possible to perform laser welding as shown in FIG. 9. When the heat spreader 13 ( 13 A) is temporarily fixed to the printed wiring board 12 A by laser welding, a dummy pattern should be formed in advance in a position where no bonding pads 17 of the printed wiring board 12 A exist.
  • a laser welding device is used to weld the fixed portion 23 A of the heat spreader 13 ( 13 A) to the dummy pattern 38 on the printed wiring board 12 A.
  • the heat spreader 13 ( 13 A) can be bonded to the printed wiring board 12 A by laser welding.
  • bonding can be carried out in positions which require a particularly tight bond. Even if the wiring density on the printed wiring board 12 A is high (in a case where wiring is carried out on the upper surface 29 of the printed wiring board 12 A), the printed wiring board 12 A and the heat spreader 13 ( 13 A) can be tightly bonded.
  • the bond by welding in this embodiment is tighter than the bond by the adhesive 21 , the heat spreader 13 ( 13 A) and the printed wiring board 12 A can be permanently bonded by welding.
  • the welding means described above is not limited to laser welding, but other welding means (such as spot welding) can be used.
  • the heat spreader temporary fixing step (S 3 ) is followed by the semiconductor chip mounting step (S 4 ) and the wire bonding step (S 5 ) in that order.
  • FIG. 10 illustrates the conditions after the semiconductor chip mounting step (S 4 ) and the wire bonding step (S 5 ).
  • the semiconductor mounting step (S 4 ) and the wire bonding step (S 5 ) are followed by the sealing resin forming step (S 6 ).
  • the sealing resin forming step the sealing resin 14 A (i.e., the first sealing resin portion 26 A and the second sealing resin portion 27 A) is formed.
  • the sealing resin 14 A is formed by a transfer molding method, for instance.
  • FIGS. 11A and 11B illustrate a metal mold for forming the sealing resin 14 A.
  • the heat spreader 13 having the semiconductor chip 11 and the printed wiring board 12 A are inserted in the metal mold so as to form the sealing resin 14 A.
  • FIG. 11A illustrates an upper mold 45
  • FIG. 11B illustrates a lower mold 46 .
  • the upper mold 45 is provided with upper cavities 47 and positioning holes 48 .
  • the upper cavities 47 face the semiconductor chip 11 when the heat spreader 13 and the printed wiring board 12 A are attached to the upper mold 45 .
  • the upper cavities 47 are mainly used for forming the first sealing resin portion 26 A.
  • the lower mold 46 is provided with a lower cavity 49 , a runner 50 for filling resin, gates 51 , area vents 52 , and positioning pins 53 for positioning the upper mold 45 .
  • the lower cavity 49 is mainly used for forming the second sealing resin portion 27 A, which is provided to the twenty heat spreaders 13 A at once.
  • the lower mold 46 has a number of gates 51 formed on the runner 50 , so that resin filling can be smoothly carried out even if the lower cavity 49 is large in area (or volume).
  • the large-area second sealing portion 27 A is collectively formed on the entire surface of the heat spreader 13 (except in the position of the stage portion 24 A) in the sealing resin forming step, so that large-area molding can be carried out.
  • the production efficiency is high, compared with the conventional structure in which the heat spreaders 13 A and the printed wiring board 12 A are divided in advance, and the sealing resin is formed individually. In this embodiment, the production costs can also be reduced.
  • the heat spreaders 13 A and the printed wiring board 12 A are collectively formed. This also improves the production efficiency and reduces the production costs.
  • FIGS. 12 and 13 illustrate the heat spreader 13 and the printed wiring board 12 A after the sealing resin forming step.
  • FIG. 12 is a view from the heat spreader 13 side
  • FIG. 13 is a view from the printed wiring board 12 A side.
  • the second sealing resin portion 27 A is filled in the anchor holes 33 formed in the fixed portion 34 A of each heat spreader 13 A, and in the anchor grooves (or the anchor holes) in the printed wiring board 12 A.
  • the anchor grooves face the anchor holes 33 A.
  • the resin is also filled in the outer periphery anchor holes 31 A (shown in FIG. 4) formed on the outer periphery of the heat spreader 13 .
  • the sealing resin 14 A also functions as a fixing member for fixing the heat spreader 13 onto the printed wiring board 12 A.
  • the sealing resin forming step (S 6 ) After the sealing resin forming step (S 6 ), the heat spreader 13 and the printed wiring board 12 A provided with the sealing resin 14 A are separated from the metal mold ( 45 and 46 ).
  • the marking step (S 7 ) is then carried out for putting a mark for identifying the semiconductor device 10 A in a predetermined position in the sealing resin 14 A.
  • the marking step is followed by the external connecting terminal arranging step (S 8 ) carried out for arranging the solder balls 15 .
  • the solder balls 15 are arranged on the printed wiring board 12 A by a transferring method, for instance.
  • the external connecting terminal arranging step (S 8 ) is followed by the cutting step (S 9 ).
  • the heat spreader 13 , the printed wiring board 12 A, and the sealing resin 14 A are collectively cut with a blade at the outer periphery of a corresponding semiconductor device 10 A.
  • the semiconductor device 10 A shown in FIG. 2 can be obtained.
  • the heat spreader 13 is provided with the cutting slits 30 formed along the cutting line of the blade.
  • the cutting slits 30 are formed even on the outer periphery of the heat spreader 13 . In this manner, a load applied to the blade is reduced, and the life of the blade is prolonged.
  • FIG. 14 illustrates a semiconductor device 10 B of a second embodiment of the present invention.
  • the same components as in the first embodiment are indicated by the same reference numerals as in the semiconductor device 10 A shown in FIG. 2.
  • the printed wiring board 12 A is used as a wiring board.
  • a film-type board 55 having a tape material as a base material is used as the wiring board.
  • the base material of the film-type board 55 is polyimide, and the wiring layer 16 is copper foil as in the printed wiring board 12 A.
  • the film-type board 55 can improve the wiring density, because the wiring layer 16 can be made more minute compared with the printed wiring board 12 A.
  • the film-type board 55 used as the wiring board is compatible with the high-density semiconductor chip 11 .
  • the semiconductor device 10 B can be made thinner than the semiconductor device 10 A.
  • the relationship between each line and space can be 30/30 ⁇ m.
  • FIGS. 15A and 15B illustrate semiconductor devices 10 C and 10 D of third and fourth embodiments of the present invention.
  • the semiconductor device 10 C of the third embodiment shown in FIG. 15A has a first resist 20 A formed on the packaging side surface 28 of the printed wiring board 12 A and a second resist 20 B formed on the upper surface 29 opposite to the packaging side surface 28 .
  • the first and second resists 20 A and 20 B function as solder resists, and are made of a resin material.
  • the first and second resin resists 20 A and 20 B sandwich the printed wiring board 12 A, so that the first and second resin resists 20 A and 20 B are deformed in the same way when heat is applied.
  • the printed wiring board 12 A (or the semiconductor device 10 C) is thus prevented from bending.
  • the semiconductor device 10 D of the fourth embodiment shown in FIG. 15B has the film-type board 55 instead of the printed wiring board 12 A in the semiconductor device 10 C of the third embodiment shown in FIG. 15A.
  • the length of a fixed portion 23 D of a heat spreader 13 C is shorter than that of the semiconductor device 10 A or 10 B. As long as the bonding between the heat spreader 13 C and the printed wiring board 12 A is maintained, the fixed portion 23 D can be shorter. This can reduce the material cost.
  • FIGS. 16A and 16B illustrate semiconductor devices 10 E and 10 F of fifth and sixth embodiments of the present invention.
  • the semiconductor device 10 E of the fifth embodiment shown in FIG. 16A has an elastic portion 56 at each connecting portion 25 D connecting the stage portion 24 A and the fixed portion 23 D formed in a heat spreader 13 D.
  • each connecting portion 25 D is crimped to form the elastic portion 56 .
  • the stage portion 24 A can be shifted with respect to the fixed portion 23 D. Even if the semiconductor chip 11 and the printed wiring board 12 A change in thickness, resin molding can be carried out using the same metal mold ( 45 and 46 ) used for forming the sealing resin 14 A.
  • the semiconductor chip 11 and the printed wiring board 12 A might change in thickness depending on the structure of the semiconductor device.
  • the connecting portions are inelastic like the connecting portions 25 A of the first embodiment, the heat spreader 13 needs to be adjusted to the thicknesses of the semiconductor chip and the printed wiring board 12 A. Because of this, it also becomes necessary to form the metal mold for the sealing resin 14 A in accordance with the adjustment. As is well known, the cost for producing a metal mold is high, resulting in an increase of the production costs of the semiconductor device.
  • the elastic portion 56 at each connecting portion 25 of the present invention is designed to absorb a change in thickness of the semiconductor chip 11 or the printed wiring board 12 A.
  • the sealing resin 14 A can be formed, without changing or adjusting the metal molds. Accordingly, a change in the semiconductor chip 11 or the printed wiring board 12 A can be quickly accommodated, without causing an increase of the production costs of the semiconductor device 10 E.
  • the semiconductor device 10 F of the sixth embodiment shown in FIG. 16B has the film-type board 55 instead of the printed wiring board 12 A in the semiconductor device 10 E of the fifth embodiment shown in FIG. 16A.
  • FIGS. 17A and 17B illustrate semiconductor devices 10 G and 10 H of seventh and eighth embodiments of the present invention.
  • the stage portion 24 A protruding from the surface of the second sealing resin portion 27 B can be easily obtained by forming a cavity for accommodating the stage portion 24 A in the lower cavity 49 (shown in FIG. 11B) of the lower mold 46 used in the sealing resin forming step (S 6 ).
  • stage portion 24 A protruding from the surface of the second sealing resin portion 27 B of this embodiment has a larger area exposed from the second sealing resin portion 27 B than in the foregoing embodiments, and the exposed area is the heat releasing area.
  • the heat generated from the semiconductor chip 11 can be more efficiently released.
  • the semiconductor device 10 H of the eighth embodiment shown in FIG. 17B has the film-type board 55 instead of the printed wiring board 12 A in the semiconductor device 10 G of the seventh embodiment shown in FIG. 17A.
  • FIGS. 18A and 18B illustrate semiconductor devices 10 I and 10 J of ninth and tenth embodiments of the present invention.
  • the first sealing resin portion 26 A and the second sealing resin portion 27 C can be similar in area. If heating is performed at the time of packaging, the thermal expansion of the first sealing resin portion 26 A can be almost the same as the thermal expansion of the second sealing resin portion 27 C. Thus, the heat spreader 13 C can be prevented from being bent due to the heat.
  • the semiconductor device 10 J of the tenth embodiment shown in FIG. 18B has the film-type board 55 instead of the printed wiring board 12 A in the semiconductor device 10 I of the ninth embodiment shown in FIG. 18A.
  • the semiconductor device 10 K of this embodiment has a first sealing resin portion 26 B formed by a screen printing method.
  • a dam member 57 for preventing resin flow at the time of printing is formed near the opening 40 of the printed wiring board 12 A.
  • the resin filling pressure can be lower than the pressure caused in resin formation by the transfer molding method.
  • the wires 19 can be prevented from moving at the time of resin formation. If the wire pitch of the wires 19 becomes narrow due to a high density, a short circuit among the wires can be avoided.
  • the screen printing method can also reduce the equipment cost, thereby reducing the costs of the semiconductor device 10 K.
  • the first sealing resin portion 26 B and the second sealing resin portion 27 C need to be produced separately. More specifically, the first sealing resin portion 26 B is formed by the screen printing method, and cured. After the curing, the second sealing resin portion 27 C is formed by the transfer molding method.
  • the printed wiring board 12 A is used as a wiring board in this embodiment, the film-type board 55 can be employed in place of the printed wiring board 12 A.
  • FIG. 20 illustrates a semiconductor device 10 L of a twelfth embodiment of the present invention.
  • the semiconductor device 10 L of this embodiment has an inorganic material board 60 as a wiring board made of an inorganic material such as ceramic (hereinafter referred to as a ceramic wiring board).
  • FIGS. 21 and 22 illustrate semiconductor devices 10 M and 10 N of thirteenth and fourteenth embodiments of the present invention.
  • the semiconductor device 10 M of the thirteenth embodiment shown in FIG. 21 has a first wiring layer 16 A formed on the packaging side surface 18 of a printed wiring board 12 C, and a second wiring layer 16 B formed on the upper surface 29 of the printed wiring board 12 C opposite to the packaging side surface 28 .
  • the semiconductor device 10 N of the fourteenth embodiment shown in FIG. 22 has a multi-layer printed wiring board 63 having a laminated structure as a wiring board.
  • the multi layer printed wiring board 63 of this embodiment is provided with the first and second wiring layers 16 A and 16 B on opposite surfaces.
  • the semiconductor devices 10 M and 10 N both have the first and second wiring layers 16 A and 16 B on opposite surfaces of the printed wiring board 12 C and the multi layer printed wiring board 63 as the circuit boards, an internal wiring layer 61 and vias 62 for electrically connecting the wiring layers 16 A and 16 B are formed inside each of the wiring boards 12 C and 63 .
  • the semiconductor device 10 M of the thirteenth embodiment is provided with the second wiring layer 16 B on the upper surface 29 .
  • the semiconductor device 10 N employs the multi layer printed wiring board 63 having a laminated structure. These factors can improve the degree of freedom and also narrow the gaps in the wiring pattern. Thus, the high density semiconductor chip 11 can be accommodated.
  • FIGS. 23 and 24 illustrate semiconductor devices 10 P and 10 Q of fifteenth and sixteenth embodiments of the present invention.
  • the semiconductor device lop of the fifteenth embodiment shown in FIG. 23 has an anchor portion 64 wedged into the printed wiring board 12 A.
  • the anchor portion 64 is integrally formed with the fixed portion 23 D of a heat spreader 13 E in the heat spreader forming step (S 2 ).
  • the anchor portion 64 is long enough to fix the heat spreader 13 E to the printed wiring board 12 A.
  • the semiconductor device 10 Q of the sixteenth embodiment shown in FIG. 24 has an engaging portion 65 extending downward from a heat spreader 13 F.
  • the engaging portion 65 is engaged with the opening 40 .
  • the anchor portion 64 provided to the heat spreader 13 E and the engaging portion 65 provided to the heat spreader 13 F can mechanically fix both heat spreaders 13 E and 13 F to the respective printed wiring boards 12 A.
  • FIG. 25 illustrates a semiconductor device 10 R of a seventeenth embodiment of the present invention.
  • the semiconductor device 10 R of this embodiment has a protruding portion 66 integrally formed with a first sealing resin portion 26 C.
  • the protruding portion 66 protrudes in the same direction as the protruding direction of the solder balls 15 .
  • the protruding portion 66 is more protruding than the packaging side surface 28 of the printed wiring board 12 A, but the solder balls 15 are more protruding than the protruding portion 66 by the length indicated by arrows H 2 in FIG. 25.
  • the protruding portion 66 provided to the first sealing resin portion 26 C can prevent the semiconductor device 10 R from shifting at the time of packaging.
  • the semiconductor device 10 R is mounted to a packaging substrate (not shown)
  • the semiconductor device 10 R is supported by the solder balls 15 onto the packaging substrate prior to the melting of the solder balls 15 .
  • the melted solder balls 15 can no longer support the semiconductor device 10 R.
  • the printed wiring board 12 A shifts toward the packaging substrate due to the weight of the semiconductor device 10 R itself. This causes bridging between the melted solder balls 15 .
  • the semiconductor device 10 R floats on the melted solder balls 15 , and can be deviated by even a small external force.
  • the protruding portion 66 protruding from the printed wiring board 12 A can support the semiconductor device 10 R on the packaging substrate even after the melting of the solder balls 15 .
  • bridging between the melted solder balls 15 can be avoided, and the semiconductor device 10 R can be prevented from deviating on the packaging substrate.
  • the height of the protruding portion 66 is smaller than the height of the solder balls 15 , so that the protruding portion 66 is not brought into contact with the packaging substrate.
  • FIGS. 26 and 27 illustrate semiconductor devices 10 S and 10 T of eighteenth and nineteenth embodiments of the present invention.
  • the semiconductor device 10 S of the eighteenth embodiment shown in FIG. 26 has a thin portion 67 on the outer periphery of a fixed portion 23 E of a heat spreader 13 G.
  • the outer periphery of the heat spreader 13 G is where the blade cutting is carried out in the cutting step (S 9 ).
  • the thin portion 67 is formed in the blade cutting position. As for the process of forming the thin portion 67 , it is possible to form the thin portion 67 at the same time as forming the cutting slits 30 by stamping in the heat spreader forming step (S 2 ), for instance.
  • the thin portion 67 formed on the outer periphery of the heat spreader 13 G, where the cutting step is carried out, can reduce the load applied to the blade used for the cutting.
  • a second sealing resin portion 27 D enters the thin portion 67 to form an anchor portion 68 , so that the bond between the second sealing resin portion 27 D and the heat spreader 13 G can be improved.
  • the semiconductor device 10 T of the nineteenth embodiment shown in FIG. 27 has a base thin portion 69 on the outer periphery of a printed wiring board 12 D.
  • the base thin portion 69 formed on the outer periphery of the printed wiring board 12 D, where the cutting step is carried out, can reduce the load applied to the blade used for the cutting, as in the eighteenth embodiment.
  • FIGS. 28 and 29 illustrate a semiconductor device 10 U of a twentieth embodiment of the present invention.
  • FIG. 28 is a sectional view of the semiconductor device 10 U of this embodiment
  • FIG. 29 is an enlarged plan view of a heat spreader 13 H disposed in the semiconductor device 10 U.
  • the semiconductor device 10 U has a vent hole 70 for releasing vapor from inside the device at the time of packaging.
  • the vent hole 70 is formed in a stage portion 24 D provided to the heat spreader 13 H. As shown in FIG. 29, the vent hole 70 is formed in the center of the stage portion 24 D, and has a circular shape. However, the position of the vent hole 70 is not limited to the center of the stage portion 24 D, and the number and shape of the vent hole 70 can be different from those in this embodiment.
  • the vent hole 70 formed in the stage portion 24 D exposed from the sealing resin 14 A (or the first sealing resin portion 26 A) can release vapor caused by the heat applied at the time of packaging. Accordingly, when heating is carried out, the semiconductor device 10 U can be prevented from sustaining damage such as cracks, and the reliability of the semiconductor device 10 U can be improved.
  • the second adhesive 22 leaks from the vent hole 70 formed in the stage portion 24 D.
  • a tape member 71 A for blocking the vent hole 70 is attached to the surface on the semiconductor chip mounting side of the stage 24 D in this embodiment.
  • the tape member 71 A for blocking the vent hole 70 can prevent the second adhesive 22 from leaking from the vent hole 70 in the semiconductor chip mounting step (S 4 ), thereby assuring the mounting of the semiconductor chip 11 to the stage portion 24 D.
  • the tape member 71 A of this embodiment is holed prior to the heating of the semiconductor device 10 U.
  • the vent hole 70 is subjected to laser irradiation, or a jig is inserted into the vent hole 70 .
  • a tape having high heat resistance such as Kapton
  • Kapton can be used as the tape member 71 A of this embodiment.
  • the tape member 71 A is not limited to Kapton, and other materials can be employed as long as they have strong adhesion and heat resistance.
  • FIG. 30 illustrates a semiconductor device 10 V of a twenty-first embodiment of the present invention.
  • the semiconductor device 10 V of this embodiment has the vent hole 70 for releasing vapor at the time of heating, as in the semiconductor device 10 U of the twentieth embodiment.
  • the tape member 71 A for preventing the second adhesive 22 from leaking is attached to the semiconductor chip mounting surface of the stage portion 24 D in the twentieth embodiment, a tape member 71 B is attached to the outer exposed surface of the stage portion 24 D in this embodiment.
  • the tape member 71 B of this embodiment Being attached to the outer exposed surface of the stage portion 24 D, the tape member 71 B of this embodiment can be removed from the outside of the semiconductor device 10 V. Compared with the twentieth embodiment, removing the tape member 71 B is easier.
  • a UV tape which loses adhesion by ultraviolet rays can be used as the tape member 71 B.
  • FIG. 31 illustrates a semiconductor device 10 W of a twenty-second embodiment of the present invention.
  • the semiconductor device 10 W of the twenty-second embodiment has a plating portion 72 having corrosion resistance on the exposed surface of the stage portion 24 A.
  • the plating portion 72 is formed only in the stage portion 24 a exposed to the outside.
  • the plating portion 72 prevents the stage portion 24 A from discoloring and corroding while maintaining the bond between the heat spreader 13 A and the sealing resin 14 A.
  • the quality of the semiconductor device 10 W can be maintained for a long period of time.

Abstract

A semiconductor device and a method of producing the semiconductor device are provided. This semiconductor device includes a semiconductor chip, a printed wiring board, a heat spreader, a sealing resin, and solder balls. The printed wiring board is provided with the solder balls on an outer portion and a wiring layer on an inner portion. Wires are bonded to the wiring layer, and an opening is formed in the center of the printed wiring board. The heat spreader is bonded to the printed wiring board, with the semiconductor chip being thermally connected to the stage portion of the heat spreader. The sealing resin is made up of a first sealing resin portion and a second sealing resin portion. The first and second sealing resin portions sandwich the heat spreader.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention generally relates to a semiconductor device and a method of producing the semiconductor device. More particularly, the present invention relates to a semiconductor device suitable for mounting a semiconductor chip which generates heat during an operation and to a method producing such a semiconductor device. [0002]
  • 2. Description of the Related Art [0003]
  • As the density of a semiconductor chip has increased in recent years, the number of terminals in a semiconductor chip has increased accordingly. Also, there is a growing tendency for a semiconductor chip to consume a large amount of electric power and to generate a large amount of heat. [0004]
  • In the meantime, electric devices mounted with semiconductor chips have rapidly become smaller, and there is a demand for smaller semiconductor chips. Therefore, it is necessary to develop a semiconductor chip which is small and thin, even if the number of terminals is large. [0005]
  • FIG. 1 illustrates a conventional fine-pitch [0006] type semiconductor device 1. This semiconductor device 1 has a package structure called FBGA (Fine-pitch Ball Grid Array). This structure includes a semiconductor chip 2, a wiring board 3, solder balls 7, and a sealing resin 8.
  • The [0007] semiconductor chip 2 has a high density, and is fixed with an adhesive 5 onto the upper surface of the wiring board 3, which functions as an interposer. The wiring board 3 is a printed wiring board or a flexible printed board (in FIG. 1, a flexible printed board is shown). The wiring board 3 has a wiring layer 4 formed on a polyimide tape. The wiring layer 4 and the semiconductor chip 2 are electrically connected by a wire 6.
  • An opening is formed in a predetermined position of the polyimide tape, and the [0008] solder balls 7 are bonded to the wiring layer 4 through the opening. Thus, the semiconductor chip 2 is electrically connected to the solder balls 7 as external connecting terminals via the wiring layer 4.
  • The [0009] sealing resin 8 is molded to cover the semiconductor chip mounting surface of the wiring board 3, so as to protect the semiconductor chip 2, the wiring layer 4, and the wire 6.
  • In the [0010] semiconductor device 1 shown in FIG. 1, a fine pitch is obtained by arranging the solder balls 7 in a grid pattern on the wiring board 3, so that the semiconductor device 1 is compatible with the large number of terminals.
  • As a semiconductor chip has a higher density, the semiconductor chip generates a larger amount of heat. In the [0011] semiconductor device 1, the only heat releasing passage for the heat generated from the semiconductor chip 2 is the sealing resin 8 or the wiring board 3. However, the resin material used for the sealing resin 8 and the wiring board 3 is poor in thermal conductivity. The heat releasing efficiency of the semiconductor device 1 is low, and the heat generated from the semiconductor chip 2 stays inside the device. As a result, the semiconductor chip 2 is overheated, and causes a faulty operation.
    • SUMMARY OF THE INVENTION
  • The principal object of the present invention is to provide a semiconductor device and a method of producing the semiconductor device, which semiconductor device is smaller than a conventional semiconductor device while maintaining high heat spreading properties. [0012]
  • The object of the present invention is achieved by a semiconductor device including a semiconductor chip, a heat spreading plate, a wiring board, and a sealing resin. The semiconductor chip is mounted on the heat spreading plate having a stage portion. The sealing resin seals the semiconductor chip and the heat spreading plate so that the stage portion is exposed from the sealing resin. [0013]
  • In this structure, heat generated from the semiconductor chip can be efficiently released through the stage portion to the outside, so that the semiconductor chip can be efficiently cooled to avoid faulty operations. [0014]
  • The object of the present invention is also achieved by a method of producing a semiconductor device which includes the following steps of: forming a wiring board having a first wiring layer and an opening portion; forming a heat spreading plate having a fixed portion and a stage portion; temporarily fixing the heat spreading plate to the wiring board so that the stage portion facing the opening portion; mounting a semiconductor chip onto the stage portion; forming a sealing resin for permanently fixing the heat spreading plate to the wiring board so that the stage portion is exposed from the sealing resin; and cutting collectively the heat spreading plate, the wiring board, and the sealing resin, to form individual semiconductor devices. [0015]
  • By this method, the heat spreading plate formed in the heat spreading plate forming step is temporarily fixed to the wiring board formed in the wiring board forming step, so that the heat spreading plate and the wiring board can be collectively assembled. In this manner, the workability is improved compared with a method in which the heat spreading plate and the wiring board are handled and assembled separately. [0016]
  • The above and other objects and features of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings.[0017]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 illustrates one example of a conventional semiconductor device; [0018]
  • FIG. 2 illustrates a first embodiment of a semiconductor device of the present invention; [0019]
  • FIG. 3 is a flowchart of a method of producing the semiconductor device of the first embodiment; [0020]
  • FIG. 4 illustrates the semiconductor device of the first embodiment in a heat spreader forming step; [0021]
  • FIG. 5 illustrates the semiconductor device of the first embodiment in the heat spreader forming step; [0022]
  • FIG. 6 illustrates the semiconductor device of the first embodiment in the heat spreader forming step; [0023]
  • FIG. 7 illustrates the semiconductor device of the first embodiment in the heat spreader forming step; [0024]
  • FIG. 8 illustrates the semiconductor device of the first embodiment in a printed wiring board forming step; [0025]
  • FIG. 9 illustrates the semiconductor device of the first embodiment in a heat spreader temporary fixing step; [0026]
  • FIG. 10 illustrates the semiconductor device of the first embodiment in a semiconductor chip mounting step and a wire bonding step; [0027]
  • FIGS. 11A and 11B illustrate the semiconductor device of the first embodiment in a sealing resin forming step; [0028]
  • FIG. 12 illustrates the semiconductor device of the first embodiment in the sealing resin forming step; [0029]
  • FIG. 13 illustrates the semiconductor device of the first embodiment in the sealing resin forming step; [0030]
  • FIG. 14 illustrates a second embodiment of the semiconductor device of the present invention; [0031]
  • FIGS. 15A and 15B illustrate third and fourth embodiments of the semiconductor device of the present invention; [0032]
  • FIGS. 16A and 16B illustrate fifth and sixth embodiments of the semiconductor device of the present invention; [0033]
  • FIGS. 17A and 17B illustrate seventh and eighth embodiments of the semiconductor device of the present invention; [0034]
  • FIGS. 18A and 18B illustrate ninth and tenth embodiments of the semiconductor device of the present invention; [0035]
  • FIG. 19 illustrates an eleventh embodiment of the semiconductor device of the present invention; [0036]
  • FIG. 20 illustrates a twelfth embodiment of the semiconductor device of the present invention; [0037]
  • FIG. 21 illustrates a thirteenth embodiment of the semiconductor device of the present invention; [0038]
  • FIG. 22 illustrates a fourteenth embodiment of the semiconductor device of the present invention; [0039]
  • FIG. 23 illustrates a fifteenth embodiment of the semiconductor device of the present invention; [0040]
  • FIG. 24 illustrates a sixteenth embodiment of the semiconductor device of the present invention; [0041]
  • FIG. 25 illustrates a seventeenth embodiment of the semiconductor device of the present invention; [0042]
  • FIG. 26 illustrates an eighteenth embodiment of the semiconductor device of the present invention; [0043]
  • FIG. 27 illustrates a nineteenth embodiment of the semiconductor device of the present invention; [0044]
  • FIG. 28 illustrates a twentieth embodiment of the semiconductor device of the present invention; [0045]
  • FIG. 29 is an enlarged view of a heat spreader in the semiconductor device of the twentieth embodiment; [0046]
  • FIG. 30 illustrates a twenty-first embodiment of the semiconductor device of the present invention; and [0047]
  • FIG. 31 illustrates a twenty-second embodiment of the semiconductor device of the present invention.[0048]
    • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • The following is a description of the embodiments of the present invention, with reference to the accompanying drawings. [0049]
  • FIG. 2 shows a [0050] semiconductor device 10A of a first embodiment of the present invention. The semiconductor device 10A comprises a semiconductor chip 11, a printed wiring board 12A, a heat spreader 13A, a sealing resin 14A, and solder balls 15.
  • The [0051] semiconductor chip 11 is a high density and high power dissipation device. When operated, the semiconductor chip 11 generates a large amount of heat.
  • In this embodiment, the printed [0052] wiring board 12A is used as a wiring board. The printed wiring board 12A is a glass-epoxy resin substrate, and a wiring layer 16 is formed on the side of the wiring board 12A provided with the solder balls 15 (hereinafter referred to as a packaging side surface 28). The wiring layer 16 is made of copper (Cu), for instance, and its surface is protected by a resist 20.
  • The [0053] solder balls 15, which serve as external connecting terminals, are connected to the outer portion of the wiring layer 16 via holes 42 (shown in FIG. 10) formed through the resist 20. Bonding pads 17, to which wires 19 to be electrically connected to the semiconductor chip 11 are bonded, are formed on the inner portion of the wiring layer 16.
  • A [0054] rectangular opening 40 is formed in the center of the printed wiring board 12A. The size of the opening 40 seen on a plane is larger than the size of the semiconductor chip 11 seen on a plane, so that the semiconductor chip 11 can be attached within the opening 40.
  • The [0055] heat spreader 13A functions as a heat radiating plate, and therefore is made of a metallic material having excellent thermal conductivity, such as copper (Cu) or aluminum (Al). The heat spreader 13A is integrally made up of a fixed portion 23A, a stage portion 24A, and connecting portions 25A.
  • FIG. 5 is a plan view of the [0056] heat spreader 13A. For ease of explanation, the heat spreader 13A shown in FIG. 5 is not yet integrated into the semiconductor device 10A (FIG. 5 is an enlarged view of the region circled by a broken line A in FIG. 4).
  • The fixed [0057] portion 23A is fixed onto the upper surface 29 of the printed wiring board 12A. The upper surface 29 is the opposite surface to the packaging side surface 28, and provided with a plurality of anchor holes 33A. In this embodiment, the fixed portion 23A extends to the outer periphery of the printed wiring board 12A, and the peripheral portion is exposed to the outside.
  • A [0058] first adhesive 21 for temporarily fixing the heat spreader 13A to the printed wiring board 12A in a heat spreader temporary fixing process (shown in FIG. 3) is disposed between the fixed portion 23A and the printed wiring board 12A.
  • The [0059] stage portion 24A faces the opening 40 formed in the printed wiring board 12A, and is caved in the direction of an arrow Z shown in FIG. 2 with respect to the fixed portion 23A. The semiconductor chip 11 is mounted onto the stage portion 24A, and a concave portion 35 is formed in the position where the semiconductor chip 11 is to be disposed, as indicated by the shaded portion in FIG. 5.
  • A [0060] second adhesive 22 is used in bonding the semiconductor chip 11 to the stage portion 24A. The second adhesive 22 contains metallic powder so as to have high thermal conductivity. The stage portion 24A and the semiconductor chip 11 are thermally bonded with the second adhesive 22. Other types of adhesive can be used as the second adhesive 22, as long as they have high thermal conductivity.
  • With the [0061] concave portion 35, the semiconductor chip mounting surface of the stage portion 24A is not flat. When bonding the semiconductor chip 11 to the stage portion 24A, the second adhesive 22 fills in the uneven portions, so that a larger amount of adhesive assures the sealing between the stage portion 24A and the semiconductor chip 11.
  • Although the [0062] concave portion 35 has a grid pattern, the design of the concave portion 35 is not limited to this. As long as the sealing between the stage portion 24A and the semiconductor chip 11 is surely maintained, the concave portion 35 can have other shapes, such as circles or triangles.
  • The connecting [0063] portions 25A connect the fixed portion 23A and the stage portion 24A, and are situated between the fixed portion 23A and the four corners of the stage portion 24A. As shown in FIG. 2, the connecting portions 25A, the fixed portion 23A, and the stage portion 24A are at angles so that the stage portion 24A is caved in the direction of the arrow Z with respect to the fixed portion 23A. Furthermore, the inner rims of the fixed portion 23A conform to the rim of the opening 40. Because of this, the connecting portions 25A extend from the rim of the opening 40 formed in the printed wiring board 12A.
  • By caving the [0064] stage portion 24A in the direction of the arrow Z with respect to the fixed portion 23A and forming the opening 40 in a position facing the stage portion 24A of the printed wiring board 12A, a space (a cavity portion 41) is formed in the center of the semiconductor device 10A. The semiconductor chip 11 is disposed in the cavity portion 41.
  • The sealing [0065] resin 14A is made up of a first sealing resin portion 26A and a second sealing resin portion 27A. The first sealing resin portion 26A and the second sealing resin portion 27A are integrally formed via resin filling openings 43A (shown in FIG. 5) formed on the sides of the connecting portions 25.
  • The first [0066] sealing resin portion 26A is formed on the bonding side of the semiconductor chip 11 of the heat spreader 13A to protect the semiconductor chip 11 and the wires 19. The second sealing resin portion 27A is formed on the opposite surface to the bonding side of the semiconductor chip 11, and the stage portion 24A is exposed from the second sealing resin portion 27A. The second sealing resin portion 27A bonds the heat spreader 13A to the printed wiring board 12A.
  • In this embodiment, the [0067] solder balls 15 are used as the external connecting terminals, and are electrically connected to the wiring layer 16 via the holes 42 formed through the resist 20. The solder balls 15 can be formed on the entire surface of the packaging side surface 28 of the printed wiring board 12A (except the position of the opening 40), and can have grid patterns. Because of this, a large number of solder balls 15 can be arranged on the printed wiring board 12A while maintaining relatively wide intervals between the balls. Thus, the semiconductor chip 11 has high density, and is compatible with a large number of terminals.
  • In the [0068] semiconductor device 10A having the above structure, the semiconductor chip 11 is thermally bonded to the heat spreader 13A, and the stage portion 24A of the heat spreader 13A, to which stage portion 24A the semiconductor chip 11 is bonded, is exposed from the sealing resin (the second sealing resin portion 27A). With this structure, heat generated from the semiconductor chip 11 is efficiently released from the stage portion 24A to the outside.
  • In this embodiment, the fixed [0069] portion 23A is exposed to the outside from the second sealing resin portion 27A so as to release the heat from this end also. By doing so, the semiconductor chip 11 can be efficiently cooled down so as to surely avoid faulty operation of the semiconductor chip 11.
  • With the [0070] stage portion 24A being caved in the direction of the arrow Z with respect to the fixed portion 23A and the opening 40 being formed through the printed wiring board 12A, the cavity portion 41 is formed in the position of the semiconductor chip 11. With the semiconductor chip 11 being placed on the heat spreader 13A, a part of the semiconductor chip 11 is situated inside the printed wiring board 12A.
  • More specifically, in this embodiment, the circuit formation surface (the surface to which the [0071] wires 19 are bonded) of the semiconductor chip 11 becomes level with the packaging side surface 28 of the printed wiring board 12A or slightly caved from the packaging side surface 28. Thus, the semiconductor device 10A can be thinner than the conventional semiconductor device 1 shown in FIG. 1 having the semiconductor chip 2 on the circuit board 3.
  • The sealing [0072] resin 14A is made up of the first and second sealing resin portions 26A and 27A, which sandwich the heat spreader 13A. As a result, when subjected to heat, the first and second sealing resin portions 26A and 27A are heat-deformed in the same manner. Thus, the heat spreader 13A (the semiconductor device 10A) can be well prevented from being deformed, compared with a structure having the sealing resin 14A only on one surface of the heat spreader 13A.
  • As described above, the inner rim of the fixed [0073] portion 23A conforms to the rim of the opening 40, so that the connecting portions 25A extend outward from the rim of the opening formed through the printed wiring board 12A. The bonding pads 17, to which the wires 19 are bonded, are formed around the outer periphery of the opening 40 of the printed wiring board 12A. Accordingly, the fixed portion 23A of the heat spreader 13A is always situated on the side of the printed wiring board 12A reverse to the positions of the bonding pads 17.
  • The fixed [0074] portion 23A of the heat spreader 13A functions as a backing board at the time of wire bonding. The fixed portion 23A can accurately transmit ultrasonic vibration applied at the time of wire bonding to the wires 19 and the printed wiring board 12A, thereby maintaining good wire bonding workability.
  • As described above, the connecting [0075] portions 25A extend outward from the rim of the opening 40, so that the rim of the opening 40 does not face the connecting portions 25A and the stage portion 24A of the heat spreader 13A. In other words, the printed wiring board 12A does not face the connecting portions 25A and the stage portion 24A.
  • When wire-bonding the [0076] semiconductor chip 11 on the stage portion 24A, the printed wiring board 12A never hinders a capillary operation, thereby maintaining smooth wire bonding workability.
  • The following is a description of a method of producing the [0077] semiconductor device 10A of the first embodiment, with reference to FIGS. 3 to 13.
  • FIG. 3 is a flowchart of the method of producing the [0078] semiconductor device 10A. As shown in FIG. 3, the method of producing the semiconductor device 10A comprises a printed wiring board forming step (step 1: “step” will be hereinafter referred to as “S”), a heat spreader forming step (S2), a heat spreader temporary fixing step (S3), a semiconductor chip mounting step (S4), a wire bonding step (S5), a sealing resin forming step (S6), a marking step (S7), an external connecting terminal arranging step (S8), and a cutting step (S9).
  • The printed wiring board forming step (S[0079] 1) is a step of forming the printed wiring board 12A. In this step, the wiring layer 16 having junction electrodes 18 (shown in FIG. 8) to which the solder balls 15 are attached are formed on a glass-epoxy resin basic material by a plating method and an etching method.
  • The [0080] opening 40, through which the semiconductor chip 11 is attached, is formed in the center of the wiring layer 16. The opening 40 is formed by stamping. The stamping can be carried out before or after the formation of the wiring layer 16.
  • In this embodiment, a so-called multi-cavity molding is performed to form a basic material into a plurality of printed [0081] wiring boards 12A. More specifically, twenty printed wiring boards 12A are formed from one basic material.
  • FIG. 8 is a partially enlarged view of one of the printed [0082] wiring boards 12A formed in the printed wiring board forming step (S1). As shown in FIG. 8, the bonding pads 17 are arranged in a grid pattern, and gap portions 37 are formed at intervals in the bonding pad formation area.
  • As described above, the larger the number of terminals of the [0083] semiconductor chip 11, the larger the number of bonding pads formed on the printed wiring board 12A. To make the semiconductor device 10A compact, the area in which the bonding pads 17 are formed needs to be small. In view of this, the bolding pads 17 are arranged in a grid pattern so as to make the bonding pad formation area small.
  • If the [0084] bonding pads 17 are arranged too close to each other, crossings might occur between adjacent wires 19 when the wires 19 are bonded to the bonding pads 17. To prevent this, the gap portions 37 are formed at intervals in the bonding pad formation area. The gap portions 37 reverse the wire bonding positions in the gap portions 37, thereby allowing more space of the wires 19. Thus, crossings of the wires 19 can be avoided.
  • The heat spreader forming step (S[0085] 2) is a step of forming the heat spreader 13A. In this step, stamping is carried out on a basic material, such as a copper plate or an aluminum plate having good thermal conductivity, to form the heat spreader 31A.
  • FIG. 4 shows a [0086] heat spreader 13 formed in the heat spreader temporary fixing step. As shown in FIG. 4, multi-cavity molding is performed in this embodiment, and one heat spreader 13 includes twenty heat spreaders 13A.
  • In the following description, each thermal conducting plate disposed in the [0087] semiconductor device 10A is referred to as the heat spreader 13A, and thermal conducting plates connected to each other (as shown in FIG. 4) are referred to as the heat spreader 13.
  • As shown in FIG. 4, the twenty [0088] heat spreaders 13A are surrounded by outer periphery anchor holes 31A on the outer periphery of the heat spreader 13. Cutting slits are also formed in a grid pattern. Positioning holes 32A are also formed, and the stage portion 24A is formed in the center of each heat spreader 13A. The stage portion 24A is caved with respect to the fixed portion 23A.
  • The outer periphery anchor holes [0089] 31A improve the bond between the sealing resin 14A and the heat spreader 13 in the sealing resin forming step (S6). The cutting slits 30 are formed along the cutting positions of a blade used in cutting the semiconductor device 10A in the cutting step (S9).
  • Furthermore, the positioning holes [0090] 32A position the printed wiring board 12A with respect to the heat spreader 13, and metal molds 45 and 46 (shown in FIG. 11) with respect to the heat spreader 13, in the heat spreader temporary fixing step (S3) and the sealing resin forming step (S6).
  • The outer periphery anchor holes [0091] 31A are circular on a plan view, and the cutting slits 30 are narrow rectangular on a plan view in this embodiment. However, the outer periphery anchor holes 31A and the cutting slits 30 may have other shapes.
  • FIG. 5 shows one of the [0092] heat spreaders 13A in the heat spreader 13. Each heat spreader 13A comprises the fixed portion 23A, the stage portion 24A, connecting portions 25A, cutting slits 30, anchor holes 33A, slits 34, and resin filling openings 43A. The fixed portion 23A, the stage portion 24A, the connecting portions 25A, the cutting slits 30, and the resin filling openings 43A have already been explained in the foregoing description.
  • Each of the anchor holes [0093] 33A is circular on a plan view in this embodiment. Eighty of the anchor holes 33A are formed through the fixed portion 23A, surrounding the stage portion 24A. Each of the heat spreaders 13A is bonded to one printed wiring board 12A, and in the bonded condition, anchor grooves or anchor holes (not shown) of the printed wiring board 12A face the anchor holes 33A of he heat spreader 13A.
  • The [0094] slits 34 are formed in the bonding positions between the fixed portion 23A and the connecting portions 25A. Each slit 34 is U-shaped, and 0.15 mm in width and 0.5 mm in length. By forming the slits 34 in the bonding positions between the fixed portion 23A and the connecting portions 25A, unwanted deformation and distortion can be avoided when stamping the stage portion 24A with respect to the fixed portion 23A.
  • When stamping the [0095] stage portion 24A, stress is applied to the bonding positions between the fixed portion 23A and the connecting portions 25A, which are the folded portions. If a mechanism for releasing the stress is not employed, deformation and distortion are caused by the stress at the bonding positions.
  • In this embodiment, the [0096] slits 34 formed in the stress applied positions become deformed to absorb the applied stress. Thus, unwanted deformation or distortion is not caused to the fixed portion 23A, the stage portion 24A, and the connecting portions 25A. Although the slits 34 are formed at the bonding positions between the connecting portions 25A and the fixed portion 23A in this embodiment, the slits 34 may be formed at the bonding positions between the stage portion 24a and the connecting portions 25A.
  • FIGS. 6 and 7 illustrate [0097] heat spreaders 13B and 13C which are modifications of the heat spreader 13A shown in FIG. 5.
  • The [0098] heat spreader 13B of FIG. 6 is characterized by rectangular anchor holes 33B. The anchor holes 33A in the heat spreader 13A of FIG. 5 are circular, but the anchor holes 33A may have rectangular shapes as shown in FIG. 6 or other shapes.
  • The [0099] heat spreader 13C of FIG. 7 has connecting portions 25C which are smaller in area. By making the areas of the connecting portions 25C smaller, anchor holes 33C can also function as the resin filling openings. Accordingly, the anchor holes 33C can improve the bond with the printed wiring board 12A, and as the resin filling openings, the anchor holes 33C can improve the performance in filling the sealing resin 14A in the sealing resin forming step.
  • The printed wiring board forming step (S[0100] 1) and the heat spreader forming step (S2) can be carried out at the same time as separate steps. The order of the two steps is not particularly fixed.
  • The printed wiring board forming step (S[0101] 1) and the heat spreader forming step (S2) are followed by the heat spreader temporary fixing step (S3). In this step, the heat spreader 13 (13A) is temporarily fixed to the printed wiring board 12A.
  • More specifically, the [0102] stage portion 24A of the heat spreader 13A is positioned by the positioning openings 32 and others so as to face the opening 40 formed through the printed wiring board 12A. The heat spreader 13 (13A) is then temporarily fixed to the printed wiring board 12A. In this embodiment, the first adhesive 21 is used in temporarily fixing the heat spreader 13 (13A) to the printed wiring board 12A.
  • By carrying out the heat spreader temporary fixing step, the heat spreader [0103] 13 (13A) and the printed wiring board 12A can be handled as a unit, and the workability in assembling the semiconductor device 10A is improved.
  • The means for temporarily fixing the heat spreader is not limited to the adhesive [0104] 21. It is also possible to perform laser welding as shown in FIG. 9. When the heat spreader 13 (13A) is temporarily fixed to the printed wiring board 12A by laser welding, a dummy pattern should be formed in advance in a position where no bonding pads 17 of the printed wiring board 12A exist.
  • A laser welding device is used to weld the fixed [0105] portion 23A of the heat spreader 13 (13A) to the dummy pattern 38 on the printed wiring board 12A. Thus, the heat spreader 13 (13A) can be bonded to the printed wiring board 12A by laser welding.
  • In the above manner, bonding can be carried out in positions which require a particularly tight bond. Even if the wiring density on the printed [0106] wiring board 12A is high (in a case where wiring is carried out on the upper surface 29 of the printed wiring board 12A), the printed wiring board 12A and the heat spreader 13 (13A) can be tightly bonded.
  • Since the bond by welding in this embodiment is tighter than the bond by the adhesive [0107] 21, the heat spreader 13 (13A) and the printed wiring board 12A can be permanently bonded by welding. The welding means described above is not limited to laser welding, but other welding means (such as spot welding) can be used.
  • The heat spreader temporary fixing step (S[0108] 3) is followed by the semiconductor chip mounting step (S4) and the wire bonding step (S5) in that order.
  • Since the rim of the [0109] opening 40 does not extend to the position facing the connecting portions 25A and the stage portion 24A of the heat spreader 13A, the semiconductor chip 11 can be smoothly attached to the stage portion 24A, and the wires 19 can be smoothly bonded in these two steps. FIG. 10 illustrates the conditions after the semiconductor chip mounting step (S4) and the wire bonding step (S5).
  • The semiconductor mounting step (S[0110] 4) and the wire bonding step (S5) are followed by the sealing resin forming step (S6). In the sealing resin forming step, the sealing resin 14A (i.e., the first sealing resin portion 26A and the second sealing resin portion 27A) is formed. In this embodiment, the sealing resin 14A is formed by a transfer molding method, for instance.
  • FIGS. 11A and 11B illustrate a metal mold for forming the sealing [0111] resin 14A. The heat spreader 13 having the semiconductor chip 11 and the printed wiring board 12A are inserted in the metal mold so as to form the sealing resin 14A. FIG. 11A illustrates an upper mold 45, and FIG. 11B illustrates a lower mold 46.
  • The [0112] upper mold 45 is provided with upper cavities 47 and positioning holes 48. The upper cavities 47 face the semiconductor chip 11 when the heat spreader 13 and the printed wiring board 12A are attached to the upper mold 45. The upper cavities 47 are mainly used for forming the first sealing resin portion 26A.
  • The [0113] lower mold 46 is provided with a lower cavity 49, a runner 50 for filling resin, gates 51, area vents 52, and positioning pins 53 for positioning the upper mold 45.
  • The [0114] lower cavity 49 is mainly used for forming the second sealing resin portion 27A, which is provided to the twenty heat spreaders 13A at once. The lower mold 46 has a number of gates 51 formed on the runner 50, so that resin filling can be smoothly carried out even if the lower cavity 49 is large in area (or volume).
  • The resin injected from an injection molding machine (not shown) is filled in the [0115] runner 50 in the direction indicated by the arrow in FIG. 11B, and the resin enters from the gates 50 into the lower cavity 49. Since each heat spreader 13A is provided with the resin filling openings 43A (shown in FIG. 5), the resin in the lower cavity 49 then enters the upper cavities 47 of the upper mold 45 through the resin filling openings 43A. Thus, the first and second sealing resin portions 26A and 27 are formed simultaneously in the sealing resin forming step.
  • The large-area second sealing [0116] portion 27A is collectively formed on the entire surface of the heat spreader 13 (except in the position of the stage portion 24A) in the sealing resin forming step, so that large-area molding can be carried out. Thus, the production efficiency is high, compared with the conventional structure in which the heat spreaders 13A and the printed wiring board 12A are divided in advance, and the sealing resin is formed individually. In this embodiment, the production costs can also be reduced.
  • In the printed wiring board step (S[0117] 1) and the heat spreader forming step (S2), the heat spreaders 13A and the printed wiring board 12A are collectively formed. This also improves the production efficiency and reduces the production costs.
  • FIGS. 12 and 13 illustrate the [0118] heat spreader 13 and the printed wiring board 12A after the sealing resin forming step. FIG. 12 is a view from the heat spreader 13 side, and FIG. 13 is a view from the printed wiring board 12A side.
  • With the sealing [0119] resin 14A, the second sealing resin portion 27A is filled in the anchor holes 33 formed in the fixed portion 34A of each heat spreader 13A, and in the anchor grooves (or the anchor holes) in the printed wiring board 12A. The anchor grooves face the anchor holes 33A.
  • The resin is also filled in the outer periphery anchor holes [0120] 31A (shown in FIG. 4) formed on the outer periphery of the heat spreader 13. The sealing resin 14A also functions as a fixing member for fixing the heat spreader 13 onto the printed wiring board 12A.
  • After the sealing resin forming step (S[0121] 6), the heat spreader 13 and the printed wiring board 12A provided with the sealing resin 14A are separated from the metal mold (45 and 46). The marking step (S7) is then carried out for putting a mark for identifying the semiconductor device 10A in a predetermined position in the sealing resin 14A. The marking step is followed by the external connecting terminal arranging step (S8) carried out for arranging the solder balls 15. The solder balls 15 are arranged on the printed wiring board 12A by a transferring method, for instance.
  • The external connecting terminal arranging step (S[0122] 8) is followed by the cutting step (S9). In this cutting step, the heat spreader 13, the printed wiring board 12A, and the sealing resin 14A are collectively cut with a blade at the outer periphery of a corresponding semiconductor device 10A. Thus, the semiconductor device 10A shown in FIG. 2 can be obtained.
  • The [0123] heat spreader 13 is provided with the cutting slits 30 formed along the cutting line of the blade. The cutting slits 30 are formed even on the outer periphery of the heat spreader 13. In this manner, a load applied to the blade is reduced, and the life of the blade is prolonged.
  • FIG. 14 illustrates a [0124] semiconductor device 10B of a second embodiment of the present invention. In the following descriptions of the embodiments of the present invention, the same components as in the first embodiment are indicated by the same reference numerals as in the semiconductor device 10A shown in FIG. 2.
  • In the [0125] semiconductor device 10A of the first embodiment, the printed wiring board 12A is used as a wiring board. In the semiconductor device 10B of this embodiment, a film-type board 55 having a tape material as a base material is used as the wiring board.
  • The base material of the film-[0126] type board 55 is polyimide, and the wiring layer 16 is copper foil as in the printed wiring board 12A. The film-type board 55 can improve the wiring density, because the wiring layer 16 can be made more minute compared with the printed wiring board 12A.
  • The film-[0127] type board 55 used as the wiring board is compatible with the high-density semiconductor chip 11. As the film-type board 55 is thinner than the printed wiring board 12A, the semiconductor device 10B can be made thinner than the semiconductor device 10A. As for a specific rule in pattern, the relationship between each line and space can be 30/30 μm.
  • FIGS. 15A and 15B illustrate [0128] semiconductor devices 10C and 10D of third and fourth embodiments of the present invention.
  • The [0129] semiconductor device 10C of the third embodiment shown in FIG. 15A has a first resist 20A formed on the packaging side surface 28 of the printed wiring board 12A and a second resist 20B formed on the upper surface 29 opposite to the packaging side surface 28. Like the resist 20 provided to the semiconductor device 10A of the first embodiment, the first and second resists 20A and 20B function as solder resists, and are made of a resin material.
  • The first and second resin resists [0130] 20A and 20B sandwich the printed wiring board 12A, so that the first and second resin resists 20A and 20B are deformed in the same way when heat is applied. The printed wiring board 12A (or the semiconductor device 10C) is thus prevented from bending.
  • The [0131] semiconductor device 10D of the fourth embodiment shown in FIG. 15B has the film-type board 55 instead of the printed wiring board 12A in the semiconductor device 10C of the third embodiment shown in FIG. 15A.
  • In the [0132] semiconductor devices 10C and 10D, the length of a fixed portion 23D of a heat spreader 13C is shorter than that of the semiconductor device 10A or 10B. As long as the bonding between the heat spreader 13C and the printed wiring board 12A is maintained, the fixed portion 23D can be shorter. This can reduce the material cost.
  • FIGS. 16A and 16B illustrate [0133] semiconductor devices 10E and 10F of fifth and sixth embodiments of the present invention.
  • The [0134] semiconductor device 10E of the fifth embodiment shown in FIG. 16A has an elastic portion 56 at each connecting portion 25D connecting the stage portion 24A and the fixed portion 23D formed in a heat spreader 13D. In this embodiment, each connecting portion 25D is crimped to form the elastic portion 56.
  • By forming the [0135] elastic portion 56 at each connecting portion 25D, the stage portion 24A can be shifted with respect to the fixed portion 23D. Even if the semiconductor chip 11 and the printed wiring board 12A change in thickness, resin molding can be carried out using the same metal mold (45 and 46) used for forming the sealing resin 14A.
  • The [0136] semiconductor chip 11 and the printed wiring board 12A might change in thickness depending on the structure of the semiconductor device. In such a case, if the connecting portions are inelastic like the connecting portions 25A of the first embodiment, the heat spreader 13 needs to be adjusted to the thicknesses of the semiconductor chip and the printed wiring board 12A. Because of this, it also becomes necessary to form the metal mold for the sealing resin 14A in accordance with the adjustment. As is well known, the cost for producing a metal mold is high, resulting in an increase of the production costs of the semiconductor device.
  • The [0137] elastic portion 56 at each connecting portion 25 of the present invention is designed to absorb a change in thickness of the semiconductor chip 11 or the printed wiring board 12A. Thus, the sealing resin 14A can be formed, without changing or adjusting the metal molds. Accordingly, a change in the semiconductor chip 11 or the printed wiring board 12A can be quickly accommodated, without causing an increase of the production costs of the semiconductor device 10E.
  • The [0138] semiconductor device 10F of the sixth embodiment shown in FIG. 16B has the film-type board 55 instead of the printed wiring board 12A in the semiconductor device 10E of the fifth embodiment shown in FIG. 16A.
  • FIGS. 17A and 17B illustrate [0139] semiconductor devices 10G and 10H of seventh and eighth embodiments of the present invention.
  • The [0140] semiconductor device 10G of the seventh embodiment shown in FIG. 17A is characterized by the stage portion 24A protruding from the surface of a second sealing resin portion 27B. In this embodiment, the stage portion 24A protrudes by the length indicated by arrows Hi in FIG. 17A.
  • The [0141] stage portion 24A protruding from the surface of the second sealing resin portion 27B can be easily obtained by forming a cavity for accommodating the stage portion 24A in the lower cavity 49 (shown in FIG. 11B) of the lower mold 46 used in the sealing resin forming step (S6).
  • The [0142] stage portion 24A protruding from the surface of the second sealing resin portion 27B of this embodiment has a larger area exposed from the second sealing resin portion 27B than in the foregoing embodiments, and the exposed area is the heat releasing area. Thus, the heat generated from the semiconductor chip 11 can be more efficiently released.
  • The [0143] semiconductor device 10H of the eighth embodiment shown in FIG. 17B has the film-type board 55 instead of the printed wiring board 12A in the semiconductor device 10G of the seventh embodiment shown in FIG. 17A.
  • FIGS. 18A and 18B illustrate [0144] semiconductor devices 10I and 10J of ninth and tenth embodiments of the present invention.
  • The [0145] semiconductor device 10I of the ninth embodiment shown in FIG. 18A is characterized by a second sealing resin portion 27C having a smaller area than the printed wiring board 12A. In this structure, the upper surface 29 of the printed wiring board 12A is exposed, and the second resist 20B is formed on the upper surface 29 to protect the printed wiring board 12.
  • By making the area of the second [0146] sealing resin portion 27C small, the first sealing resin portion 26A and the second sealing resin portion 27C can be similar in area. If heating is performed at the time of packaging, the thermal expansion of the first sealing resin portion 26A can be almost the same as the thermal expansion of the second sealing resin portion 27C. Thus, the heat spreader 13C can be prevented from being bent due to the heat.
  • The [0147] semiconductor device 10J of the tenth embodiment shown in FIG. 18B has the film-type board 55 instead of the printed wiring board 12A in the semiconductor device 10I of the ninth embodiment shown in FIG. 18A.
  • FIG. 19 illustrates a [0148] semiconductor device 10K of an eleventh embodiment of the present invention.
  • The [0149] semiconductor device 10K of this embodiment has a first sealing resin portion 26B formed by a screen printing method. A dam member 57 for preventing resin flow at the time of printing is formed near the opening 40 of the printed wiring board 12A.
  • By employing the screen printing method to form the first [0150] sealing resin portion 26B, the resin filling pressure can be lower than the pressure caused in resin formation by the transfer molding method. Thus, the wires 19 can be prevented from moving at the time of resin formation. If the wire pitch of the wires 19 becomes narrow due to a high density, a short circuit among the wires can be avoided. Compared with the transfer molding method, the screen printing method can also reduce the equipment cost, thereby reducing the costs of the semiconductor device 10K.
  • In this embodiment, the first [0151] sealing resin portion 26B and the second sealing resin portion 27C need to be produced separately. More specifically, the first sealing resin portion 26B is formed by the screen printing method, and cured. After the curing, the second sealing resin portion 27C is formed by the transfer molding method.
  • Although the printed [0152] wiring board 12A is used as a wiring board in this embodiment, the film-type board 55 can be employed in place of the printed wiring board 12A.
  • FIG. 20 illustrates a [0153] semiconductor device 10L of a twelfth embodiment of the present invention.
  • The [0154] semiconductor device 10L of this embodiment has an inorganic material board 60 as a wiring board made of an inorganic material such as ceramic (hereinafter referred to as a ceramic wiring board).
  • Compared with the printed [0155] wiring board 12A, the ceramic wiring board 60 of this embodiment can have a higher wire density, and is compatible with a high density semiconductor chip 11. As the ceramic wiring board 60 does not absorb moisture, cracking due to vapor can be avoided at the time of heating. Thus, the semiconductor device 10L can have high reliability.
  • FIGS. 21 and 22 illustrate [0156] semiconductor devices 10M and 10N of thirteenth and fourteenth embodiments of the present invention.
  • The [0157] semiconductor device 10M of the thirteenth embodiment shown in FIG. 21 has a first wiring layer 16A formed on the packaging side surface 18 of a printed wiring board 12C, and a second wiring layer 16B formed on the upper surface 29 of the printed wiring board 12C opposite to the packaging side surface 28.
  • The [0158] semiconductor device 10N of the fourteenth embodiment shown in FIG. 22 has a multi-layer printed wiring board 63 having a laminated structure as a wiring board. The multi layer printed wiring board 63 of this embodiment is provided with the first and second wiring layers 16A and 16B on opposite surfaces.
  • Since the [0159] semiconductor devices 10M and 10N both have the first and second wiring layers 16A and 16B on opposite surfaces of the printed wiring board 12C and the multi layer printed wiring board 63 as the circuit boards, an internal wiring layer 61 and vias 62 for electrically connecting the wiring layers 16A and 16B are formed inside each of the wiring boards 12C and 63.
  • Besides the [0160] first wiring layer 16A formed on the packaging side surface 28 of each of the wiring boards 12C and 63, the semiconductor device 10M of the thirteenth embodiment is provided with the second wiring layer 16B on the upper surface 29. On the other hand, the semiconductor device 10N employs the multi layer printed wiring board 63 having a laminated structure. These factors can improve the degree of freedom and also narrow the gaps in the wiring pattern. Thus, the high density semiconductor chip 11 can be accommodated.
  • FIGS. 23 and 24 illustrate [0161] semiconductor devices 10P and 10Q of fifteenth and sixteenth embodiments of the present invention.
  • The semiconductor device lop of the fifteenth embodiment shown in FIG. 23 has an [0162] anchor portion 64 wedged into the printed wiring board 12A. The anchor portion 64 is integrally formed with the fixed portion 23D of a heat spreader 13E in the heat spreader forming step (S2). The anchor portion 64 is long enough to fix the heat spreader 13E to the printed wiring board 12A.
  • The [0163] semiconductor device 10Q of the sixteenth embodiment shown in FIG. 24 has an engaging portion 65 extending downward from a heat spreader 13F. The engaging portion 65 is engaged with the opening 40.
  • The [0164] anchor portion 64 provided to the heat spreader 13E and the engaging portion 65 provided to the heat spreader 13F can mechanically fix both heat spreaders 13E and 13F to the respective printed wiring boards 12A.
  • In this embodiment, no adhesives are necessary in bonding the heat spreader and the printed wiring board, because the [0165] heat spreaders 13E and 13F can be directly fixed to the respective printed wiring boards 12A. Accordingly, the number of components can be smaller, and the production procedures can be simpler.
  • FIG. 25 illustrates a [0166] semiconductor device 10R of a seventeenth embodiment of the present invention.
  • The [0167] semiconductor device 10R of this embodiment has a protruding portion 66 integrally formed with a first sealing resin portion 26C. The protruding portion 66 protrudes in the same direction as the protruding direction of the solder balls 15. The protruding portion 66 is more protruding than the packaging side surface 28 of the printed wiring board 12A, but the solder balls 15 are more protruding than the protruding portion 66 by the length indicated by arrows H2 in FIG. 25.
  • The protruding [0168] portion 66 provided to the first sealing resin portion 26C can prevent the semiconductor device 10R from shifting at the time of packaging. When the semiconductor device 10R is mounted to a packaging substrate (not shown), the semiconductor device 10R is supported by the solder balls 15 onto the packaging substrate prior to the melting of the solder balls 15. After heat is applied for the packaging, the melted solder balls 15 can no longer support the semiconductor device 10R.
  • Without the protruding [0169] portion 66, the printed wiring board 12A shifts toward the packaging substrate due to the weight of the semiconductor device 10R itself. This causes bridging between the melted solder balls 15. The semiconductor device 10R floats on the melted solder balls 15, and can be deviated by even a small external force.
  • In this embodiment, the protruding [0170] portion 66 protruding from the printed wiring board 12A can support the semiconductor device 10R on the packaging substrate even after the melting of the solder balls 15. Thus, bridging between the melted solder balls 15 can be avoided, and the semiconductor device 10R can be prevented from deviating on the packaging substrate.
  • When the [0171] solder balls 15 have not yet melted, the height of the protruding portion 66 is smaller than the height of the solder balls 15, so that the protruding portion 66 is not brought into contact with the packaging substrate.
  • FIGS. 26 and 27 illustrate [0172] semiconductor devices 10S and 10T of eighteenth and nineteenth embodiments of the present invention.
  • The [0173] semiconductor device 10S of the eighteenth embodiment shown in FIG. 26 has a thin portion 67 on the outer periphery of a fixed portion 23E of a heat spreader 13G. The outer periphery of the heat spreader 13G is where the blade cutting is carried out in the cutting step (S9).
  • The [0174] thin portion 67 is formed in the blade cutting position. As for the process of forming the thin portion 67, it is possible to form the thin portion 67 at the same time as forming the cutting slits 30 by stamping in the heat spreader forming step (S2), for instance.
  • The [0175] thin portion 67 formed on the outer periphery of the heat spreader 13G, where the cutting step is carried out, can reduce the load applied to the blade used for the cutting. In the sealing resin forming step (S6), a second sealing resin portion 27D enters the thin portion 67 to form an anchor portion 68, so that the bond between the second sealing resin portion 27D and the heat spreader 13G can be improved.
  • The [0176] semiconductor device 10T of the nineteenth embodiment shown in FIG. 27 has a base thin portion 69 on the outer periphery of a printed wiring board 12D. The base thin portion 69 formed on the outer periphery of the printed wiring board 12D, where the cutting step is carried out, can reduce the load applied to the blade used for the cutting, as in the eighteenth embodiment.
  • FIGS. 28 and 29 illustrate a [0177] semiconductor device 10U of a twentieth embodiment of the present invention.
  • FIG. 28 is a sectional view of the [0178] semiconductor device 10U of this embodiment, and FIG. 29 is an enlarged plan view of a heat spreader 13H disposed in the semiconductor device 10U.
  • The [0179] semiconductor device 10U has a vent hole 70 for releasing vapor from inside the device at the time of packaging. The vent hole 70 is formed in a stage portion 24D provided to the heat spreader 13H. As shown in FIG. 29, the vent hole 70 is formed in the center of the stage portion 24D, and has a circular shape. However, the position of the vent hole 70 is not limited to the center of the stage portion 24D, and the number and shape of the vent hole 70 can be different from those in this embodiment.
  • The [0180] vent hole 70 formed in the stage portion 24D exposed from the sealing resin 14A (or the first sealing resin portion 26A) can release vapor caused by the heat applied at the time of packaging. Accordingly, when heating is carried out, the semiconductor device 10U can be prevented from sustaining damage such as cracks, and the reliability of the semiconductor device 10U can be improved.
  • When the [0181] semiconductor chip 11 is mounted to the stage portion 24D in the semiconductor chip mounting step (S4), the second adhesive 22 leaks from the vent hole 70 formed in the stage portion 24D. To avoid this, a tape member 71A for blocking the vent hole 70 is attached to the surface on the semiconductor chip mounting side of the stage 24D in this embodiment.
  • The [0182] tape member 71A for blocking the vent hole 70 can prevent the second adhesive 22 from leaking from the vent hole 70 in the semiconductor chip mounting step (S4), thereby assuring the mounting of the semiconductor chip 11 to the stage portion 24D.
  • The [0183] tape member 71A of this embodiment is holed prior to the heating of the semiconductor device 10U. To form a hole in the tape member 71A, the vent hole 70 is subjected to laser irradiation, or a jig is inserted into the vent hole 70.
  • A tape having high heat resistance, such as Kapton, can be used as the [0184] tape member 71A of this embodiment. However, the tape member 71A is not limited to Kapton, and other materials can be employed as long as they have strong adhesion and heat resistance.
  • FIG. 30 illustrates a [0185] semiconductor device 10V of a twenty-first embodiment of the present invention.
  • The [0186] semiconductor device 10V of this embodiment has the vent hole 70 for releasing vapor at the time of heating, as in the semiconductor device 10U of the twentieth embodiment. Although the tape member 71A for preventing the second adhesive 22 from leaking is attached to the semiconductor chip mounting surface of the stage portion 24D in the twentieth embodiment, a tape member 71B is attached to the outer exposed surface of the stage portion 24D in this embodiment.
  • Being attached to the outer exposed surface of the [0187] stage portion 24D, the tape member 71B of this embodiment can be removed from the outside of the semiconductor device 10V. Compared with the twentieth embodiment, removing the tape member 71B is easier.
  • A UV tape which loses adhesion by ultraviolet rays can be used as the [0188] tape member 71B.
  • FIG. 31 illustrates a [0189] semiconductor device 10W of a twenty-second embodiment of the present invention.
  • The [0190] semiconductor device 10W of the twenty-second embodiment has a plating portion 72 having corrosion resistance on the exposed surface of the stage portion 24A.
  • If copper (Cu) is used for the [0191] heat spreader 13A, and epoxy resin is used for the sealing resin 14A, it is advantageous to bond the heat spreader 13A and the sealing resin 14A without plating, because both copper and epoxy have excellent bonding properties. However, copper easily discolors or corrodes when exposed to the air. In the semiconductor device low having the stage portion 24A exposed from the first sealing resin portion 26A, the stage portion 24A made of copper discolors or corrodes, and lowers the quality of the device.
  • To avoid such discoloration and corrosion, the plating [0192] portion 72 is formed only in the stage portion 24a exposed to the outside. The plating portion 72 prevents the stage portion 24A from discoloring and corroding while maintaining the bond between the heat spreader 13A and the sealing resin 14A. Thus, the quality of the semiconductor device 10W can be maintained for a long period of time.
  • Although the present invention has been fully described by way of examples with reference to the accompanying drawings, it is to be noted that various changes and modifications will be apparent to those skilled in the art. Therefore, unless otherwise such changes and modifications depart from the scope of the present invention, they should be construed as being included therein. [0193]
  • The present application is based on Japanese priority application No. 10-327193, filed on Nov. 17, 1998, the entire contents of which are hereby incorporated by reference. [0194]

Claims (37)

What is claimed is:
1. A semiconductor device comprising:
a semiconductor chip;
a heat spreading plate having a stage portion, the semiconductor chip being mounted on the heat spreading plate;
a wiring board supported by the heat spreading plate; and
a sealing resin which seals the semiconductor chip and the heat spreading plate so that the stage portion is exposed from the sealing resin.
2. The semiconductor device according to
claim 1
, wherein:
the wiring board includes a first wiring layer formed on a packaging side surface of the wiring board, and an opening portion through which the semiconductor chip is mounted; and
the first wiring layer includes an outer portion having external connecting terminals, and an inner portion having wires electrically connected to the semiconductor chip.
3. The semiconductor device according to
claim 1
, wherein:
the heat spreading plate further includes a fixed portion on a side surface opposite to a packaging side surface of the wiring board, and connecting portions for connecting the fixed portion and the stage portion; and
the stage portion of the heat spreading plate is sunken from the fixed portion in a position facing an opening portion of the wiring board, and is thermally connected to the semiconductor chip.
4. The semiconductor device according to
claim 1
, wherein:
the sealing rein includes a first sealing resin portion formed on a semiconductor chip bonding surface of the heat spreading plate, and a second sealing resin portion of the sealing resin formed on a surface opposite to the semiconductor chip bonding surface of the heat spreading plate; and
the stage portion is exposed from the second sealing resin portion.
5. The semiconductor device according to
claim 1
, wherein the wiring board is a film-type board having a tape material as a base material.
6. The semiconductor device according to
claim 1
, wherein the wiring board is an inorganic board made of an inorganic material.
7. The semiconductor device according to
claim 1
, wherein a first resist is formed on a packaging side surface of the wiring board, and a second resist is formed on a side surface opposite to the packaging side surface of the wiring board.
8. The semiconductor device according to
claim 1
, wherein the heat spreading plate extends to an edge of the wiring board.
9. The semiconductor device according to
claim 3
, wherein an elastic portion is formed at each of the connecting portions connecting the fixed portion and the stage portion.
10. The semiconductor device according to
claim 4
, wherein the stage portion protrudes from a surface of the second sealing resin portion.
11. The semiconductor device according to
claim 4
, wherein an area of the second sealing resin portion is smaller than an area of the wiring board.
12. The semiconductor device according to
claim 2
, wherein the wiring board further includes a second wiring layer formed on a side surface opposite to the packaging side surface of the wiring board.
13. The semiconductor device according to
claim 1
, wherein the wiring board has a laminated structure.
14. The semiconductor device according to
claim 1
, wherein the heat spreading plate has an anchor portion to be wedged into the wiring board.
15. The semiconductor device according to
claim 2
, wherein the heat spreading plate has an engaging portion for engaging the heat spreading plate with a rim of the opening portion.
16. The semiconductor device according to
claim 2
, wherein the heat spreading plate is disposed in a position opposite to a bonding position of the wires to the wiring board.
17. The semiconductor device according to
claim 3
, wherein the connecting portions extend outward from the rim of the opening portion formed in the wiring board.
18. The semiconductor device according to
claim 1
, wherein a thin portion is formed on an outer periphery of the heat spreading plate.
19. The semiconductor device according to
claim 1
, wherein a thin portion is formed on an outer periphery of the wiring board.
20. The semiconductor device according to
claim 1
, wherein the stage portion is provided with a vent hole for releasing vapor existing inside the semiconductor device upon packaging.
21. The semiconductor device according to
claim 20
, wherein the stage portion is provided with a tape member for blocking the vent hole on a semiconductor chip mounting side.
22. The semiconductor device according to
claim 20
, wherein the stage portion is provided with a tape member for blocking the vent hole on an opposite side to a semiconductor chip mounting side.
23. The semiconductor device according to
claim 1
, wherein the stage portion has a plating portion having corrosion resistance on an exposed region of the stage portion from the sealing resin.
24. The semiconductor device according to
claim 4
, wherein the wiring board has solder balls as external connecting terminals, and the first sealing resin portion has a protruding portion protruding from the wiring board.
25. A method of producing a semiconductor device, comprising the steps of:
forming a wiring board having a first wiring layer and an opening portion;
forming a heat spreading plate having a fixed portion and a stage portion;
temporarily fixing the heat spreading plate to the wiring board, with the stage portion facing the opening portion;
mounting a semiconductor chip to the stage portion;
forming a sealing resin for permanently fixing the heat spreading plate to the wiring board, with the stage portion being exposed from the sealing resin; and
cutting collectively the heat spreading plate, the wiring board, and the sealing resin, to form individual semiconductor devices.
26. The method according to
claim 25
, wherein:
the first wiring layer of the wiring board includes an outer portion provided with external connecting terminals, and an inner portion having wires electrically connected to the semiconductor chip;
the semiconductor chip is mounted through the opening portion; and
the first wiring layer is formed on a packaging side surface of the wiring board.
27. The method according to
claim 25
, wherein:
the fixed portion of the heat spreading plate is fixed to the wiring board;
the stage portion is sunken from the fixed portion; and
the heat spreading plate further includes connecting portions for connecting the fixed portion and the stage portion.
28. The method according to
claim 26
, further comprising the step of bonding wires between the semiconductor chip and the first wiring layer provided to the wiring board.
29. The method according to
claim 25
, the sealing resin includes a first sealing resin portion for sealing the semiconductor chip mounted onto the heat spreading plate, and a second sealing resin portion on a surface opposite to a semiconductor chip boding surface of the heat spreading plate.
30. The method according to
claim 27
, wherein the step of forming the heat spreading plate includes the step-of forming slits for reducing stress at junctions of the connecting portions and the fixed portion and at junctions of the connecting portions and the stage portion.
31. The method according to
claim 25
, wherein the step of forming the heat spreading plate includes the step of forming an anchor hole for improving sealing between the wiring board and the sealing resin.
32. The method according to
claim 25
, wherein the step of forming the heat spreading plate includes the step of forming a slit hole along a cutting position where cutting is to be carried out in the cutting step.
33. The method according to
claim 25
, wherein the step of forming the heat spreading plate includes the step of forming an irregular surface portion on a semiconductor chip mounting surface of the stage portion.
34. The method according to
claim 25
, wherein the step of forming the wiring board includes the step of forming gaps where no bonding pads exist within a bonding pad forming region, the bonding pads being arranged in a grid pattern.
35. The method according to
claim 25
, wherein:
the step of forming the wiring board includes the step of forming a dummy pattern in a position where the bonding pads do not exist on the wiring board; and
the step of temporarily fixing the heat spreading plate includes the step of fixing the dummy pattern and the fixed portion of the heat spreading plate by welding.
36. The method according to
claim 25
, wherein:
a plurality of semiconductor chips are provided to the wiring board and the heat spreading plate; and
the step of forming the sealing resin includes the step of forming a large-area sealing resin collectively on surfaces of the wiring board and the heat spreading plate.
37. The method according to
claim 25
, wherein the sealing resin is formed by a transfer molding method or a screen printing method.
US09/903,604 1998-11-17 2001-07-13 Semiconductor device and method of producing the same Abandoned US20010052653A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US09/903,604 US20010052653A1 (en) 1998-11-17 2001-07-13 Semiconductor device and method of producing the same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP10327193A JP2000150730A (en) 1998-11-17 1998-11-17 Semiconductor device and its manufacture
JP10-327193 1998-11-17
US09/325,747 US6288444B1 (en) 1998-11-17 1999-06-04 Semiconductor device and method of producing the same
US09/903,604 US20010052653A1 (en) 1998-11-17 2001-07-13 Semiconductor device and method of producing the same

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US09/325,747 Continuation US6288444B1 (en) 1998-11-17 1999-06-04 Semiconductor device and method of producing the same

Publications (1)

Publication Number Publication Date
US20010052653A1 true US20010052653A1 (en) 2001-12-20

Family

ID=18196359

Family Applications (2)

Application Number Title Priority Date Filing Date
US09/325,747 Expired - Fee Related US6288444B1 (en) 1998-11-17 1999-06-04 Semiconductor device and method of producing the same
US09/903,604 Abandoned US20010052653A1 (en) 1998-11-17 2001-07-13 Semiconductor device and method of producing the same

Family Applications Before (1)

Application Number Title Priority Date Filing Date
US09/325,747 Expired - Fee Related US6288444B1 (en) 1998-11-17 1999-06-04 Semiconductor device and method of producing the same

Country Status (4)

Country Link
US (2) US6288444B1 (en)
EP (1) EP1003214A3 (en)
JP (1) JP2000150730A (en)
KR (1) KR20000034871A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080000874A1 (en) * 2006-07-03 2008-01-03 Matsushita Electric Industrial Co., Ltd. Printed wiring board and method of manufacturing the same
US20120087099A1 (en) * 2010-10-08 2012-04-12 Samsung Electronics Co., Ltd. Printed Circuit Board For Board-On-Chip Package, Board-On-Chip Package Including The Same, And Method Of Fabricating The Board-On-Chip Package

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000150730A (en) * 1998-11-17 2000-05-30 Fujitsu Ltd Semiconductor device and its manufacture
US6352881B1 (en) 1999-07-22 2002-03-05 National Semiconductor Corporation Method and apparatus for forming an underfill adhesive layer
US6210992B1 (en) * 1999-08-31 2001-04-03 Micron Technology, Inc. Controlling packaging encapsulant leakage
JP3269815B2 (en) * 1999-12-13 2002-04-02 富士通株式会社 Semiconductor device and manufacturing method thereof
KR100456816B1 (en) * 2000-06-13 2004-11-10 앰코 테크놀로지 코리아 주식회사 Semiconductor package
EP1346411A2 (en) 2000-12-01 2003-09-24 Broadcom Corporation Thermally and electrically enhanced ball grid array packaging
US7161239B2 (en) 2000-12-22 2007-01-09 Broadcom Corporation Ball grid array package enhanced with a thermal and electrical connector
US20020079572A1 (en) 2000-12-22 2002-06-27 Khan Reza-Ur Rahman Enhanced die-up ball grid array and method for making the same
US6906414B2 (en) 2000-12-22 2005-06-14 Broadcom Corporation Ball grid array package with patterned stiffener layer
US7132744B2 (en) 2000-12-22 2006-11-07 Broadcom Corporation Enhanced die-up ball grid array packages and method for making the same
US6853070B2 (en) * 2001-02-15 2005-02-08 Broadcom Corporation Die-down ball grid array package with die-attached heat spreader and method for making the same
JP4641635B2 (en) * 2001-03-05 2011-03-02 イビデン株式会社 Heat sink assembly
US7259448B2 (en) 2001-05-07 2007-08-21 Broadcom Corporation Die-up ball grid array package with a heat spreader and method for making the same
US6693239B2 (en) * 2001-09-06 2004-02-17 Delphi Technologies Inc. Overmolded circuit board with underfilled surface-mount component and method therefor
US6879039B2 (en) 2001-12-18 2005-04-12 Broadcom Corporation Ball grid array package substrates and method of making the same
KR20030055410A (en) * 2001-12-26 2003-07-04 주식회사 심텍 A printed circuit board for EBGA semiconductor package having dummy pattern for resistive welding and the fabrication method of EBGA semiconductor package using the printed circuit board
US6825108B2 (en) 2002-02-01 2004-11-30 Broadcom Corporation Ball grid array package fabrication with IC die support structures
US7245500B2 (en) * 2002-02-01 2007-07-17 Broadcom Corporation Ball grid array package with stepped stiffener layer
US6861750B2 (en) 2002-02-01 2005-03-01 Broadcom Corporation Ball grid array package with multiple interposers
US7550845B2 (en) * 2002-02-01 2009-06-23 Broadcom Corporation Ball grid array package with separated stiffener layer
US6876553B2 (en) 2002-03-21 2005-04-05 Broadcom Corporation Enhanced die-up ball grid array package with two substrates
US7196415B2 (en) 2002-03-22 2007-03-27 Broadcom Corporation Low voltage drop and high thermal performance ball grid array package
TW582100B (en) 2002-05-30 2004-04-01 Fujitsu Ltd Semiconductor device having a heat spreader exposed from a seal resin
JP3539952B2 (en) * 2002-06-13 2004-07-07 沖電気工業株式会社 Level identification circuit
US7423337B1 (en) 2002-08-19 2008-09-09 National Semiconductor Corporation Integrated circuit device package having a support coating for improved reliability during temperature cycling
US7301222B1 (en) 2003-02-12 2007-11-27 National Semiconductor Corporation Apparatus for forming a pre-applied underfill adhesive layer for semiconductor wafer level chip-scale packages
US7126210B2 (en) 2003-04-02 2006-10-24 Stmicroelectronics, Inc. System and method for venting pressure from an integrated circuit package sealed with a lid
CN100336218C (en) * 2003-08-25 2007-09-05 威盛电子股份有限公司 High-frequency IC multi-bus knot tying structure and method
CN1332445C (en) * 2003-10-09 2007-08-15 威盛电子股份有限公司 A high-frequency integrated circuit multi-in-line throwing structure
US20050136664A1 (en) * 2003-12-22 2005-06-23 Taiwan Semiconductor Manufacturing Co. Novel process for improved hot carrier injection
US7282375B1 (en) 2004-04-14 2007-10-16 National Semiconductor Corporation Wafer level package design that facilitates trimming and testing
US7411281B2 (en) 2004-06-21 2008-08-12 Broadcom Corporation Integrated circuit device package having both wire bond and flip-chip interconnections and method of making the same
US7482686B2 (en) 2004-06-21 2009-01-27 Braodcom Corporation Multipiece apparatus for thermal and electromagnetic interference (EMI) shielding enhancement in die-up array packages and method of making the same
US6969640B1 (en) 2004-09-02 2005-11-29 Stats Chippac Ltd. Air pocket resistant semiconductor package system
KR100631403B1 (en) 2004-09-23 2006-10-09 삼성전자주식회사 semiconductor package having heat slug and method for manufacturing the same
US7786591B2 (en) 2004-09-29 2010-08-31 Broadcom Corporation Die down ball grid array package
JP4485460B2 (en) * 2004-12-16 2010-06-23 三井金属鉱業株式会社 Flexible printed wiring board
US8183680B2 (en) 2006-05-16 2012-05-22 Broadcom Corporation No-lead IC packages having integrated heat spreader for electromagnetic interference (EMI) shielding and thermal enhancement
US7833456B2 (en) 2007-02-23 2010-11-16 Micron Technology, Inc. Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece
TWI501371B (en) * 2009-01-13 2015-09-21 Dainippon Printing Co Ltd A wiring member for a semiconductor device, a composite wiring member for a semiconductor device, and a resin-sealed type semiconductor device
US20120126399A1 (en) * 2010-11-22 2012-05-24 Bridge Semiconductor Corporation Thermally enhanced semiconductor assembly with bump/base/flange heat spreader and build-up circuitry

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
US6146924A (en) * 1999-08-06 2000-11-14 Vanguard International Semiconductor Corporation Magnetic insert into mold cavity to prevent resin bleeding from bond area of pre-mold (open cavity) plastic chip carrier during molding process
US6218731B1 (en) * 1999-05-21 2001-04-17 Siliconware Precision Industries Co., Ltd. Tiny ball grid array package
US6246114B1 (en) * 1996-12-03 2001-06-12 Oki Electric Industry Co., Ltd. Semiconductor device and resin film
US6252298B1 (en) * 1997-06-18 2001-06-26 Samsung Electronics Co., Ltd. Semiconductor chip package using flexible circuit board with central opening
US6288444B1 (en) * 1998-11-17 2001-09-11 Fujitsu Limited Semiconductor device and method of producing the same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5045921A (en) * 1989-12-26 1991-09-03 Motorola, Inc. Pad array carrier IC device using flexible tape
US5202288A (en) * 1990-06-01 1993-04-13 Robert Bosch Gmbh Method of manufacturing an electronic circuit component incorporating a heat sink
US5102829A (en) * 1991-07-22 1992-04-07 At&T Bell Laboratories Plastic pin grid array package
JP2602380B2 (en) * 1991-10-23 1997-04-23 富士通株式会社 Semiconductor device and manufacturing method thereof
US5583377A (en) * 1992-07-15 1996-12-10 Motorola, Inc. Pad array semiconductor device having a heat sink with die receiving cavity
US5387554A (en) * 1992-09-10 1995-02-07 Vlsi Technology, Inc. Apparatus and method for thermally coupling a heat sink to a lead frame
US5612576A (en) * 1992-10-13 1997-03-18 Motorola Self-opening vent hole in an overmolded semiconductor device
JPH06275759A (en) * 1993-03-17 1994-09-30 Fujitsu Ltd Semiconductor device and its manufacture
JP2600617B2 (en) * 1994-08-18 1997-04-16 日本電気株式会社 Semiconductor device and manufacturing method thereof
JPH08125051A (en) 1994-10-27 1996-05-17 Hitachi Ltd Semiconductor device
US5972736A (en) * 1994-12-21 1999-10-26 Sun Microsystems, Inc. Integrated circuit package and method
JPH08241940A (en) * 1995-03-03 1996-09-17 Hitachi Ltd Semiconductor device and its manufacture
JPH08250529A (en) * 1995-03-09 1996-09-27 Citizen Watch Co Ltd Plastic molded type semiconductor device and manufacture thereof
US5586010A (en) * 1995-03-13 1996-12-17 Texas Instruments Incorporated Low stress ball grid array package
US5661086A (en) * 1995-03-28 1997-08-26 Mitsui High-Tec, Inc. Process for manufacturing a plurality of strip lead frame semiconductor devices
US5691567A (en) * 1995-09-19 1997-11-25 National Semiconductor Corporation Structure for attaching a lead frame to a heat spreader/heat slug structure
JPH09148481A (en) * 1995-11-24 1997-06-06 Hitachi Ltd Semiconductor device, and its manufacture
US6111315A (en) * 1997-01-21 2000-08-29 Texas Instruments Incorporated Semiconductor package with offset die pad
US5869889A (en) * 1997-04-21 1999-02-09 Lsi Logic Corporation Thin power tape ball grid array package
TW449844B (en) * 1997-05-17 2001-08-11 Hyundai Electronics Ind Ball grid array package having an integrated circuit chip

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
US6246114B1 (en) * 1996-12-03 2001-06-12 Oki Electric Industry Co., Ltd. Semiconductor device and resin film
US6252298B1 (en) * 1997-06-18 2001-06-26 Samsung Electronics Co., Ltd. Semiconductor chip package using flexible circuit board with central opening
US6288444B1 (en) * 1998-11-17 2001-09-11 Fujitsu Limited Semiconductor device and method of producing the same
US6218731B1 (en) * 1999-05-21 2001-04-17 Siliconware Precision Industries Co., Ltd. Tiny ball grid array package
US6146924A (en) * 1999-08-06 2000-11-14 Vanguard International Semiconductor Corporation Magnetic insert into mold cavity to prevent resin bleeding from bond area of pre-mold (open cavity) plastic chip carrier during molding process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080000874A1 (en) * 2006-07-03 2008-01-03 Matsushita Electric Industrial Co., Ltd. Printed wiring board and method of manufacturing the same
US20120087099A1 (en) * 2010-10-08 2012-04-12 Samsung Electronics Co., Ltd. Printed Circuit Board For Board-On-Chip Package, Board-On-Chip Package Including The Same, And Method Of Fabricating The Board-On-Chip Package

Also Published As

Publication number Publication date
EP1003214A2 (en) 2000-05-24
US6288444B1 (en) 2001-09-11
JP2000150730A (en) 2000-05-30
KR20000034871A (en) 2000-06-26
EP1003214A3 (en) 2002-09-11

Similar Documents

Publication Publication Date Title
US6288444B1 (en) Semiconductor device and method of producing the same
US6559536B1 (en) Semiconductor device having a heat spreading plate
US6333564B1 (en) Surface mount type semiconductor device and method of producing the same having an interposing layer electrically connecting the semiconductor chip with protrusion electrodes
EP0915505B1 (en) Semiconductor device package, manufacturing method thereof and circuit board therefor
KR100384260B1 (en) Semiconductor device and manufacturing method of the same
KR0152700B1 (en) Semiconductor device moulding capable of accomplishing a high moisture-proof
KR100342455B1 (en) Semiconductor device and method of manufacturing the same
US6432742B1 (en) Methods of forming drop-in heat spreader plastic ball grid array (PBGA) packages
US5498902A (en) Semiconductor device and its manufacturing method
JP2875139B2 (en) Method for manufacturing semiconductor device
US6965157B1 (en) Semiconductor package with exposed die pad and body-locking leadframe
US6204564B1 (en) Semiconductor device and method for making the same
US8614119B2 (en) Semiconductor device with heat spreader
US20020105070A1 (en) Semiconductor device, manufacturing method thereof and mounting board
US5757068A (en) Carrier film with peripheral slits
US6429372B1 (en) Semiconductor device of surface mounting type and method for fabricating the same
US20080083981A1 (en) Thermally Enhanced BGA Packages and Methods
US20020149027A1 (en) Semiconductor device and its manufacture, and semiconductor device packaging structure
JP2011061055A (en) Method of manufacturing semiconductor device
JP3281864B2 (en) Manufacturing method of hybrid integrated circuit device
JPH03161957A (en) Semiconductor device
JPH08255853A (en) Electronic component mounting device
JP2001160603A (en) Semiconductor device and its manufacturing method
JP2000100990A (en) Manufacture of semiconductor device
JPH11224916A (en) Semiconductor device, wiring board, and manufacture thereof

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO PAY ISSUE FEE