US20020009882A1 - Method of manufacturing a contact plug in a semiconductor device - Google Patents

Method of manufacturing a contact plug in a semiconductor device Download PDF

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US20020009882A1
US20020009882A1 US09/879,555 US87955501A US2002009882A1 US 20020009882 A1 US20020009882 A1 US 20020009882A1 US 87955501 A US87955501 A US 87955501A US 2002009882 A1 US2002009882 A1 US 2002009882A1
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contact plug
semiconductor device
seg
manufacturing
gas
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US09/879,555
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US6399488B2 (en
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Dong Shin
Woo Cheong
Bong Kim
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SK Hynix Inc
Intellectual Discovery Co Ltd
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Assigned to HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. reassignment HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEONG, WOO SEOK, KIM, BONG SOO, SHIN, DONG SUK
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Assigned to INTELLECTUAL DISCOVERY CO., LTD. reassignment INTELLECTUAL DISCOVERY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SK HYNIX INC
Assigned to SK HYNIX INC reassignment SK HYNIX INC CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: HYNIX SEMICONDUCTOR, INC.
Assigned to HYNIX SEMICONDUCTOR, INC. reassignment HYNIX SEMICONDUCTOR, INC. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: HYUNDAI ELECTRONICS INDUSTRIES CO., LTD.
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H01L21/28562—Selective deposition

Definitions

  • the invention relates generally to a method of manufacturing a contact plug in a semiconductor device. More particularly, the present invention relates to a method of manufacturing a contact plug in a semiconductor device, which can reduce the resistance of a contact plug by preventing reduction in the impurity concentration of the contact plug formed by selective epitaxial growth (SEG) method.
  • SEG selective epitaxial growth
  • the disclosed method is a method of manufacturing a contact plug in a semiconductor device capable of improving an electrical characteristic of the device, by which an impurity such as phosphorous (P) is thermally doped in-situ to increase the concentration of the impurity during the process of forming a contact plug by SEG method and after it is formed, in order to prevent an increase in resistance due to reduction in the impurity concentration of a contact plug formed by SEG method.
  • an impurity such as phosphorous (P)
  • the disclosed method comprises the steps of growing a SEG contact plug on a semiconductor substrate in which various components for forming a semiconductor device is formed by means of selective growth method, thermally doping the impurity during when the SEG contact plug is grown, and thermally doping the impurity after the SEG contact plug is grown.
  • the SEG contact plug is formed using a polysilicon layer.
  • the thermal doping is performed using H 2 and PH 3 gas at a temperature ranging from about 800° C. to about 950° C. under a pressure ranging from about 20 Torr to about 200 Torr.
  • the PH 3 gas is diluted by about 1% to about 10% using H 2 gas and is then supplied at a flow rate ranging from about 100 sccm to about 5000 sccm.
  • the input flow of said H 2 gas ranges from about 1 slm to about 10 slm.
  • the thermal doping during when the contact plug is formed is implemented after an initial contact plug formation to an initial thickness ranging from about 100 ⁇ to about 500 ⁇ by means of the selective growth method.
  • FIGS. 1A to 1 C are cross-sectional views for explaining a method of manufacturing a contact plug in a semiconductor device according to the disclosed method.
  • FIGS. 1A to 1 C are cross-sectional views for explaining a method of manufacturing a contact plug in a semiconductor device according to the disclosed methodology.
  • an interlayer insulating film 30 is formed on a semiconductor substrate 10 in which a device separation film 20 is formed. Then, the interlayer insulating film 30 is patterned to expose the junction surface of the semiconductor substrate 10 , thus forming a contact hole.
  • impurity is thermally doped into a SEG silicon layer for contact plug 40 while the SEG silicon layer for contact plug 40 is grown on the exposed surface of the semiconductor substrate 10 .
  • the thermal doping is performed when the SEG silicon layer for contact plug has been initially grown to a thickness ranging from about 100 ⁇ to about 500 ⁇ and is performed using PH 3 and H 2 gases at a temperature ranging from about 800° C. to about 950° C. under a pressure ranging from about 20 Torr to about 200 Torr.
  • the inlet flow rate of the H 2 gas is in the range of about 1 SLM to about 10 SLM.
  • the PH 3 gas is supplied in a flow rate ranging from about 100 sccm to about 5000 sccm by diluting the H 2 gas by about 1% to about 10%.
  • Resistance of an initially grown SEG polysilicon layer may increase due to defects. However, as the initially grown SEG polysilicon layer is thermally doped, resistance at the portion in which the SEG polysilicon layer contacts silicon can be minimized.
  • the SEG silicon layer for contact plug is completely grown to fill the contact hole formed in the interlayer insulating film 30 . Then, the thermal doping performing in FIG. 1B is performed again.
  • the concentration of phosphorous (P) in polysilicon is 1E21 atoms/cc, but the impurity concentration of the SEG polysilicon layer that is grown for forming a contact plug is more than 1E20 atoms/cc.
  • the SEG polysilicon layer will not be doped. This phenomenon acts to increase the resistance in the contact plug, thus causing the operation to degrade and, consequently performance of the device.
  • the disclosed method prevents an increase in the resistance components by reducing the impurity concentration.
  • the process for compensating for the impurity concentration by implementing the thermal doping during when the SEG polysilicon layer is grown and after it was grown, may be applied to a process, which employs various contact plugs such as a bit line contact plug in a memory device or a storage electrode contact plug in a capacitor.
  • the disclosed method can improve an electrical characteristic of a device by in-situ doping of the impurity during the process by which polysilicon for contact plug is grown by SEG method to form a contact plug and after the process, thus reducing the resistance.

Abstract

A method of manufacturing a contact plug in a semiconductor device is disclosed. In-situ thermal doping of an impurity such as phosphorous (P) during the process by which polysilicon for a contact plug is formed by selective growth method and after in-situ doping after the growth process is employed in order to increase the concentration of the impurity in the contact plug. As a result, the disclosed method can reduce the interfacial resistance at the plug to improve the electrical characteristics of a device of more than 1G bits.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The invention relates generally to a method of manufacturing a contact plug in a semiconductor device. More particularly, the present invention relates to a method of manufacturing a contact plug in a semiconductor device, which can reduce the resistance of a contact plug by preventing reduction in the impurity concentration of the contact plug formed by selective epitaxial growth (SEG) method. [0002]
  • 2. Description of the Prior Art [0003]
  • Using a plug select growth technology in a semiconductor device has been highly appreciated in view of reduction in cell size and simplification of process. In developing a DRAM device of more than 1G bits, however, in order to use the SEG process for forming a bit-line contact and a capacitor storage contact, the process condition are critical. [0004]
  • In a DRAM device of more than 1G bits, it is difficult to apply polysilicon that has been usually used as a contact plug since its contact area is miniaturized. As the area of the contact is reduced, the contact resistance is further increased. Thus, there is a difficulty in using polysilicon as a contact plug. In other words, in case of using a plug SEG that is grown in the same single crystal to the silicon substrate, an increase in resistance depending on reduction in the contact area can be prohibited by minimizing an interfacial resistance with the silicon. [0005]
  • In case of SEG, however, phosphorous (P) is not doped by more than 1E20 atoms/cc, whereas the doping concentration of phosphorous (P) is more than 1E21 atoms/cc in polysilicon. This will cause increase in resistance when the SEG plug process is actually used. [0006]
    • SUMMARY OF THE DISCLOSURE
  • The disclosed method is a method of manufacturing a contact plug in a semiconductor device capable of improving an electrical characteristic of the device, by which an impurity such as phosphorous (P) is thermally doped in-situ to increase the concentration of the impurity during the process of forming a contact plug by SEG method and after it is formed, in order to prevent an increase in resistance due to reduction in the impurity concentration of a contact plug formed by SEG method. [0007]
  • The disclosed method comprises the steps of growing a SEG contact plug on a semiconductor substrate in which various components for forming a semiconductor device is formed by means of selective growth method, thermally doping the impurity during when the SEG contact plug is grown, and thermally doping the impurity after the SEG contact plug is grown. [0008]
  • In the above step, the SEG contact plug is formed using a polysilicon layer. The thermal doping is performed using H[0009] 2 and PH3 gas at a temperature ranging from about 800° C. to about 950° C. under a pressure ranging from about 20 Torr to about 200 Torr. The PH3 gas is diluted by about 1% to about 10% using H2 gas and is then supplied at a flow rate ranging from about 100 sccm to about 5000 sccm. The input flow of said H2 gas ranges from about 1 slm to about 10 slm.
  • The thermal doping during when the contact plug is formed is implemented after an initial contact plug formation to an initial thickness ranging from about 100 Å to about 500 Å by means of the selective growth method.[0010]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The aforementioned aspects and other features of the disclosed method will be explained in the following description, taken in conjunction with the accompanying drawings, wherein: [0011]
  • FIGS. 1A to [0012] 1C are cross-sectional views for explaining a method of manufacturing a contact plug in a semiconductor device according to the disclosed method.
    • DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENTS
  • The disclosed method will be described in detail by way of a preferred embodiment with reference to accompanying drawings, in which like reference numerals are used to identify the same or similar parts. [0013]
  • FIGS. 1A to [0014] 1C are cross-sectional views for explaining a method of manufacturing a contact plug in a semiconductor device according to the disclosed methodology.
  • Referring now to FIG. 1A, an interlayer [0015] insulating film 30 is formed on a semiconductor substrate 10 in which a device separation film 20 is formed. Then, the interlayer insulating film 30 is patterned to expose the junction surface of the semiconductor substrate 10, thus forming a contact hole.
  • Referring now to FIG. 1B, impurity is thermally doped into a SEG silicon layer for contact plug [0016] 40 while the SEG silicon layer for contact plug 40 is grown on the exposed surface of the semiconductor substrate 10. The thermal doping is performed when the SEG silicon layer for contact plug has been initially grown to a thickness ranging from about 100 Å to about 500 Å and is performed using PH3 and H2 gases at a temperature ranging from about 800° C. to about 950° C. under a pressure ranging from about 20 Torr to about 200 Torr. The inlet flow rate of the H2 gas is in the range of about 1 SLM to about 10 SLM. The PH3 gas is supplied in a flow rate ranging from about 100 sccm to about 5000 sccm by diluting the H2 gas by about 1% to about 10%.
  • Resistance of an initially grown SEG polysilicon layer may increase due to defects. However, as the initially grown SEG polysilicon layer is thermally doped, resistance at the portion in which the SEG polysilicon layer contacts silicon can be minimized. [0017]
  • Referring now to FIG. 1C, the SEG silicon layer for contact plug is completely grown to fill the contact hole formed in the [0018] interlayer insulating film 30. Then, the thermal doping performing in FIG. 1B is performed again.
  • Generally, the concentration of phosphorous (P) in polysilicon is 1E21 atoms/cc, but the impurity concentration of the SEG polysilicon layer that is grown for forming a contact plug is more than 1E20 atoms/cc. Thus, the SEG polysilicon layer will not be doped. This phenomenon acts to increase the resistance in the contact plug, thus causing the operation to degrade and, consequently performance of the device. By implementing the thermal doping to implant the impurity during when the SEG polysilicon layer for contact plug [0019] 40 is grown and after it was grown, the disclosed method prevents an increase in the resistance components by reducing the impurity concentration.
  • The process for compensating for the impurity concentration by implementing the thermal doping during when the SEG polysilicon layer is grown and after it was grown, may be applied to a process, which employs various contact plugs such as a bit line contact plug in a memory device or a storage electrode contact plug in a capacitor. [0020]
  • As mentioned above, the disclosed method can improve an electrical characteristic of a device by in-situ doping of the impurity during the process by which polysilicon for contact plug is grown by SEG method to form a contact plug and after the process, thus reducing the resistance. [0021]
  • The present invention has been described with reference to a particular embodiment in connection with a particular application. Those having ordinary skill in the art and access to the teachings of the present invention will recognize additional modifications and applications within the scope thereof. [0022]
  • It is therefore intended by the appended claims to cover any and all such applications, modifications, and embodiments within the scope of the present invention. [0023]

Claims (7)

What is claimed:
1. A method of manufacturing a contact plug in a semiconductor device, comprising:
growing a SEG contact plug on a semiconductor substrate in which various components for forming a semiconductor device is formed by means of a selective growth method;
thermally doping the SEG contact plug with an impurity during the step of growing the SEG contact plug is grown; and
thermally doping the SEG contact plug with an impurity after said SEG contact plug is grown.
2. The method of manufacturing a contact plug in a semiconductor device according to claim 1, wherein said SEG contact plug is formed using a polysilicon layer.
3. The method of manufacturing a contact plug in a semiconductor device according to claim 1, wherein at least one of said thermal doping steps is performed using H2 and PH3 gas at the temperature ranging from about 800° C. to about 950° C. under a pressure ranging from about 20 Torr to about 200 Torr.
4. The method of manufacturing a contact plug in a semiconductor device according to claim 3, wherein said PH3 gas is diluted by about 1% to about 10% with H2 gas and the diluted PH3 gas is then supplied at a flow rate ranging from about 100 sccm to about 5000 sccm.
5. The method of manufacturing a contact plug in a semiconductor device according to claim 3, wherein an input flow of said H2 gas ranges from about 1 slm to about 10 slm.
6. The method of manufacturing a contact plug in a semiconductor device according to claim 1, wherein the thermal doping during when said contact plug is formed is implemented after an initial formation of the contact plug to an initial thickness ranging from about 100 Å to about 500 Å by means of a selective growth method.
7. A semiconductor device comprising a contact plug, the semiconductor device and plug being manufactured in accordance with the method of claim 1.
US09/879,555 2000-06-27 2001-06-12 Method of manufacturing a contact plug in a semiconductor device Expired - Lifetime US6399488B2 (en)

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KR2000-35680 2000-06-27
KR00-35680 2000-06-27
KR10-2000-0035680A KR100407683B1 (en) 2000-06-27 2000-06-27 Method of forming a contact plug in a semiconductor device

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
US20050142867A1 (en) * 2003-12-24 2005-06-30 Hynix Semiconductor Inc. Method for forming polysilicon plug of semiconductor device
US20080286967A1 (en) * 2007-05-18 2008-11-20 Atmel Corporation Method for fabricating a body to substrate contact or topside substrate contact in silicon-on-insulator devices
CN106158616A (en) * 2014-08-08 2016-11-23 爱思开海力士有限公司 3 D semiconductor IC-components and manufacture method thereof
US9653472B2 (en) 2014-08-22 2017-05-16 Samsung Electronics Co., Ltd. Semiconductor device, method of fabricating the semiconductor device, and method of forming epitaxial layer

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KR20010035857A (en) * 1999-10-04 2001-05-07 윤종용 semiconductor device and method for manufacturing the same
US8815735B2 (en) 2012-05-03 2014-08-26 Nanya Technology Corporation Semiconductor device and method of manufacturing the same

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US7119015B2 (en) * 2003-12-24 2006-10-10 Hynix Semiconductor Inc. Method for forming polysilicon plug of semiconductor device
US20080286967A1 (en) * 2007-05-18 2008-11-20 Atmel Corporation Method for fabricating a body to substrate contact or topside substrate contact in silicon-on-insulator devices
CN106158616A (en) * 2014-08-08 2016-11-23 爱思开海力士有限公司 3 D semiconductor IC-components and manufacture method thereof
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US9653472B2 (en) 2014-08-22 2017-05-16 Samsung Electronics Co., Ltd. Semiconductor device, method of fabricating the semiconductor device, and method of forming epitaxial layer

Also Published As

Publication number Publication date
DE10104780B4 (en) 2009-07-23
KR100407683B1 (en) 2003-12-01
DE10104780A1 (en) 2002-01-31
JP4583646B2 (en) 2010-11-17
JP2002025936A (en) 2002-01-25
US6399488B2 (en) 2002-06-04
KR20020001246A (en) 2002-01-09

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