US20020017676A1 - Microelectronic structure - Google Patents

Microelectronic structure Download PDF

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US20020017676A1
US20020017676A1 US09/878,735 US87873501A US2002017676A1 US 20020017676 A1 US20020017676 A1 US 20020017676A1 US 87873501 A US87873501 A US 87873501A US 2002017676 A1 US2002017676 A1 US 2002017676A1
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conductive layer
oxygen
microelectronic structure
group
substrate
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Rainer Bruchhaus
Robert Primig
Carlos Mazure-Espejo
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/75Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material

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  • the invention is in the field of semiconductor technology and relates to a microelectronic structure which has at least one substrate and one first conductive layer. Microelectronic structures such as these are used in particular in semiconductor memories.
  • Oxygen-resistant noble metals in particular, have been proposed as electrode materials. Since noble metals such as these, in particular the preferred platinum, form interfering metal suicides with silicon, a barrier layer which is normally disposed between the electrode and the silicon substrate or polysilicon layer is intended to prevent the silicon from diffusing into the platinum electrode.
  • the barrier layer is formed of titanium or a titanium-titanium nitride.
  • One option is, for example, to bury the barrier in an oxygen-resistant nitride layer, and this is proposed, for example, in U.S. Pat. No. 5,619,393.
  • the barrier layer is surrounded in the form of a collar by the nitride layer, and its upper face is completely covered by the electrode, which extends to beyond the collar.
  • production of such a structure involves a relatively large number of process steps.
  • a further option of avoiding the problem of oxidation of the barrier layer is to use a structure in which the upper electrode, rather than the lower electrode, is connected via a conductive layer to the associated selection transistor. This makes it possible to dispense with a conductive barrier layer underneath the lower electrode.
  • the structure which is described, for example, in U.S. Pat. No. 5,122,477, has the disadvantage that it occupies a relatively large amount of space and is thus unsuitable for very large scale integrated memory components.
  • a microelectronic structure contains at least one substrate and a first conductive layer disposed on the substrate.
  • the first conductive layer is composed of at least one basic material having at least one oxygen-bonding additive containing at least one element selected from the group consisting of Group IVb elements and lanthanum group elements.
  • a second conductive layer is disposed on the first conductive layer and contains a noble metal.
  • a metal oxide dielectric at least partially covers the second conductive layer.
  • the object is achieved according to the invention in the case of a microelectronic structure of the type mentioned initially by the first conductive layer being composed of at least one basic material having at least one oxygen-bonding additive, which contains at least one element from Group IVb or from the lanthanum group.
  • the basic idea of the invention is to provide a conductive layer with suitable oxygen-bonding additives. These are intended to prevent diffusion of oxygen and/or of oxides which assist diffusion, and thus to protect those structures which are located under the conductive layer against oxidation.
  • the first conductive layer is composed of at least one basic material which is electrically conductive and, is very largely oxygen-resistant, and in which the oxygen-bonding additive is distributed as uniformly as possible. The important feature is that the oxygen-bonding additive is present even before the action of the oxygen on the structures to be protected in the basic material and thus prevents oxygen diffusion through the first conductive layer.
  • the at least one oxygen-bonding additive forms an alloy or a mixed layer with the basic material, which may be formed of one or more components, in which case the oxygen-bonding additive may also at least partially be present in the form of a finely distributed deposit in the basic material.
  • the advantages of a uniform distribution of the oxygen-bonding additive are, in particular, the uniform oxygen resorption capability of the first conductive layer, the adaptation of the resorption capability by variation of the layer thickness of the first conductive layer and a uniform and very largely stress-free increase in volume due to the oxygen bonding.
  • Elements from Group IVb and from the lanthanum group have been found to be particularly advantageous as oxygen-bonding additives, with zirconium, hafnium, cerium or a combination of the elements being particularly preferred. It is also advantageous for the oxygen-bonding additive to be added to the basic material with a proportion by weight of between 0.5% and 20%, preferably of between 1% and 10%.
  • Suitable basic materials for the first conductive layer are noble metals, in particular platinum, palladium, rhodium, iridium, ruthenium, osmium, rhenium, conductive oxides of the abovementioned metals or a mixture of the abovementioned compounds and elements.
  • the microelectronic structure prefferably has a metal oxide dielectric that at least partially covers the first conductive layer.
  • the metal oxide dielectric is used, in particular in semiconductor memories, as a capacitive dielectric, with the first conductive layer being at least part of one electrode of the storage capacitor. Since the metal oxide dielectric is normally applied directly to the first conductive layer, any barrier layer which is preferably located underneath the first conductive layer must be protected against attack by oxygen while it is being deposited in an atmosphere containing oxygen.
  • the metal oxide dielectric preferably contains a compound of the general nature ABO, where O represents oxygen, and A and B each represent at least one element in the group containing barium, strontium, tantalum, titanium, lead, zirconium, niobium, lanthanum, calcium and potassium.
  • ABO often has a crystal structure similar to perovskite, which is a critical factor for the desired dielectric (high dielectric constant) characteristics or for the ferroelectric characteristics.
  • perovskite is a critical factor for the desired dielectric (high dielectric constant) characteristics or for the ferroelectric characteristics.
  • SrBi 2 Ta 2 O 9 is SrBi 2 Ta 2 O 9 .
  • a second conductive layer which preferably contains a noble metal, in particular platinum, is preferably disposed between the first conductive layer and the metal oxide dielectric in order to improve the electrical characteristics of the metal oxide dielectric.
  • the additional conductive layer first represents an inert and smooth boundary surface for the growth of the metal oxide dielectric, and second assists the crystal growth of the metal oxide dielectric during its deposition and during subsequent heat treatment and, furthermore, provides additional oxidation protection.
  • the bonding capacity of the first conductive layer with regard to oxygen should be set as appropriate by choice of the amount of additive, so that no further additional layers to prevent oxygen diffusion are required.
  • An additive level of between 8 and 10%, for example, is sufficient to prevent the oxygen diffusion, which occurs during deposition and heat treatment of the metal oxide dielectrics, through the first conductive layer, whose thickness is about 100 nm, virtually completely.
  • the first conductive layer may thus be thinner, in order to save costs.
  • a barrier layer is disposed between the first conductive layer and the substrate.
  • the barrier layer contains titanium.
  • a method for producing the microelectronic structure includes the steps of preparing a substrate, and simultaneously applying a basic material and a oxygen-bonding additive to the substrate to form a first conductive layer.
  • the oxygen-bonding additive contains at least one element selected from the group consisting of Group IVb elements and lanthanum group elements.
  • a second conductive layer is deposited onto the first conductive layer, the second conductive layer contains a noble metal such as platinum. Finally, a metal oxide dielectric is applied to the second conductive layer.
  • the second part of the object is achieved by the method for producing a microelectronic structure which has at least one substrate and a first conductive layer, with the first conductive layer being composed of at least one basic material having at least one oxygen-bonding additive which contains at least one element from Group IVb or from the lanthanum group.
  • the method includes the steps of preparing a substrate, the simultaneous application of the basic material and of the oxygen-bonding additive to the substrate in order to form the first conductive layer.
  • the basic material and the oxygen-bonding additive are preferably applied to the substrate at the same time, so that the first conductive layer is formed there as a mixture of the basic material and of the oxygen-bonding additive. If the deposition temperatures and the additive level of the oxygen-bonding additive are selected appropriately, the latter can at least partially be deposited from the basic material, or can form a mixed crystal together with the basic material.
  • a pressure of about 0.02 mbar and a substrate temperature of about 200° C. are preferably used for producing an iridium layer with an oxygen-bonding hafnium additive.
  • the metal oxide dielectric is applied by metal organic chemical vapor deposition (MOCVD) methods or spin-on methods.
  • MOCVD metal organic chemical vapor deposition
  • the microelectronic structure is preferably used in a memory apparatus, with the first conductive layer representing a first electrode which, together with a further electrode and the metal oxide dielectric that is disposed between these electrodes, forms a storage capacitor.
  • the first conductive layer representing a first electrode which, together with a further electrode and the metal oxide dielectric that is disposed between these electrodes, forms a storage capacitor.
  • a large number of such storage capacitors are preferably disposed on one substrate.
  • the microelectronic structure is generally suitable for use as an oxygen diffusion barrier, in order to protect oxygen-sensitive areas of the microelectronic structure, in particular a semiconductor structure, against attack by oxygen.
  • FIG. 1 is a diagrammatic, partial, sectional view of a storage capacitor using a microelectronic structure according to the invention
  • FIG. 2 is a partial, sectional view of a second embodiment of the storage capacitor
  • FIG. 3 is a partial, sectional view of a third embodiment of the storage capacitor.
  • FIG. 4 is an illustration of a sputtering reactor for producing the microelectronic structure.
  • FIG. 1 there is shown a storage capacitor 5 which is disposed on a substrate 10 .
  • the storage capacitor 5 contains a lower electrode 15 , which is formed in layers from an iridium oxide layer 20 , an iridium layer 25 and a platinum layer 30 .
  • a lower electrode 15 which is formed in layers from an iridium oxide layer 20 , an iridium layer 25 and a platinum layer 30 .
  • the iridium oxide layer 20 and the iridium layer 25 represent a first conductive layer.
  • At least one of the iridium oxide 20 or iridium layers 25 contains an oxygen-bonding additive, which is preferably formed by hafnium. Depending on its additive level of between 1% and 10%, this can form a mixed crystal with the respective layer or may be partially present in the form of a deposit.
  • the platinum layer 30 represents a second conductive layer in the present embodiment.
  • the lower electrode 15 which is formed in layers, was preferably structured by jointly etching the three layers 20 , 25 and 30 . This is done, for example, by an anisotropic etching process with a high physical component that is achieved, for example, in an argon sputtering process. Chlorine or hydrogen bromide (HBr) can be added to the argon plasma to assist the process.
  • HBr hydrogen bromide
  • a barrier layer 35 containing titanium is located underneath the lower electrode 15 . It is used to improve the adhesion characteristics of the lower electrode 15 on the substrate 10 , and to prevent silicon diffusion. This is particularly necessary since the lower electrode 15 is connected through a contact hole 40 (which is filled with polysilicon) in the substrate 10 to a selection transistor, which is not illustrated here in any more detail.
  • a barrier layer 35 which is formed of titanium-titanium nitride, is preferably structured jointly together with the lower electrode 15 . Therefore, only a single etching step is required for the structure containing the lower electrode 15 and the barrier layer 35 .
  • the lower electrode 15 is completely covered by a SBT layer 45 , with the latter representing a metal oxide dielectric.
  • the SBT layer 45 thus also makes direct contact with the edge areas of the barrier layer 35 . Therefore, these areas are not protected during the deposition of the SBT layer 45 .
  • the entire barrier layer 35 is not oxidized, but only those areas that are directly adjacent to the SBT layer 45 .
  • the central area of the barrier layer 35 which is located in particular in the area of the contact hole 40 , is protected against oxidation by the lower electrode disposed above it and in particular by the hafnium additive contained in the iridium oxide layer 20 or the iridium layer 25 .
  • the iridium layer 25 itself acts as a protective layer, since iridium is at least partially oxidized in the SBT process conditions (about 800° C., atmosphere containing oxygen), and thus impedes oxygen diffusion.
  • a further electrode 50 is deposited over the entire area onto the SBT layer 45 . Together with the lower electrode 15 and the SBT layer 45 , the further electrode 50 forms the ferroelectric storage capacitor 5 .
  • FIG. 2 A second embodiment of the structure is illustrated in FIG. 2 and allows the barrier layer 35 to be protected better.
  • the platinum layer 30 also covers the side areas of the layer stack containing the barrier layer 35 , the iridium oxide layer 20 and the iridium layer 25 , so that the SBT layer 45 does not make direct contact with the barrier layer 35 .
  • Another advantageous feature of the structure is that the entire boundary surface between the lower electrode 15 and the SBT layer 45 is formed by the platinum layer 30 , and the boundary surface characteristics and the storage characteristics of the SBT layer 45 are thus improved.
  • FIG. 3 illustrates a third embodiment of the structure.
  • the barrier layer 35 is formed only in the area of the contact hole 40 , so that the barrier layer 35 is completely covered by the iridium oxide layer 20 .
  • the barrier layer 35 is thus completely protected against oxidation during the SBT deposition.
  • the platinum layer 30 can also be continued over the side areas of the iridium oxide layer 20 and of the iridium layer 25 , in order to improve the capacitor characteristics.
  • FIG. 4 A sputtering reactor 55 is illustrated schematically here, having a substrate mount 60 and a target holder 65 , which at the same time act as the cathode and anode, respectively.
  • a silicon wafer 70 which subsequently forms the substrate 10 , is located on the substrate mount 60 .
  • An iridium wafer 75 with hafnium wafers 80 placed on it is attached to the target holder 65 , which is disposed opposite the silicon wafer 70 . Together, the wafers represent the common source during the sputtering process.
  • the proportion of hafnium that is deposited can be set by choice of the wafer size of the hafnium wafer.
  • Hafnium and iridium are precipitated jointly from the respective sources by the argon plasma produced in the sputtering reactor 55 , and are applied as a mixture to the silicon wafer 70 . It is also possible to replace the iridium wafer 75 by an iridium oxide wafer.
  • the wafer can be heated by heating applied from underneath the wafer.
  • Advantageous temperatures are in the range 200° to 500° C.

Abstract

A microelectronic structure is described which contains a first conductive layer for preventing oxygen diffusion at the structure. The first conductive layer contains a base material and at least one oxygen-binding admixture that is provided with at least one element from the fourth subgroup or the lanthane group. In a preferred embodiment, the microelectronic structure is used in semiconductor storage components with a metal oxide dielectric as a condenser dielectric.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • This application is a continuation of copending International Application No. PCT/DE99/03832, filed Dec. 1, 1999, which designated the United States.[0001]
  • BACKGROUND OF THE INVENTION
  • Field of the Invention [0002]
  • The invention is in the field of semiconductor technology and relates to a microelectronic structure which has at least one substrate and one first conductive layer. Microelectronic structures such as these are used in particular in semiconductor memories. [0003]
  • Materials having a high dielectric constant (Epsilon>20) or having ferroelectric characteristics are being increasingly used in order to further increase the integration density in semiconductor memories. Those materials which are of major interest at the moment are metal oxide dielectrics, which are deposited at relatively high temperatures in the presence of oxygen. Prominent representatives are, for example, barium-strontium-titanate ((Ba,Sr)TiO[0004] 3, BST), lead-zirconate-titanate (PbZrTiO3, PZT), strontium-bismuth-tantalate (SrBi2Ta2O9, SBT) and derivatives of the above mentioned materials. The high deposition temperatures required and the oxygen atmosphere that is present pose stringent requirements on the already formed structures on the semiconductor substrates, in particular on the lower electrode of the storage capacitor and on any barrier layer located under the electrode. Oxygen-resistant noble metals, in particular, have been proposed as electrode materials. Since noble metals such as these, in particular the preferred platinum, form interfering metal suicides with silicon, a barrier layer which is normally disposed between the electrode and the silicon substrate or polysilicon layer is intended to prevent the silicon from diffusing into the platinum electrode. The barrier layer is formed of titanium or a titanium-titanium nitride.
  • However, this has the disadvantage that the titanium oxidizes relatively quickly at relatively high deposition temperatures (above 500° C.) and in consequence prevents a conductive connection from being formed between the electrode and the silicon. A range of measures have thus been proposed in order to protect the barrier layer against oxidation during the deposition of the metal oxides. [0005]
  • One option is, for example, to bury the barrier in an oxygen-resistant nitride layer, and this is proposed, for example, in U.S. Pat. No. 5,619,393. In this solution, the barrier layer is surrounded in the form of a collar by the nitride layer, and its upper face is completely covered by the electrode, which extends to beyond the collar. However, production of such a structure involves a relatively large number of process steps. A further option of avoiding the problem of oxidation of the barrier layer is to use a structure in which the upper electrode, rather than the lower electrode, is connected via a conductive layer to the associated selection transistor. This makes it possible to dispense with a conductive barrier layer underneath the lower electrode. However, the structure, which is described, for example, in U.S. Pat. No. 5,122,477, has the disadvantage that it occupies a relatively large amount of space and is thus unsuitable for very large scale integrated memory components. [0006]
  • SUMMARY OF THE INVENTION
  • It is accordingly an object of the invention to provide a microelectronic structure which overcomes the above-mentioned disadvantages of the prior art devices of this general type, which allows simple and reliable protection of an oxygen-sensitive layer, and to specify a method for producing such a structure. [0007]
  • With the foregoing and other objects in view there is provided, in accordance with the invention, a microelectronic structure. The microelectronic structure contains at least one substrate and a first conductive layer disposed on the substrate. The first conductive layer is composed of at least one basic material having at least one oxygen-bonding additive containing at least one element selected from the group consisting of Group IVb elements and lanthanum group elements. A second conductive layer is disposed on the first conductive layer and contains a noble metal. A metal oxide dielectric at least partially covers the second conductive layer. [0008]
  • The object is achieved according to the invention in the case of a microelectronic structure of the type mentioned initially by the first conductive layer being composed of at least one basic material having at least one oxygen-bonding additive, which contains at least one element from Group IVb or from the lanthanum group. [0009]
  • The basic idea of the invention is to provide a conductive layer with suitable oxygen-bonding additives. These are intended to prevent diffusion of oxygen and/or of oxides which assist diffusion, and thus to protect those structures which are located under the conductive layer against oxidation. To this end, the first conductive layer is composed of at least one basic material which is electrically conductive and, is very largely oxygen-resistant, and in which the oxygen-bonding additive is distributed as uniformly as possible. The important feature is that the oxygen-bonding additive is present even before the action of the oxygen on the structures to be protected in the basic material and thus prevents oxygen diffusion through the first conductive layer. [0010]
  • Normally, the at least one oxygen-bonding additive forms an alloy or a mixed layer with the basic material, which may be formed of one or more components, in which case the oxygen-bonding additive may also at least partially be present in the form of a finely distributed deposit in the basic material. The advantages of a uniform distribution of the oxygen-bonding additive are, in particular, the uniform oxygen resorption capability of the first conductive layer, the adaptation of the resorption capability by variation of the layer thickness of the first conductive layer and a uniform and very largely stress-free increase in volume due to the oxygen bonding. [0011]
  • Elements from Group IVb and from the lanthanum group have been found to be particularly advantageous as oxygen-bonding additives, with zirconium, hafnium, cerium or a combination of the elements being particularly preferred. It is also advantageous for the oxygen-bonding additive to be added to the basic material with a proportion by weight of between 0.5% and 20%, preferably of between 1% and 10%. [0012]
  • Suitable basic materials for the first conductive layer are noble metals, in particular platinum, palladium, rhodium, iridium, ruthenium, osmium, rhenium, conductive oxides of the abovementioned metals or a mixture of the abovementioned compounds and elements. [0013]
  • It is also preferable for the microelectronic structure to have a metal oxide dielectric that at least partially covers the first conductive layer. The metal oxide dielectric is used, in particular in semiconductor memories, as a capacitive dielectric, with the first conductive layer being at least part of one electrode of the storage capacitor. Since the metal oxide dielectric is normally applied directly to the first conductive layer, any barrier layer which is preferably located underneath the first conductive layer must be protected against attack by oxygen while it is being deposited in an atmosphere containing oxygen. [0014]
  • The metal oxide dielectric preferably contains a compound of the general nature ABO, where O represents oxygen, and A and B each represent at least one element in the group containing barium, strontium, tantalum, titanium, lead, zirconium, niobium, lanthanum, calcium and potassium. The general compound ABO often has a crystal structure similar to perovskite, which is a critical factor for the desired dielectric (high dielectric constant) characteristics or for the ferroelectric characteristics. One example of such a compound is SrBi[0015] 2Ta2O9.
  • A second conductive layer, which preferably contains a noble metal, in particular platinum, is preferably disposed between the first conductive layer and the metal oxide dielectric in order to improve the electrical characteristics of the metal oxide dielectric. The additional conductive layer first represents an inert and smooth boundary surface for the growth of the metal oxide dielectric, and second assists the crystal growth of the metal oxide dielectric during its deposition and during subsequent heat treatment and, furthermore, provides additional oxidation protection. [0016]
  • The bonding capacity of the first conductive layer with regard to oxygen should be set as appropriate by choice of the amount of additive, so that no further additional layers to prevent oxygen diffusion are required. An additive level of between 8 and 10%, for example, is sufficient to prevent the oxygen diffusion, which occurs during deposition and heat treatment of the metal oxide dielectrics, through the first conductive layer, whose thickness is about 100 nm, virtually completely. The first conductive layer may thus be thinner, in order to save costs. [0017]
  • In accordance with an added feature of the invention, a barrier layer is disposed between the first conductive layer and the substrate. [0018]
  • In accordance with an additional feature of the invention, the barrier layer contains titanium. [0019]
  • With the foregoing and other objects in view there is further provided, in accordance with the invention, a method for producing the microelectronic structure. The method includes the steps of preparing a substrate, and simultaneously applying a basic material and a oxygen-bonding additive to the substrate to form a first conductive layer. The oxygen-bonding additive contains at least one element selected from the group consisting of Group IVb elements and lanthanum group elements. A second conductive layer is deposited onto the first conductive layer, the second conductive layer contains a noble metal such as platinum. Finally, a metal oxide dielectric is applied to the second conductive layer. [0020]
  • The second part of the object is achieved by the method for producing a microelectronic structure which has at least one substrate and a first conductive layer, with the first conductive layer being composed of at least one basic material having at least one oxygen-bonding additive which contains at least one element from Group IVb or from the lanthanum group. The method includes the steps of preparing a substrate, the simultaneous application of the basic material and of the oxygen-bonding additive to the substrate in order to form the first conductive layer. [0021]
  • In the method, the basic material and the oxygen-bonding additive are preferably applied to the substrate at the same time, so that the first conductive layer is formed there as a mixture of the basic material and of the oxygen-bonding additive. If the deposition temperatures and the additive level of the oxygen-bonding additive are selected appropriately, the latter can at least partially be deposited from the basic material, or can form a mixed crystal together with the basic material. [0022]
  • It is advantageous to apply the basic material and the oxygen-bonding additive to the substrate by a physical sputtering method. This is preferably done using a common source for the basic material and the oxygen-bonding additive, with this being achieved in a simple manner by a sputtering target which consists of the basic material and has wafers which contain the oxygen-bonding additive applied to it. Therefore, there is no need to provide a mixed source. In fact, it is easy to vary the nature of the oxygen-bonding additive and its additive level. [0023]
  • By way of example, a pressure of about 0.02 mbar and a substrate temperature of about 200° C. are preferably used for producing an iridium layer with an oxygen-bonding hafnium additive. [0024]
  • In accordance with an added mode of the invention, there is the step of applying the basic material and the oxygen-bonding additive to the substrate by a physical sputtering method using a common source. [0025]
  • Once the first conductive layer has been applied, the metal oxide dielectric is applied by metal organic chemical vapor deposition (MOCVD) methods or spin-on methods. [0026]
  • The microelectronic structure is preferably used in a memory apparatus, with the first conductive layer representing a first electrode which, together with a further electrode and the metal oxide dielectric that is disposed between these electrodes, forms a storage capacitor. A large number of such storage capacitors are preferably disposed on one substrate. [0027]
  • Furthermore, the microelectronic structure is generally suitable for use as an oxygen diffusion barrier, in order to protect oxygen-sensitive areas of the microelectronic structure, in particular a semiconductor structure, against attack by oxygen. [0028]
  • Other features which are considered as characteristic for the invention are set forth in the appended claims. [0029]
  • Although the invention is illustrated and described herein as embodied in a microelectronic structure, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims. [0030]
  • The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.[0031]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a diagrammatic, partial, sectional view of a storage capacitor using a microelectronic structure according to the invention; [0032]
  • FIG. 2 is a partial, sectional view of a second embodiment of the storage capacitor; [0033]
  • FIG. 3 is a partial, sectional view of a third embodiment of the storage capacitor; and [0034]
  • FIG. 4 is an illustration of a sputtering reactor for producing the microelectronic structure.[0035]
  • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • In all the figures of the drawing, sub-features and integral parts that correspond to one another bear the same reference symbol in each case. Referring now to the figures of the drawing in detail and first, particularly, to FIG. 1 thereof, there is shown a storage capacitor [0036] 5 which is disposed on a substrate 10. The storage capacitor 5 contains a lower electrode 15, which is formed in layers from an iridium oxide layer 20, an iridium layer 25 and a platinum layer 30. Optionally, it is also possible to use ruthenium oxide and ruthenium instead of iridium oxide and iridium. Together, the iridium oxide layer 20 and the iridium layer 25 represent a first conductive layer. At least one of the iridium oxide 20 or iridium layers 25 contains an oxygen-bonding additive, which is preferably formed by hafnium. Depending on its additive level of between 1% and 10%, this can form a mixed crystal with the respective layer or may be partially present in the form of a deposit.
  • The [0037] platinum layer 30 represents a second conductive layer in the present embodiment. The lower electrode 15, which is formed in layers, was preferably structured by jointly etching the three layers 20, 25 and 30. This is done, for example, by an anisotropic etching process with a high physical component that is achieved, for example, in an argon sputtering process. Chlorine or hydrogen bromide (HBr) can be added to the argon plasma to assist the process.
  • A [0038] barrier layer 35 containing titanium is located underneath the lower electrode 15. It is used to improve the adhesion characteristics of the lower electrode 15 on the substrate 10, and to prevent silicon diffusion. This is particularly necessary since the lower electrode 15 is connected through a contact hole 40 (which is filled with polysilicon) in the substrate 10 to a selection transistor, which is not illustrated here in any more detail. A barrier layer 35, which is formed of titanium-titanium nitride, is preferably structured jointly together with the lower electrode 15. Therefore, only a single etching step is required for the structure containing the lower electrode 15 and the barrier layer 35.
  • The [0039] lower electrode 15 is completely covered by a SBT layer 45, with the latter representing a metal oxide dielectric. The SBT layer 45 thus also makes direct contact with the edge areas of the barrier layer 35. Therefore, these areas are not protected during the deposition of the SBT layer 45. However, since the penetration depth of the oxygen diffusion into the barrier layer 35 is limited, the entire barrier layer 35 is not oxidized, but only those areas that are directly adjacent to the SBT layer 45. The central area of the barrier layer 35, which is located in particular in the area of the contact hole 40, is protected against oxidation by the lower electrode disposed above it and in particular by the hafnium additive contained in the iridium oxide layer 20 or the iridium layer 25. Furthermore, the iridium layer 25 itself acts as a protective layer, since iridium is at least partially oxidized in the SBT process conditions (about 800° C., atmosphere containing oxygen), and thus impedes oxygen diffusion.
  • After the application of the SBT layer, a [0040] further electrode 50 is deposited over the entire area onto the SBT layer 45. Together with the lower electrode 15 and the SBT layer 45, the further electrode 50 forms the ferroelectric storage capacitor 5.
  • A second embodiment of the structure is illustrated in FIG. 2 and allows the [0041] barrier layer 35 to be protected better. In this structure, the platinum layer 30 also covers the side areas of the layer stack containing the barrier layer 35, the iridium oxide layer 20 and the iridium layer 25, so that the SBT layer 45 does not make direct contact with the barrier layer 35. Another advantageous feature of the structure is that the entire boundary surface between the lower electrode 15 and the SBT layer 45 is formed by the platinum layer 30, and the boundary surface characteristics and the storage characteristics of the SBT layer 45 are thus improved.
  • FIG. 3 illustrates a third embodiment of the structure. In the structure, the [0042] barrier layer 35 is formed only in the area of the contact hole 40, so that the barrier layer 35 is completely covered by the iridium oxide layer 20. The barrier layer 35 is thus completely protected against oxidation during the SBT deposition. Optionally, in the structure, the platinum layer 30 can also be continued over the side areas of the iridium oxide layer 20 and of the iridium layer 25, in order to improve the capacitor characteristics.
  • It has been found that the oxygen absorption when using hafnium leads only to a relatively minor increase in the volume of the [0043] iridium oxide layer 20 and of the iridium layer 25, so that any mechanical stresses which occur in consequence do not lead to damage.
  • Reference is made to FIG. 4 in order to illustrate the method according to the invention for producing a microelectronic structure in which the first conductive layer is formed of a basic material and an oxygen-bonding additive. A sputtering [0044] reactor 55 is illustrated schematically here, having a substrate mount 60 and a target holder 65, which at the same time act as the cathode and anode, respectively. A silicon wafer 70, which subsequently forms the substrate 10, is located on the substrate mount 60. An iridium wafer 75 with hafnium wafers 80 placed on it is attached to the target holder 65, which is disposed opposite the silicon wafer 70. Together, the wafers represent the common source during the sputtering process. The proportion of hafnium that is deposited can be set by choice of the wafer size of the hafnium wafer. Hafnium and iridium are precipitated jointly from the respective sources by the argon plasma produced in the sputtering reactor 55, and are applied as a mixture to the silicon wafer 70. It is also possible to replace the iridium wafer 75 by an iridium oxide wafer.
  • In order to improve the adhesion strength of the sputtered layers on the [0045] silicon wafer 70, the wafer can be heated by heating applied from underneath the wafer. Advantageous temperatures are in the range 200° to 500° C.

Claims (15)

We claim:
1. A microelectronic structure, comprising:
at least one substrate;
a first conductive layer disposed on said substrate, said first conductive layer composed of at least one basic material having at least one oxygen-bonding additive containing at least one element selected from the group consisting of Group IVb elements and lanthanum group elements;
a second conductive layer disposed on said first conductive layer and containing a noble metal; and
a metal oxide dielectric at least partially covering said second conductive layer.
2. The microelectronic structure according to claim 1, wherein said oxygen-bonding additive is selected from the group consisting of zirconium, hafnium, cerium and a combination of zirconium, hafnium and cerium.
3. The microelectronic structure according to claim 1, wherein said oxygen-bonding additive forms a proportion by weight of said first conductive layer of between 0.5% and 20%.
4. The microelectronic structure according to claim 1, wherein said basic material is a noble metal selected from the group consisting of platinum, palladium, rhodium, iridium, ruthenium, osmium, rhenium, a conductive oxide of the abovementioned metals, and a mixture of the abovementioned compounds and elements.
5. The microelectronic structure according to claim 1, including a barrier layer disposed between said first conductive layer and said substrate.
6. The microelectronic structure according to claim 5, wherein said barrier layer contains titanium.
7. The microelectronic structure according to claim 1, wherein said noble metal is platinum.
8. The microelectronic structure according to claim 1, wherein said oxygen-bonding additive forms a proportion by weight of said first conductive layer of between 1% and 10%.
9. A method for producing a microelectronic structure, which comprises the steps of:
preparing a substrate;
simultaneously applying a basic material and a oxygen-bonding additive to the substrate to form a first conductive layer, the oxygen-bonding additive containing at least one element selected from the group consisting of Group IVb elements and lanthanum group elements;
depositing a second conductive layer onto the first conductive layer, the second conductive layer containing a noble metal; and
applying a metal oxide dielectric to the second conductive layer.
10. The method according to claim 9, which comprises applying the basic material and the oxygen-bonding additive to the substrate by a physical sputtering method using a common source.
11. The method according to claim 9, wherein the basic material is formed from a noble metal selected from the group consisting of platinum, palladium, rhodium, iridium, ruthenium, osmium, rhenium, a conductive oxide of the abovementioned metals, and a mixture of the abovementioned compounds and elements.
12. The method according to claim 9, wherein the oxygen-bonding additive forms a proportion by weight of the first conductive layer of between 0.5% and 20%.
13. The method according to claim 9, wherein the oxygen-bonding additive forms a proportion by weight of the first conductive layer of between 1% and 10%.
14. The method according to claim 9, which comprises using one of zirconium, hafnium, cerium and a combination of zirconium, hafnium and cerium as the oxygen-bonding additive.
15. A method of producing a memory circuit, which comprises the steps of:
forming a microelectronic structure containing:
at least one substrate;
a first conductive layer disposed on the substrate, the first conductive layer composed of at least one basic material having at least one oxygen-bonding additive containing at least one element selected from the group consisting of Group IVb elements and lanthanum group elements;
a second conductive layer disposed on the first conductive layer and containing a noble metal; and
a metal oxide dielectric at least partially covering the second conductive layer;
using the microelectronic structure to form a first part of a storage capacitor, the first conductive layer forming a first capacitor electrode; and
providing a second electrode disposed on the metal oxide dielectric for forming a second part of the storage capacitor.
US09/878,735 1998-12-10 2001-06-11 Microelectronic structure Abandoned US20020017676A1 (en)

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6190963B1 (en) * 1999-05-21 2001-02-20 Sharp Laboratories Of America, Inc. Composite iridium-metal-oxygen barrier structure with refractory metal companion barrier and method for same
US6822277B2 (en) * 2000-08-24 2004-11-23 Rohm Co. Ltd. Semiconductor device and method for manufacturing the same
DE10044451C1 (en) * 2000-09-08 2002-04-04 Epcos Ag Electrode and capacitor with the electrode
DE102005004375A1 (en) * 2005-01-31 2006-08-10 Infineon Technologies Ag Semiconductor storage cell for ferroelectric RAM, has ferroelectric storage material region formed as condenser dielectric medium between two electrodes whose external contact regions are made of metal oxide
TWI279139B (en) * 2005-09-16 2007-04-11 Realtek Semiconductor Corp Data recovery device and method
KR20200101762A (en) * 2019-02-20 2020-08-28 삼성전자주식회사 Integrated circuit device and method of manufacturing the same

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5122477A (en) * 1990-03-16 1992-06-16 U.S. Philips Corporation Method of manufacturing a semiconductor device comprising capacitors which form memory elements and comprise a ferroelectric dielectric material having multilayer lower and upper electrodes
US5491102A (en) * 1992-04-13 1996-02-13 Ceram Incorporated Method of forming multilayered electrodes for ferroelectric devices consisting of conductive layers and interlayers formed by chemical reaction
US5508953A (en) * 1993-05-14 1996-04-16 Texas Instruments Incorporated Capacitor, electrode structure, and semiconductor memory device
US5619393A (en) * 1994-08-01 1997-04-08 Texas Instruments Incorporated High-dielectric-constant material electrodes comprising thin ruthenium dioxide layers
US5936257A (en) * 1992-11-26 1999-08-10 Hitachi, Ltd. Thin-film electron emitter device having a multi-layer top electrode for suppressing degradation of an insulating layer and application apparatus using the same
US5955774A (en) * 1996-06-17 1999-09-21 Samsung Electronics Co., Ltd. Integrated circuit ferroelectric memory devices including resistors in periphery region
US6015989A (en) * 1996-06-28 2000-01-18 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2734433A1 (en) 1982-08-02 1996-11-22 Telecommunications Sa Adaptive equalisation method for digital radio transmission
JPH01229516A (en) * 1988-03-10 1989-09-13 Sony Corp Automatic equalizer
US5119196A (en) 1990-06-25 1992-06-02 At&T Bell Laboratories Ghost cancellation of analog tv signals
DE4401786A1 (en) 1994-01-21 1995-07-27 Aeg Mobile Communication Procedure for checking the quality of a transmission channel
US5489548A (en) * 1994-08-01 1996-02-06 Texas Instruments Incorporated Method of forming high-dielectric-constant material electrodes comprising sidewall spacers
DE4441789C1 (en) 1994-11-24 1995-11-23 Becker Gmbh Data recognition system for noisy radio data signal
JP3119584B2 (en) * 1996-06-20 2000-12-25 日本電気株式会社 Ghost removal device
US6239843B1 (en) * 1997-05-05 2001-05-29 Wavo Corporation Method and system for decoding data in a signal

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5122477A (en) * 1990-03-16 1992-06-16 U.S. Philips Corporation Method of manufacturing a semiconductor device comprising capacitors which form memory elements and comprise a ferroelectric dielectric material having multilayer lower and upper electrodes
US5491102A (en) * 1992-04-13 1996-02-13 Ceram Incorporated Method of forming multilayered electrodes for ferroelectric devices consisting of conductive layers and interlayers formed by chemical reaction
US5936257A (en) * 1992-11-26 1999-08-10 Hitachi, Ltd. Thin-film electron emitter device having a multi-layer top electrode for suppressing degradation of an insulating layer and application apparatus using the same
US5508953A (en) * 1993-05-14 1996-04-16 Texas Instruments Incorporated Capacitor, electrode structure, and semiconductor memory device
US5619393A (en) * 1994-08-01 1997-04-08 Texas Instruments Incorporated High-dielectric-constant material electrodes comprising thin ruthenium dioxide layers
US5955774A (en) * 1996-06-17 1999-09-21 Samsung Electronics Co., Ltd. Integrated circuit ferroelectric memory devices including resistors in periphery region
US6015989A (en) * 1996-06-28 2000-01-18 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a capacitor electrode formed of iridum or ruthenium and a quantity of oxygen

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CN1179396C (en) 2004-12-08
WO2000034988A1 (en) 2000-06-15

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