US20020088716A1 - Method of enhancing hardness of sputter deposited copper films - Google Patents
Method of enhancing hardness of sputter deposited copper films Download PDFInfo
- Publication number
- US20020088716A1 US20020088716A1 US10/092,097 US9209702A US2002088716A1 US 20020088716 A1 US20020088716 A1 US 20020088716A1 US 9209702 A US9209702 A US 9209702A US 2002088716 A1 US2002088716 A1 US 2002088716A1
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- United States
- Prior art keywords
- copper alloy
- seed layer
- alloy seed
- weight percent
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 238000000034 method Methods 0.000 title claims abstract description 46
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 44
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 44
- 239000010949 copper Substances 0.000 title claims abstract description 44
- 230000002708 enhancing effect Effects 0.000 title description 3
- 239000000758 substrate Substances 0.000 claims abstract description 69
- 239000000463 material Substances 0.000 claims abstract description 55
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 17
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000005275 alloying Methods 0.000 claims abstract description 12
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052749 magnesium Inorganic materials 0.000 claims abstract description 8
- 239000011777 magnesium Substances 0.000 claims abstract description 8
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 37
- 238000000151 deposition Methods 0.000 claims description 16
- 230000004888 barrier function Effects 0.000 claims description 15
- 238000005240 physical vapour deposition Methods 0.000 claims description 14
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 8
- 238000009713 electroplating Methods 0.000 claims description 5
- 239000003870 refractory metal Substances 0.000 claims description 5
- 229910052721 tungsten Inorganic materials 0.000 claims description 5
- 239000010937 tungsten Substances 0.000 claims description 5
- 239000010936 titanium Substances 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims 2
- 229910052715 tantalum Inorganic materials 0.000 claims 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims 2
- -1 tungsten nitride Chemical class 0.000 claims 2
- 238000004544 sputter deposition Methods 0.000 abstract description 21
- 230000008569 process Effects 0.000 abstract description 16
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 abstract description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 abstract description 10
- 238000004519 manufacturing process Methods 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 6
- 239000010703 silicon Substances 0.000 abstract description 6
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052742 iron Inorganic materials 0.000 abstract description 5
- 229910052759 nickel Inorganic materials 0.000 abstract description 5
- 229910052725 zinc Inorganic materials 0.000 abstract description 5
- 239000011701 zinc Substances 0.000 abstract description 5
- 150000002500 ions Chemical class 0.000 abstract description 3
- 239000000956 alloy Substances 0.000 description 16
- 229910045601 alloy Inorganic materials 0.000 description 12
- 239000013077 target material Substances 0.000 description 11
- 239000007789 gas Substances 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 230000008021 deposition Effects 0.000 description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- 239000013078 crystal Substances 0.000 description 6
- 230000001965 increasing effect Effects 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 239000001307 helium Substances 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
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- 239000007787 solid Substances 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 238000005056 compaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
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- 238000005242 forging Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000005272 metallurgy Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
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- 229910052757 nitrogen Inorganic materials 0.000 description 1
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- 239000008188 pellet Substances 0.000 description 1
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Images
Classifications
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/35—Sputtering by application of a magnetic field, e.g. magnetron sputtering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3411—Constructional aspects of the reactor
- H01J37/3414—Targets
- H01J37/3426—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76846—Layer combinations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76873—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for electroplating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53233—Copper alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to the deposition of a layer on a substrate. More specifically, the invention relates to deposition of a doped layer on a substrate.
- Aluminum has traditionally been the choice of conductive materials used in metallization. However, smaller feature sizes have created a need for a conductive material with lower resistivity than aluminum. Copper is now being considered as an interconnect material to replace or complement aluminum because copper has a lower resistivity (1.7 ⁇ -cm compared to 3.1 ⁇ -cm for aluminum) and higher current carrying capacity.
- Electromigration refers to the solid diffusion of ions in the presence of electric fields. Atoms in a conductive material are displaced as a consequence of a direct momentum transfer from the conduction electrons in the direction of their motion. The large flux of electrons interacts with the diffusing atoms in the metal lattice and sweeps these atoms in the direction of electron flow. The transport of mass causes removal of material in some locations, which generates voids and the accumulation of material in other locations. As a result, electromigration causes failures by opening interconnect lines.
- the present invention generally provides a method and apparatus for forming a target material having enhanced hardness.
- the target material is well suited for sputtering processes wherein a portion of the material is deposited on a substrate such as by physical vapor deposition (PVD) or Ionized Metal Plasma (IMP) PVD.
- PVD physical vapor deposition
- IMP Ionized Metal Plasma
- the invention provides a method of sputtering a layer on a substrate, comprising generating a plasma in a substrate processing chamber, sputtering material from a conductive target, the target comprising a material having a vickers hardness between about 100 and about 250, and depositing the sputtered material on the substrate.
- the target includes copper and another material selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and combinations thereof.
- a conductive material having enhanced hardness is deposited on a substrate.
- the material comprises at least copper and has a vickers hardness of between about 100 and about 250.
- the material comprises primarily copper combined with another material selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and combinations thereof.
- FIG. 1 is a schematic cross-sectional view of an IMP chamber.
- FIG. 2 is a schematic cross-sectional view of a substrate with a seed layer formed on the substrate.
- the present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process.
- the sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member.
- the hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing in order to improve conductive member and film qualities.
- working refers to any process by which a material is treated, conditioned or otherwise processed to affect the qualities, e.g. hardness, of the material.
- the following description refers to the conductive member as a target, which typically provides the bulk of the material to be deposited on a substrate.
- the conductive member may be any component which is sputtered and contributes to the deposition of material on the substrate.
- qualities such as the hardness, grain size, crystallographic orientation, etc. of target materials affect the quality of the resulting film produced by sputtering the target as well as the sputtering characteristics of the target. According to the invention, such qualities and characteristics can be affected by the methods and materials used to manufacture the target. As an example, the susceptibility of the deposited film to electromigration can be reduced. Additionally, microarcing on the surface of the target during sputtering can be mitigated.
- Solid metals are typically composed of separate and discreet grains of continuous crystal lattice rather than one continuous crystal structure. Depending on the composition and forming method of the metal, these grains can vary in size from the millimeter range to the micron range. By providing targets having smaller grain size the invention mitigates the problems of electromigration and microarcing.
- each grain is a continuous crystal, with its crystal lattice oriented in some particular way relative to a reference plane such as the sputtering surface of the target. Since each grain is independent of others, each grain lattice has its own orientation relative to this plane. When grain orientation is not random and crystal planes tend to be aligned in some way relative to a reference plane, the material is said to have “texture”. These textures are noted using standard indices which define directions relative to crystallographic planes. For instance, a target made from a metal with cubic crystal structure, such as copper, may have a ⁇ 100>, a ⁇ 110> or other textures. The exact texture developed will depend on the metal type and the work and heat treatment history of the target.
- a copper target is alloyed with another material (herein referred to as the alloy) to increase the hardness of the target.
- the target is preferably made of copper and an alloy selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.
- the percentage by weight of the alloy is from about 0.01% to about 10%, and most preferably from about 0.01% to about 5%.
- the vickers hardness of the target is between about 100 and about 250.
- a number of processes known to metallurgists can be adapted to produce a copper-alloy target.
- the target can be prepared, for example, by uniformly mixing the alloy into a molten copper material which is then cast and cooled to form the target.
- the alloy material may be provided in the form of a pellet which is then added to the molten copper.
- the copper-alloy target of the invention can then be sputtered to form a copper alloy film on a substrate.
- the resulting alloyed film exhibits superior resistance to electromigration.
- the target can be sputtered to produce a seed layer on features formed on a substrate.
- the substrate may then undergo various additional processes including an electroplating process wherein the features are filled with a material, such as copper. It is believed that a portion of the alloy material diffuses into the fill material. As a result, the fill material is made more resistant to electromigration. Even though the alloy material will typically have a higher resistivity than copper, the amount of alloy used, by weight percentage of the target, is minimal compared to the weight percentage of copper in the target.
- the proper proportions of alloy to be combined with the copper during the manufacturing of the target can be determined by the volume of the features to be filled, thereby ensuring that sufficient alloy is diffused into the fill material without compromising the resistivity of the deposited material.
- the hardness of a copper target is increased by mechanically working the target material(s) by metallurgical methods. Work hardening the target allows the grain size of the target material to be changed to produce a relatively harder target.
- a copper-alloy target has a vickers hardness between about 100 and about 250.
- methods of manufacturing a copper-alloy target include casting, forming, annealing, rolling, forging, liquid dynamic compaction (LDC), equal channel angular extrusion (ECA) and other methods known and unknown in metallurgy.
- LDC liquid dynamic compaction
- ECA equal channel angular extrusion
- one embodiment of the invention contemplates using known metallurgical methods, such methods have heretofore not been used in the production of copper-alloy targets for the purpose of enhancing their hardness.
- the copper-alloy target of the invention can be utilized in any sputtering chamber.
- One such sputtering chamber is the Ionized Metal Plasma (IMP) VectraTM chamber, available from Applied Materials, Inc. of Santa Clara, Calif.
- IMP Ionized Metal Plasma
- An IMP process provides a higher density plasma than standard PVD that causes the sputtered target material to become ionized. The ionization enables the sputtered material to be attracted in a substantially perpendicular direction to a biased substrate surface and to deposit a layer within high aspect ratio features.
- FIG. 1 is a schematic cross-sectional view of an IMP chamber 100 , capable of generating a relatively high density plasma, i.e., one with a capability to ionize a significant fraction of both the process gas (typically argon) and the sputtered target material.
- the chamber 100 includes sidewalls 101 , lid 102 , and bottom 103 .
- the lid 102 includes a target backing plate 104 which supports a target 105 of the material to be deposited.
- An opening 108 in the chamber 100 provides access for a robot (not shown) to deliver and retrieve substrates 110 to and from the chamber 100 .
- a substrate support 112 supports the substrate 110 in the chamber and is typically grounded.
- the substrate support 112 is mounted on a lift motor 114 that raises and lowers the substrate support 112 and a substrate 110 disposed thereon.
- a lift plate 116 connected to a lift motor 118 is mounted in the chamber 100 and raises and lowers pins 120 a, 120 b mounted in the substrate support 112 .
- the pins 120 a, 120 b raise and lower the substrate 110 from and to the surface of the substrate support 112 .
- a coil 122 is mounted between the substrate support 112 and the target 105 and provides inductively-coupled magnetic fields in the chamber 100 to assist in generating and maintaining a plasma between the target 105 and substrate 110 .
- the coil 122 is also sputtered due to its location between the target and the substrate 110 and preferably is made of similar constituents as the target 105 .
- the coil comprises copper and an alloy selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.
- the alloy percentage of the coil 122 could vary compared to the target alloy percentage depending on the desired layer composition and is empirically determined by varying the relative weight percentages.
- Power supplied to the coil 122 provides an electromagnetic field in the chamber 100 that induces currents in the plasma to increase the density of the plasma, thereby enhancing the ionization of the sputtered material.
- the ionized material is then directed toward the substrate 110 and deposited thereon.
- a shield 124 is disposed in the chamber 100 to shield the chamber sidewalls 101 from the sputtered material.
- the shield 124 also supports the coil 122 by coil supports 126 .
- the coil supports 126 electrically insulate the coil 122 from the shield 124 and the chamber 100 and can be made of similar material as the coil.
- the clamp ring 128 is mounted between the coil 122 and the substrate support 112 and shields an outer edge and backside of the substrate from sputtered materials when the substrate 110 is raised into a processing position to engage the lower portion of the clamp ring 128 .
- the shield 124 supports the clamp ring 128 when the substrate 110 is lowered below the shield 124 to enable substrate transfer.
- a power supply 130 delivers preferably DC power to the target 105 to cause the processing gas to form a plasma, although RF power can be used.
- Magnets 106 a, 106 b disposed behind the target backing plate 104 increase the density of electrons adjacent to the target 105 , thus increasing ionization at the target to increase the sputtering efficiency.
- the magnets 106 a, 106 b generate magnetic field lines generally parallel to the face of the target, around which electrons are trapped in spinning orbits to increase the likelihood of a collision with, and ionization of, a gas atom for sputtering.
- a power supply 132 preferably a RF power supply, supplies electrical power to the coil 122 to couple with and increase the density of the plasma.
- Another power supply 134 typically a DC power supply, biases the substrate support 112 with respect to the plasma and provides directional attraction (or repulsion) of the ionized sputtered material toward the substrate 110 .
- Processing gas such as an inert gas of argon or helium or a reactive gas such as nitrogen, is supplied to the chamber 100 through a gas inlet 136 from gas sources 138 , 140 as metered by respective mass flow controllers 142 , 144 .
- a vacuum pump 146 is connected to the chamber 100 at an exhaust port 148 to exhaust the chamber 100 and maintain the desired pressure in the chamber 100 .
- a controller 149 generally controls the functions of the power supplies, lift motors, mass flow controllers for gas injection, vacuum pump, and other associated chamber components and functions.
- the controller 149 controls the power supply 130 coupled to the target 105 to cause the processing gas to form a plasma and sputter the target material.
- the controller 149 also controls the power supply 132 coupled to the coil 122 to increase the density of the plasma and ionize the sputtered material.
- the controller 149 also controls the power supply 134 to provide directional attraction of the ionized sputtered material to the substrate surface.
- the controller 149 preferably comprises a central processing unit (CPU), a memory, and support circuits for the CPU.
- the CPU may be one of any form of general purpose computer processor that can be used in an industrial setting for controlling various chambers and subprocessors.
- the memory is coupled to the CPU.
- the memory, or computer-readable medium may be one or more of readily available memory such as random access memory (RAM), read only memory (ROM), floppy disk drive, hard disk, or any other form of digital storage, local or remote.
- the support circuits are coupled to the CPU for supporting the processor in a conventional manner. These circuits include cache, power supplies, clock circuits, input/output circuitry and subsystems, and the like.
- a deposition process is generally stored in the memory, typically as a software routine.
- the software routine may also be stored and/or executed by a second CPU that is remotely located from the hardware being controlled by the CPU of the controller 149 .
- a seed layer is deposited on a substrate by sputtering the target 105 .
- a noble gas such as helium or argon, is flown into the chamber at a rate sufficient to produce a chamber pressure of about 5 to about 100 mTorr, preferably about 20 mTorr to about 50 mTorr.
- the power supply 130 delivers about 200 Watts (W) to about 12 kW, preferably about 750 W to about 3 kW to the target 105 .
- the power supply 132 delivers an AC signal to the coil 122 between about 500 W and about 5 kW, and preferably about 1.5 kW to about 2.5 kW.
- the power supply 134 delivers about 0 W to about 600 W, preferably about 350 W to about 500 W to the substrate support 112 with a duty cycle between 0% to 100% and preferably about 50% to about 75%.
- a surface temperature between about ⁇ 50° C. to about 150° C., preferably below 50° C. is useful for processing during the seed layer deposition.
- the sputtered target material is deposited on the substrate to a thickness of about 500 ⁇ to about 4000 ⁇ , preferably about 2000 ⁇ .
- the above parameters are preferably used to deposit a layer on a 200 mm substrate and are not intended to be limiting.
- power densities may be determined from the given power ranges and scaled up to larger substrates, such as 300 mm substrates, or down to smaller substrates, such as 100 mm substrates.
- the chamber described above is an IMP chamber other chambers may be used.
- the target 105 is disposed in a PVD chamber.
- the above described parameters are dependent on the particular chamber type.
- the power level delivered to the target 105 by the power supply 130 is between about 200 W to about 12 kW.
- the power level delivered to the target 105 by the power supply 130 is between about preferably about 750 W to about 3 kW.
- FIG. 2 is a schematic cross-sectional view of an exemplary substrate 110 formed according to a process of the invention.
- a dielectric layer 204 is deposited on the substrate 110 and etched to form the feature 200 , such as a via, contact, trench or line.
- the term “substrate” is broadly defined as the underlying material and can include a series of underlying layers.
- the dielectric layer 204 can be a pre-metal dielectric layer deposited over a silicon wafer or an interlevel dielectric layer.
- a liner layer 206 such as a Ta layer, is deposited on the dielectric layer 204 as a transition layer to promote adhesion to the underlying material and reduce contact/via resistance.
- the liner layer 206 is preferably deposited using an IMP PVD process and can be deposited by other PVD processes, such as collimated or long throw sputtering or other methods such as CVD.
- Collimated sputtering is generally performed by placing a collimator (not shown) between the target and the substrate to filter sputtered material traveling obliquely through the collimator.
- Long throw sputtering is generally performed by increasing the spacing between the target and the substrate.
- a barrier layer 208 of tantalum nitride (TaN) is deposited on the liner layer 206 using PVD, and preferably an IMP PVD process, especially for high aspect ratio features.
- the barrier layer prevents diffusion of copper into adjacent layers. While Ta/TaN are preferred, other liner and/or barrier layers that can be used are titanium (Ti), titanium nitride (TiN), tungsten (W), tungsten nitride (WN) and other refractory metals and their nitrided counterparts.
- a seed layer 210 is deposited over the TaN barrier layer 208 , using PVD and preferably IMP PVD.
- the seed layer 210 is deposited by sputtering a copper/copper-alloy target of the invention.
- the seed layer 210 is deposited over the barrier layer 208 as a seed layer for a subsequent copper fill 212 .
- the copper fill 212 can be deposited by PVD, IMP, CVD, electroplating, electroless deposition, evaporation, or other known methods.
- copper fill 212 is deposited using electroplating techniques.
- Subsequent processing can include planarization by chemical mechanical polishing (CMP), additional deposition of layers, etching, and other processes known to substrate manufacturing.
- CMP chemical mechanical polishing
- the hardened target material of the invention is believed to reduce the potential for electromigration during operation of the devices formed on the substrate 110 surface. Additionally, empirical evidence suggests that harder targets result in reduced arcing between the target and an adjacent structure, where the arcing dislodges unwanted pieces of the target (splats) that are deposited on the substrate and contaminates the deposition.
Abstract
The present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process. The sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member. The hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing process in order to improve conductive member and film qualities. The copper may be alloyed with magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.
Description
- This application is a continuation of co-pending U.S. patent application Ser. No. 09/518,004, filed Mar. 2, 2000 which is a continuation-in-part of U.S. patent application Ser. No. 09/406,325, filed on Sep. 27, 1999. Each of the aforementioned related patent applications is herein incorporated by reference.
- 1. Field of the Invention
- The present invention relates to the deposition of a layer on a substrate. More specifically, the invention relates to deposition of a doped layer on a substrate.
- 2. Description of the Related Art
- Consistent and fairly predictable improvement in integrated circuit design and fabrication has been observed in the last decade. One key to successful improvements is multilevel interconnect technology, which provides the conductive paths between the devices of an integrated circuit (IC) and other electronic devices. The conductive paths, or features, of an IC typically comprise horizontal interconnects (also referred to as lines) and vertical interconnects (also referred to as contacts or vias). The shrinking dimensions of features, presently in the sub-quarter micron range, has increased the importance of reducing capacitive coupling between interconnect lines and reducing resistance in the conductive features.
- Aluminum has traditionally been the choice of conductive materials used in metallization. However, smaller feature sizes have created a need for a conductive material with lower resistivity than aluminum. Copper is now being considered as an interconnect material to replace or complement aluminum because copper has a lower resistivity (1.7 μΩ-cm compared to 3.1 μΩ-cm for aluminum) and higher current carrying capacity.
- As a result of the desirability of using copper for semiconductor device fabrication, current practice provides for sputtering high purity copper targets. High purity is considered desirable in order to ensure that the low resistivity of copper is not affected by contaminants. However, the inventors have discovered that high purity copper films suffer from electromigration. Electromigration refers to the solid diffusion of ions in the presence of electric fields. Atoms in a conductive material are displaced as a consequence of a direct momentum transfer from the conduction electrons in the direction of their motion. The large flux of electrons interacts with the diffusing atoms in the metal lattice and sweeps these atoms in the direction of electron flow. The transport of mass causes removal of material in some locations, which generates voids and the accumulation of material in other locations. As a result, electromigration causes failures by opening interconnect lines.
- Therefore, there is a need for an improved copper based target material which mitigates the problems of electromigration.
- The present invention generally provides a method and apparatus for forming a target material having enhanced hardness. The target material is well suited for sputtering processes wherein a portion of the material is deposited on a substrate such as by physical vapor deposition (PVD) or Ionized Metal Plasma (IMP) PVD.
- In one aspect, the invention provides a method of sputtering a layer on a substrate, comprising generating a plasma in a substrate processing chamber, sputtering material from a conductive target, the target comprising a material having a vickers hardness between about 100 and about 250, and depositing the sputtered material on the substrate. In one embodiment, the target includes copper and another material selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and combinations thereof.
- In yet another aspect, a conductive material having enhanced hardness is deposited on a substrate. The material comprises at least copper and has a vickers hardness of between about 100 and about 250. In one embodiment, the material comprises primarily copper combined with another material selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and combinations thereof.
- So that the manner in which the above recited features, advantages and objects of the present invention are attained and can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to the embodiments thereof which are illustrated in the appended drawings.
- It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
- FIG. 1 is a schematic cross-sectional view of an IMP chamber.
- FIG. 2 is a schematic cross-sectional view of a substrate with a seed layer formed on the substrate.
- The present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process. The sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member. The hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing in order to improve conductive member and film qualities. As referred to herein “working” refers to any process by which a material is treated, conditioned or otherwise processed to affect the qualities, e.g. hardness, of the material. Illustratively, the following description refers to the conductive member as a target, which typically provides the bulk of the material to be deposited on a substrate. However, the conductive member may be any component which is sputtered and contributes to the deposition of material on the substrate.
- The inventors have discovered that qualities such as the hardness, grain size, crystallographic orientation, etc. of target materials affect the quality of the resulting film produced by sputtering the target as well as the sputtering characteristics of the target. According to the invention, such qualities and characteristics can be affected by the methods and materials used to manufacture the target. As an example, the susceptibility of the deposited film to electromigration can be reduced. Additionally, microarcing on the surface of the target during sputtering can be mitigated.
- Solid metals are typically composed of separate and discreet grains of continuous crystal lattice rather than one continuous crystal structure. Depending on the composition and forming method of the metal, these grains can vary in size from the millimeter range to the micron range. By providing targets having smaller grain size the invention mitigates the problems of electromigration and microarcing.
- Another factor which affects microarcing on the target surface and the electromigration characteristics of the deposited material, is the crystallographic orientation of the grains. Each grain is a continuous crystal, with its crystal lattice oriented in some particular way relative to a reference plane such as the sputtering surface of the target. Since each grain is independent of others, each grain lattice has its own orientation relative to this plane. When grain orientation is not random and crystal planes tend to be aligned in some way relative to a reference plane, the material is said to have “texture”. These textures are noted using standard indices which define directions relative to crystallographic planes. For instance, a target made from a metal with cubic crystal structure, such as copper, may have a <100>, a <110> or other textures. The exact texture developed will depend on the metal type and the work and heat treatment history of the target.
- In one embodiment, a copper target is alloyed with another material (herein referred to as the alloy) to increase the hardness of the target. The target is preferably made of copper and an alloy selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof. The percentage by weight of the alloy is from about 0.01% to about 10%, and most preferably from about 0.01% to about 5%. In one embodiment, the vickers hardness of the target is between about 100 and about 250.
- A number of processes known to metallurgists can be adapted to produce a copper-alloy target. The target can be prepared, for example, by uniformly mixing the alloy into a molten copper material which is then cast and cooled to form the target. The alloy material may be provided in the form of a pellet which is then added to the molten copper. By alloying the copper target in such a manner, it is believed the hardness of the target can be enhanced. The inventors have discovered that a target of enhanced hardness mitigates the problems of electromigration associated with the prior art high purity copper targets. Further, even where the alloy material has a higher resistivity than copper, such as where aluminum is used to alloy the copper target, the effect on the resistivity of the resulting film formed on the substrate is minimal because of the relative proportions of the alloy to the copper.
- The copper-alloy target of the invention can then be sputtered to form a copper alloy film on a substrate. The resulting alloyed film exhibits superior resistance to electromigration. In one application, the target can be sputtered to produce a seed layer on features formed on a substrate. The substrate may then undergo various additional processes including an electroplating process wherein the features are filled with a material, such as copper. It is believed that a portion of the alloy material diffuses into the fill material. As a result, the fill material is made more resistant to electromigration. Even though the alloy material will typically have a higher resistivity than copper, the amount of alloy used, by weight percentage of the target, is minimal compared to the weight percentage of copper in the target. Thus, the effect on the overall resistivity is negligible. The proper proportions of alloy to be combined with the copper during the manufacturing of the target can be determined by the volume of the features to be filled, thereby ensuring that sufficient alloy is diffused into the fill material without compromising the resistivity of the deposited material.
- In another embodiment, the hardness of a copper target is increased by mechanically working the target material(s) by metallurgical methods. Work hardening the target allows the grain size of the target material to be changed to produce a relatively harder target. In a preferred embodiment, a copper-alloy target has a vickers hardness between about 100 and about 250. Illustratively, methods of manufacturing a copper-alloy target include casting, forming, annealing, rolling, forging, liquid dynamic compaction (LDC), equal channel angular extrusion (ECA) and other methods known and unknown in metallurgy. Although one embodiment of the invention contemplates using known metallurgical methods, such methods have heretofore not been used in the production of copper-alloy targets for the purpose of enhancing their hardness.
- The copper-alloy target of the invention can be utilized in any sputtering chamber. One such sputtering chamber is the Ionized Metal Plasma (IMP) Vectra™ chamber, available from Applied Materials, Inc. of Santa Clara, Calif. An IMP process provides a higher density plasma than standard PVD that causes the sputtered target material to become ionized. The ionization enables the sputtered material to be attracted in a substantially perpendicular direction to a biased substrate surface and to deposit a layer within high aspect ratio features.
- FIG. 1 is a schematic cross-sectional view of an
IMP chamber 100, capable of generating a relatively high density plasma, i.e., one with a capability to ionize a significant fraction of both the process gas (typically argon) and the sputtered target material. Thechamber 100 includessidewalls 101,lid 102, andbottom 103. Thelid 102 includes atarget backing plate 104 which supports atarget 105 of the material to be deposited. - An
opening 108 in thechamber 100 provides access for a robot (not shown) to deliver and retrievesubstrates 110 to and from thechamber 100. Asubstrate support 112 supports thesubstrate 110 in the chamber and is typically grounded. Thesubstrate support 112 is mounted on alift motor 114 that raises and lowers thesubstrate support 112 and asubstrate 110 disposed thereon. Alift plate 116 connected to alift motor 118 is mounted in thechamber 100 and raises and lowerspins substrate support 112. Thepins substrate 110 from and to the surface of thesubstrate support 112. - A
coil 122 is mounted between thesubstrate support 112 and thetarget 105 and provides inductively-coupled magnetic fields in thechamber 100 to assist in generating and maintaining a plasma between thetarget 105 andsubstrate 110. Thecoil 122 is also sputtered due to its location between the target and thesubstrate 110 and preferably is made of similar constituents as thetarget 105. Thus, the coil comprises copper and an alloy selected from the group of magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof. The alloy percentage of thecoil 122 could vary compared to the target alloy percentage depending on the desired layer composition and is empirically determined by varying the relative weight percentages. Power supplied to thecoil 122 provides an electromagnetic field in thechamber 100 that induces currents in the plasma to increase the density of the plasma, thereby enhancing the ionization of the sputtered material. The ionized material is then directed toward thesubstrate 110 and deposited thereon. - A
shield 124 is disposed in thechamber 100 to shield the chamber sidewalls 101 from the sputtered material. Theshield 124 also supports thecoil 122 by coil supports 126. The coil supports 126 electrically insulate thecoil 122 from theshield 124 and thechamber 100 and can be made of similar material as the coil. Theclamp ring 128 is mounted between thecoil 122 and thesubstrate support 112 and shields an outer edge and backside of the substrate from sputtered materials when thesubstrate 110 is raised into a processing position to engage the lower portion of theclamp ring 128. In some chamber configurations, theshield 124 supports theclamp ring 128 when thesubstrate 110 is lowered below theshield 124 to enable substrate transfer. - Three power supplies are used in this type of sputtering chamber. A
power supply 130 delivers preferably DC power to thetarget 105 to cause the processing gas to form a plasma, although RF power can be used.Magnets target backing plate 104 increase the density of electrons adjacent to thetarget 105, thus increasing ionization at the target to increase the sputtering efficiency. Themagnets power supply 132, preferably a RF power supply, supplies electrical power to thecoil 122 to couple with and increase the density of the plasma. Anotherpower supply 134, typically a DC power supply, biases thesubstrate support 112 with respect to the plasma and provides directional attraction (or repulsion) of the ionized sputtered material toward thesubstrate 110. - Processing gas, such as an inert gas of argon or helium or a reactive gas such as nitrogen, is supplied to the
chamber 100 through agas inlet 136 fromgas sources mass flow controllers vacuum pump 146 is connected to thechamber 100 at anexhaust port 148 to exhaust thechamber 100 and maintain the desired pressure in thechamber 100. - A
controller 149 generally controls the functions of the power supplies, lift motors, mass flow controllers for gas injection, vacuum pump, and other associated chamber components and functions. Thecontroller 149 controls thepower supply 130 coupled to thetarget 105 to cause the processing gas to form a plasma and sputter the target material. Thecontroller 149 also controls thepower supply 132 coupled to thecoil 122 to increase the density of the plasma and ionize the sputtered material. Thecontroller 149 also controls thepower supply 134 to provide directional attraction of the ionized sputtered material to the substrate surface. - The
controller 149 preferably comprises a central processing unit (CPU), a memory, and support circuits for the CPU. To facilitate control of the chamber, the CPU may be one of any form of general purpose computer processor that can be used in an industrial setting for controlling various chambers and subprocessors. The memory is coupled to the CPU. The memory, or computer-readable medium, may be one or more of readily available memory such as random access memory (RAM), read only memory (ROM), floppy disk drive, hard disk, or any other form of digital storage, local or remote. The support circuits are coupled to the CPU for supporting the processor in a conventional manner. These circuits include cache, power supplies, clock circuits, input/output circuitry and subsystems, and the like. A deposition process is generally stored in the memory, typically as a software routine. The software routine may also be stored and/or executed by a second CPU that is remotely located from the hardware being controlled by the CPU of thecontroller 149. - In one embodiment, a seed layer is deposited on a substrate by sputtering the
target 105. A noble gas, such as helium or argon, is flown into the chamber at a rate sufficient to produce a chamber pressure of about 5 to about 100 mTorr, preferably about 20 mTorr to about 50 mTorr. Thepower supply 130 delivers about 200 Watts (W) to about 12 kW, preferably about 750 W to about 3 kW to thetarget 105. Thepower supply 132 delivers an AC signal to thecoil 122 between about 500 W and about 5 kW, and preferably about 1.5 kW to about 2.5 kW. Thepower supply 134 delivers about 0 W to about 600 W, preferably about 350 W to about 500 W to thesubstrate support 112 with a duty cycle between 0% to 100% and preferably about 50% to about 75%. When the substrate temperature is controlled, a surface temperature between about −50° C. to about 150° C., preferably below 50° C. is useful for processing during the seed layer deposition. The sputtered target material is deposited on the substrate to a thickness of about 500 Å to about 4000 Å, preferably about 2000 Å. - The above parameters are preferably used to deposit a layer on a 200 mm substrate and are not intended to be limiting. For example, power densities may be determined from the given power ranges and scaled up to larger substrates, such as 300 mm substrates, or down to smaller substrates, such as 100 mm substrates.
- Further, although the chamber described above is an IMP chamber other chambers may be used. Thus, in one embodiment, the
target 105 is disposed in a PVD chamber. In some cases, the above described parameters are dependent on the particular chamber type. For example, in one embodiment utilizing a PVD chamber, the power level delivered to thetarget 105 by thepower supply 130 is between about 200 W to about 12 kW. In an embodiment utilizing an IMP chamber, the power level delivered to thetarget 105 by thepower supply 130 is between about preferably about 750 W to about 3 kW. - FIG. 2 is a schematic cross-sectional view of an
exemplary substrate 110 formed according to a process of the invention. Adielectric layer 204 is deposited on thesubstrate 110 and etched to form thefeature 200, such as a via, contact, trench or line. The term “substrate” is broadly defined as the underlying material and can include a series of underlying layers. Thedielectric layer 204 can be a pre-metal dielectric layer deposited over a silicon wafer or an interlevel dielectric layer. - A
liner layer 206, such as a Ta layer, is deposited on thedielectric layer 204 as a transition layer to promote adhesion to the underlying material and reduce contact/via resistance. Theliner layer 206 is preferably deposited using an IMP PVD process and can be deposited by other PVD processes, such as collimated or long throw sputtering or other methods such as CVD. Collimated sputtering is generally performed by placing a collimator (not shown) between the target and the substrate to filter sputtered material traveling obliquely through the collimator. Long throw sputtering is generally performed by increasing the spacing between the target and the substrate. The increased distance increases the probability that the sputtered material reaching the substrate is directed normal to the substrate surface. Abarrier layer 208 of tantalum nitride (TaN) is deposited on theliner layer 206 using PVD, and preferably an IMP PVD process, especially for high aspect ratio features. The barrier layer prevents diffusion of copper into adjacent layers. While Ta/TaN are preferred, other liner and/or barrier layers that can be used are titanium (Ti), titanium nitride (TiN), tungsten (W), tungsten nitride (WN) and other refractory metals and their nitrided counterparts. - A
seed layer 210 is deposited over theTaN barrier layer 208, using PVD and preferably IMP PVD. Theseed layer 210 is deposited by sputtering a copper/copper-alloy target of the invention. Theseed layer 210 is deposited over thebarrier layer 208 as a seed layer for asubsequent copper fill 212. - The copper fill212 can be deposited by PVD, IMP, CVD, electroplating, electroless deposition, evaporation, or other known methods. Preferably, copper fill 212 is deposited using electroplating techniques. Subsequent processing can include planarization by chemical mechanical polishing (CMP), additional deposition of layers, etching, and other processes known to substrate manufacturing.
- The hardened target material of the invention is believed to reduce the potential for electromigration during operation of the devices formed on the
substrate 110 surface. Additionally, empirical evidence suggests that harder targets result in reduced arcing between the target and an adjacent structure, where the arcing dislodges unwanted pieces of the target (splats) that are deposited on the substrate and contaminates the deposition. - Variations in the orientation of the chambers and other system components are possible. Additionally, all movements and positions, such as “above,” “top,” “below,” “under,” “bottom,” “side,” described herein are relative to positions of objects such as the target, substrate, and coil. Accordingly, it is contemplated by the present invention to orient any or all of the components to achieve the desired support of substrates in a processing system.
- While the foregoing is directed to the preferred embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof and the scope thereof is determined by the claims that follow.
Claims (20)
1. A method of depositing a seed layer over a surface of a substrate, comprising:
depositing a copper alloy seed layer over a surface of a substrate at a substrate temperature between about −50° C. and about 150° C., the copper alloy seed layer comprising an alloying material selected from the group of aluminum, magnesium, and combinations thereof, the alloying material being present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 10 weight percent.
2. The method of claim 1 , wherein the copper alloy seed layer is deposited at a substrate temperature less than about 50° C.
3. The method of claim 1 , wherein the copper alloy seed layer is deposited by physical vapor deposition.
4. The method of claim 3 , wherein the copper alloy seed layer is deposited by utilizing a high density plasma.
5. The method of claim 1 , wherein the alloying material is present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 5 weight percent.
6. A method of forming a feature, comprising:
depositing a barrier layer over a surface of a substrate; and
depositing a copper alloy seed layer over the barrier layer, the copper alloy seed layer comprising an alloying material selected from the group of aluminum, magnesium, and combinations thereof, the alloying material being present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 10 weight percent.
7. The method of claim 6 , wherein the barrier layer comprises a material selected from the group consisting of tantalum nitride, tantalum, titanium, titanium nitride, tungsten, tungsten nitride, other refractory metals, other refractory metal nitrides, and combinations thereof.
8. The method of claim 6 , further comprising depositing a bulk copper layer over the copper alloy seed layer.
9. The method of claim 8 , wherein the bulk copper layer is deposited by electroplating.
10. The method of claim 6 , wherein the copper alloy seed layer is deposited at a substrate temperature between about −50° C. and about 150° C.
11. The method of claim 10 , wherein the copper alloy seed layer is deposited at a substrate temperature less than about 50° C.
12. The method of claim 6 , wherein the alloying material is present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 5 weight percent.
13. A method of forming a feature, comprising:
depositing a barrier layer comprising tantalum nitride;
depositing a copper alloy seed layer over the barrier layer, the copper alloy seed layer comprising aluminum present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 10 weight percent; and
depositing a bulk copper layer over the copper alloy seed layer by electroplating.
14. The method of claim 13 , wherein aluminum is present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 5 weight percent.
15. A structure, comprising:
a substrate having a dielectric layer formed thereon, the dielectric layer having an aperture formed therein;
a barrier layer formed over the dielectric layer; and
a copper alloy seed layer formed over the barrier layer, the copper alloy seed layer comprising an alloying material selected from the group of aluminum, magnesium, and combinations thereof, the alloying material being present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 10 weight percent.
16. The structure of claim 15 , wherein the alloying material is present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 5 weight percent.
17. The method of claim 15 , wherein the barrier layer comprises a material selected from the group consisting of tantalum nitride, tantalum, titanium, titanium nitride, tungsten, tungsten nitride, other refractory metals, other refractory metal nitrides, and combinations thereof.
18. The structure of claim 15 , further comprising a bulk copper layer formed over the copper alloy seed layer.
19. A structure, comprising:
a substrate having a dielectric layer formed thereon, the dielectric layer having an aperture formed therein;
a barrier layer comprising tantalum nitride formed over the dielectric layer;
a copper alloy seed layer formed over the barrier layer, the copper alloy seed layer comprising aluminum present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 10 weight percent; and
a bulk copper layer formed over the copper alloy seed layer.
20. The structure of claim 19 , wherein aluminum is present in the copper alloy seed layer in a concentration between about 0.01 weight percent and about 5 weight percent.
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US10/092,097 US20020088716A1 (en) | 1999-09-27 | 2002-03-06 | Method of enhancing hardness of sputter deposited copper films |
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US09/406,325 US6432819B1 (en) | 1999-09-27 | 1999-09-27 | Method and apparatus of forming a sputtered doped seed layer |
US09/518,004 US6391163B1 (en) | 1999-09-27 | 2000-03-02 | Method of enhancing hardness of sputter deposited copper films |
US10/092,097 US20020088716A1 (en) | 1999-09-27 | 2002-03-06 | Method of enhancing hardness of sputter deposited copper films |
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TW (1) | TW508662B (en) |
Cited By (6)
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-
2000
- 2000-03-02 US US09/518,004 patent/US6391163B1/en not_active Expired - Fee Related
-
2001
- 2001-02-27 TW TW090104616A patent/TW508662B/en not_active IP Right Cessation
- 2001-02-28 EP EP01104462A patent/EP1130625A2/en not_active Withdrawn
- 2001-03-02 SG SG200101298A patent/SG85232A1/en unknown
- 2001-03-02 KR KR1020010010869A patent/KR20010087288A/en not_active Application Discontinuation
- 2001-03-02 JP JP2001109224A patent/JP2001355066A/en not_active Withdrawn
-
2002
- 2002-03-06 US US10/092,097 patent/US20020088716A1/en not_active Abandoned
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004008491A2 (en) * | 2002-07-15 | 2004-01-22 | Aviza Technology, Inc. | Thermal processing system and configurable vertical chamber |
WO2004008491A3 (en) * | 2002-07-15 | 2004-06-03 | Aviza Tech Inc | Thermal processing system and configurable vertical chamber |
US20060083495A1 (en) * | 2002-07-15 | 2006-04-20 | Qiu Taiquing | Variable heater element for low to high temperature ranges |
US20070243317A1 (en) * | 2002-07-15 | 2007-10-18 | Du Bois Dale R | Thermal Processing System and Configurable Vertical Chamber |
US20040162029A1 (en) * | 2002-07-17 | 2004-08-19 | Jeff Grady | Audio player assembly comprising an MP3 player |
US20060030151A1 (en) * | 2004-08-09 | 2006-02-09 | Applied Materials, Inc. | Sputter deposition and etching of metallization seed layer for overhang and sidewall improvement |
US7294574B2 (en) * | 2004-08-09 | 2007-11-13 | Applied Materials, Inc. | Sputter deposition and etching of metallization seed layer for overhang and sidewall improvement |
CN112680626A (en) * | 2020-12-09 | 2021-04-20 | 爱发科电子材料(苏州)有限公司 | Preparation process of copper-aluminum-silicon alloy target material for integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
US6391163B1 (en) | 2002-05-21 |
JP2001355066A (en) | 2001-12-25 |
EP1130625A2 (en) | 2001-09-05 |
TW508662B (en) | 2002-11-01 |
SG85232A1 (en) | 2001-12-19 |
KR20010087288A (en) | 2001-09-15 |
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