US20030209321A1 - Scanning type etcher design for precision process control - Google Patents

Scanning type etcher design for precision process control Download PDF

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Publication number
US20030209321A1
US20030209321A1 US10/144,015 US14401502A US2003209321A1 US 20030209321 A1 US20030209321 A1 US 20030209321A1 US 14401502 A US14401502 A US 14401502A US 2003209321 A1 US2003209321 A1 US 2003209321A1
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Prior art keywords
electrode
etcher
etch head
high voltage
main controller
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US10/144,015
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Hun-Jan Tao
Mong-Song Liang
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Publication of US20030209321A1 publication Critical patent/US20030209321A1/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67259Position monitoring, e.g. misposition detection or presence detection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32366Localised processing
    • H01J37/32376Scanning across large workpieces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67253Process monitoring, e.g. flow or thickness monitoring

Definitions

  • the present invention relates generally to semiconductor wafer processing systems, devices and methods thereof.
  • the present invention also relates to etcher and etch head devices utilized in semiconductor wafer processing system.
  • the present invention additionally relates to photolithographic stepper devices and methods thereof.
  • the present invention further relates to techniques for achieving increased wafer uniformity during semiconductor wafer etching operations.
  • Semiconductor integrated circuits are typically fabricated by a layering process in which several layers of material are fabricated on a surface of a wafer, or alternatively, on a surface of a previous layer. This fabrication process typically requires subsequent layers to be fabricated upon a smooth, planar surface of a previous layer.
  • the surface topography of layers may be uneven due to an uneven topography associated with an underlying layer.
  • a layer may need to be polished in order to present a smooth, planar surface for a subsequent processing step. For example, a layer may need to be polished prior to formation of a conductor layer or pattern on an outer surface of the layer.
  • a semiconductor wafer may be polished to remove high topography and surface defects such as scratches, roughness, or embedded particles of dirt or dust.
  • the polishing process typically is accomplished with a polishing system that includes top and bottom platens (e.g. a polishing table and a wafer carrier or holder), between which the semiconductor wafer is positioned. The platens are moved relative to each other thereby causing material to be removed from the surface of the wafer.
  • This polishing process is often referred to as mechanical planarization (MP) and is utilized to improve the quality and reliability of semiconductor devices.
  • the polishing process may also involve the introduction of a chemical slurry to facilitate higher removal rates, along with the selective removal of materials fabricated on the semiconductor wafer. This polishing process is often referred to as chemical mechanical planarization or chemical mechanical polishing (CMP).
  • An apparatus and method are disclosed herein for controllably etching a semiconductor wafer fabricated by a semiconductor processing system.
  • an etcher is associated with the semiconductor processing system, such that etcher includes one or more electrodes thereof.
  • An electrode position monitor can then be utilized for monitoring a position of the electrode, thereby permitting an adjustable size control of the etch head, which is controllable according to an associated etching recipe.
  • the etch head is generally moveable according to a step mode. Such an arrangement thus increases wafer uniformity and precision process control during wafer fabrication and etching.
  • the electrode position monitor can be arranged to further include a fiber optical cable connecting the high voltage apparatus to the main controller; and a resistor located between the main controller and the display device, wherein the main controller comprises a DC output modulator.
  • the display device may be configured as an LED display device.
  • the apparatus described herein essentially can be arranged to include a motor associated with the etcher and the electrode position monitor; an encoder connected to the electrode and which communicates with the motor; and a gear assembly associated with the motor and the electrode.
  • the etcher comprises a scanning-type etcher.
  • the associated etch head may comprise at least two tubes for gas suction, wherein such tubes can be located external to the etch head.
  • FIG. 2 illustrates a block diagram of an electrode position monitor, which may be implemented in accordance with a preferred embodiment of the present invention
  • FIG. 3 depicts a prior art etcher hardware design, which is illustrated herein for illustrative and edification purposes;
  • FIG. 4 illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention
  • FIG. 5 depicts a prior art hardware design, which is illustrated herein for illustrative and edification purposes only;
  • FIG. 8 illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention
  • a beam 106 which is illustrated generally as an arrow in FIG. 1, passes from electrode 104 to an analysis magnet 108 . It is very difficult to tune beam 106 with knowing the position of electrode 104 . Because electrode 104 functions as the first slit after source head 102 , electrode 104 determines the path necessary to pass beam 106 to analysis magnet 108 . Because electrode 104 is generally located in a high-voltage, high-vacuum, and high temperature environment, it is a great challenge to lead out the electrode position. Determining the position of electrode 104 is thus necessary to achieving proper wafer uniformity and process control during wafer etching operations.
  • FIG. 3 depicts a prior art etcher hardware design 300 , which is illustrated herein for illustrative and edification purposes.
  • Hardware design 300 is illustrated herein to indicate that such a design may be modified in accordance with the apparatus and method of the present invention.
  • the hardware design 400 depicted in FIG. 4 indicates how an improvement to hardware design 300 may be implemented.
  • FIG. 4 thus illustrates an improved etcher hardware design 400 , which may be implemented in accordance with a preferred embodiment of the present invention.
  • such an improved etcher design may include the addition of an encoder, as illustrated at block 404 , and the addition of a gear assembly, as illustrated at block 404 , and an additional motor, as illustrated at block 406 .
  • FIG. 3 and FIG. 4 can be compared to one another to indicate the advantages and improvements that can be achieved according to an implementation of the apparatus and method of the present invention.

Abstract

An apparatus and method for controllably etching a semiconductor wafer fabricated by a semiconductor processing system. Generally, an etcher is associated with the semiconductor processing system, such that etcher includes one or more electrodes thereof. An electrode position monitor can then be utilized for monitoring a position of the electrode, thereby permitting an adjustable size control of the etch head, which is controllable according to an associated etching recipe. The etch head is generally moveable according to a step mode. Such an arrangement thus increases wafer uniformity and precision process control during wafer fabrication and etching.

Description

    TECHNICAL FIELD
  • The present invention relates generally to semiconductor wafer processing systems, devices and methods thereof. The present invention also relates to etcher and etch head devices utilized in semiconductor wafer processing system. The present invention additionally relates to photolithographic stepper devices and methods thereof. The present invention further relates to techniques for achieving increased wafer uniformity during semiconductor wafer etching operations. [0001]
  • BACKGROUND OF THE INVENTION
  • Semiconductor integrated circuits are typically fabricated by a layering process in which several layers of material are fabricated on a surface of a wafer, or alternatively, on a surface of a previous layer. This fabrication process typically requires subsequent layers to be fabricated upon a smooth, planar surface of a previous layer. However, the surface topography of layers may be uneven due to an uneven topography associated with an underlying layer. As a result, a layer may need to be polished in order to present a smooth, planar surface for a subsequent processing step. For example, a layer may need to be polished prior to formation of a conductor layer or pattern on an outer surface of the layer. [0002]
  • In general, a semiconductor wafer may be polished to remove high topography and surface defects such as scratches, roughness, or embedded particles of dirt or dust. The polishing process typically is accomplished with a polishing system that includes top and bottom platens (e.g. a polishing table and a wafer carrier or holder), between which the semiconductor wafer is positioned. The platens are moved relative to each other thereby causing material to be removed from the surface of the wafer. This polishing process is often referred to as mechanical planarization (MP) and is utilized to improve the quality and reliability of semiconductor devices. The polishing process may also involve the introduction of a chemical slurry to facilitate higher removal rates, along with the selective removal of materials fabricated on the semiconductor wafer. This polishing process is often referred to as chemical mechanical planarization or chemical mechanical polishing (CMP). [0003]
  • Photolithographic steppers are often utilized to pattern images onto the wafer during fabrication thereof. Such steppers are well known in the art and thus a detailed description of such devices is not necessary to include herein. Generally, prior to imaging a pattern on the semiconductor wafer, the photolithographic stepper aligns a patterning tool associated therewith to the alignment marks by detecting the edges of the alignment marks. The wafer itself can be etched by use of an etcher, such as a plasma etcher. Those skilled in the art can of course appreciate that a plasma etcher represents only one type of etcher that may be utilized in the context of a semiconductor wafer processing system. [0004]
  • Traditional etcher designs focus on etching the entire wafer at one time. Such a design is plagued by center/edge non-uniformity problems, particular for 12″ wafers or larger. Etchers of single wafer or batch type design thus typically suffer center-edge uniformity problems. The inventors of the present invention have thus concluded that a needs exists for an improved apparatus and method which can result in enhanced process control and improved wafer etch uniformity. The present inventors believe this important need can be met through the introduction of an improved scanning-type etcher, which is disclosed and described in greater detail herein. [0005]
  • BRIEF SUMMARY OF THE INVENTION
  • The following summary of the invention is provided to facilitate an understanding of some of the innovative features unique to the present invention, and is not intended to be a full description. A full appreciation of the various aspects of the invention can be gained by taking the entire specification, claims, drawings, and abstract as a whole. [0006]
  • It is therefore one aspect of the present invention to provide an improved semiconductor wafer processing apparatus and method. [0007]
  • It is therefore another aspect of the present invention to provide an improved etcher apparatus and method. [0008]
  • It is also one aspect of the present invention to provide an improved etch head apparatus and method. [0009]
  • It is yet another aspect of the present invention to provide a scanning type etcher to resolve center/edge non-uniformity issues associated with wafer etching. [0010]
  • It is still another aspect of the present invention to provide a moveable etch head which moves according to a step mode for improved process control. [0011]
  • The above and other aspects of the present invention can thus be achieved as is now described. An apparatus and method are disclosed herein for controllably etching a semiconductor wafer fabricated by a semiconductor processing system. Generally, an etcher is associated with the semiconductor processing system, such that etcher includes one or more electrodes thereof. An electrode position monitor can then be utilized for monitoring a position of the electrode, thereby permitting an adjustable size control of the etch head, which is controllable according to an associated etching recipe. The etch head is generally moveable according to a step mode. Such an arrangement thus increases wafer uniformity and precision process control during wafer fabrication and etching. [0012]
  • The etch head generally comprises a moveable etch head, which may be configured to include a gas output device. Such a gas output device may be square-shaped or rectangular-shaped. The electrode itself can comprise a top and/or bottom electrode associated with the etcher. The gas output device is generally associated with the etch head. [0013]
  • The electrode position monitor generally can be arranged to include a high voltage apparatus associated with the electrode, and which provides high voltage data to a main controller. A display device may be linked to the main controller which in turn provides display data indicating whether or not the position of the electrode is satisfactory. Furthermore, the high voltage apparatus can be configured to include an encoder connected to the electrode through a first extension rod; a motor connected to a second extension rod; a chain which is located about the first and second extension rods; and a high voltage controller comprising a DC input signal modulator, wherein the signal modulator device is connected to the encoder. The electrode position monitor can be arranged to further include a fiber optical cable connecting the high voltage apparatus to the main controller; and a resistor located between the main controller and the display device, wherein the main controller comprises a DC output modulator. The display device may be configured as an LED display device. [0014]
  • The apparatus described herein essentially can be arranged to include a motor associated with the etcher and the electrode position monitor; an encoder connected to the electrode and which communicates with the motor; and a gear assembly associated with the motor and the electrode. The etcher comprises a scanning-type etcher. The associated etch head may comprise at least two tubes for gas suction, wherein such tubes can be located external to the etch head.[0015]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompanying figures, in which like reference numerals refer to identical or functionally-similar elements throughout the separate views and which are incorporated in and form part of the specification, further illustrate the present invention and, together with the detailed description of the invention, serve to explain the principles of the present invention. [0016]
  • FIG. 1 depicts a high-level block diagram of an etcher, which may be implemented in accordance with a preferred embodiment of the present invention; [0017]
  • FIG. 2 illustrates a block diagram of an electrode position monitor, which may be implemented in accordance with a preferred embodiment of the present invention; [0018]
  • FIG. 3 depicts a prior art etcher hardware design, which is illustrated herein for illustrative and edification purposes; [0019]
  • FIG. 4 illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention; [0020]
  • FIG. 5 depicts a prior art hardware design, which is illustrated herein for illustrative and edification purposes only; [0021]
  • FIG. 6 illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention; [0022]
  • FIG. 7 depicts a prior art etcher hardware design, which is illustrated herein for illustrative and edification purposes only; [0023]
  • FIG. 8 illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention; [0024]
  • FIG. 9 depicts a block diagram illustrating link encoder and high voltage PLC, which may be implemented in accordance with a preferred embodiment of the present invention; and [0025]
  • FIG. 10 depicts a block diagram illustrating a link LED display and main PLC, which may be implemented in accordance with preferred embodiment of the present invention.[0026]
  • DETAILED DESCRIPTION OF THE INVENTION
  • The particular values and configurations discussed in these non-limiting examples can be varied and are cited merely to illustrate embodiments of the present invention and are not intended to limit the scope of the invention. [0027]
  • FIG. 1 depicts a high-level block diagram of an [0028] etcher 100, which may be implemented in accordance with a preferred embodiment of the present invention. It can be appreciated that etcher 100 represents merely one type of etcher that may be implemented in accordance with the apparatus and method of the present invention. Etcher 100 is thus presented for illustrative purposes only and is not considered a limiting feature of the present invention. Etcher 100 generally includes a variety of hardware components, which are well-known in the art and are thus not necessary to explain herein. In general, however, an electrode 104 is disposed below a source head 102.
  • A [0029] beam 106, which is illustrated generally as an arrow in FIG. 1, passes from electrode 104 to an analysis magnet 108. It is very difficult to tune beam 106 with knowing the position of electrode 104. Because electrode 104 functions as the first slit after source head 102, electrode 104 determines the path necessary to pass beam 106 to analysis magnet 108. Because electrode 104 is generally located in a high-voltage, high-vacuum, and high temperature environment, it is a great challenge to lead out the electrode position. Determining the position of electrode 104 is thus necessary to achieving proper wafer uniformity and process control during wafer etching operations.
  • FIG. 2 illustrates a block diagram of an electrode position monitor [0030] 200, which may be implemented in accordance with a preferred embodiment of the present invention. Electrode position monitor 200 can thus be utilized to solve the problems explained above with respect to FIG. 1. Electrode position monitor 200 generally includes a high-voltage apparatus 214, a main controller (PLC) 220 and a display 222. Note that as utilized herein, the acronym PLC generally represents the term “Programmable Logic Controller.” A resistance 224 is present between display 222 and main PLC 220. Such a resistance 224 can be, for example, approximately 680 ohms. Main PLC 220 can further include a DC output module 216 (e.g., 24 V DC output module). An optical fiber 218 generally links main PLC 220 to high-voltage apparatus 214.
  • [0031] High voltage apparatus 214 generally can include an electrode 202, which is connected through a first extension rod 205 to an encoder 206, which may be configured as an absolute encode which defines 32 positions at 360 degrees. A motor 212 is generally connected to a second extension rod 207, which in turn is connected by a chain 204 to first extension rod 205. A cable 209 further links encoder 206 to a high voltage controller (PLC) 208. High voltage PLC 208 can be configured to include a DC input signal module 210 (e.g., 24 V DC input signal module). High voltage 208 is in turn linked by optical fiber 218 to main PLC 220. Cable 209 may be configured as an optical fiber or another type electrical cable or wire connection. Display 222 may be configured as an LED display.
  • In general, a lead out signal from [0032] encoder 206, which is associated with electrode 202, is sent to high voltage 208 in the form of a high voltage communication. In turn this signal is transferred to main PLC 220, and then to display 222 which indicates whether the position of electrode 202 is satisfactory (i.e., whether the position is “good” or “bad”). Such an indication can be indicated, for example, via display 222, by a green LED or red LED. A red LED light indicates that the position of electrode 202 is “bad,” while a green LED light can indicate that the position of electrode 202 is “good”. In general, electrode 202 of FIG. 2 is analogous to electrode 104 of FIG. 1. An electrode position monitor, such as electrode position monitor 200, can be utilized to indicate whether an electrode, such as electrode 104 of FIG. 1 or electrode 202 of FIG. 2 is satisfactory.
  • FIG. 3 depicts a prior art [0033] etcher hardware design 300, which is illustrated herein for illustrative and edification purposes. Hardware design 300 is illustrated herein to indicate that such a design may be modified in accordance with the apparatus and method of the present invention. The hardware design 400 depicted in FIG. 4 for example, indicates how an improvement to hardware design 300 may be implemented. FIG. 4 thus illustrates an improved etcher hardware design 400, which may be implemented in accordance with a preferred embodiment of the present invention. As indicated in FIG. 4, such an improved etcher design may include the addition of an encoder, as illustrated at block 404, and the addition of a gear assembly, as illustrated at block 404, and an additional motor, as illustrated at block 406. Thus, FIG. 3 and FIG. 4 can be compared to one another to indicate the advantages and improvements that can be achieved according to an implementation of the apparatus and method of the present invention.
  • FIG. 5 depicts a prior art hardware design, which is illustrated herein for illustrative and edification purposes only. [0034] Hardware design 500 is illustrated herein to indicate that such a design may be modified in accordance with the apparatus and method of the present invention. The hardware design 600 depicted in FIG. 6 for example, indicates how an improvement to hardware design 600 may be implemented. FIG. 6 thus illustrates an improved etcher hardware design, which may be implemented in accordance with a preferred embodiment of the present invention. As indicated in FIG. 6, such an improved etcher design may include the addition of an encoder, as illustrated at block 604, and the addition of a gear assembly, as illustrated at block 602, and an additional motor, as illustrated at block 606. Thus, FIG. 5 and FIG. 6 can be compared to one another to indicate the advantages and improvements that can be achieved according to an implementation of the apparatus and method of the present invention.
  • FIG. 7 depicts a prior art [0035] etcher hardware design 700, which is illustrated herein for illustrative and edification purposes only. Hardware design 700 is illustrated herein to indicate that such a design may be modified in accordance with the apparatus and method of the present invention. The hardware design 800 depicted in FIG. 8 for example, indicates how an improvement to hardware design 700 may be implemented. FIG. 8 thus illustrates an improved etcher hardware design 800, which may be implemented in accordance with a preferred embodiment of the present invention. As indicated in FIG. 8, such an improved etcher design may include the addition of an encoder, as illustrated at block 806, and the addition of a gear assembly, as illustrated at block 804, and an additional motor, as illustrated at block 802. Thus, FIG. 7 and FIG. 8 can be compared to one another to indicate the advantages and improvements that can be achieved according to an implementation of the apparatus and method of the present invention.
  • FIG. 9 depicts a block diagram [0036] 900 illustrating a link encoder and high voltage PLC, which may be implemented in accordance with a preferred embodiment of the present invention. In general, block diagram 900 illustrates an encoder 902, which is generally analogous to encoder 206 depicted in FIG. 2 herein. A high voltage PLC 904 communicates with encoder 902 through lines 910, 912, 914, 916, 918, and 920. Encoder 928 also contains lines 924 (i.e., P24) and 926 (i.e., N24), along with a ground line 928. High voltage PLC 904 communicates with main PLC 906 via a fiber optic cable 908. Note that high voltage PLC 904 is generally analogous to high-voltage PLC 208 illustrated in FIG. 2. In addition, main PLC 906 indicated in FIG. 9 is generally analogous to main PLC 220 depicted in FIG. 2.
  • FIG. 10 depicts a block diagram [0037] 1000 illustrating a link LED display 1010 and main PLC 1006, which may be implemented in accordance with a preferred embodiment of the present invention. In general, a high-voltage PLC 1004 can be connected to main PLC 1006 and a main PLC 1008 by lines 1002 and 1003. Main PLC 1006 and main PLC 1008 together can function as a single main PLC device. In turn main PLC 1006 and 1008 can communicate with a display 1010. Display 1010 is generally analogous to display 222 of FIG. 2.
  • Recall that display [0038] 222 of FIG. 2 may be configured as an LED display. Main PLC 1006 and 1008 of FIG. 10 are generally analogous to main PLC 220 illustrated in FIG. 2. Additionally, high-voltage PLC 1004 of FIG. 10 is generally analogous to high-voltage PLC 208, which is depicted in FIG. 2.
  • Based on the foregoing, it can be appreciated that the present invention generally describes an apparatus and method for controllably etching a semiconductor wafer fabricated by a semiconductor processing system. Generally, an etcher is associated with the semiconductor processing system, such that etcher includes one or more electrodes thereof. An electrode position monitor can then be utilized for monitoring a position of the electrode, thereby permitting an adjustable size control of the etch head, which is controllable according to an associated etching recipe. The etch head is generally moveable according to a step mode (i.e., one die at a time or one slit at a time). Such an arrangement thus increases wafer uniformity and precision process control during wafer fabrication and etching. [0039]
  • The etch head generally comprises a moveable etch head, which may be configured to include a gas output device. Such a gas output device may be square-shaped or rectangular-shaped. The electrode itself can comprise a top and/or bottom electrode associated with the etcher. The gas output device is generally associated with the etch head. [0040]
  • The electrode position monitor generally can be arranged to include a high voltage apparatus associated with the electrode, and which provides high voltage data to a main controller. A display device may be linked to the main controller which in turn provides display data indicating whether or not the position of the electrode is satisfactory. Furthermore, the high voltage apparatus can be configured to include an encoder connected to the electrode through a first extension rod; a motor connected to a second extension rod; a chain which is located about the first and second extension rods; and a high voltage controller comprising a DC input signal modulator, wherein the signal modulator device is connected to the encoder. The electrode position monitor can be arranged to further include a fiber optical cable connecting the high voltage apparatus to the main controller; and a resistor located between the main controller and the display device, wherein the main controller comprises a DC output modulator. The display device may be configured as an LED display device. [0041]
  • The apparatus described herein essentially can be arranged to include a motor associated with the etcher and the electrode position monitor; an encoder connected to the electrode and which communicates with the motor; and a gear assembly associated with the motor and the electrode. The etcher comprises a scanning-type etcher. In such a scanning-type etcher, scanning can be achieved through step scan methods and/or continuous scan methods, depending upon a desired implementation. The associated etch head may comprise at least two tubes for gas suction, wherein such tubes can be located external to the etch head. Thus, the etch head described herein may or may not be configured to posses a double tube design for gas suction configured outside the etch head. The etch head itself, as indicated previously, has an adjustable size control, which can be controlled by the etching recipe. [0042]
  • The embodiments and examples set forth herein are presented to best explain the present invention and its practical application and to thereby enable those skilled in the art to make and utilize the invention. Those skilled in the art, however, will recognize that the foregoing description and examples have been presented for the purpose of illustration and example only. Other variations and modifications of the present invention will be apparent to those of skill in the art, and it is the intent of the appended claims that such variations and modifications be covered. The description as set forth is thus not intended to be exhaustive or to limit the scope of the invention. Many modifications and variations are possible in light of the above teaching without departing from scope of the following claims. It is contemplated that the use of the present invention can involve components having different characteristics. It is intended that the scope of the present invention be defined by the claims appended hereto, giving full cognizance to equivalents in all respects. [0043]

Claims (28)

What is claimed is:
1. An apparatus for controllably etching a semiconductor wafer fabricated by a semiconductor processing system, said apparatus comprising:
an etcher associated with said semiconductor processing system, wherein said etcher comprises at least one electrode thereof;
an electrode position monitor for monitoring a position of said at least one electrode thereof to thereby permit an adjustable size control of said etch head controllable according to an associated etching recipe; and
wherein said etch head is moveable according to a step mode thereby promoting increased uniformity and precision process control across said semiconductor wafer during fabrication thereof.
2. The apparatus of claim 1 wherein said etch head comprises a moveable etch head.
3. The apparatus of claim 1 wherein said gas output device comprises a square-shaped gas output device.
4. The apparatus of claim 1 wherein said gas output device comprises a rectangular-shaped gas output device.
5. The apparatus of claim 1 wherein said at least one electrode comprises a top electrode associated with said etch head.
6. The apparatus of claim 1 wherein said at least one electrode comprises a bottom electrode associated with said etch head.
7. The apparatus of claim 1 further comprising:
a gas output device associated with said etch head.
8. The apparatus of claim 1 wherein said electrode position monitor comprises:
a high voltage apparatus associated with said at least one electrode which provides high voltage data to a main controller;
a display device linked to said main controller which provides display data indicating whether or not a position of said at least one electrode is satisfactory.
9. The apparatus of 8 wherein said high voltage apparatus comprises:
an encoder connected to said at least one electrode through a first extension rod;
a motor connected to a second extension rod;
a chain which is located about said first and second extension rods;
a high voltage controller comprising a DC input signal module, wherein said signal module device is connected to said encoder.
10. The apparatus of claim 9 wherein said electrode position monitor further comprises;
a fiber optical cable connecting said high voltage apparatus to said main controller; and
a resistor located between said main controller and said display device, wherein said main controller comprises a DC output module.
11. The apparatus of claim 10 wherein said display device comprises an LED display device.
12. The apparatus of claim 1 further comprising;
a motor associated with said etcher and said electrode position monitor.
an encoder connected to said at least one electrode and which communicates with said motor;
a gear assembly associated with said motor and said at least one electrode.
13. The apparatus of claim 1 wherein said etcher comprises a scanning-type etcher.
14. The apparatus of claim 1 wherein said etch head comprises at least two tubes for gas suction, wherein said at least two tubes are located external to said etch head.
15. A method for controllably etching a semiconductor wafer fabricated by a semiconductor processing system, said method comprising the steps of:
associating an etcher associated with a semiconductor processing system, wherein said etcher comprises at least one electrode thereof;
monitoring a position of said at least one electrode thereof utilizing an electrode position monitor to thereby permit an adjustable size control of said etch head controllable according to an associated etching recipe; and
moving said etch head according to a step mode, thereby promoting increased uniformity and precision process control across said semiconductor wafer during fabrication thereof.
16. The method of claim 15 wherein said etch head comprises a moveable etch head.
17. The method of claim 15 further comprising the step of:
configuring said gas output device as a square-shaped gas output device.
18. The method of claim 15 further comprising the step of:
configuring said gas output device as a rectangular-shaped gas output device.
19. The method of claim 15 wherein further comprising the step of:
configuring said at least one electrode as a top electrode associated with said etch head.
20. The method of claim 15 further comprising the step of:
configuring said at least one electrode as a bottom electrode associated with said etch head.
21. The method of claim 15 further comprising the step of:
associating a gas output device with said etch head.
22. The method of claim 15 further comprising the step of:
configuring said electrode position monitor to comprise:
a high voltage apparatus associated with said at least one electrode which provides high voltage data to a main controller; and
a display device linked to said main controller which provides display data indicating whether or not a position of said at least one electrode is satisfactory.
23. The method of claim 22 further comprising the step of:
configuring said high voltage apparatus to comprise:
an encoder connected to said at least one electrode through a first extension rod;
a motor connected to a second extension rod;
a chain which is located about said first and second extension rods; and
a high voltage controller comprising a DC input signal module, wherein said signal module device is connected to said encoder.
24. The method of claim 23 further comprising the step of:
configuring said electrode position monitor to comprise:
a fiber optical cable connecting said high voltage apparatus to said main controller; and
a resistor located between said main controller and said display device, wherein said main controller comprises a DC output module.
25. The method of claim 24 wherein said display device comprises an LED display device.
26. The method of claim 15 further comprising the steps of:
associating a motor with said etcher and said electrode position monitor.
connecting an encoder to said at least one electrode and which communicates with said motor;
associating a gear assembly with said motor and said at least one electrode.
27. The method of claim 15 wherein said etcher comprises a scanning-type etcher.
28. The method of claim 15 further comprising the steps of:
configuring said etch head to comprise at least two tubes for gas suction; and
locating said at least two tubes external to said etch head.
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US5448442A (en) * 1988-06-22 1995-09-05 Siemens Energy & Automation, Inc. Motor controller with instantaneous trip protection
US20030154908A1 (en) * 2002-11-19 2003-08-21 Webber Dominic George Manufacturing method and apparatus
US6615091B1 (en) * 1998-06-26 2003-09-02 Eveready Battery Company, Inc. Control system and method therefor
US6776840B1 (en) * 1999-03-22 2004-08-17 Memc Electronic Materials, Inc. Method and apparatus for controlling diameter of a silicon crystal in a locked seed lift growth process

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US5093804A (en) * 1984-06-04 1992-03-03 Ge Fanuc Automation North America, Inc. Programmable controller input/output communications system
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