US20050178574A1 - Electronic part mounting substrate, electronic part, and semiconductor device - Google Patents
Electronic part mounting substrate, electronic part, and semiconductor device Download PDFInfo
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- US20050178574A1 US20050178574A1 US10/960,721 US96072104A US2005178574A1 US 20050178574 A1 US20050178574 A1 US 20050178574A1 US 96072104 A US96072104 A US 96072104A US 2005178574 A1 US2005178574 A1 US 2005178574A1
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- main surface
- conductive portion
- electronic part
- substrate
- insulating portion
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
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- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
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- H05K1/114—Pad being close to via, but not surrounding the via
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H05K2201/10954—Other details of electrical connections
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
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Definitions
- the present invention relates to an electronic part mounting substrate, an electronic part, and a semiconductor device in which an electronic part is mounted on an electronic part mounting substrate.
- Patent Document 1
- Patent Document 2
- patent document 1 merely discloses that a material high in thermal conductivity is adopted as a material for heat radiation.
- a principal object of the present invention is to provide an electronic part mounting substrate capable of efficiently radiating heat produced from an electronic part such as a chip to the outside, an electronic part and a semiconductor device in which an electronic part is mounted on an electronic part mounting substrate.
- a substrate for mounting an electronic part thereon which includes a base body having a first main surface and a second main surface opposite to the first main surface, and a through hole which penetrates from the first main surface to the second main surface; a first conductive portion formed on an inner wall surface of the through hole; and a first insulating portion which is formed on the first conductive portion and higher in thermal emissivity than the first conductive portion.
- an insulating portion higher in thermal emissivity than a conductive portion formed on an inner wall surface of a through hole defined in the substrate is formed on the conductive portion.
- an insulating portion excellent in thermal emission which is provided on a first conductive portion, promotes the high-efficiency radiation of heat transferred from an electronic part used as a heat generation source to the first conductive portion to the outside.
- an excellent heat radiating effect can be realized by use of the through hole defined in the substrate without additionally mounting a radiating part such as a radiating fin.
- a semiconductor device which includes a base body having a first main surface and a second main surface opposite to the first main surface, and a through hole which penetrates from the first main surface to the second main surface; a first conductive portion formed on an inner wall surface of the through hole; second conductive portion formed on the first main surface and the second main surface so as to be connected to the first conductive portion; an electronic part mounted on the first main surface, said electronic part being electrically connected to the second conductive portion formed on the first main surface; a first insulating portion which is formed on the first conductive portion and higher in thermal emissivity than the first conductive portion; and an external terminal formed on the second conductive portion provided on the second main surface.
- an electronic part mounted on a main surface of a substrate for mounting the electronic part thereon, which includes: a protruded conductive portions respectively electrically connected to conductive portions formed on the main surface of the substrate; and an auxiliary conductive portion which extends from a surface of the electronic part different from a surface thereof on which the protruded conductive portions are formed, to the main surface of the substrate, said auxiliary conductive portion having a length provided in the extending direction, which is set as a length at which face contact with the main surface of the substrate is enabled upon mounting of the electronic part.
- a semiconductor device which includes a substrate for mounting an electronic part thereon; and said electronic part mounted on a main surface of the substrate, said electronic part including, protruded conductive portions respectively electrically connected to conductive portions formed on the main surface of the substrate; and an auxiliary conductive portion which extends from a surface of the electronic part different from a surface thereof on which the protruded conductive portions are formed, to the main surface of the substrate, said auxiliary conductive portion having a length provided in the extending direction, which is set as a length at which face contact with the main surface of the substrate is enabled upon mounting of the electronic part.
- FIG. 1 is a schematic cross-sectional view for describing a first embodiment of the present invention
- FIG. 2 is a schematic view (part 1 ) for describing the outline of a method of measuring a thermal resistance value, according to the first embodiment of the present invention
- FIG. 3 is a schematic view (part 2 ) for describing the outline of the method of measuring the thermal resistance value, according to the first embodiment of the present invention
- FIG. 4 is a view showing the result of measurement of thermal resistance values, which is obtained in the first embodiment of the present invention.
- FIG. 5 is a schematic cross-sectional view for describing a second embodiment of the present invention.
- FIG. 6 is a schematic cross-sectional view for describing a third embodiment of the present invention.
- FIG. 7 is a view (part 1 ) for describing metal support sections employed in the third embodiment of the present invention.
- FIG. 8 is a view (part 2 ) for describing the metal support sections employed in the third embodiment of the present invention.
- FIGS. 1 through 8 Preferred embodiments of the present invention will hereinafter be described with reference to FIGS. 1 through 8 .
- the drawings merely schematically show the size, shape and positional relationships of respective components to such a degree that the present invention can be understood.
- the present invention is by no means limited to the illustrated examples.
- some hatching indicative of cross-sections are omitted except for parts.
- embodiments to be described below are simply preferred examples and illustrated numerical conditions are by no means limited to them. Similar components illustrated in the respective drawings are respectively identified by the same reference numerals, and the description of certain common components might be omitted.
- FIG. 1 is a schematic cross-sectional view showing a packaging structure on which an electronic part or component used as a heat generation source according to the present embodiment is mounted (or called also “packaged”).
- the present embodiment will explain, as an example, a case in which the electronic component used as the heat generation source is configured as a WCSP (Waterlevel Chip Size Package) 30 corresponding to a semiconductor package having substantially the same outer size as that of a semiconductor chip, and a heat radiation mechanism is provided in a printed wiring board 20 .
- WCSP Waterlevel Chip Size Package
- the term “substantially the same” means that such a configuration that the outer size of the package assumes a size increased up to about 20% with respect to the outer size of the semiconductor chip as well as such a configuration that the outer size of the package is just the same size as the outer size of the semiconductor chip.
- the WCSP is called one of those fractionalized by dicing or the like after the completion of all up to an external terminal forming process while remaining in a wafer state.
- the printed wiring board is called one in which on the basis of predetermined circuit design, conductor patterns are formed on the surface of an insulating base material or conductor wirings are formed on the surface thereof and thereinside by patterning.
- a BGA All Grid Array
- This can be selected suitably at random.
- the WCSP 30 is mounted over the printed wiring board 20 . Described specifically, second conductive portion 27 provided in the printed wiring board 20 and solder balls 39 each corresponding to a first protruded conductive portion are electrically connected to one another in contact with one another.
- the WCSP 30 corresponding to the electronic part will first be explained. Since the conventionally known structure can be applied to the WCSP 30 used herein, its structure example will be explained below in brief.
- a passivation film 34 and a protective film 35 are sequentially provided on a semiconductor chip 32 provided with circuit elements (not shown) so as to expose the surface of each of electrode pads 33 each electrically connected to its corresponding circuit element.
- the passivation film 34 is formed of, for example, a silicon oxide film (SiO 2 ).
- the protective film 35 is formed of a film material low in hardness such as a polyimide resin and suppresses shock against the semiconductor chip 32 and peeling due to stress between the semiconductor chip 32 and an encapsulating or sealing film 38 to be described later.
- Wiring layers (called also “redistribution wiring layers”) 36 respectively extend in the direction of the center of the semiconductor chip 32 over the protective film 35 .
- the electrode pads 33 are electrically individually connected to their corresponding post portions 37 through the wiring layers 36 .
- the solder balls 39 corresponding to the protruded conductive portions, which are formed on their corresponding end faces (or top faces) of the post portions 37 can be relocated from positions directly above the electrode pads 33 to desired positions on the upper side of the semiconductor chip 32 by means of the wiring layers 36 .
- the printed wiring board 20 with the WCSP 30 mounted thereon will be explained subsequently.
- the second conductive portions 27 are formed by patterning on the obverse and reverse surfaces of a glass epoxy base material 22 used as a base body, i.e., a first main surface 22 a and a second main surface 22 b .
- the second conductive portions 27 are respectively conductor wirings made of copper foil (Cu).
- An extend-through hole (called also “viaholes or through holes”) 22 c which extends or penetrates between the obverse and reverse surfaces ( 22 a and 22 b ) of the base material 22 , is defined in the base material 22 of the printed wiring board 20 .
- a first conductive portion 26 is formed on an inner wall surface 22 d of the through hole so as to be continuous with its corresponding second conductive portions 27 .
- the first conductive portion 26 serves as a thermal via portion which shares the use of a conductor wiring.
- stoppers 21 may be formed of a resist material or the like at the peripheral edge of the through hole 22 c on the second conductive portion 27 connected to its corresponding solder ball 39 . The stoppers 21 have the function of preventing solder to flow into the through hole 22 c upon mounting of the WCSP 30 .
- the first conductive portion 26 can be provided by forming the through hole (indicates by a dotted line in FIG. 1 ) 22 c in the base material 22 with a drill or the like and thereafter forming and providing copper on the inner wall surface 22 d by plating.
- the formation of the first conductive portion 26 is performed before the second conductive portions 27 are formed on the surface layer of the base material 22 by patterning.
- the first conductive portion 26 and its corresponding solder ball 39 may be configured so as to be directly connected to each other. However, owing to the placement of the solder ball 39 on the second conductive portion 27 as shown in FIG. 1 , alignment accuracy at the mounting of the WCSP 30 can preferably be relaxed. Since the second conductive portion 27 is formed over the second main surface 22 b as well as inside the through hole 22 c as in the present configurational example, heat can preferably be transferred to the back surface 22 b of the printed wiring board 20 reliably in terms of thermal radiation.
- a first insulating portion 25 higher in thermal emissivity than the first conductive portion 26 is formed on the first conductive portion 26 lying in the through hole 22 c.
- the first insulating portion 25 higher in thermal emissivity than the first conductive portion has such a structure as to fill up the interior of a hollow portion defined by the first conductive portion 26 formed on the inner wall surface of the through hole 22 c.
- a coating material containing ceramics may preferably be used as the material for the first insulating portion 25 .
- alumina ceramics or the like containing Al 2 O 3 as a major component can be used.
- One or the like containing such ceramics as described in, for example, Japanese Laid Open Patent Application No. 10-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used.
- the heat transferred from the WCSP 30 to the first conductive portion 26 can be thermally radiated (or called also “emitted”) from the first insulating portion 25 to the outside as infrared radiation.
- the rise in the ambient temperature around the thermal via portion 26 can be suppressed and efficient thermal radiation can be realized.
- thermal conductivity and thermal emissivity at the time that the through hole 22 c is filled with only copper used for the first conductive portion 26 are respectively given as about 137 W/m ⁇ K and about 0.03.
- thermal conductivity and thermal emissivity in the case of such a configuration that the through hole 22 c is filled with the alumina ceramics used for the first insulating portion 25 reach about 161 W/m ⁇ K and about 0.92 respectively.
- the first insulating portion 25 may be formed on the first conductive portion 26 lying in the through hole 22 c with a predetermined film thickness.
- a heat radiating effect can preferably be further promoted by filling up the through hole 22 c with the first insulating portion 25 , i.e., embedding the first insulating portion 25 in the through hole 22 c.
- each of the second and third insulating portions ( 28 and 29 ) used here is also a coating material containing ceramics in a manner similar to the first insulating portion 25 .
- Such first, second and third insulating portions can be formed by, for example, applying a liquid infrared-emissive insulator coating material to a predetermined area by a spray method and thermally curing it.
- the printed wiring board 20 employed in the present embodiment combines a function used as a wiring board and a function used as an excellent radiating plate, which makes it possible to carry out high-efficiency heat radiation by the infrared emissive insulator.
- the verification of the radiating effect of the printed wiring board 20 having the above-described structure was done by measuring a “thermal resistance value ( ⁇ ja)” used as an index of the radiating effect.
- FIG. 2 (A) is a schematic view for describing a summary of the method of measuring the thermal resistance value where the electronic part is configured as the WCSP 30 .
- the P-VFLGA48-0606-0.8 manufactured by Oki Electric Industry Co., Ltd. was used as for the WCSP 30 used here.
- the temperature at the boundary between the semiconductor chip 32 and the passivation film 34 bonded to the semiconductor chip 32 was set as a junction temperature (Tj), and the temperature at a position spaced a predetermined distance away from the WCSP 30 was set as a reference point temperature (Ta).
- FIG. 2 (B) is a schematic cross-sectional view for describing the summary of the method of measuring the thermal resistance value where the electronic part is configured as the BGA 50 .
- the P-BGA352-3535-1.27 manufactured by Oki Electric Industry Co., Ltd. was used as for the BGA 50 used here.
- the structure of the BGA 50 is substantially similar to the conventional known wire bonding system, its structure will be explained below in brief.
- a semiconductor chip 53 is mounted on an insulated board 52 with a circuit element (not shown) forming surface set as the upper side. Electrode pads 54 connected to their corresponding circuit elements are connected to their corresponding conductor patterns 55 on the insulated board 52 by wires 56 . Thus, a predetermined circuit element is electrically connected to its corresponding solder ball 58 corresponding to an external terminal via a contact 57 provided so as to penetrate between the obverse and reverse surfaces of the insulated board 52 . A resin sealing or encapsulating film 59 , which buries and seals the semiconductor chip 53 , is formed on the insulated board 52 .
- the semiconductor patterns 55 shown here are formed of copper and the wires 56 are formed of gold (Au).
- the temperature at the boundary between the semiconductor chip 53 and the resin encapsulating film 59 bonded to the semiconductor chip 53 was set as a junction temperature (Tj), and the temperature at a position spaced a predetermined distance away from the BGA 50 was set as a reference point temperature (Ta).
- a constant voltage power supply 81 applies a power of 1 W to a resistor R provided in the neighborhood of a position where a junction temperature (Tj) of each of the semiconductor chips ( 32 and 53 ) is measured, to thereby generate heat, whereby a thermal saturated state (or called also “thermal equilibrium state”) is formed.
- the constant voltage power supply 81 is fine-adjusted by reference to an ammeter 82 and a voltmeter 83 to supply the power (1 W).
- a constant current power supply 84 is activated to cause current to flow in a diode D provided in the semiconductor chip near the resistor R, and a voltage value obtained at this time is measured by the voltmeter 85 , whereby the above junction temperature (Tj) is calculated.
- a reference point temperature (Ta) is measured by means of a thermocouple (not shown) or the like.
- measuring samples different in the insulating portion forming area were prepared to examine the influence of infrared emissive insulating portions on thermal resistance values as shown in FIG. 3 .
- BGA is also similar to it.
- Sample (1) no infrared emissive insulating portion is formed (see FIG. 3 (A)). Incidentally, the sample (1) might be called plank (1) below.
- Sample (2) an infrared emissive fourth insulating portion 24 is formed from the whole surface of a WCSP to over a first main surface 22 a (see FIG. 3 (B)).
- the insulating portion is set to a thickness of about 1 ⁇ 10 ⁇ 4 m at this time.
- Sample (3) infrared emissive first through third insulating portions ( 25 , 28 and 29 ) are formed on a second main surface 22 b and inside a through hole 22 c in addition to the area described in the sample (2) (see FIG. 3 (C)).
- the insulating portions are set to a thickness of about 1 ⁇ 10 ⁇ 4 m and the corresponding insulating portion is charged into the through hole 22 c.
- the method of measuring the thermal resistance value is not limited to only the above methods.
- Measurement conditions for the parameters (Tj and Ta) are set based on, for example, JEDEC (Joint Electron Device Engineering Council) standard or the like.
- JEDEC Joint Electron Device Engineering Council
- arbitrary and suitable methods and measurement conditions can be selected according to purpose and design.
- FIG. 4 shows the result of measurement of thermal resistance values Oja.
- FIG. 4 (A) is the result of measurement thereof where the electronic part is set as a WCSP
- FIG. 4 (B) is the result of measurement thereof where the electronic part is set as a BGA.
- thermal resistance values placed under respective conditions with the thermal resistance value of the plank (1) as a reference value are illustrated as bar graphs. Further, reduction rates (%) relative to the thermal resistance value of the plank (1) are described together in addition.
- an insulating portion higher in thermal emissivity than a conductive portion is formed on the conductive portion formed on an inner wall surface of a through hole defined in a printed wiring board or the like on which an electronic part is mounted.
- heat transferred from the electronic part to the insulating portion via the conductive portion can be highly efficiently radiated from the insulating portion as infrared radiation. Therefore, a heat radiating effect can be promoted without additionally mounting a radiating part such as a radiating fin.
- the present embodiment is principally different from the first embodiment in that infrared emissive insulating portions similar to those employed in the first embodiment are formed on an interposer board packageable on the substrate for the motherboard, and a heat radiating insulating portion is formed on the whole surface of the interposer board so as to cover an outer surface of an electronic part or component.
- infrared emissive insulating portions similar to those employed in the first embodiment are formed on an interposer board packageable on the substrate for the motherboard, and a heat radiating insulating portion is formed on the whole surface of the interposer board so as to cover an outer surface of an electronic part or component.
- the present embodiment will explain, as an example, a board or substrate for an MCM (Multi Chip Module) as a package's interposer board.
- the MCM is one obtained by mounting, for example, a plurality of packages and their peripheral parts and the like on one high density board and bringing them into module form.
- MCM boards in addition to the above.
- a plurality of WCSPs each used as a constituent or component parts such as a flash memory are formed on an MCM board 70 .
- MCM board 70 since the structure of the WSCP has already been described in the first embodiment, its description will be omitted.
- second conductive portions 77 are formed by patterning on the obverse and reverse surfaces of a glass epoxy base material 72 , i.e., a first main surface 72 a and a second main surface 72 b.
- a through hole 72 c which penetrates between the obverse and reverse surfaces ( 72 a and 72 b ) of the base material 72 , is defined in the base material 72 of the MCM board 70 .
- a first conductive portion 76 which serves as a thermal via portion that shares the use of a conductor wiring, is formed on an inner wall surface 72 d of the through hole. Also the first conductive portion 76 is formed so as to be continuous with its corresponding second conductive portions 77 on the first and second main surfaces ( 72 a and 72 b ).
- a first insulating portion 75 higher in thermal emissivity than the first conductive portion 76 is formed on the first conductive portion 76 lying in the through hole 72 c .
- the first insulating portion 75 has a structure in which it fills up, i.e., buries the interior of a hollow portion defined by the first conductive portion 76 on the inner wall surface of the through hole 72 c .
- a second insulating portion 78 higher in thermal emissivity than the first conductive portion 76 is formed on the second main surface 72 b
- a third insulating section 79 higher in thermal emissivity than the first conductive portion 76 is formed on the second main surface 72 b with the corresponding second conductive portion 77 interposed therebetween. They are formed continuous with the first insulating portion 75 .
- a heat radiating fourth insulating portion 74 is formed on the whole area of the second main surface 72 a of the MCM board 70 so as to cover an electronic part 30 .
- solder balls 80 each used as a second protruded conductive portion, which are mountable on a board or substrate 88 for the motherboard with the MCM board 70 mountable thereon, are formed on the second main surface 72 b side of the MCM board 70 .
- the solder ball 80 is connected to its corresponding solder ball 39 through a second conductive portion 77 provided on a main surface 72 b of the MCM board 70 , a first conductive portion (not shown) provided within a through hole (not shown) of the MCM board 70 and electrically connected to the second conductive portion 77 , and a second conductive portion 77 provided on a first main surface 72 a and electrically connected to the first conductive portion.
- the materials for the first, second and third insulating portions ( 75 , 78 and 79 ) used here may preferably use a coating material containing ceramics, for example.
- a coating material containing ceramics has a high thermal emissivity of 90% or more in most cases as well as thermal conduction and is capable of realizing high-efficiency heat radiation.
- alumina ceramics or the like containing Al 2 O 3 as a major component can be used.
- One or the like containing such ceramics as described in, for example, Japanese Unexamined Patent Publication No. Hei 10(1998)-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used.
- the board having such a heat radiating effect can be applied to an interposer board such as an MCM board capable of mounting other substrate thereon.
- the heat radiating insulating portion is formed over the whole surface on the interposer board 70 so as to cover the electronic part. As a result, higher-efficiency heat radiation toward the outside can be realized.
- a third embodiment of the present invention will be explained with reference to FIG. 6 .
- the present embodiment is principally different from the first embodiment in that processing for promoting a heat radiating effect is mainly effected on the electronic part side.
- an electronic part 40 includes an auxiliary conductive portion (hereinafter might be called “metal support section”) for efficiently transferring heat from the electronic part 40 to a substrate or board 60 with the electronic part 40 mounted thereon.
- metal support section a material such as copper excellent in thermal conduction can be suitably selected at random as for the metal support section 45 .
- the present embodiment will explain, by way of example, a case in which the electronic part 40 is configured as a WCSP provided with solder balls 39 each used as a substrate mounting protruded conductive portion and the substrate 60 is configured as a printed wiring board.
- a first feature resides in that as shown in FIG. 6 , the metal support section 45 extends from over the surface of the WCSP 40 , which is different from the surface on which the solder balls 39 are formed, to a main surface 60 a of the substrate, and the length of the metal support section 45 as viewed in its extending direction is equivalent to the length brought into face contact with the main surface 60 a of the substrate.
- the ends of the metal support section 45 as viewed in the extending direction of the metal support section 45 employed in the present embodiment have shapes bent in the direction non-opposite to the WCSP 40 , i.e., in the direction away outside from the WCSP.
- the shapes of the ends thereof are not limited to such shapes.
- the ends thereof may have portions brought into contact with the main surface 60 a of the substrate.
- the length of the metal support section 45 as viewed in its extending direction may be such a length or the like that the metal support section 45 extends through the main surface 60 a of the substrate 60 and is embedded in the substrate 60 .
- Various shapes can be suitably selected at random according to purpose and design (the details thereof will be described later).
- the metal support section 45 may be provided so as to cover a wide area on an exposed surface of a silicon (Si) substrate 32 constituting a semiconductor chip 32 , of the surface of the WCSP 40 . This is because heat generated from a silicon surface including a circuit element that serves as a heat generation source can efficiently be transferred to an insulating portion 47 and the substrate 60 .
- heat on the back surface (i.e., back surface 32 b of the semiconductor chip) and side surfaces (i.e., side surfaces 32 c of the semiconductor chip) of the WCSP 40 are promptly transferred to the insulating portion 47 and further transferred even to the substrate 60 promptly. That is, since heat transfer paths between the WCSP 40 and the insulating portion 47 and between the WCSP 40 and the substrate 60 can be reinforced, the heat from the WCSP 40 can reliably be transferred to the substrate 60 .
- a second feature resides in that the infrared emissive insulating portion 47 is formed on the metal support section 45 .
- the infrared emissive insulating portion 47 covers the whole surface of the WCSP 40 including over the metal support section 45 and is formed over the main surface 60 a of the substrate 60 .
- the insulating portion 47 may take a configuration in which it is formed on the metal support section 45 with a predetermined film thickness. Since, however, the insulating portion is provided in a wide-ranging region including over the metal support section 45 in this way, the area of heat radiation is made larger, thereby making it possible to further promote a heat radiating effect.
- the material for the insulating portion 47 employed in the present embodiment may also preferably use a coating material containing ceramics, for example.
- a coating material containing ceramics has a high thermal emissivity of 90% or more in most cases as well as thermal conduction and is capable of realizing high-efficiency heat radiation.
- alumina ceramics or the like containing Al 2 O 3 as a major component can be used.
- One or the like containing such ceramics as described in, for example, Japanese Unexamined Patent Publication No. Hei 10(1998)-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used.
- the insulating portion 47 can be formed by applying a liquid infrared-emissive insulator coating material to a predetermined area from the main surface 60 a side of the substrate by, for example, a spray method after the formation of the metal support section 45 on the WCSP 40 , and thermally curing it.
- the heat from the WCSP 40 which has been reliably transferred to the substrate 60 through the metal support section 45 , can be converted to infrared radiation with high heat emissivity by means of the insulating portion 47 and emitted outside, thereby making it possible to promote a heat radiating effect.
- FIGS. 7 (A) through 7 (C) are schematic cross-sectional views of the structure shown in FIG. 6 as viewed from the direction indicated by arrow P in the figure.
- Upper stages thereof are developed views of the metal support sections 45 corresponding to the lower stages. Illustrations of infrared emissive insulating portions 47 are omitted here.
- arbitrary suitable methods such as a method of heating a molded metal support section 45 at a predetermined temperature and welding it to the WCSP 40 , etc. can be used.
- the metal support section 451 shown in FIG. 7 (A) has such a shape as to fully cover the whole surface of the WCSP 40 . Although there is a fear of stress concentration due to such a shape, heat generated from the silicon surface can be reliably transferred to the corresponding substrate 60 side. Incidentally, such a shape can be formed by means of an etching process or the like.
- the metal support section 452 shown in FIG. 7 (B) is different from the metal support section 451 shown in FIG. 7 (A) in that it has such a shape as to cover the whole area of a back surface 32 b of a semiconductor chip 32 . Owing to the provision of such a shape, heat generated from the surface of a silicon substrate constituting the semiconductor chip can be transferred to the corresponding substrate 60 with efficiency. Incidentally, such a shape can be formed by means of an etching process or the like.
- the metal support section 453 shown in FIG. 7 (C) has such a shape as to cover the back surface and side surfaces of a WCSP 40 in a mesh fashion. Since there are formed slits 49 which extend from a main surface 60 a of a substrate to the WCSP 40 , the concentration of stress due to the difference in thermal expansion coefficient, which occurs in the boundary between the substrate 60 and the WCSP 40 , can be relaxed. Since such a flat or plate-shaped copper plate including mesh patterns can be relatively easily molded through the use of a die or the like, it is excellent in manufacturing cost.
- connecting pins 65 which extend through a main surface 60 a of the substrate and are embedded in the substrate 60 , are formed at their corresponding ends of the metal support section 45 . Owing to the provision of such connecting pins 65 , a WCSP 40 mounted on the substrate 60 can be prevented from causing its position displacement due to external shock and maintained in a stable mounted state.
- the metal support section at this time can be fabricated by, for example, welding connecting pins 65 separately formed of copper to the ends (positions indicated by Q in FIG. 7 (A), for example) of the flat copper plate so as to become normal to the copper plate. Then, the connecting pins 65 may be fitted in and fixed to their corresponding pores of the substrate 60 , which has previously been formed by, for example, a drill or the like.
- FIG. 8 (B) is different from FIG. 8 (A) in that the ends per se of the metal support section 45 are respectively connecting pins 67 . Since there is no need to weld the connecting pins separately in the case of such a shape, the present example is excellent in manufacturing cost.
- the support section at this time can be fabricated by processing a flat copper plate in advance in consideration of portions embedded in the substrate 60 , which serve as connecting pins. In a manner similar to FIG. 8 (A), a stable mounted state can suitably be maintained.
- the ends of the metal support section 45 are respectively bent in the direction opposite to the WCSP 40 . Therefore, the present example is excellent in that the suppression of the degree of freedom of wiring design due to the placement of the connecting pins does not occur as compared with the structure that the connecting pins serving as the conductors are embedded therein.
- the shapes of the infrared emissive insulating portion and the metal support section are not limited to only the above-described shapes but can be formed in various ways according to purpose and design.
- the heat reliably transferred to the substrate side can highly efficiently be converted into infrared radiation by the infrared emissive insulating portion 47 , followed by being radiated, thereby making it possible to promote a heat radiating effect.
- the present invention is not limited to the aforementioned embodiment alone.
- the present invention can be applied by utilizing the above conditions in combination suitably at random.
Abstract
Description
- 1. Field of the Invention
- The present invention relates to an electronic part mounting substrate, an electronic part, and a semiconductor device in which an electronic part is mounted on an electronic part mounting substrate.
- This application is counterpart of Japanese patent application, Serial Number 34709/2004, filed Feb. 12, 2004, the subject matter of which is incorporated herein by reference.
- 2. Description of the Related Art
- The development of a technique for radiating heat produced from an electronic part to the outside with high efficiency has heretofore been pursued in the field of an electrical apparatus.
- Thus, a technique for providing a heat radiating part and a resin high in thermal conductivity on a chip has been known as the technique for heat radiation (see, for example, the following patent document 1).
- There is also known a technique for providing a film for improving thermal emissivity on a chip or a substrate (see, for example, the following patent document 2).
-
Patent Document 1 - Japanese Laid Open Patent Application No. 10-125834
-
Patent Document 2 - Japanese Laid Open Patent Application No. 11-67998
- However, the
patent document 1 merely discloses that a material high in thermal conductivity is adopted as a material for heat radiation. - Thus, such a configuration is not enough to radiate heat transferred from the chip into the air with satisfactory efficiency. There is a fear that heat transferred from the chip to the substrate in particular is accumulated inside the substrate, so that the heat is not radiated into the air efficiently.
- Although the
patent document 2 has disclosed that the film high in thermal emissivity is provided on the substrate, a specific discussion about a heat transfer path from the chip to the film has not yet been made. Therefore, there is room for improvement if consideration is given to the fact that the heat is radiated into the air more efficiently. There is a fear that heat is accumulated in a heat transfer path set up to attainment of heat produced in the chip to the film in particular. - Therefore, a principal object of the present invention is to provide an electronic part mounting substrate capable of efficiently radiating heat produced from an electronic part such as a chip to the outside, an electronic part and a semiconductor device in which an electronic part is mounted on an electronic part mounting substrate.
- According to one aspect of the present invention, there is provided a substrate for mounting an electronic part thereon, which includes a base body having a first main surface and a second main surface opposite to the first main surface, and a through hole which penetrates from the first main surface to the second main surface; a first conductive portion formed on an inner wall surface of the through hole; and a first insulating portion which is formed on the first conductive portion and higher in thermal emissivity than the first conductive portion.
- According to the electronic part mounting substrate of the present invention, an insulating portion higher in thermal emissivity than a conductive portion formed on an inner wall surface of a through hole defined in the substrate is formed on the conductive portion.
- As a result, an insulating portion excellent in thermal emission, which is provided on a first conductive portion, promotes the high-efficiency radiation of heat transferred from an electronic part used as a heat generation source to the first conductive portion to the outside.
- Thus, an excellent heat radiating effect can be realized by use of the through hole defined in the substrate without additionally mounting a radiating part such as a radiating fin.
- According to another aspect of the present invention, there is provided a semiconductor device which includes a base body having a first main surface and a second main surface opposite to the first main surface, and a through hole which penetrates from the first main surface to the second main surface; a first conductive portion formed on an inner wall surface of the through hole; second conductive portion formed on the first main surface and the second main surface so as to be connected to the first conductive portion; an electronic part mounted on the first main surface, said electronic part being electrically connected to the second conductive portion formed on the first main surface; a first insulating portion which is formed on the first conductive portion and higher in thermal emissivity than the first conductive portion; and an external terminal formed on the second conductive portion provided on the second main surface.
- According to still another aspect of the present invention, there is provided an electronic part, mounted on a main surface of a substrate for mounting the electronic part thereon, which includes: a protruded conductive portions respectively electrically connected to conductive portions formed on the main surface of the substrate; and an auxiliary conductive portion which extends from a surface of the electronic part different from a surface thereof on which the protruded conductive portions are formed, to the main surface of the substrate, said auxiliary conductive portion having a length provided in the extending direction, which is set as a length at which face contact with the main surface of the substrate is enabled upon mounting of the electronic part.
- According to still another aspect of the present invention, there is provided a semiconductor device which includes a substrate for mounting an electronic part thereon; and said electronic part mounted on a main surface of the substrate, said electronic part including, protruded conductive portions respectively electrically connected to conductive portions formed on the main surface of the substrate; and an auxiliary conductive portion which extends from a surface of the electronic part different from a surface thereof on which the protruded conductive portions are formed, to the main surface of the substrate, said auxiliary conductive portion having a length provided in the extending direction, which is set as a length at which face contact with the main surface of the substrate is enabled upon mounting of the electronic part.
- While the specification concludes with claims particularly pointing out and distinctly claiming the subject matter which is regarded as the invention, it is believed that the invention, the objects and features of the invention and further objects, features and advantages thereof will be better understood from the following description taken in connection with the accompanying drawings in which:
-
FIG. 1 is a schematic cross-sectional view for describing a first embodiment of the present invention; -
FIG. 2 is a schematic view (part 1) for describing the outline of a method of measuring a thermal resistance value, according to the first embodiment of the present invention; -
FIG. 3 is a schematic view (part 2) for describing the outline of the method of measuring the thermal resistance value, according to the first embodiment of the present invention; -
FIG. 4 is a view showing the result of measurement of thermal resistance values, which is obtained in the first embodiment of the present invention; -
FIG. 5 is a schematic cross-sectional view for describing a second embodiment of the present invention; -
FIG. 6 is a schematic cross-sectional view for describing a third embodiment of the present invention; -
FIG. 7 is a view (part 1) for describing metal support sections employed in the third embodiment of the present invention; and -
FIG. 8 is a view (part 2) for describing the metal support sections employed in the third embodiment of the present invention. - Preferred embodiments of the present invention will hereinafter be described with reference to
FIGS. 1 through 8 . Incidentally, the drawings merely schematically show the size, shape and positional relationships of respective components to such a degree that the present invention can be understood. Thus, the present invention is by no means limited to the illustrated examples. In order to make it easy to understand the drawings, some hatching indicative of cross-sections are omitted except for parts. Incidentally, embodiments to be described below are simply preferred examples and illustrated numerical conditions are by no means limited to them. Similar components illustrated in the respective drawings are respectively identified by the same reference numerals, and the description of certain common components might be omitted. -
FIG. 1 is a schematic cross-sectional view showing a packaging structure on which an electronic part or component used as a heat generation source according to the present embodiment is mounted (or called also “packaged”). The present embodiment will explain, as an example, a case in which the electronic component used as the heat generation source is configured as a WCSP (Waterlevel Chip Size Package) 30 corresponding to a semiconductor package having substantially the same outer size as that of a semiconductor chip, and a heat radiation mechanism is provided in a printedwiring board 20. Incidentally, the term “substantially the same” means that such a configuration that the outer size of the package assumes a size increased up to about 20% with respect to the outer size of the semiconductor chip as well as such a configuration that the outer size of the package is just the same size as the outer size of the semiconductor chip. - Of CSP having a package size substantially identical to the outer size of the semiconductor chip, the WCSP is called one of those fractionalized by dicing or the like after the completion of all up to an external terminal forming process while remaining in a wafer state. The printed wiring board is called one in which on the basis of predetermined circuit design, conductor patterns are formed on the surface of an insulating base material or conductor wirings are formed on the surface thereof and thereinside by patterning. Incidentally, a BGA (Ball Grid Array) or the like may be used as an electronic part mounted over the printed
wiring board 20. This can be selected suitably at random. - As shown in
FIG. 1 , the WCSP 30 is mounted over the printedwiring board 20. Described specifically, secondconductive portion 27 provided in the printedwiring board 20 andsolder balls 39 each corresponding to a first protruded conductive portion are electrically connected to one another in contact with one another. - The
WCSP 30 corresponding to the electronic part will first be explained. Since the conventionally known structure can be applied to theWCSP 30 used herein, its structure example will be explained below in brief. - As shown in
FIG. 1 , apassivation film 34 and aprotective film 35 are sequentially provided on asemiconductor chip 32 provided with circuit elements (not shown) so as to expose the surface of each ofelectrode pads 33 each electrically connected to its corresponding circuit element. Thepassivation film 34 is formed of, for example, a silicon oxide film (SiO2). Theprotective film 35 is formed of a film material low in hardness such as a polyimide resin and suppresses shock against thesemiconductor chip 32 and peeling due to stress between thesemiconductor chip 32 and an encapsulating or sealingfilm 38 to be described later. Wiring layers (called also “redistribution wiring layers”) 36 respectively extend in the direction of the center of thesemiconductor chip 32 over theprotective film 35. Theelectrode pads 33 are electrically individually connected to their correspondingpost portions 37 through thewiring layers 36. Thesolder balls 39 corresponding to the protruded conductive portions, which are formed on their corresponding end faces (or top faces) of thepost portions 37, can be relocated from positions directly above theelectrode pads 33 to desired positions on the upper side of thesemiconductor chip 32 by means of thewiring layers 36. - The printed
wiring board 20 with the WCSP 30 mounted thereon will be explained subsequently. - In the printed
wiring board 20 employed in the present embodiment, as shown inFIG. 1 , the secondconductive portions 27 are formed by patterning on the obverse and reverse surfaces of a glassepoxy base material 22 used as a base body, i.e., a firstmain surface 22 a and a secondmain surface 22 b. The secondconductive portions 27 are respectively conductor wirings made of copper foil (Cu). - An extend-through hole (called also “viaholes or through holes”) 22 c, which extends or penetrates between the obverse and reverse surfaces (22 a and 22 b) of the
base material 22, is defined in thebase material 22 of the printedwiring board 20. A firstconductive portion 26 is formed on aninner wall surface 22 d of the through hole so as to be continuous with its corresponding secondconductive portions 27. The firstconductive portion 26 serves as a thermal via portion which shares the use of a conductor wiring. As shown inFIG. 1 ,stoppers 21 may be formed of a resist material or the like at the peripheral edge of the throughhole 22 c on the secondconductive portion 27 connected to itscorresponding solder ball 39. Thestoppers 21 have the function of preventing solder to flow into the throughhole 22 c upon mounting of theWCSP 30. - The first
conductive portion 26 can be provided by forming the through hole (indicates by a dotted line inFIG. 1 ) 22 c in thebase material 22 with a drill or the like and thereafter forming and providing copper on theinner wall surface 22 d by plating. The formation of the firstconductive portion 26 is performed before the secondconductive portions 27 are formed on the surface layer of thebase material 22 by patterning. - Incidentally, the first
conductive portion 26 and itscorresponding solder ball 39 may be configured so as to be directly connected to each other. However, owing to the placement of thesolder ball 39 on the secondconductive portion 27 as shown inFIG. 1 , alignment accuracy at the mounting of theWCSP 30 can preferably be relaxed. Since the secondconductive portion 27 is formed over the secondmain surface 22 b as well as inside the throughhole 22 c as in the present configurational example, heat can preferably be transferred to theback surface 22 b of the printedwiring board 20 reliably in terms of thermal radiation. - In the present embodiment, its principal feature resides in that a first insulating
portion 25 higher in thermal emissivity than the firstconductive portion 26 is formed on the firstconductive portion 26 lying in the throughhole 22 c. - In the present embodiment, the first insulating
portion 25 higher in thermal emissivity than the first conductive portion has such a structure as to fill up the interior of a hollow portion defined by the firstconductive portion 26 formed on the inner wall surface of the throughhole 22 c. - For instance, a coating material containing ceramics may preferably be used as the material for the first insulating
portion 25. This is used because the coating material containing ceramics has a high thermal emissivity of 90% or more in most cases as well as thermal conduction and is capable of realizing high-efficiency heat radiation. Described specifically, alumina ceramics or the like containing Al2O3 as a major component can be used. One or the like containing such ceramics as described in, for example, Japanese Laid Open Patent Application No. 10-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used. - When the heat radiation is carried out by only the first
conductive portion 26 that shares the use of the thermal via portion (inclusive of such a structure that the firstconductive portion 26 fills up the interior of the throughhole 22 c), a rise in the ambient temperature around the thermal via portion due to heat transfer by convention is unavoidable. - Since, however, the first insulating
portion 25 is provided as in the present embodiment, the heat transferred from theWCSP 30 to the firstconductive portion 26 can be thermally radiated (or called also “emitted”) from the first insulatingportion 25 to the outside as infrared radiation. - As a result, the rise in the ambient temperature around the thermal via
portion 26 can be suppressed and efficient thermal radiation can be realized. - Described specifically, thermal conductivity and thermal emissivity at the time that the through
hole 22 c is filled with only copper used for the firstconductive portion 26, are respectively given as about 137 W/m·K and about 0.03. On the other hand, as in the present configurational example, thermal conductivity and thermal emissivity in the case of such a configuration that the throughhole 22 c is filled with the alumina ceramics used for the first insulatingportion 25, reach about 161 W/m·K and about 0.92 respectively. - Owing to the provision of the first insulating portion in the through
hole 22 c, as is apparent from this point of view, the heat transferred from the electronic part such as the chip can efficiently be radiated outside. - Incidentally, the first insulating
portion 25 may be formed on the firstconductive portion 26 lying in the throughhole 22 c with a predetermined film thickness. As in the present configurational example, however, a heat radiating effect can preferably be further promoted by filling up the throughhole 22 c with the first insulatingportion 25, i.e., embedding the first insulatingportion 25 in the throughhole 22 c. - In the present embodiment, a second insulating
portion 28 higher in thermal emissivity that the firstconductive portion 26 is formed on the secondmain surface 22 b, and a third insulatingportion 29 higher in thermal emissivity than the firstconductive portion 26 is formed on the secondmain surface 22 b with the secondconductive portion 27 interposed therebetween. These are formed so as to be continuous with the first insulatingportion 25. Thus, higher-efficiency heat radiation can be realized. Incidentally, each of the second and third insulating portions (28 and 29) used here is also a coating material containing ceramics in a manner similar to the first insulatingportion 25. - Such first, second and third insulating portions (25, 28 and 29) can be formed by, for example, applying a liquid infrared-emissive insulator coating material to a predetermined area by a spray method and thermally curing it.
- From the above description, the printed
wiring board 20 employed in the present embodiment combines a function used as a wiring board and a function used as an excellent radiating plate, which makes it possible to carry out high-efficiency heat radiation by the infrared emissive insulator. - Subsequently, the verification of the radiating effect of the printed
wiring board 20 having the above-described structure was done by measuring a “thermal resistance value (θja)” used as an index of the radiating effect. - A summary of a method of measuring thermal resistance values where electronic parts are set as a
WCSP 30 and aBGA 50, will first be explained with reference toFIG. 2 . -
FIG. 2 (A) is a schematic view for describing a summary of the method of measuring the thermal resistance value where the electronic part is configured as theWCSP 30. The P-VFLGA48-0606-0.8 manufactured by Oki Electric Industry Co., Ltd. was used as for theWCSP 30 used here. Incidentally, since the structure of theWCSP 30 is substantially identical to the already-describedWCSP 30, the description thereof will be omitted. In the present embodiment, the temperature at the boundary between thesemiconductor chip 32 and thepassivation film 34 bonded to thesemiconductor chip 32 was set as a junction temperature (Tj), and the temperature at a position spaced a predetermined distance away from theWCSP 30 was set as a reference point temperature (Ta). -
FIG. 2 (B) is a schematic cross-sectional view for describing the summary of the method of measuring the thermal resistance value where the electronic part is configured as theBGA 50. The P-BGA352-3535-1.27 manufactured by Oki Electric Industry Co., Ltd. was used as for theBGA 50 used here. Incidentally, since the structure of theBGA 50 is substantially similar to the conventional known wire bonding system, its structure will be explained below in brief. - As shown in
FIG. 2 (B), asemiconductor chip 53 is mounted on aninsulated board 52 with a circuit element (not shown) forming surface set as the upper side.Electrode pads 54 connected to their corresponding circuit elements are connected to theircorresponding conductor patterns 55 on theinsulated board 52 bywires 56. Thus, a predetermined circuit element is electrically connected to itscorresponding solder ball 58 corresponding to an external terminal via acontact 57 provided so as to penetrate between the obverse and reverse surfaces of theinsulated board 52. A resin sealing or encapsulatingfilm 59, which buries and seals thesemiconductor chip 53, is formed on theinsulated board 52. Thesemiconductor patterns 55 shown here are formed of copper and thewires 56 are formed of gold (Au). In the present embodiment, the temperature at the boundary between thesemiconductor chip 53 and theresin encapsulating film 59 bonded to thesemiconductor chip 53 was set as a junction temperature (Tj), and the temperature at a position spaced a predetermined distance away from theBGA 50 was set as a reference point temperature (Ta). - A specific method of measuring a thermal resistance value will be explained subsequently with reference to
FIG. 2 (C). - As shown in
FIG. 2 (C), a constantvoltage power supply 81 applies a power of 1 W to a resistor R provided in the neighborhood of a position where a junction temperature (Tj) of each of the semiconductor chips (32 and 53) is measured, to thereby generate heat, whereby a thermal saturated state (or called also “thermal equilibrium state”) is formed. Incidentally, the constantvoltage power supply 81 is fine-adjusted by reference to anammeter 82 and avoltmeter 83 to supply the power (1 W). - Then, a constant
current power supply 84 is activated to cause current to flow in a diode D provided in the semiconductor chip near the resistor R, and a voltage value obtained at this time is measured by thevoltmeter 85, whereby the above junction temperature (Tj) is calculated. A reference point temperature (Ta) is measured by means of a thermocouple (not shown) or the like. - Further, in the present configurational example, measuring samples different in the insulating portion forming area were prepared to examine the influence of infrared emissive insulating portions on thermal resistance values as shown in
FIG. 3 . Although a description will be made of a case in which an electronic part is set as a WCSP, BGA is also similar to it. - Sample (1): no infrared emissive insulating portion is formed (see
FIG. 3 (A)). Incidentally, the sample (1) might be called plank (1) below. - Sample (2): an infrared emissive fourth insulating
portion 24 is formed from the whole surface of a WCSP to over a firstmain surface 22 a (seeFIG. 3 (B)). Incidentally, the insulating portion is set to a thickness of about 1×10−4 m at this time. - Sample (3): infrared emissive first through third insulating portions (25, 28 and 29) are formed on a second
main surface 22 b and inside a throughhole 22 c in addition to the area described in the sample (2) (seeFIG. 3 (C)). Incidentally, the insulating portions are set to a thickness of about 1×10−4 m and the corresponding insulating portion is charged into the throughhole 22 c. - A thermal resistance value Oja can be calculated from the following expression (1) according to the various parameters obtained in this way:
θja[° C./W]=(Tj·Ta) [° C.]/Power [W] (1) - Incidentally, the method of measuring the thermal resistance value is not limited to only the above methods. Measurement conditions for the parameters (Tj and Ta) are set based on, for example, JEDEC (Joint Electron Device Engineering Council) standard or the like. In addition, arbitrary and suitable methods and measurement conditions can be selected according to purpose and design.
-
FIG. 4 shows the result of measurement of thermal resistance values Oja.FIG. 4 (A) is the result of measurement thereof where the electronic part is set as a WCSP, andFIG. 4 (B) is the result of measurement thereof where the electronic part is set as a BGA. In the present embodiment, thermal resistance values placed under respective conditions with the thermal resistance value of the plank (1) as a reference value are illustrated as bar graphs. Further, reduction rates (%) relative to the thermal resistance value of the plank (1) are described together in addition. - It was confirmed from the results of measurements shown in FIGS. 4(A) and 4(B) that even when the electronic part was either the WCSP or the BGA, the thermal resistance values were respectively reduced at rates of 6.3% to 12.9% and 4.0% to 6.5% owing to the provision of the infrared 2 o emissive insulating portions.
- It is understood from this point of view that an improvement in the efficiency of thermal radiation of the electronic part can be realized without additionally mounting a radiating part such as a radiating fin.
- Judging from the result of the sample (2), a
satisfactory heat 25 radiating effect can be obtained even by the structure that the whole surface of the electronic part is covered with the corresponding infrared emissive insulating portion. It was further confirmed that a heat radiating effect was further promoted owing to the provision of the same insulating portion on the conductive portion in the through hole and the back surface of the board as in the sample (3). - According to the present embodiment as is apparent from the above description, an insulating portion higher in thermal emissivity than a conductive portion is formed on the conductive portion formed on an inner wall surface of a through hole defined in a printed wiring board or the like on which an electronic part is mounted.
- As a result, heat transferred from the electronic part to the insulating portion via the conductive portion can be highly efficiently radiated from the insulating portion as infrared radiation. Therefore, a heat radiating effect can be promoted without additionally mounting a radiating part such as a radiating fin.
- A second embodiment of the present invention will be explained with reference to
FIG. 5 . - While the infrared emissive insulating portions for promoting the heat radiating effect are being formed on the substrate for the motherboard with the package mounted thereon in the first embodiment, the present embodiment is principally different from the first embodiment in that infrared emissive insulating portions similar to those employed in the first embodiment are formed on an interposer board packageable on the substrate for the motherboard, and a heat radiating insulating portion is formed on the whole surface of the interposer board so as to cover an outer surface of an electronic part or component. Incidentally, the same elements of structure as those already described in the first embodiment are respectively identified by the same reference numerals, and their specific description will therefore be omitted (respective embodiments to be described below are also similar).
- The present embodiment will explain, as an example, a board or substrate for an MCM (Multi Chip Module) as a package's interposer board. The MCM is one obtained by mounting, for example, a plurality of packages and their peripheral parts and the like on one high density board and bringing them into module form. Incidentally, one having a structure with a bare chip mounted thereon is included in MCM boards in addition to the above.
- Described specifically, as shown in
FIG. 5 , a plurality of WCSPs each used as a constituent or component parts such as a flash memory are formed on anMCM board 70. Incidentally, since the structure of the WSCP has already been described in the first embodiment, its description will be omitted. - In the
MCM board 70 employed in the present embodiment, secondconductive portions 77 are formed by patterning on the obverse and reverse surfaces of a glassepoxy base material 72, i.e., a firstmain surface 72 a and a secondmain surface 72 b. - A through
hole 72 c, which penetrates between the obverse and reverse surfaces (72 a and 72 b) of thebase material 72, is defined in thebase material 72 of theMCM board 70. A firstconductive portion 76, which serves as a thermal via portion that shares the use of a conductor wiring, is formed on aninner wall surface 72 d of the through hole. Also the firstconductive portion 76 is formed so as to be continuous with its corresponding secondconductive portions 77 on the first and second main surfaces (72 a and 72 b). - Then, a first insulating portion 75 higher in thermal emissivity than the first
conductive portion 76, is formed on the firstconductive portion 76 lying in the throughhole 72 c. In a manner similar to the first embodiment even here, the first insulating portion 75 has a structure in which it fills up, i.e., buries the interior of a hollow portion defined by the firstconductive portion 76 on the inner wall surface of the throughhole 72 c. A second insulatingportion 78 higher in thermal emissivity than the firstconductive portion 76 is formed on the secondmain surface 72 b, and a third insulatingsection 79 higher in thermal emissivity than the firstconductive portion 76 is formed on the secondmain surface 72 b with the corresponding secondconductive portion 77 interposed therebetween. They are formed continuous with the first insulating portion 75. - In the present configurational example, a heat radiating fourth insulating
portion 74 is formed on the whole area of the secondmain surface 72 a of theMCM board 70 so as to cover anelectronic part 30. - Further, in the present embodiment,
solder balls 80 each used as a second protruded conductive portion, which are mountable on a board orsubstrate 88 for the motherboard with theMCM board 70 mountable thereon, are formed on the secondmain surface 72 b side of theMCM board 70. - According to the present configuration, the
solder ball 80 is connected to itscorresponding solder ball 39 through a secondconductive portion 77 provided on amain surface 72 b of theMCM board 70, a first conductive portion (not shown) provided within a through hole (not shown) of theMCM board 70 and electrically connected to the secondconductive portion 77, and a secondconductive portion 77 provided on a firstmain surface 72 a and electrically connected to the first conductive portion. - In a manner similar to the first embodiment, the materials for the first, second and third insulating portions (75, 78 and 79) used here may preferably use a coating material containing ceramics, for example. This is because the coating material containing ceramics has a high thermal emissivity of 90% or more in most cases as well as thermal conduction and is capable of realizing high-efficiency heat radiation. Described specifically, alumina ceramics or the like containing Al2O3 as a major component can be used. One or the like containing such ceramics as described in, for example, Japanese Unexamined Patent Publication No. Hei 10(1998)-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used.
- According to the present embodiment, as is apparent from the above description, an effect similar to the first embodiment can be obtained.
- Further, in the present embodiment, the board having such a heat radiating effect can be applied to an interposer board such as an MCM board capable of mounting other substrate thereon.
- Furthermore, according to the present embodiment, the heat radiating insulating portion is formed over the whole surface on the
interposer board 70 so as to cover the electronic part. As a result, higher-efficiency heat radiation toward the outside can be realized. - A third embodiment of the present invention will be explained with reference to
FIG. 6 . - The present embodiment is principally different from the first embodiment in that processing for promoting a heat radiating effect is mainly effected on the electronic part side.
- As shown in
FIG. 6 , a principal feature resides in that anelectronic part 40 according to the present embodiment includes an auxiliary conductive portion (hereinafter might be called “metal support section”) for efficiently transferring heat from theelectronic part 40 to a substrate orboard 60 with theelectronic part 40 mounted thereon. Incidentally, a material such as copper excellent in thermal conduction can be suitably selected at random as for themetal support section 45. - The present embodiment will explain, by way of example, a case in which the
electronic part 40 is configured as a WCSP provided withsolder balls 39 each used as a substrate mounting protruded conductive portion and thesubstrate 60 is configured as a printed wiring board. - In the present embodiment, a first feature resides in that as shown in
FIG. 6 , themetal support section 45 extends from over the surface of theWCSP 40, which is different from the surface on which thesolder balls 39 are formed, to amain surface 60 a of the substrate, and the length of themetal support section 45 as viewed in its extending direction is equivalent to the length brought into face contact with themain surface 60 a of the substrate. - Incidentally, the ends of the
metal support section 45 as viewed in the extending direction of themetal support section 45 employed in the present embodiment have shapes bent in the direction non-opposite to theWCSP 40, i.e., in the direction away outside from the WCSP. However, the shapes of the ends thereof are not limited to such shapes. The ends thereof may have portions brought into contact with themain surface 60 a of the substrate. Thus, the length of themetal support section 45 as viewed in its extending direction may be such a length or the like that themetal support section 45 extends through themain surface 60 a of thesubstrate 60 and is embedded in thesubstrate 60. Various shapes can be suitably selected at random according to purpose and design (the details thereof will be described later). - At this time, the
metal support section 45 may be provided so as to cover a wide area on an exposed surface of a silicon (Si)substrate 32 constituting asemiconductor chip 32, of the surface of theWCSP 40. This is because heat generated from a silicon surface including a circuit element that serves as a heat generation source can efficiently be transferred to an insulatingportion 47 and thesubstrate 60. - Owing to the provision of such a metal support section excellent in thermal conduction, heat on the back surface (i.e., back
surface 32 b of the semiconductor chip) and side surfaces (i.e., side surfaces 32 c of the semiconductor chip) of theWCSP 40 are promptly transferred to the insulatingportion 47 and further transferred even to thesubstrate 60 promptly. That is, since heat transfer paths between theWCSP 40 and the insulatingportion 47 and between theWCSP 40 and thesubstrate 60 can be reinforced, the heat from theWCSP 40 can reliably be transferred to thesubstrate 60. - Further, in the present embodiment, a second feature resides in that the infrared emissive insulating
portion 47 is formed on themetal support section 45. - In the present configurational example, the infrared emissive insulating
portion 47 covers the whole surface of theWCSP 40 including over themetal support section 45 and is formed over themain surface 60 a of thesubstrate 60. The insulatingportion 47 may take a configuration in which it is formed on themetal support section 45 with a predetermined film thickness. Since, however, the insulating portion is provided in a wide-ranging region including over themetal support section 45 in this way, the area of heat radiation is made larger, thereby making it possible to further promote a heat radiating effect. - In a manner similar to the first embodiment, the material for the insulating
portion 47 employed in the present embodiment may also preferably use a coating material containing ceramics, for example. This is because the coating material containing ceramics has a high thermal emissivity of 90% or more in most cases as well as thermal conduction and is capable of realizing high-efficiency heat radiation. Described specifically, alumina ceramics or the like containing Al2O3 as a major component can be used. One or the like containing such ceramics as described in, for example, Japanese Unexamined Patent Publication No. Hei 10(1998)-279845 can be suitably used at random. Ceramics or the like added with black pigments for improving the thermal emissivity may be used. - The insulating
portion 47 can be formed by applying a liquid infrared-emissive insulator coating material to a predetermined area from themain surface 60 a side of the substrate by, for example, a spray method after the formation of themetal support section 45 on theWCSP 40, and thermally curing it. - Thus, the heat from the
WCSP 40, which has been reliably transferred to thesubstrate 60 through themetal support section 45, can be converted to infrared radiation with high heat emissivity by means of the insulatingportion 47 and emitted outside, thereby making it possible to promote a heat radiating effect. - Specific examples each illustrative of the shape of the
metal support section 45 will be explained subsequently with reference toFIG. 7 . Each of lower stages of FIGS. 7(A) through 7(C) is a schematic cross-sectional view of the structure shown inFIG. 6 as viewed from the direction indicated by arrow P in the figure. Upper stages thereof are developed views of themetal support sections 45 corresponding to the lower stages. Illustrations of infrared emissive insulatingportions 47 are omitted here. For the purpose of fixing themetal support section 45 to be described below to theWCSP 40, arbitrary suitable methods such as a method of heating a moldedmetal support section 45 at a predetermined temperature and welding it to theWCSP 40, etc. can be used. - The
metal support section 451 shown inFIG. 7 (A) has such a shape as to fully cover the whole surface of theWCSP 40. Although there is a fear of stress concentration due to such a shape, heat generated from the silicon surface can be reliably transferred to the correspondingsubstrate 60 side. Incidentally, such a shape can be formed by means of an etching process or the like. - The
metal support section 452 shown inFIG. 7 (B) is different from themetal support section 451 shown inFIG. 7 (A) in that it has such a shape as to cover the whole area of aback surface 32 b of asemiconductor chip 32. Owing to the provision of such a shape, heat generated from the surface of a silicon substrate constituting the semiconductor chip can be transferred to the correspondingsubstrate 60 with efficiency. Incidentally, such a shape can be formed by means of an etching process or the like. - The
metal support section 453 shown inFIG. 7 (C) has such a shape as to cover the back surface and side surfaces of aWCSP 40 in a mesh fashion. Since there are formedslits 49 which extend from amain surface 60 a of a substrate to theWCSP 40, the concentration of stress due to the difference in thermal expansion coefficient, which occurs in the boundary between thesubstrate 60 and theWCSP 40, can be relaxed. Since such a flat or plate-shaped copper plate including mesh patterns can be relatively easily molded through the use of a die or the like, it is excellent in manufacturing cost. - Specific examples of the shapes of the ends of the metal support sections 45 (451, 452 and 453 (see
FIG. 7 ) or the like), i.e., the ends thereof brought into contact withmain surfaces 60 a of substrates will be explained subsequently with reference toFIG. 8 . - In
FIG. 8 (A), connectingpins 65, which extend through amain surface 60 a of the substrate and are embedded in thesubstrate 60, are formed at their corresponding ends of themetal support section 45. Owing to the provision of such connectingpins 65, aWCSP 40 mounted on thesubstrate 60 can be prevented from causing its position displacement due to external shock and maintained in a stable mounted state. The metal support section at this time can be fabricated by, for example, welding connectingpins 65 separately formed of copper to the ends (positions indicated by Q inFIG. 7 (A), for example) of the flat copper plate so as to become normal to the copper plate. Then, the connectingpins 65 may be fitted in and fixed to their corresponding pores of thesubstrate 60, which has previously been formed by, for example, a drill or the like. -
FIG. 8 (B) is different fromFIG. 8 (A) in that the ends per se of themetal support section 45 are respectively connecting pins 67. Since there is no need to weld the connecting pins separately in the case of such a shape, the present example is excellent in manufacturing cost. The support section at this time can be fabricated by processing a flat copper plate in advance in consideration of portions embedded in thesubstrate 60, which serve as connecting pins. In a manner similar toFIG. 8 (A), a stable mounted state can suitably be maintained. - In
FIG. 8 (C), the ends of themetal support section 45 are respectively bent in the direction opposite to theWCSP 40. Therefore, the present example is excellent in that the suppression of the degree of freedom of wiring design due to the placement of the connecting pins does not occur as compared with the structure that the connecting pins serving as the conductors are embedded therein. - Incidentally, the shapes of the infrared emissive insulating portion and the metal support section are not limited to only the above-described shapes but can be formed in various ways according to purpose and design.
- According to the present embodiment, as is apparent from the above description, since a heat transfer path between an electronic part and a substrate can be reinforced owing to the provision of a metal support section, heat produced from the electronic part can reliably be transferred to the substrate.
- As a result, the heat reliably transferred to the substrate side can highly efficiently be converted into infrared radiation by the infrared emissive insulating
portion 47, followed by being radiated, thereby making it possible to promote a heat radiating effect. - As mentioned above, the present invention is not limited to the aforementioned embodiment alone. Thus, the present invention can be applied by utilizing the above conditions in combination suitably at random.
- While the present invention has been described with reference to the illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to those skilled in the art on reference to this description. It is therefore contemplated that the appended claims will cover any such modifications or embodiments as fall within the true scope of the invention.
Claims (16)
Applications Claiming Priority (2)
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JP2004034709A JP3804803B2 (en) | 2004-02-12 | 2004-02-12 | Electronic component mounting substrate and semiconductor device |
JP034709/2004 | 2004-02-12 |
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JP (1) | JP3804803B2 (en) |
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TW (1) | TWI326482B (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080205057A1 (en) * | 2007-02-23 | 2008-08-28 | Frontend Analog And Digital Technology Corporation | Light source device assembly |
US20120286416A1 (en) * | 2011-05-11 | 2012-11-15 | Tessera Research Llc | Semiconductor chip package assembly and method for making same |
US20140131577A1 (en) * | 2009-02-26 | 2014-05-15 | Texas Instruments Incorporated | Infrared sensor structure and method |
US9706639B2 (en) * | 2015-06-18 | 2017-07-11 | Samsung Electro-Mechanics Co., Ltd. | Circuit board and method of manufacturing the same |
US11523498B2 (en) * | 2018-01-22 | 2022-12-06 | HELLA GmbH & Co. KGaA | Circuit board heat sink structure and method therefor |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006310530A (en) * | 2005-04-28 | 2006-11-09 | Sanyo Electric Co Ltd | Circuit device and its manufacturing process |
US20100230138A1 (en) * | 2007-03-30 | 2010-09-16 | Toshiyuki Asahi | Wiring board |
JP2012023283A (en) * | 2010-07-16 | 2012-02-02 | Siix Corp | Heat dissipation substrate and method for manufacturing the same |
CN102800585B (en) * | 2012-07-09 | 2015-09-09 | 厦门飞德利照明科技有限公司 | A kind of electroforming process for making of light-emitting diode |
EP3357308A1 (en) * | 2015-10-01 | 2018-08-08 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Electronic component carrier for carrying and cooling a heat generating electronic component |
US10420255B2 (en) * | 2016-09-14 | 2019-09-17 | Jtekt Corporation | Electronic control device |
WO2019102601A1 (en) * | 2017-11-27 | 2019-05-31 | 三菱電機株式会社 | Semiconductor device |
JP7406973B2 (en) * | 2019-12-11 | 2023-12-28 | ローム株式会社 | semiconductor equipment |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6555762B2 (en) * | 1999-07-01 | 2003-04-29 | International Business Machines Corporation | Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition |
US6555208B2 (en) * | 1997-01-10 | 2003-04-29 | Ibiden Co., Ltd. | Printed wiring board and method of manufacturing the same |
US20040211594A1 (en) * | 2003-04-23 | 2004-10-28 | Kwun-Yao Ho | Vertical routing structure |
US20040238211A1 (en) * | 2001-04-10 | 2004-12-02 | Yuki Momokawa | Circuit board, circuit board mounting method, and electronic device using the circuit board |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61137349A (en) * | 1984-12-10 | 1986-06-25 | Toshiba Corp | Semiconductor device |
US5561322A (en) * | 1994-11-09 | 1996-10-01 | International Business Machines Corporation | Semiconductor chip package with enhanced thermal conductivity |
JP2982713B2 (en) | 1996-10-23 | 1999-11-29 | 日本電気株式会社 | Heat dissipation structure of semiconductor element |
MY125599A (en) * | 1996-12-19 | 2006-08-30 | Ibiden Co Ltd | Printed circuit boards and method of producing the same |
JPH10279845A (en) | 1997-03-31 | 1998-10-20 | Nippon Paint Co Ltd | Far infrared radiating coating material |
JPH1167998A (en) | 1997-08-19 | 1999-03-09 | Matsushita Electric Ind Co Ltd | Csp, bga and semiconductor device |
KR100660830B1 (en) * | 2001-02-13 | 2006-12-26 | 삼성전자주식회사 | Method for forming a storage electrode of semiconductor device |
-
2004
- 2004-02-12 JP JP2004034709A patent/JP3804803B2/en not_active Expired - Fee Related
- 2004-06-17 TW TW093117450A patent/TWI326482B/en not_active IP Right Cessation
- 2004-06-25 KR KR1020040048053A patent/KR101128308B1/en active IP Right Grant
- 2004-06-29 CN CNB2004100619342A patent/CN100459110C/en not_active Expired - Fee Related
- 2004-10-08 US US10/960,721 patent/US6936769B1/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6555208B2 (en) * | 1997-01-10 | 2003-04-29 | Ibiden Co., Ltd. | Printed wiring board and method of manufacturing the same |
US6555762B2 (en) * | 1999-07-01 | 2003-04-29 | International Business Machines Corporation | Electronic package having substrate with electrically conductive through holes filled with polymer and conductive composition |
US20040238211A1 (en) * | 2001-04-10 | 2004-12-02 | Yuki Momokawa | Circuit board, circuit board mounting method, and electronic device using the circuit board |
US20040211594A1 (en) * | 2003-04-23 | 2004-10-28 | Kwun-Yao Ho | Vertical routing structure |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080205057A1 (en) * | 2007-02-23 | 2008-08-28 | Frontend Analog And Digital Technology Corporation | Light source device assembly |
US20140131577A1 (en) * | 2009-02-26 | 2014-05-15 | Texas Instruments Incorporated | Infrared sensor structure and method |
US9417133B2 (en) * | 2009-02-26 | 2016-08-16 | Texas Instruments Incorporated | Infrared sensor structure and method |
US20120286416A1 (en) * | 2011-05-11 | 2012-11-15 | Tessera Research Llc | Semiconductor chip package assembly and method for making same |
US9706639B2 (en) * | 2015-06-18 | 2017-07-11 | Samsung Electro-Mechanics Co., Ltd. | Circuit board and method of manufacturing the same |
US11523498B2 (en) * | 2018-01-22 | 2022-12-06 | HELLA GmbH & Co. KGaA | Circuit board heat sink structure and method therefor |
Also Published As
Publication number | Publication date |
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TWI326482B (en) | 2010-06-21 |
KR101128308B1 (en) | 2012-03-26 |
CN1655348A (en) | 2005-08-17 |
JP3804803B2 (en) | 2006-08-02 |
KR20050081829A (en) | 2005-08-19 |
TW200527617A (en) | 2005-08-16 |
US6936769B1 (en) | 2005-08-30 |
JP2005228860A (en) | 2005-08-25 |
CN100459110C (en) | 2009-02-04 |
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