US20050231987A1 - Method and system for providing a temperature compensated feedback signal - Google Patents

Abstract

An electrical circuit for providing a temperature compensated feedback signal includes a first electrical component and a first amplifier. The first electrical component exhibits a first temperature variable impedance and is positioned in thermal contact with a first switch having a second temperature variable impedance. The first amplifier includes an input electrically coupled to the first switch and an output electrically coupled to an input of the first electrical component. The first amplifier amplifies the signal produced across the first switch when the first switch is conducting and the first electrical component attenuates the amplified signal provided by the first amplifier as a function of a temperature of the first electrical component. The attenuated amplified signal is provided at an output of the first electrical component to provide a temperature compensated feedback signal.

Description

TECHNICAL FIELD
• The present invention is generally directed to a method and system for providing a feedback signal and, more specifically, to a method and system for providing a temperature compensated feedback signal.
BACKGROUND OF THE INVENTION
• In a typical switching power supply that implements pulse width modulation (PWM), control loops have been implemented at an output of the supply and/or at a primary switch, for example, a field-effect transistor (FET). In general, inner-loop current feedback at the primary switch is desirable to provide stability and/or to detect overcurrent conditions. In a typical switching power supply, relatively expensive magnetic-field sensing hardware, such as a Hall-effect or magnetorestrictive sensor, or a very low-value power resistor, which is inserted in series with the switch, have been utilized to provide current feedback. When a resistor is utilized in series with the switch, the ramp voltage developed across the series resistor is then fed back to a control unit, which utilizes ramp slope information, along with an instantaneous output voltage, to control the modulation of a control signal applied to a control terminal of the switch.
• Field-effect transistors (FETs) have been widely utilized as primary switches in switching power supplies. Various articles have proposed utilizing a saturation resistance, i.e., a drain-to-source resistance R_DSon, of a FET to serve as a current sense resistor for the FET. However, the resistance of a typical conducting FET may vary over one-hundred percent over typical temperature operating ranges. As such, these temperature variable resistance changes may result in large errors in current feedback and, as a result, the current loop characteristics of a switching power supply implementing this technique are highly temperature sensitive.
• Due to cost considerations, it would be desirable to develop a circuit for a switching power supply that measures a primary switch current economically and with enough accuracy to allow for adequate current loop control. What is needed is a technique for providing a temperature compensated feedback signal for a switching power supply.
SUMMARY OF THE INVENTION
• An electrical circuit for providing a temperature compensated feedback signal includes a first electrical component and a first amplifier. The first electrical component exhibits a first temperature variable impedance. In operation, the first electrical component is positioned in thermal contact with a first switch having a second temperature variable impedance. The first amplifier includes an input electrically coupled to the first switch and an output electrically coupled to an input of the first electrical component. The first amplifier amplifies a signal produced across the first switch, when the first switch is conducting, and the first electrical component attenuates the amplified signal, provided by the first amplifier, as a function of the temperature of the first electrical component. The attenuated amplified signal is provided at an output of the first electrical component and acts as a temperature compensated feedback signal. The temperature compensated feedback signal may be utilized by an external control unit to determine whether an overcurrent condition exists and/or the circuit is unstable and, if so, take an appropriate action.
• According to another embodiment of the present invention, a second amplifier, including an input electrically coupled to the output of the first electrical component, is provided. The second amplifier amplifies the attenuated amplified signal to provide the temperature compensated feedback signal at the output of the second amplifier. According to another aspect of the invention, a second switch, which is electrically coupled to the input of the first amplifier, is provided. The second switch couples the input of the first amplifier to ground, when the first switch is not conducting. The first electrical component may be a thermistor with a positive temperature coefficient that substantially matches a temperature coefficient of the first switch. Ideally, the temperature of the thermistor is within a +/−5 degrees Celsius of a temperature of the first switch. The first switch may be one of a field-effect transistor (FET) or an insulated-gate bipolar transistor (IGBT) and the first and second temperature variable impedances may be temperature variable resistances.
• These and other features, advantages and objects of the present invention will be further understood and appreciated by those skilled in the art by reference to the following specification, claims and appended drawings.
BRIEF DESCRIPTION OF THE DRAWINGS
• The present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
• FIG. 1 is an exemplary electrical block diagram of a control system for a switching power supply;
• FIG. 2 is an electrical diagram of an electrical circuit for providing a temperature compensated feedback signal;
• FIG. 3 is a graph depicting a temperature variable resistance curve of an exemplary thermistor;
• FIG. 4 is a graph depicting an exemplary temperature variable resistance curve of an exemplary field-effect transistor (FET);
• FIG. 5 is a graph depicting an exemplary maximally flat variable resistance curve for a FET; and
• FIG. 6 is a graph depicting an exemplary normalized maximally flat variable resistance curve for a FET.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
• As is described above, power switching supplies have been proposed that utilize a saturation resistance of a field-effect transistor (FET) to provide a feedback signal to a control unit for controlling the FET, which acts as a switch for a switching power supply. However, as also noted above, utilizing the FET saturation resistance to provide an indication of the current carried by the FET may result in large errors in a sensed feedback current, as a FET drain-to-source resistance R_DSon tends to be highly temperature dependent. As a general rule, it is not necessary for the FET current to be measured with extreme precision. Typically, a measurement accuracy of ten to twenty percent is sufficient for reliable loop control. As such, according to the present invention, a relatively accurate feedback signal is achieved by compensating for temperature effects on the FET drain-to-source resistance R_DSon to a sufficient degree. Accordingly, the added dissipation of a series current sense resistor is eliminated and, as a result, the resulting power conversion efficiency of the switching power supply is increased.
• The circuit described herein can be implemented at approximately the same cost as that of a high-precision current sense resistor. In general, it is desirable that the electrical component, e.g., a thermistor, have a temperature variable impedance that is similar to that of the switching FET. Further, the electrical component should be selected to have a positive temperature coefficient curve with minimal curvature. It desirable for the electrical component to be positioned relatively close to a drain of the switching FET such that the temperature of the electrical component and the FET are approximately the same, e.g., within +/−5 degrees Celsius.
• With reference to FIG. 1, a portion of a switching power supply 10 includes a control unit 104 and an electrical circuit 102. The control unit 104 provides a control signal, through a series resistor Rs to a gate of a transistor Q1, e.g., a FET or an insulated-gate bipolar transistor (IGBT). A source of the transistor Q1 is coupled to ground and a drain of the transistor Q1 is coupled to one side of a primary of a transformer T₁, whose other side is coupled to a positive terminal of a voltage supply +V. A first input of the electrical circuit 102 is coupled to the drain of the transistor Q1 and a second input of the electrical circuit is coupled to an output of the control unit 104. In this manner, the electrical circuit 102 can determine when the control unit 104 has applied a voltage V_G to a gate of the transistor Q1, to turn the transistor Q1 on. The electrical circuit 102 provides feedback to an input of the control unit 104 such that the control unit 104 can determine the current through the transistor Q1 and take an appropriate action.
• As is better shown in FIG. 2, the circuit 102 is used to replace the traditional current sense resistor required for ground referenced inner-loop current feedback in a switching power supply. As mentioned above, this is desirable to increase the efficiency of the power supply and to eliminate additional internal heating that accompanies sense resistor losses. The circuit 102 samples the drain voltage, V_D, of the transistor Q1 during its on-time, isolates the sampled sawtooth signal V_SD and amplifies the signal V_SD to provide a signal V_AO1. The signal V_AO1 is an amplified version of the voltage dropped across the temperature dependent FET. The signal V_AO1 is then attenuated as a function of temperature by the resistive divider, i.e., electrical component RT and resistor R1, to compensate for increases in the FET Q1 drain-to-source resistance R_DSon with temperature. The divided signal V_C is then amplified to produce an output signal V_AO2, which is essentially an amplified version of the voltage signal, which would be developed across a reasonably temperature independent FET.
• The choice of using two amplification stages is desirable in order to drive the divider with a low-impedance source and present a low-impedance output for loop feedback control purposes. It is also desirable for the amplifiers to exhibit a reasonably wide bandwidth, e.g., 130 MHz, in order to provide substantial gain to low-amplitude input signals, while faithfully replicating relatively high-bandwidth signals.
• Isolating the FET Q1 saturation ramp voltage may be achieved using a NC7SZ66 high-speed analog transmission gate U1. The gate U1 includes an internal transmission FET (between pins 1 and 2 of the device) that has a maximum drain-to-source resistance R_DSon of seven ohms and in this application is used to shunt the drain voltage signal of the FET Q1, through R3, to ground when the FET Q1 is off and to pass the on-time ramp unattenuated to a positive input of amplifier U2A when the FET Q1 is on. A low level at an SE input of the gate U1 turns off the internal FET during the FET Q1 on-time. This signal is generated by delaying the FET Q1 gate drive signal, until turn-on is achieved, and inverting and logic level translating this signal to high-speed complementary metal-oxide semiconductor (HCMOS) logic levels.
• The electrical component RT may be implemented as a thermistor, manufactured and made commercially available by Infineon (Part No. KTY23-6). The component RT is located adjacent a drain of the FET Q1 in order that the resistance of the component RT vary in direct relationship with the drain-to-source resistance R_DSon of the FET Q1. The KTY23-6 has a positive temperature coefficient resistance curve that is only slightly curved. This substantially linear resistance curve, shown in FIG. 3, is adequate to provide compensation for the selected FET (in combination with the divider resistor R1) due to the similar shape of resistance curve of the selected FET.
• The resistance/temperature characteristics for the Infineon KTY23-6 are set forth below: $\begin{array}{ccccc}{T}_S\equiv \left(\begin{array}{c}-50\\ -40\\ -30\\ -20\\ -10\\ 0\\ 10\\ 20\\ 30\\ 40\\ 50\\ 60\\ 70\\ 80\\ 90\\ 100\\ 110\\ 120\\ 130\\ 140\\ 150\end{array}\right)& & R_S\equiv \left(\begin{array}{c}518\\ 570\\ 625\\ 685\\ 748\\ 815\\ 886\\ 961\\ 1040\\ 1123\\ 1209\\ 1300\\ 1394\\ 1492\\ 1594\\ 1700\\ 1810\\ 1923\\ 2041\\ 2128\\ 2235\end{array}\right)·\Omega & & I_S:=0\dots \left(\mathrm{rows}\left(T_S\right)-1\right)\end{array}$
  As is shown in FIG. 3, a spline fit may be applied to approximate the resistance curve of the thermistor. In FIG. 3, the specification data is shown as circles and the solid line shows the spline fit.
• In general, it is desirable to select a FET that has a drain-to-source resistance R_DSon near nominal as indicated on a data sheet for the component. To determine whether the FET exhibits a nominal drain-to-source resistance the FET and thermistor may be mounted on a circuit board with a gate of the FET connected ta a voltage source to continuously turn-on the FET so that the FET can be evaluated. A drain of the FET is connected to a current source capable of supplying a saturation current to the FET, without exceeding the dissipation capability of the FET. A current probe is attached to measure drain current and a voltmeter is connected across the FET to measure a drain-to-source saturation voltage of the FET. An ohmmeter is connected across the terminals of the thermistor for monitoring its resistance and provides an indication of the temperature of the thermistor. The FET drain-to-source resistance R_DSon can then be determined with respect to the thermistor temperature.
• As a general rule, it is sufficient to determine the FET drain-to-source resistance R_DSon at three temperatures in a desired temperature range and then, using a spline function, to create a curve through the three points (see FIG. 4). The following provides an example of how to determine appropriate values for the components of the electrical circuit 102 of FIG. 2. Given an internal ambient operating temperature range, the FET drain-to-source resistance R_DSon may be determined at temperatures T₁, T₂ and T₃ as defined below:
  Given: $\begin{array}{cc}{T}_{\mathrm{Ambmin}}:=-40& T_{\mathrm{Ambmax}}:=125\\ T_1:=T_{\mathrm{Ambmin}}+\frac{T_{\mathrm{Ambmax}}-T_{\mathrm{Ambmin}}}{6}& \\ T_2:=T_{\mathrm{Ambmin}}+\frac{T_{\mathrm{Ambmax}}-T_{\mathrm{Ambmin}}}{2}& \\ T_3:=T_{\mathrm{Ambmax}}-\left(\frac{T_{\mathrm{Ambmax}}-T_{\mathrm{Ambmin}}}{6}\right)& \end{array}$
  For this range, the temperatures at which to determine the FET drain-to-source resistance R_DSon and the corresponding thermistor resistances are given below in matrix form. $\begin{array}{ccc}{T}_{\mathrm{Amb}}:=\left(\begin{array}{c}{T}_1\\ T_2\\ T_3\end{array}\right)& T_{\mathrm{Amb}}=\left(\begin{array}{c}-12.5000\\ 42.5000\\ 97.5000\end{array}\right)& R_{\mathrm{Th}}\left(T_{\mathrm{Amb}}\right)=\left(\begin{array}{c}731.9292\\ 1144.1481\\ 1673.0464\end{array}\right)\Omega \end{array}$
• The circuit board is placed within an environmental chamber and the instrumentation leads described above are connected. The chamber is turned on and the chamber temperature is varied to sequentially achieve temperatures T₁, T₂ and T₃, as indicated by the measured resistance of the thermistor. At each of these temperatures, the FET drain current I_D and saturation voltage V_sat are recorded. Results of some measurements using this procedure on a test circuit are given below, as are the resulting computed values of the FET drain-to-source resistance R_DSon (designated R_DSonAT) at the specific temperatures. $T_{\mathrm{Amb}}:=\left(\begin{array}{c}{T}_1\\ T_2\\ T_3\end{array}\right)I_D\equiv \left(\begin{array}{c}20.09\\ 19.66\\ 19.18\end{array}\right)·\mathrm{amp}{V}_{\mathrm{sat}}\equiv \left(\begin{array}{c}\mathrm{.0469}\\ \mathrm{.0625}\\ \mathrm{.0795}\end{array}\right)·\mathrm{volt}$ $\begin{array}{c}{R}_{\mathrm{DSonAT}}\equiv \left(\begin{array}{c}\frac{V_{{\mathrm{sat}}_{0,0}}}{{\mathrm{<figure-callout\; id="0"\; label="I\; D"\; filenames="US20050231987A1-20051020-D00003.png,US20050231987A1-20051020-D00004.png"\; state="\{\{state\}\}">I</figure-callout>}}_{D_{}}}\\ \frac{V_{{\mathrm{sat}}_{1,0}}}{{\mathrm{<figure-callout\; id="1"\; label="I\; D"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">I</figure-callout>}}_{D_{}}}\\ \frac{V_{{\mathrm{sat}}_{2,0}}}{{\mathrm{<figure-callout\; id="2"\; label="I\; D"\; filenames="US20050231987A1-20051020-D00003.png"\; state="\{\{state\}\}">I</figure-callout>}}_{D_{}}}\end{array}\right)R_{\mathrm{DSonAT}}=\left(\begin{array}{c}2.3345\\ 3.1790\\ 4.1449\end{array}\right)m\Omega \\ I_{\mathrm{discreteT}}:=0\dots \left(\mathrm{rows}\left(T_{\mathrm{Amb}}\right)-1\right)\end{array}$
  To approximate the FET drain-to-source resistance R_DSon characteristic, another spline fit may be performed as follows:
  J _Spline :=cspline(T _Amb ,R _DSonAT)
  R _DSonA(T):=interp(J _Spline ,T _Amb ,R _DSonAT ,T)
  T _interp :=T _Ambmin−5 . . . T _Ambmax+5
• Assuming that the first amplifier U2A gain is unity, the circuit output voltage V_C is then given by the following: $\begin{array}{c}{V}_C=V_{\mathrm{SD}}·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)V_{\mathrm{AO1}}=V_{\mathrm{SD}}=V_D\\ V_C=V_D·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)\\ V_C=I_D·R_{\mathrm{DSonA}}\left(T\right)·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)\end{array}$
• As it is desirable for the output voltage V_C to be constant with temperature for each value of I_D over the temperature range, the right side of the following expression should be as nearly constant as possible. This expression represents the equivalent sense resistor value that would give an output V_C with I_D passing through it. $\frac{V_C}{I_D}=R_{\mathrm{DSonA}}\left(T\right)·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)$
• It is desirable to choose the value of R₁ to give the most constant value of the expression with respect to changes in temperature T. Assuming the initial value for R1 is chosen to be 500 Ohms and the maximally constant value is R_DSonAC. $R_{\mathrm{DSonAC}}\left(T,R_1\right):=R_{\mathrm{DSonA}}\left(T\right)·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)$ $\begin{array}{c}\varepsilon \left(R_1\right):=\\ \\ \\ \\ \\ \\ \\ \\ \\ \end{array}❘\begin{array}{c}i\leftarrow 0\\ \mathrm{for}\mathrm{Temp}\in T_{\mathrm{Ambmin}}-5\dots T_{\mathrm{Ambmax}}+5\\ ❘\begin{array}{c}{R}_{{\mathrm{DSonAC}}_i}\leftarrow R_{\mathrm{DSonAC}}\left(\mathrm{Temp},R_1\right)\\ i\leftarrow i+1\end{array}\\ {\mathrm{Err}}_{\mathrm{Max}}\leftarrow \max \left(R_{\mathrm{DSonAC}}\right)\\ {\mathrm{Err}}_{\mathrm{Min}}\leftarrow \min \left(R_{\mathrm{DSonAC}}\right)\\ \Delta \leftarrow {\mathrm{Err}}_{\mathrm{Max}}-{\mathrm{Err}}_{\mathrm{Min}}\\ \mathrm{return}\left(\begin{array}{c}{\mathrm{Err}}_{\mathrm{Max}}\\ {\mathrm{Err}}_{\mathrm{Min}}\\ \Delta \end{array}\right)\end{array}$
  With the initial guess of R₁:=500·Ω, the error terms are: $\varepsilon \left(R_1\right)=\left(\begin{array}{c}0.9673\\ 0.9295\\ 0.0379\end{array}\right)m\Omega ;{\varepsilon \left(R_1\right)}_2=0.0379m\Omega$
  The “Delta Error” is in vector element ‘2’. Optimizing the circuit yields the following (see FIG. 5):
• • Given $\begin{array}{cc}0\Omega ={\varepsilon \left(R_1\right)}_2& {\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1>1\Omega \\ R_1:=\mathrm{Minerr}\left(R_1\right)& {\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1=501.2418\Omega \end{array}$ $R_1:=R_{\mathrm{Nearest\_}1\%}\left(R_1\right)$ $\mathrm{Thus},{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1=499.0000\Omega$ $R_{\mathrm{DSonACavg}}:={\varepsilon \left(R_1\right)}_1+\frac{{\varepsilon \left(R_1\right)}_2}{2}$ $R_{\mathrm{DSonACavg}}=0.9470m\Omega$
• Normalizing R_DSonAC to the range average value gives the following: $R_{\mathrm{DSonACN}}\left(T,R_1\right):=\frac{R_{\mathrm{DSonA}}\left(T\right)·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(T\right)}\right)}{R_{\mathrm{DSonACavg}}}$
• The normalized graph of R_DSonAC (see FIG. 6) is much less temperature dependent than the original R_DSonA. Assuming the circuit provides an output voltage, V_AO2, at a specific peak drain current, I_Dpk at some temperature, say 25 degrees Celsius, for example, let V_AO2req:=0.8·vol at I_Dpk25:=40·amp. It is then necessary to obtain the FET drain-to-source resistance R_DSon corresponding to a temperature of 25 degrees Celsius. But this is just R_DSonA(25)=2.8914 mΩ. This corresponds to an amplifier output of: $\begin{array}{c}{V}_{\mathrm{AO2pk25}}:=I_{\mathrm{Dpk25}}·R_{\mathrm{DSonA}}\left(25\right)·\left(\frac{R_1}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="US20050231987A1-20051020-D00000.png,US20050231987A1-20051020-D00001.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+R_{\mathrm{Th}}\left(25\right)}\right),\mathrm{or}\\ V_{\mathrm{AO2pk25}}=38.5010\mathrm{mV}\end{array}$
• Thus, it is necessary to increase the output voltage V_AO2 by a gain factor of: $G:=\frac{V_{\mathrm{AO2req}}}{V_{\mathrm{AO2}}},\mathrm{or}G=20.7787.$
  To distribute this gain equally over the two amplifier stages requires a stage gain of:
  G _stage :={square root}{square root over (G)}, or G_stage=4.5584
  In the circuit, let:
  R ₅:=1000·Ω
  The first amplifier gain is: $G_{\mathrm{stage}}=1+\frac{R_4}{{\mathrm{<figure-callout\; id="5"\; label="R"\; filenames="US20050231987A1-20051020-D00003.png"\; state="\{\{state\}\}">R</figure-callout>}}_5}$
  Thus,
  R ₄ :=R ₅·(G _stage−1), or R₄=3558.3655 Ω
  Choosing the nearest 1% resistor value yields:
  R ₄ :=R _{Nearest — 1%}(R ₄), or R₄=3570.0000 Ω
  Then, $G_{\mathrm{stage1}}:=1+\frac{R_4}{{\mathrm{<figure-callout\; id="5"\; label="R"\; filenames="US20050231987A1-20051020-D00003.png"\; state="\{\{state\}\}">R</figure-callout>}}_5},\mathrm{or}{G}_{\mathrm{stage1}}=4.5700$
  This requires that the gain of stage two be: $G_{\mathrm{stage2}}:=\frac{G}{G_{\mathrm{stage1}}},\mathrm{or}{G}_{\mathrm{stage2}}=4.5468$
  Choosing
  R ₇:=1000·Ω
  gives:
  R ₆ :=R ₇·(G _stage2−1), or R₆=3546.7605 Ω
  The nearest 1% resistor value is:
  R ₆ :=R _{Nearest — 1%}(R ₆), or R₆=3570.0000 Ω
  The resulting cumulative gain is: $G_{\mathrm{actual}}:=\left(1+\frac{R_4}{R_5}\right)·\left(1+\frac{R_6}{R_7}\right),\mathrm{or}{G}_{\mathrm{actual}}=20.8849$
  This results in an actual:
  V_AO2actual of V _AO2actual :=G _actual ·V _AO2pk25, or
  V_AO2actual=804.0890 mV.
• Accordingly, a method and system have been described herein that provides a temperature compensated feedback signal for a switching power supply. The method and system provide a more economical and efficient switch power supply that can advantageously be implemented within an automotive environment.
• The above description is considered that of the preferred embodiments only. Modifications of the invention will occur to those skilled in the art and to those who make or use the invention. Therefore, it is understood that the embodiments shown in the drawings and described above are merely for illustrative purposes and not intended to limit the scope of the invention, which is defined by the following claims as interpreted according to the principles of patent law, including the doctrine of equivalents.

Claims (28)

1. A method for providing a temperature compensated feedback signal, comprising the steps of:

providing a switch having a temperature dependent switch impedance;

sampling a signal across the switch;

amplifying the sampled signal;

attenuating the amplified sampled signal as a function of a temperature of the switch; and

amplifying the attenuated amplified sampled signal to provide a temperature compensated feedback signal for controlling operation of the switch, wherein the feedback signal corresponds to a temperature compensated version of the sampled signal.

2. The method of claim 1, wherein a thermistor is located in thermal contact with the switch to provide a temperature dependent impedance that is utilized to attenuate the amplified sampled signal.

3. The method of claim 2, wherein a temperature of the thermistor is within +/−5 degrees Celsius of the temperature of the switch.

4. The method of claim 2, wherein the thermistor has a positive temperature coefficient.

5. The method of claim 1, wherein the switch is one of a field-effect transistor (FET) and an insulated-gate bipolar transistor (IGBT).

6. The method of claim 1, wherein the signal across the switch is only sampled when the switch is conducting.

7. The method of claim 1, wherein the temperature dependent switch impedance is a temperature dependent switch resistance.

8. An electrical circuit for providing a temperature compensated feedback signal, the circuit comprising:

a first electrical component exhibiting a first temperature variable impedance, wherein the first electrical component is positioned in thermal contact with a first switch having a second temperature variable impedance;

a first amplifier including an input electrically coupled to the first switch and an output electrically coupled to an input of the first electrical component, wherein the first amplifier amplifies a signal produced across the first switch when the first switch is conducting; and

a second amplifier including an input electrically coupled to an output of the first electrical component, the first electrical component attenuating the amplified signal provided by the first amplifier as a function of a temperature of the first electrical component, wherein the second amplifier amplifies the attenuated amplified signal to provide a temperature compensated feedback signal at an output of the second amplifier.

9. The electrical circuit of claim 8, wherein the temperature of the first electrical component is within +/−10 degrees Celsius of a temperature of the first switch.

10. The electrical circuit of claim 8, further comprising:

a second switch electrically coupled to the input of the first amplifier, the second switch coupling the input of the first amplifier to ground when the first switch is not conducting.

11. The electrical circuit of claim 8, wherein the first electrical component is a thermistor.

12. The electrical circuit of claim 11, wherein the temperature of the thermistor is within +/−10 degrees Celsius of a temperature of the first switch.

13. The electrical circuit of claim 11, wherein the thermistor has a positive temperature coefficient.

14. The electrical circuit of claim 8, wherein the first switch is one of a field-effect transistor (FET) and an insulated-gate bipolar transistor (IGBT).

15. The electrical circuit of claim 8, wherein the first and second temperature variable impedances are temperature variable resistances.

16. A switching power supply, comprising:

a first switch having a first terminal, a second terminal and a control terminal, wherein the first terminal of the first switch is coupled to one side of a load and the second terminal of the first switch is coupled to ground, and wherein the first switch exhibits a temperature variable impedance between the first and second terminals when the first switch is conducting;

a control unit including a first output electrically coupled to the control terminal of the first switch;

an electrical circuit, comprising:

a first electrical component exhibiting a temperature variable impedance, wherein the first electrical component is positioned in thermal contact with the first switch;

a first amplifier including an input electrically coupled to the first terminal of the first switch and an output electrically coupled to an input of the first electrical component, wherein the first amplifier amplifies a signal produced across the first switch when the first switch is conducting; and

a second amplifier including an input electrically coupled to an output of the first electrical component, the first electrical component attenuating the amplified signal provided by the first amplifier as a function of a temperature of the first electrical component, wherein the second amplifier amplifies the attenuated amplified signal to provide a temperature compensated feedback signal at an output of the second amplifier, and wherein the feedback signal is provided to an input of the control unit and is utilized by the control unit to determine electrical characteristics of a control signal to be applied to the control terminal of the first switch.

17. The switching power supply of claim 16, wherein the temperature of the first electrical component is within +/−5 degrees Celsius of a temperature of the first switch.

18. The switching power supply of claim 16, further comprising:

a second switch electrically coupled to the input of the first amplifier, the second switch coupling the input of the first amplifier to ground when the first switch is not conducting.

19. The switching power supply of claim 16, wherein the first electrical component is a thermistor.

20. The switching power supply of claim 19, wherein the temperature of the thermistor is within +/−5 degrees Celsius of the temperature of the switch.

21. The switching power supply of claim 19, wherein the thermistor has a positive temperature coefficient.

22. The switching power supply of claim 16, wherein the first switch is one of a field-effect transistor (FET) and an insulated-gate bipolar transistor (IGBT).

23. The switching power supply of claim 16, wherein the first and second temperature variable impedances are temperature variable resistances.

24. An electrical circuit for providing a temperature compensated feedback signal, the circuit comprising:

a first electrical component exhibiting a first temperature variable impedance, wherein the first electrical component is positioned in thermal contact with a first switch having a second temperature variable impedance; and

a first amplifier including an input electrically coupled to the first switch and an output electrically coupled to an input of the first electrical component, wherein the first amplifier amplifies a signal produced across the first switch when the first switch is conducting and the first electrical component attenuates the amplified signal provided by the first amplifier as a function of a temperature of the first electrical component, and wherein the attenuated amplified signal is provided at an output of the first electrical component to provide a temperature compensated feedback signal.

25. The electrical circuit of claim 24, further comprising:

a second amplifier including an input electrically coupled to the output of the first electrical component, wherein the second amplifier amplifies the attenuated amplified signal to provide the temperature compensated feedback signal at an output of the second amplifier.

26. The electrical circuit of claim 24, further comprising:

a second switch electrically coupled to the input of the first amplifier, the second switch coupling the input of the first amplifier to ground when the first switch is not conducting.

27. The electrical circuit of claim 24; wherein the first electrical component is a thermistor with a positive temperature coefficient that matches a temperature coefficient of the first switch, and wherein the temperature of the thermistor is within +/−5 degrees Celsius of a temperature of the first switch.

28. The electrical circuit of claim 24, wherein the first switch is one of a field-effect transistor (FET) and an insulated-gate bipolar transistor (IGBT), and wherein the first and second temperature variable impedances are temperature variable resistances.

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