US20060014339A1 - Method of detecting one or more defects in a string of spaced apart studs - Google Patents
Method of detecting one or more defects in a string of spaced apart studs Download PDFInfo
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- US20060014339A1 US20060014339A1 US11/221,161 US22116105A US2006014339A1 US 20060014339 A1 US20060014339 A1 US 20060014339A1 US 22116105 A US22116105 A US 22116105A US 2006014339 A1 US2006014339 A1 US 2006014339A1
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- islands
- spacer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
Definitions
- the present invention relates to a landing pad for use as a contact to a conductive polysilicon and more particularly wherein the conductive polysilicon is shaped as a spacer adjacent a structure in a semiconductor device.
- Landing pads are well known in the art. They are used in a semiconductor device to provide electrical contact from one conductive layer, typically a metal layer to a conductive polysilicon layer through an insulating layer. Typically, conductive polysilicon is used in the formation of a logic or memory circuit, and the metal layer is used to carry signal and/or power to or from the circuit.
- the memory cell 10 comprises a semiconductor substrate 11 , of a first conductivity type, typically P type.
- the cell 10 comprises a first insulating layer 12 on the substrate 11 .
- a floating gate 14 having a tip that permits Fowler-Nordheim tunneling of charges from the floating gate 14 to the control gate 40 , is also made from conductive polysilicon and is formed on the first insulating layer 12 .
- the floating gate 14 is also capacitively coupled to a region 30 in the substrate 11 .
- a source contact 34 also typically made from a conductive polysilicon, electrically connects to the region 30 in the substrate 11 .
- the source contact 34 is also insulated from the floating gate 14 by a second insulating layer 26 .
- the structure 20 comprising the floating gate(s) 14 , the first insulating layer 12 , the source contact 34 and the second insulating layer 26 is generally rectangularly shaped, and has a substantially planar surface against which the control gate 40 in the shape of a spacer is formed.
- the spacer shaped control gate 40 is made of conductive polysilicon. As is well known, to form a spacer, polysilicon is conformally deposited on the structure 20 .
- the polysilicon is then subject to an anisotropic etch which results in the spacer shape.
- the spacer shaped control gate 40 can be made conductive by, for example, ion implantation, either before the polysilicon is etched, or after the polysiclion is etched, i.e. after it is shaped into a spacer shape.
- FIG. 2 there is shown a top view of the structure shown in FIG. 1 .
- the structures 20 are fabricated as parallel strips, parallel to one another, with the control gate spacers 40 , immediately adjacent to the structure 20 , and therefore also parallel to one another.
- the structure shown in FIG. 1 is further fabricated to form additional regions in the substrate 11 , each of which is spaced apart from an associated region 30 , and is between a pair of adjacent spacer control gates 40 . Thereafter, insulating material (not shown), such as BPSG or any other form of glass or oxide material is deposited. Finally, landing pads are formed through the insulating material to contact the spacer shaped control gate 40 .
- a landing pad, such as 50 shown in FIG. 2 is a hole or via, made in the insulating material that covers the structure shown in FIG. 1 , so that a metal contact to the conductive polysilicon control gate 40 can be made.
- a landing pad 50 that is located to make electrical contact with the control gate 40 .
- the formation of a landing pad 50 to a memory array in which rows of control gates 40 are formed parallel and spaced apart from one another means that the landing pad 50 must be accurately positioned in the X direction. If there is any significant deviation in the X direction, the landing pad 50 might make contact with the “wrong” row of control gate, i.e. 40 c instead of 40 b . Alternatively, the landing pad 50 might contact the source contact 34 . Furthermore, the problem of making a landing pad 50 contacting a spacer conductor 40 is further exacerbated by the shape of the conductor 40 .
- the landing pad 50 is positioned within the range of tolerance, i.e. it does not contact the control gate 40 c nor make contact with the source contact 34 , because the spacer control gate 40 is curvilinearly shaped, the depth of the landing pad 50 required to make contact may differ significantly from one landing pad to another, leading to potential poor electrical contact.
- a landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure.
- FIG. 1 is a cross section view of a non-volatile memory array semiconductor device having a conductive spacer to which the landing pad of the present invention may be used.
- FIG. 2 is a top view of the device shown in FIG. 1 .
- FIG. 3 is a top view of the landing pad of the present invention used in a memory cell array of the present invention.
- FIG. 4 is a top view of a portion of the structure shown in FIG. 3 , without the conductive spacers.
- FIGS. 5 a - c are cross sectional views of the structure shown in FIG. 4 taken along the lines 5 - 5 , showing a method of forming the landing pad of the present invention.
- FIGS. 6 a - c are cross sectional views of the structure shown in FIG. 4 taken along the lines 6 - 6 , showing a method of forming the landing pad of the present invention.
- FIG. 7 a is a cross sectional view of a row of studs in a semiconductor device of the prior art to which another aspect of the present invention may be used to test potential defects in the manufacturing of the row of studs.
- FIG. 7 b is a top view of the device shown in FIG. 7 a.
- FIG. 7 c is a cross sectional view of a method of the prior art to test the potential defects in the manufacturing of the row of studs shown in FIG. 7 a.
- FIG. 8 a is a cross sectional view of a row of studs in a semiconductor device tested in accordance with the method of the present invention.
- FIG. 8 b is a top view of the row of studs shown in FIG. 8 a and tested with the method of the present invention.
- FIG. 3 there is shown a top view of a landing pad 50 of the present invention used with a spacer shaped control gate 40 in a non-volatile memory array device.
- the spacer shaped control gates 40 are formed adjacent to a structure which has a planar surface, adjacent to the control gate 40 .
- the structures 20 shown in FIG. 3 are not linear and evenly spaced apart from one another. In particular, the distance of separation (measured as a perpendicular line from one structure 20 to an adjacent structure 20 ) varies.
- the distance of separation between those two structures 20 is greater than the distance of separation between the two structures 20 at locations other than where the landing pad 50 is located.
- the control gates 40 which are immediately adjacent to the structures 20 are also not linear and evenly spaced apart from one another.
- the structures 20 (and the associated control gate spacers 40 ) generally run in a row direction (although the term row and column may be interchanged).
- FIG. 3 shows the structures 40 and the associated control gate spacers 40 as being not linear and evenly spaced, it is not necessary for the practice of the present invention that the control gates 40 be not evenly spaced and not linear.
- the present invention is not limited to the use of a landing pad 50 in a semiconductor memory device.
- the landing pad 50 of the present invention may be used with any spacer shaped conductive polysilicon.
- the landing pad 50 comprises two islands 60 a and 60 b , each substantially rectangularly shaped, and spaced apart from one another and from the structure 20 which has the associated control gate spacer 40 to which the landing pad 50 is intended to make contact.
- the landing pad 50 a is intended to make electrical contact with control gate 40 a which is adjacent to the structure 20 a .
- the landing pad 50 a comprises a first island 60 a 1 and a second island 60 b 1 , each separated from one another, and separated from the structure 20 a (which is the definition of an “island”).
- each island 60 a and 60 b Surrounding each island 60 a and 60 b are electrically conductive spacers, which overlap with one another and overlap with the control gate spacer 40 .
- the islands 60 a and 60 b must be spaced apart from one another and from the structure 20 , such that the spacers that are formed about the islands 60 a and 60 b and the spacer 40 will overlap.
- the islands 60 a and 60 b are spaced apart from one another by a distance which is less than twice the width of each conductive spacer, and from the structure 20 by a distance which is less than twice the width of the conductive spacer 40 .
- the landing pad hole 50 that is formed to contact the control gate spacer 40 is then made at a location which is between the islands 60 a and 60 b and between the islands 60 a and 60 b and the structure 20 . Because the conductive spacers that are formed around each of the islands overlap with one another and with the control gate spacer 40 , the landing pad hole 50 can be positioned with more tolerance than heretofore. Further, as will be seen hereinafter, because the spacers overlap, the area where the landing pad hole 50 is formed will contact the overlapping spacers at a region where the spacers do not exhibit sharp curvilinear dimensions, thus providing for greater electrical contact in all of the landing hole contacts.
- oxide layer 12 is deposited on the substrate 11 .
- the oxide 12 is the same layer of oxide that is used in the structure 20 . Thus, the formation of the oxide layer 12 , outside of the structure 20 would not be an extra processing step.
- a first layer of polysilicon 14 is then deposited on the oxide layer 12 .
- the first polysilicon 14 is also the polysilicon that is used to form the floating gate 14 in the structure 20 . Thus, again this step would not be an extra processing step.
- the polysilicon 14 is then mask and etched, forming the floating gate 14 , and the islands 60 . Since a masking step is otherwise need to form the floating gates 14 , this again would not necessitae an extra processing step. The only change is the pattern of the mask to accommodate the formation of the islands 60 , as well as the non-linearity of the floating gate 14 as shown in FIG. 3 .
- Oxide 16 is then deposited over the structure. This would be the same oxide that is used in the formation of the structure 20 to cover the source contact 34 . Thus, again the deposition of the oxide 16 to cover the polysilicon island 60 would not necessitate an extra processing step.
- Polysilicon 40 is then deposited over the structure shown in FIGS. 5 a and 6 a .
- the polysilicon 40 is conformally deposited as it would be during the formation of the control gate spacers 40 . Thus, this would not necessitate an extra processing step.
- the resultant structure is shown in FIGS. 5 b and 6 b.
- FIGS. 5 b and 6 b The structure shown in FIGS. 5 b and 6 b is anisotropically etched.
- This etching step is the same process used to etch the poylsilicon 40 in the formation of the control gate spacer 40 . Thus, this would not necessitate an extra processing step.
- the etching step causes the formation of spacers surrounding each of the islands 60 . However, because the islands are spaced apart less than twice the width of the resultant spacers, the spacers 40 that surround each of the islands 60 would overlap, and also over lap with the control gate spacers 40 .
- a dielectric material 42 such as BPSG or any other well known dielectric used in semiconductor processing.
- the dielectric 42 would be the same dielectric that would normally be used in the formation of the prior art memory cell array 10 , to cover the control gate spacer 40 . Thus, this would not necessitate an extra processing step.
- a masking step is then used to form contact holes 50 in the dielectric 42 .
- Metal layer 44 is then deposited on the dielectric 42 , and in the contact hole 50 .
- the metal layer 44 is then masked. Again, this would be the same processing step as is done in the prior art, and thus no additional processing step is required.
- the resultant structure is shown in FIGS. 5 c and 6 c .
- greater electrical contact reliability can be achieved, and in one embodiment without requiring any additional processing step.
- not only is there increased reliability in not contacting undesired structures, but also reliability in the depth of contact to the spacer 40 but there is also an increase in electrical reliability in electrical current flow in the lateral direction. Referring to FIG.
- FIG. 4 which is a top view of a landing pad of the present invention, as can be seen from FIG. 4 , current can flow from the landing pad 50 in two directions, around the island 60 .
- the spacing between the islands 60 and between the islands 60 and the structure 20 can be as small as the lithographic dimensions or as large as two times the width of the spacer 40 that surrounds the islands 60 and the control gate spacer 40 .
- FIG. 7 there is shown a structure to which another aspect of the present invention can be used.
- the studs 1 can be found as the resistive elements in a cross-point memory array.
- Another aspect of the present invention is to test the process architecture in the formation of the plurality of studs 1 .
- the present invention can be used to determine if the studs are formed, and if so, whether they are of the “correct” dimensions.
- stud 1 c is shown as being possibly defective, being either of the incorrect lateral dimensions or non-existent. Of course, one would not know before hand that stud 1 c is defective.
- Stud 1 c is shown as for illustration purpose only.
- diffusion regions 2 a , 2 bc , and 2 d are formed in the eh substrate 11 , connecting studs 1 a , 1 b to 1 c , and 1 d respectively.
- polysilicon connections 3 ab and 3 cd are made connecting the top of the studs 1 a to 1 b , and 1 c to d , respectively.
- the polysilicon connections 3 ab and 3 cd are separated by a distance S>2xOL+F, where OL is the overlap (between elements 3 ab and 1 b or between 3 cd and 1 c ) and F is a feature size spacing between the conductors 3 ab and 3 cd .
- a continuity test is then performed between diffusion regions 2 a and 2 d . In the event one of the studs is defective (i.e. the stud is non-existent or it is dimensionally too narrow), there would not be any current flow between diffusion regions 2 a and 2 d.
- electrically conductive spacers 4 are formed about each of the studs 1 ( a - d ).
- the width of the spacer W is chosen to be 1 ⁇ 2 of the spacing between each stud 1 ( a - d ) that is to be checked.
- the spacer width W is not lithographically limited; thus, the spacing can be arbitrarily close.
- the method of the present invention to test the process to determine the formation of a row of spaced apart studs 1 can also be made to test a row of spaced apart holes.
- each hole is first converted to a stud by the use of the well known damascene process, in which material (such as polysilicon or dielectric) is deposited into the holes to fill the holes, and the surrounding material is then etched away leaving a plurality of spaced apart studs.
- the converted studs can then be tested in the manner previously described.
- the reliability of an electrical contact between a conductive layer, such as metal to an underlying conductive spacer, through a dielectric is increased.
- the formation of a plurality of spaced apart studs, or holes (which are first converted to studs), can be electrically tested.
Abstract
A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure.
Description
- The present invention relates to a landing pad for use as a contact to a conductive polysilicon and more particularly wherein the conductive polysilicon is shaped as a spacer adjacent a structure in a semiconductor device.
- Landing pads are well known in the art. They are used in a semiconductor device to provide electrical contact from one conductive layer, typically a metal layer to a conductive polysilicon layer through an insulating layer. Typically, conductive polysilicon is used in the formation of a logic or memory circuit, and the metal layer is used to carry signal and/or power to or from the circuit.
- Referring to U.S. Pat. No. 6,329,685, whose disclosure is incorporated herein in its entirety, there is shown a non-volatile memory cell with a control gate made of conductive polysilicon in the shaped of a spacer. See
FIG. 2H-4 thereof. This is also shown asFIG. 1 hereof. Thememory cell 10 comprises asemiconductor substrate 11, of a first conductivity type, typically P type. Thecell 10 comprises a firstinsulating layer 12 on thesubstrate 11. Afloating gate 14, having a tip that permits Fowler-Nordheim tunneling of charges from thefloating gate 14 to thecontrol gate 40, is also made from conductive polysilicon and is formed on the first insulatinglayer 12. Thefloating gate 14 is also capacitively coupled to aregion 30 in thesubstrate 11. Asource contact 34, also typically made from a conductive polysilicon, electrically connects to theregion 30 in thesubstrate 11. Thesource contact 34 is also insulated from thefloating gate 14 by a second insulatinglayer 26. Thestructure 20 comprising the floating gate(s) 14, the firstinsulating layer 12, thesource contact 34 and the secondinsulating layer 26 is generally rectangularly shaped, and has a substantially planar surface against which thecontrol gate 40 in the shape of a spacer is formed. The spacer shapedcontrol gate 40 is made of conductive polysilicon. As is well known, to form a spacer, polysilicon is conformally deposited on thestructure 20. The polysilicon is then subject to an anisotropic etch which results in the spacer shape. The spacer shapedcontrol gate 40 can be made conductive by, for example, ion implantation, either before the polysilicon is etched, or after the polysiclion is etched, i.e. after it is shaped into a spacer shape. - Referring to
FIG. 2 there is shown a top view of the structure shown inFIG. 1 . Generally, thestructures 20 are fabricated as parallel strips, parallel to one another, with thecontrol gate spacers 40, immediately adjacent to thestructure 20, and therefore also parallel to one another. - The structure shown in
FIG. 1 is further fabricated to form additional regions in thesubstrate 11, each of which is spaced apart from an associatedregion 30, and is between a pair of adjacentspacer control gates 40. Thereafter, insulating material (not shown), such as BPSG or any other form of glass or oxide material is deposited. Finally, landing pads are formed through the insulating material to contact the spacer shapedcontrol gate 40. A landing pad, such as 50 shown inFIG. 2 is a hole or via, made in the insulating material that covers the structure shown inFIG. 1 , so that a metal contact to the conductivepolysilicon control gate 40 can be made. Although the formation of landing pads is well known, the formation of a landing pad to a spacer shaped conductive material, and in particular one that is used as a control gate creates a special problem. - Referring to
FIG. 2 , there is shown alanding pad 50 that is located to make electrical contact with thecontrol gate 40. The formation of alanding pad 50 to a memory array in which rows ofcontrol gates 40 are formed parallel and spaced apart from one another means that thelanding pad 50 must be accurately positioned in the X direction. If there is any significant deviation in the X direction, thelanding pad 50 might make contact with the “wrong” row of control gate, i.e. 40 c instead of 40 b. Alternatively, thelanding pad 50 might contact thesource contact 34. Furthermore, the problem of making alanding pad 50 contacting aspacer conductor 40 is further exacerbated by the shape of theconductor 40. Thus, even if thelanding pad 50 is positioned within the range of tolerance, i.e. it does not contact thecontrol gate 40 c nor make contact with thesource contact 34, because thespacer control gate 40 is curvilinearly shaped, the depth of thelanding pad 50 required to make contact may differ significantly from one landing pad to another, leading to potential poor electrical contact. - Hence there is a need to develop a landing pad which can be used to make electrical contact with a spacer shaped conductive member.
- A landing pad for use as a contact to a conductive spacer adjacent a structure in a semiconductor device comprises two islands, each of which is substantially rectangularly shaped and is spaced apart from one another and from the structure. Conductive spacers are adjacent to each island and overlapping each other and overlapping with the conductive spacer adjacent to the structure. The contact to the landing pad is on the conductive spacers adjacent to the islands and spaced apart from the structure.
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FIG. 1 is a cross section view of a non-volatile memory array semiconductor device having a conductive spacer to which the landing pad of the present invention may be used. -
FIG. 2 is a top view of the device shown inFIG. 1 . -
FIG. 3 is a top view of the landing pad of the present invention used in a memory cell array of the present invention. -
FIG. 4 is a top view of a portion of the structure shown inFIG. 3 , without the conductive spacers. -
FIGS. 5 a-c are cross sectional views of the structure shown inFIG. 4 taken along the lines 5-5, showing a method of forming the landing pad of the present invention. -
FIGS. 6 a-c are cross sectional views of the structure shown inFIG. 4 taken along the lines 6-6, showing a method of forming the landing pad of the present invention. -
FIG. 7 a is a cross sectional view of a row of studs in a semiconductor device of the prior art to which another aspect of the present invention may be used to test potential defects in the manufacturing of the row of studs. -
FIG. 7 b is a top view of the device shown inFIG. 7 a. -
FIG. 7 c is a cross sectional view of a method of the prior art to test the potential defects in the manufacturing of the row of studs shown inFIG. 7 a. -
FIG. 8 a is a cross sectional view of a row of studs in a semiconductor device tested in accordance with the method of the present invention. -
FIG. 8 b is a top view of the row of studs shown inFIG. 8 a and tested with the method of the present invention. - Referring to
FIG. 3 there is shown a top view of alanding pad 50 of the present invention used with a spacer shapedcontrol gate 40 in a non-volatile memory array device. As shown and discussed inFIG. 1 , the spacer shapedcontrol gates 40 are formed adjacent to a structure which has a planar surface, adjacent to thecontrol gate 40. However, in a preferred embodiment, unlike the structures shown inFIG. 2 , thestructures 20 shown inFIG. 3 are not linear and evenly spaced apart from one another. In particular, the distance of separation (measured as a perpendicular line from onestructure 20 to an adjacent structure 20) varies. Where alanding pad 50 is located between twoadjacent structures 20, the distance of separation between those twostructures 20 is greater than the distance of separation between the twostructures 20 at locations other than where thelanding pad 50 is located. Similarly, of course, thecontrol gates 40 which are immediately adjacent to thestructures 20 are also not linear and evenly spaced apart from one another. The structures 20 (and the associated control gate spacers 40) generally run in a row direction (although the term row and column may be interchanged). AlthoughFIG. 3 shows thestructures 40 and the associatedcontrol gate spacers 40 as being not linear and evenly spaced, it is not necessary for the practice of the present invention that thecontrol gates 40 be not evenly spaced and not linear. In fact, the present invention is not limited to the use of alanding pad 50 in a semiconductor memory device. Thelanding pad 50 of the present invention may be used with any spacer shaped conductive polysilicon. - The
landing pad 50 comprises two islands 60 a and 60 b, each substantially rectangularly shaped, and spaced apart from one another and from thestructure 20 which has the associatedcontrol gate spacer 40 to which thelanding pad 50 is intended to make contact. Thus, as shown inFIG. 3 , thelanding pad 50 a is intended to make electrical contact withcontrol gate 40 a which is adjacent to thestructure 20 a. Thelanding pad 50 a comprises a first island 60 a 1 and a second island 60 b 1, each separated from one another, and separated from thestructure 20 a (which is the definition of an “island”). - Surrounding each island 60 a and 60 b are electrically conductive spacers, which overlap with one another and overlap with the
control gate spacer 40. Thus, the islands 60 a and 60 b must be spaced apart from one another and from thestructure 20, such that the spacers that are formed about the islands 60 a and 60 b and thespacer 40 will overlap. This means that the islands 60 a and 60 b are spaced apart from one another by a distance which is less than twice the width of each conductive spacer, and from thestructure 20 by a distance which is less than twice the width of theconductive spacer 40. Thelanding pad hole 50 that is formed to contact thecontrol gate spacer 40 is then made at a location which is between the islands 60 a and 60 b and between the islands 60 a and 60 b and thestructure 20. Because the conductive spacers that are formed around each of the islands overlap with one another and with thecontrol gate spacer 40, thelanding pad hole 50 can be positioned with more tolerance than heretofore. Further, as will be seen hereinafter, because the spacers overlap, the area where thelanding pad hole 50 is formed will contact the overlapping spacers at a region where the spacers do not exhibit sharp curvilinear dimensions, thus providing for greater electrical contact in all of the landing hole contacts. - Referring to FIGS. 5(a-c) and 6(a-c) there is shown one method for making the
landing pad 50 of the present invention in thememory array 10 of the prior art, to form the memory array of the present invention, shown inFIG. 3 . In the first step,oxide layer 12 is deposited on thesubstrate 11. Theoxide 12 is the same layer of oxide that is used in thestructure 20. Thus, the formation of theoxide layer 12, outside of thestructure 20 would not be an extra processing step. - A first layer of
polysilicon 14 is then deposited on theoxide layer 12. Thefirst polysilicon 14 is also the polysilicon that is used to form the floatinggate 14 in thestructure 20. Thus, again this step would not be an extra processing step. - The
polysilicon 14 is then mask and etched, forming the floatinggate 14, and the islands 60. Since a masking step is otherwise need to form the floatinggates 14, this again would not necessitae an extra processing step. The only change is the pattern of the mask to accommodate the formation of the islands 60, as well as the non-linearity of the floatinggate 14 as shown inFIG. 3 . -
Oxide 16 is then deposited over the structure. This would be the same oxide that is used in the formation of thestructure 20 to cover thesource contact 34. Thus, again the deposition of theoxide 16 to cover the polysilicon island 60 would not necessitate an extra processing step. -
Polysilicon 40 is then deposited over the structure shown inFIGS. 5 a and 6 a. Thepolysilicon 40 is conformally deposited as it would be during the formation of thecontrol gate spacers 40. Thus, this would not necessitate an extra processing step. The resultant structure is shown inFIGS. 5 b and 6 b. - The structure shown in
FIGS. 5 b and 6 b is anisotropically etched. This etching step is the same process used to etch thepoylsilicon 40 in the formation of thecontrol gate spacer 40. Thus, this would not necessitate an extra processing step. The etching step causes the formation of spacers surrounding each of the islands 60. However, because the islands are spaced apart less than twice the width of the resultant spacers, thespacers 40 that surround each of the islands 60 would overlap, and also over lap with thecontrol gate spacers 40. - Thereafter, the entire structure is covered with a
dielectric material 42, such as BPSG or any other well known dielectric used in semiconductor processing. The dielectric 42 would be the same dielectric that would normally be used in the formation of the prior artmemory cell array 10, to cover thecontrol gate spacer 40. Thus, this would not necessitate an extra processing step. - A masking step is then used to form contact holes 50 in the dielectric 42. This would be the same masking step that is normally used to form the contact holes 50, as is done in the prior art. Thus, no additional processing step is required. However, because the
contact hole 50 will contact thepoylsilicon 40 in a regions where the spacers overlap, and where there is less slope, the depth of thecontact hole 50 is more reliable in contacting thespacer 40 than in the prior art. -
Metal layer 44 is then deposited on the dielectric 42, and in thecontact hole 50. Themetal layer 44 is then masked. Again, this would be the same processing step as is done in the prior art, and thus no additional processing step is required. The resultant structure is shown inFIGS. 5 c and 6 c. As can be seen from the foregoing, with thelanding pad 50 of the present invention, greater electrical contact reliability can be achieved, and in one embodiment without requiring any additional processing step. Further, not only is there increased reliability in not contacting undesired structures, but also reliability in the depth of contact to thespacer 40, but there is also an increase in electrical reliability in electrical current flow in the lateral direction. Referring toFIG. 4 , which is a top view of a landing pad of the present invention, as can be seen fromFIG. 4 , current can flow from thelanding pad 50 in two directions, around the island 60. Thus, there is increased electrical reliability current flow in the lateral direction as well. The spacing between the islands 60 and between the islands 60 and thestructure 20 can be as small as the lithographic dimensions or as large as two times the width of thespacer 40 that surrounds the islands 60 and thecontrol gate spacer 40. - Referring to
FIG. 7 there is shown a structure to which another aspect of the present invention can be used. InFIG. 7 there is shown a row of spaced apart electrically conductive studs 1(a-d) on asubstrate 11. Typically, the studs 1 can be found as the resistive elements in a cross-point memory array. Another aspect of the present invention is to test the process architecture in the formation of the plurality of studs 1. Thus, the present invention can be used to determine if the studs are formed, and if so, whether they are of the “correct” dimensions. For example,stud 1 c is shown as being possibly defective, being either of the incorrect lateral dimensions or non-existent. Of course, one would not know before hand thatstud 1 c is defective.Stud 1 c is shown as for illustration purpose only. - In the prior art, to determine if all the studs 1(a-d) have been made correctly, i.e. the process flow would produce the studs 1(a-d),
diffusion regions 2 a, 2 bc, and 2 d are formed in the ehsubstrate 11, connectingstuds studs 1 a to 1 b, and 1 c to d, respectively. The polysilicon connections 3 ab and 3 cd are separated by a distance S>2xOL+F, where OL is the overlap (between elements 3 ab and 1 b or between 3 cd and 1 c) and F is a feature size spacing between the conductors 3 ab and 3 cd. A continuity test is then performed betweendiffusion regions diffusion regions - In another method of the present invention, electrically conductive spacers 4 are formed about each of the studs 1(a-d). The width of the spacer W is chosen to be ½ of the spacing between each stud 1(a-d) that is to be checked. The spacer width W is not lithographically limited; thus, the spacing can be arbitrarily close. Once the spacers 4 are formed around each stud 1, an electrical continuity test is performed between spacers 4 a 1 and 4 d 2, which lie at the ends of the row of studs 1(a-d). If there is continuity, then the studs 1(a-d) are formed. If there is no continuity, i.e. if the
stud 1 c is missing, then there would not be any spacer formed surrounding thestud 1 c, thereby breaking the continuity. Finally, if a stud is too small or too narrow, then again the continuity will be broken. - The method of the present invention to test the process to determine the formation of a row of spaced apart studs 1(a-d) can also be made to test a row of spaced apart holes. To test the holes, each hole is first converted to a stud by the use of the well known damascene process, in which material (such as polysilicon or dielectric) is deposited into the holes to fill the holes, and the surrounding material is then etched away leaving a plurality of spaced apart studs. The converted studs can then be tested in the manner previously described.
- As can be seen from the foregoing, with the present invention, the reliability of an electrical contact between a conductive layer, such as metal to an underlying conductive spacer, through a dielectric is increased. In addition, with the present invention, the formation of a plurality of spaced apart studs, or holes (which are first converted to studs), can be electrically tested.
Claims (13)
1-4. (canceled)
5. A method of forming a landing pad to a conductive spacer adjacent a structure, said method comprising:
forming the structure on a semiconductor substrate, said structure having a substantially planar side;
forming two islands on the semiconductor substrate, each island substantially rectangularly shaped and spaced apart from one another and from the planar side of the structure;
forming conductive spacers adjacent to the planar side of the structure between the structure and the islands, and adjacent to each of the islands, surrounding each island, with said conductive spacers overlapping one another between the islands and between the islands and the structure; and
forming a landing pad, said landing pad being on said conductive spacers, between the islands and between the islands and the structure.
6. The method of claim 5 wherein said conductive spacers are made of conductive polysilicon.
7. The method of claim 6 wherein said forming conductive spacers step further comprises:
conformally depositing a layer of polysilicon on said islands and on said structure and therebetween;
anisotropically etching said layer of polysilicon to form said conductive spacers.
8. The method of claim 7 wherein said forming a landing step further comprises:
masking said islands, structure and conductive spacers with a layer of insulating material;
selectively removing a portion of said layer of insulating material at a position between the islands and between the islands and the structure to form the landing pad.
9. The method of claim 8 wherein the islands are spaced apart form one another by a distance which is less than twice the width of each conductive spacer.
10. The method of claim 9 wherein the islands are spaced apart from the structure by a distance which is less than twice the width of each conductive spacer.
11-16. (canceled)
17. A method of detecting one or more defects in a string of spaced apart studs on a semiconductor substrate wherein each stud is separated by a distance of 2X from an adjacent stud, said method comprising:
forming a plurality of conductive spacers with each spacer formed adjacent each stud, and overlapping with an adjacent spacer, each spacer having a width of at least X; and
electrically testing the continuity of the plurality of conductive spacers;
wherein in the event of failure of the testing step, said failure is indicative of the existence of one or more defects.
18. The method of claim 17 wherein said step of forming a plurality of conductive spacers comprises:
depositing conformally a layer of conductive polysilicon over said string of studs;
anisotropically etching said layer of conductive polysilicon to form said plurality of conductive spacers.
19. A method of detecting one or more defects in a string of spaced apart holes in a semiconductor device wherein each hole is separated by a distance of 2X from an adjacent hole, said method comprising:
converting each hole into a stud;
forming a plurality of conductive spacers with each spacer formed adjacent each stud, and overlapping with an adjacent spacer, each spacer having a width of at least X; and
electrically testing the continuity of the plurality of conductive spacers;
wherein in the event of failure of the testing step, said failure is indicative of the existence of one or more defects.
20. The method of claim 19 wherein said step of forming a plurality of conductive spacers comprises:
depositing conformally a layer of conductive polysilicon over said string of studs;
anisotropically etching said layer of conductive polysilicon to form said plurality of conductive spacers.
21. The method of claim 19 wherein said converting step comprises a damascene process.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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US11/221,161 US20060014339A1 (en) | 2003-10-23 | 2005-09-06 | Method of detecting one or more defects in a string of spaced apart studs |
US12/266,443 US7749779B2 (en) | 2003-10-23 | 2008-11-06 | Landing pad for use as a contact to a conductive spacer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US10/693,067 US6960803B2 (en) | 2003-10-23 | 2003-10-23 | Landing pad for use as a contact to a conductive spacer |
US11/221,161 US20060014339A1 (en) | 2003-10-23 | 2005-09-06 | Method of detecting one or more defects in a string of spaced apart studs |
Related Parent Applications (1)
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US10/693,067 Division US6960803B2 (en) | 2003-10-23 | 2003-10-23 | Landing pad for use as a contact to a conductive spacer |
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US12/266,443 Division US7749779B2 (en) | 2003-10-23 | 2008-11-06 | Landing pad for use as a contact to a conductive spacer |
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US10/693,067 Expired - Lifetime US6960803B2 (en) | 2003-10-23 | 2003-10-23 | Landing pad for use as a contact to a conductive spacer |
US11/221,161 Abandoned US20060014339A1 (en) | 2003-10-23 | 2005-09-06 | Method of detecting one or more defects in a string of spaced apart studs |
US12/266,443 Expired - Lifetime US7749779B2 (en) | 2003-10-23 | 2008-11-06 | Landing pad for use as a contact to a conductive spacer |
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US10/693,067 Expired - Lifetime US6960803B2 (en) | 2003-10-23 | 2003-10-23 | Landing pad for use as a contact to a conductive spacer |
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US12/266,443 Expired - Lifetime US7749779B2 (en) | 2003-10-23 | 2008-11-06 | Landing pad for use as a contact to a conductive spacer |
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US9040375B2 (en) * | 2013-01-28 | 2015-05-26 | Infineon Technologies Dresden Gmbh | Method for processing a carrier, method for fabricating a charge storage memory cell, method for processing a chip, and method for electrically contacting a spacer structure |
Citations (92)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US18013A (en) * | 1857-08-18 | Charles s | ||
US28895A (en) * | 1860-06-26 | Machine for wetting paper | ||
US55529A (en) * | 1866-06-12 | Improved baby-walker | ||
US81263A (en) * | 1868-08-18 | Job dyson | ||
US107173A (en) * | 1870-09-06 | Improvement in spring carriages | ||
US188012A (en) * | 1877-03-06 | Improvement in metal roofs | ||
US3647624A (en) * | 1969-07-24 | 1972-03-07 | Wisconsin Alumni Res Found | Treatment of blood with oleaginous substance |
US3958939A (en) * | 1975-01-08 | 1976-05-25 | Coulter Electronics, Inc. | Method for clarification of lipemic serum |
US3983008A (en) * | 1974-05-27 | 1976-09-28 | Idemitsu Kosan Co., Ltd. | Method of extracting useful components from microbial cells |
US4103685A (en) * | 1976-01-05 | 1978-08-01 | Lupien Paul J | Method and apparatus for extravascular treatment of blood |
US4258010A (en) * | 1975-11-19 | 1981-03-24 | Eszakmagyarorszagi Vegyimu_ vek | Solvent extraction apparatus |
US4350156A (en) * | 1980-05-29 | 1982-09-21 | Japan Foundation For Artificial Organs | Method and apparatus for on-line filtration removal of macromolecules from a physiological fluid |
US4391711A (en) * | 1980-03-19 | 1983-07-05 | Davy Mckee (Minerals & Metals) Limited | Method of, and apparatus for, effecting liquid-liquid contact |
US4399217A (en) * | 1979-05-02 | 1983-08-16 | Laboratoires Goella | Process and a device for the determination of serum lipoproteins |
US4402940A (en) * | 1982-03-12 | 1983-09-06 | Kuraray Co., Ltd. | Method for treating blood plasma employing a hollow fiber membrane |
US4435289A (en) * | 1981-12-23 | 1984-03-06 | Romicon, Inc. | Series ultrafiltration with pressurized permeate |
US4463988A (en) * | 1982-09-07 | 1984-08-07 | Cities Service Co. | Horizontal heated plane process |
US4522809A (en) * | 1980-02-11 | 1985-06-11 | Institut Pasteur | Process for obtaining lipid envelope virus sub-units, notably antigens for use as vaccines, the products obtained and their applications |
US4581231A (en) * | 1982-06-10 | 1986-04-08 | The United States Of America As Represented By The Secretary Of Health And Human Services | Inactivation of viruses containing essential lipids |
US4591505A (en) * | 1982-04-14 | 1986-05-27 | New York Blood Center, Inc. | Process for inactivating hepatitis B virus |
US4643718A (en) * | 1983-02-22 | 1987-02-17 | Applied Immunesciences, Inc. | Therapeutic apheresis |
US4645512A (en) * | 1985-05-06 | 1987-02-24 | The Dow Chemical Company | Continuous process for removing water-soluble particles from organic liquids |
US4647280A (en) * | 1984-06-27 | 1987-03-03 | Akzo Nv | Binder for low density lipoproteins |
US4648974A (en) * | 1983-03-24 | 1987-03-10 | Intermedicat Gmbh | Process for the selective extracorporeal separation of blood constituents |
US4668398A (en) * | 1983-07-21 | 1987-05-26 | Colgate-Palmolive Company | Continuous extraction apparatus and process |
US4671909A (en) * | 1978-09-21 | 1987-06-09 | Torobin Leonard B | Method for making hollow porous microspheres |
US4677057A (en) * | 1985-03-11 | 1987-06-30 | Scripps Clinic And Research Foundation | Diagnostic assay for the presence of apolipoproteins associated with plasma high density lipoproteins |
US4676905A (en) * | 1975-12-15 | 1987-06-30 | Toray Industries, Inc. | Fluid separation method and apparatus |
US4680320A (en) * | 1984-12-06 | 1987-07-14 | Kanegafuchi Kagaku Kogyo Kabushiki Kaisha | Method for preparation of droplets |
US4832034A (en) * | 1987-04-09 | 1989-05-23 | Pizziconi Vincent B | Method and apparatus for withdrawing, collecting and biosensing chemical constituents from complex fluids |
US4836928A (en) * | 1984-04-28 | 1989-06-06 | Terumo Kabushiki Kaisha | Separation method, separation device and separation apparatus for separating body fluid into respective components |
US4895558A (en) * | 1985-07-15 | 1990-01-23 | University Of Queensland | Autologous plasma delipidation using a continuous flow system |
US4908354A (en) * | 1984-06-16 | 1990-03-13 | B. Braun-Ssg Ag | Process for the selective extracorporeal precipitation of low-density lipoproteins |
US4909940A (en) * | 1987-12-30 | 1990-03-20 | New York Blood Center, Inc. | Extraction of process chemicals from labile biological mixtures with organic alcohols or with halogenated hydrocarbons |
US4909942A (en) * | 1987-10-16 | 1990-03-20 | Tanabe Seiyaku Co., Ltd. | Process for removing pyrogens |
US4923439A (en) * | 1981-09-10 | 1990-05-08 | B. Braun-Ssc Ag | Process for the selective extracorporeal precipitation of low-density lipoproteins from whole serum or plasma |
US4935204A (en) * | 1984-06-16 | 1990-06-19 | B. Braun-Ssc Ag | Process and device for the specific adsorption of heparin |
US5026479A (en) * | 1990-02-13 | 1991-06-25 | Union Carbide Industrial Gases Technology Corporation | Fluid separation device |
US5080796A (en) * | 1985-12-19 | 1992-01-14 | The Cleveland Clinic Foundation | Thermofiltration of plasma |
US5089602A (en) * | 1988-02-08 | 1992-02-18 | Rotkreuzstiftung Zentrallaboratorium Blutspendedienst Srk | Process for the manufacture of apolipoproteins from human blood plasma or serum |
US5112956A (en) * | 1987-12-02 | 1992-05-12 | The Nutrasweet Company | Method for extraction of lipids and cholesterol |
US5126240A (en) * | 1986-09-29 | 1992-06-30 | Curtiss Linda K | Hybridomas and monoclonal paratopic molecules to apolipoprotein a-i |
US5128318A (en) * | 1987-05-20 | 1992-07-07 | The Rogosin Institute | Reconstituted HDL particles and uses thereof |
US5187010A (en) * | 1990-11-27 | 1993-02-16 | W. R. Grace & Co.-Conn. | Membrane having high affinity for low density lipoprotein-cholesterol from whole blood |
US5203778A (en) * | 1986-02-18 | 1993-04-20 | Boehringer Laboratories | Process and apparatus for removal of insoluble fat from blood of a patient |
US5211850A (en) * | 1991-07-26 | 1993-05-18 | Research Medical, Inc. | Plasma filter sorbent system for removal of components from blood |
US5236644A (en) * | 1990-11-27 | 1993-08-17 | W. R. Grace & Co.-Conn. | Process of making membrane for removal of low density lipoprotein-cholesterol from whole blood |
US5279540A (en) * | 1992-09-24 | 1994-01-18 | Davidson Michael H | Method for reducing the risk of atherosclerosis |
US5301694A (en) * | 1991-11-12 | 1994-04-12 | Philip Morris Incorporated | Process for isolating plant extract fractions |
US5391143A (en) * | 1993-03-12 | 1995-02-21 | Kensey Nash Corporation | Method and system for effecting weight reduction of living beings |
US5393429A (en) * | 1991-11-05 | 1995-02-28 | Jgc Corporation | Liquid-liquid contactor |
US5401466A (en) * | 1993-06-01 | 1995-03-28 | Miles Inc. | Device for the direct measurement of low density lipoprotein cholesterol |
US5401415A (en) * | 1990-06-12 | 1995-03-28 | B. Braun Melsungen Ag | Adsorption material for the selective removal of LDL and/or vLDL and method of using therefor |
US5418061A (en) * | 1990-11-27 | 1995-05-23 | W. R. Grace & Co.-Conn. | Microporous polysulfone supports suitable for removal of low density lipoprotein-cholesterol |
US5419759A (en) * | 1988-11-17 | 1995-05-30 | Naficy; Sadeque S. | Apparatus and methods for treatment of HIV infections and AIDS |
US5424068A (en) * | 1992-12-07 | 1995-06-13 | P. Doina International Ltd. | Method for immunization of mammals against atherosclerosis and pharmaceutical compositions for obtaining said immunization |
US5429969A (en) * | 1994-05-31 | 1995-07-04 | Motorola, Inc. | Process for forming electrically programmable read-only memory cell with a merged select/control gate |
US5484396A (en) * | 1988-11-17 | 1996-01-16 | Naficy; Sadeque S. | Method and device for treatment of HIV infections and AIDS |
US5496637A (en) * | 1990-11-27 | 1996-03-05 | W. R. Grace & Co.-Conn. | High efficiency removal of low density lipoprotein-cholesterol from whole blood |
US5523096A (en) * | 1993-03-16 | 1996-06-04 | Applied Immune Sciences, Inc. | Removal of selected factors from whole blood or its components |
US5600168A (en) * | 1994-04-20 | 1997-02-04 | Lg Semicon Co., Ltd. | Semiconductor element and method for fabricating the same |
US5634893A (en) * | 1995-04-24 | 1997-06-03 | Haemonetics Corporation | Autotransfusion apparatus |
US5637224A (en) * | 1994-09-14 | 1997-06-10 | New Jersey Institute Of Technology | Hollow fiber contained liquid membrane pervaporation for removal of volatile organic compounds from aqueous solutions |
US5652339A (en) * | 1993-12-31 | 1997-07-29 | Rotkreuzstiftung Zentrallaboratorium | Method of producing reconstituted lipoproteins |
US5707673A (en) * | 1996-10-04 | 1998-01-13 | Prewell Industries, L.L.C. | Process for extracting lipids and organics from animal and plant matter or organics-containing waste streams |
US5719194A (en) * | 1995-08-22 | 1998-02-17 | Ausimont S.P.A. | Prevention and treatment of topical viral infections with perfluoropolyethers or compositions thereof |
US5744038A (en) * | 1993-07-30 | 1998-04-28 | Aruba International Pty Ltd. | Solvent extraction methods for delipidating plasma |
US5753227A (en) * | 1993-07-23 | 1998-05-19 | Strahilevitz; Meir | Extracorporeal affinity adsorption methods for the treatment of atherosclerosis, cancer, degenerative and autoimmune diseases |
US5855782A (en) * | 1993-08-10 | 1999-01-05 | Falkenhagen; Dieter | Arrangement for removing substances from liquids, in particular blood |
US5858238A (en) * | 1996-03-08 | 1999-01-12 | Baxter Research Medical, Inc. | Salvage of autologous blood via selective membrane/sorption technologies |
US5877005A (en) * | 1992-03-02 | 1999-03-02 | Aphios Corporation | Viral inactivation method using near critical, supercritical or critical fluids |
US5879685A (en) * | 1991-05-08 | 1999-03-09 | Schweiz, Serum- & Impfinstitut Bern | Immunostimulating and immunopotentiating reconstituted influenza virosomes and vaccines containing them |
US5885578A (en) * | 1987-06-10 | 1999-03-23 | The Immune Response Corporation | Prevention and treatment of retroviral disease |
US5891432A (en) * | 1997-07-29 | 1999-04-06 | The Immune Response Corporation | Membrane-bound cytokine compositions comprising GM=CSF and methods of modulating an immune response using same |
US5911698A (en) * | 1995-12-22 | 1999-06-15 | Aruba International Pty. Ltd. | Treatment for cardiovascular and related diseases |
US5919369A (en) * | 1992-02-06 | 1999-07-06 | Hemocleanse, Inc. | Hemofiltration and plasmafiltration devices and methods |
US6022333A (en) * | 1997-05-01 | 2000-02-08 | S.L.I.M. Tech, Ltd. | Method and system for removing materials from lymphatic and other fluids |
US6037458A (en) * | 1987-11-20 | 2000-03-14 | Kanegafuchi Kagaku Kogyo Kabushiki Kaisha | Adsorbent for serum amyloid protein |
US6037323A (en) * | 1997-09-29 | 2000-03-14 | Jean-Louis Dasseux | Apolipoprotein A-I agonists and their use to treat dyslipidemic disorders |
US6046166A (en) * | 1997-09-29 | 2000-04-04 | Jean-Louis Dasseux | Apolipoprotein A-I agonists and their use to treat dyslipidemic disorders |
US6080778A (en) * | 1998-03-23 | 2000-06-27 | Children's Medical Center Corporation | Methods for decreasing beta amyloid protein |
US6171373B1 (en) * | 1996-04-23 | 2001-01-09 | Applied Ceramics, Inc. | Adsorptive monolith including activated carbon, method for making said monolith, and method for adsorbing chemical agents from fluid streams |
US6180461B1 (en) * | 1998-08-03 | 2001-01-30 | Halo Lsi Design & Device Technology, Inc. | Double sidewall short channel split gate flash memory |
US6193891B1 (en) * | 1996-07-10 | 2001-02-27 | American National Red Cross | Methods for the selective separation of organic components from biological fluids |
US6337368B1 (en) * | 1997-06-03 | 2002-01-08 | Kaneka Corporation | Lipoprotein adsorbent and lipoprotein adsorber made with the use of the same |
US6514828B2 (en) * | 2001-04-20 | 2003-02-04 | Micron Technology, Inc. | Method of fabricating a highly reliable gate oxide |
US6525371B2 (en) * | 1999-09-22 | 2003-02-25 | International Business Machines Corporation | Self-aligned non-volatile random access memory cell and process to make the same |
US6605588B1 (en) * | 1996-11-27 | 2003-08-12 | Boston Heart Foundation, Inc. | Low density lipoprotein binding proteins and their use in diagnosing and treating atherosclerosis |
US6706008B2 (en) * | 2001-03-06 | 2004-03-16 | Baxter International Inc. | Automated system and method for withdrawing compounds from blood |
US6737066B1 (en) * | 1999-05-06 | 2004-05-18 | The Immune Response Corporation | HIV immunogenic compositions and methods |
US6759712B2 (en) * | 2002-09-12 | 2004-07-06 | Micron Technology, Inc. | Semiconductor-on-insulator thin film transistor constructions |
US20050054167A1 (en) * | 2003-09-09 | 2005-03-10 | Samsung Electronics Co., Ltd. | Local SONOS-type nonvolatile memory device and method of manufacturing the same |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6329685B1 (en) * | 1999-09-22 | 2001-12-11 | Silicon Storage Technology, Inc. | Self aligned method of forming a semiconductor memory array of floating gate memory cells and a memory array made thereby |
US6821847B2 (en) * | 2001-10-02 | 2004-11-23 | Mosel Vitelic, Inc. | Nonvolatile memory structures and fabrication methods |
US6844631B2 (en) * | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
US6909300B2 (en) * | 2002-05-09 | 2005-06-21 | Taiwan Semiconductor Manufacturing Co., Ltd | Method for fabricating microelectronic fabrication electrical test apparatus electrical probe tip having pointed tips |
US7173305B2 (en) * | 2003-04-08 | 2007-02-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Self-aligned contact for silicon-on-insulator devices |
US7105379B2 (en) * | 2004-04-28 | 2006-09-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Implementation of protection layer for bond pad protection |
WO2006034272A2 (en) * | 2004-09-20 | 2006-03-30 | Bayer Healthcare Llc | An optical sensor and methods of making it |
US7279707B2 (en) * | 2005-02-25 | 2007-10-09 | United Microelectronics Corp. | Test key structure |
US7391226B2 (en) * | 2006-05-31 | 2008-06-24 | Advanced Micro Devices, Inc. | Contact resistance test structure and methods of using same |
US8110416B2 (en) * | 2007-12-24 | 2012-02-07 | Texas Instruments Incorporated | AC impedance spectroscopy testing of electrical parametric structures |
US8987014B2 (en) * | 2008-05-21 | 2015-03-24 | Stats Chippac, Ltd. | Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort test |
-
2003
- 2003-10-23 US US10/693,067 patent/US6960803B2/en not_active Expired - Lifetime
-
2005
- 2005-09-06 US US11/221,161 patent/US20060014339A1/en not_active Abandoned
-
2008
- 2008-11-06 US US12/266,443 patent/US7749779B2/en not_active Expired - Lifetime
Patent Citations (99)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US28895A (en) * | 1860-06-26 | Machine for wetting paper | ||
US55529A (en) * | 1866-06-12 | Improved baby-walker | ||
US81263A (en) * | 1868-08-18 | Job dyson | ||
US107173A (en) * | 1870-09-06 | Improvement in spring carriages | ||
US188012A (en) * | 1877-03-06 | Improvement in metal roofs | ||
US18013A (en) * | 1857-08-18 | Charles s | ||
US3647624A (en) * | 1969-07-24 | 1972-03-07 | Wisconsin Alumni Res Found | Treatment of blood with oleaginous substance |
US3983008A (en) * | 1974-05-27 | 1976-09-28 | Idemitsu Kosan Co., Ltd. | Method of extracting useful components from microbial cells |
US3958939A (en) * | 1975-01-08 | 1976-05-25 | Coulter Electronics, Inc. | Method for clarification of lipemic serum |
US4258010A (en) * | 1975-11-19 | 1981-03-24 | Eszakmagyarorszagi Vegyimu_ vek | Solvent extraction apparatus |
US4676905A (en) * | 1975-12-15 | 1987-06-30 | Toray Industries, Inc. | Fluid separation method and apparatus |
US4103685A (en) * | 1976-01-05 | 1978-08-01 | Lupien Paul J | Method and apparatus for extravascular treatment of blood |
US4671909A (en) * | 1978-09-21 | 1987-06-09 | Torobin Leonard B | Method for making hollow porous microspheres |
US4399217A (en) * | 1979-05-02 | 1983-08-16 | Laboratoires Goella | Process and a device for the determination of serum lipoproteins |
US4522809A (en) * | 1980-02-11 | 1985-06-11 | Institut Pasteur | Process for obtaining lipid envelope virus sub-units, notably antigens for use as vaccines, the products obtained and their applications |
US4391711A (en) * | 1980-03-19 | 1983-07-05 | Davy Mckee (Minerals & Metals) Limited | Method of, and apparatus for, effecting liquid-liquid contact |
US4350156A (en) * | 1980-05-29 | 1982-09-21 | Japan Foundation For Artificial Organs | Method and apparatus for on-line filtration removal of macromolecules from a physiological fluid |
US4923439A (en) * | 1981-09-10 | 1990-05-08 | B. Braun-Ssc Ag | Process for the selective extracorporeal precipitation of low-density lipoproteins from whole serum or plasma |
US4435289A (en) * | 1981-12-23 | 1984-03-06 | Romicon, Inc. | Series ultrafiltration with pressurized permeate |
US4402940A (en) * | 1982-03-12 | 1983-09-06 | Kuraray Co., Ltd. | Method for treating blood plasma employing a hollow fiber membrane |
US4591505A (en) * | 1982-04-14 | 1986-05-27 | New York Blood Center, Inc. | Process for inactivating hepatitis B virus |
US4581231A (en) * | 1982-06-10 | 1986-04-08 | The United States Of America As Represented By The Secretary Of Health And Human Services | Inactivation of viruses containing essential lipids |
US4463988A (en) * | 1982-09-07 | 1984-08-07 | Cities Service Co. | Horizontal heated plane process |
US4643718A (en) * | 1983-02-22 | 1987-02-17 | Applied Immunesciences, Inc. | Therapeutic apheresis |
US4648974A (en) * | 1983-03-24 | 1987-03-10 | Intermedicat Gmbh | Process for the selective extracorporeal separation of blood constituents |
US4668398A (en) * | 1983-07-21 | 1987-05-26 | Colgate-Palmolive Company | Continuous extraction apparatus and process |
US4836928A (en) * | 1984-04-28 | 1989-06-06 | Terumo Kabushiki Kaisha | Separation method, separation device and separation apparatus for separating body fluid into respective components |
US4935204A (en) * | 1984-06-16 | 1990-06-19 | B. Braun-Ssc Ag | Process and device for the specific adsorption of heparin |
US4908354A (en) * | 1984-06-16 | 1990-03-13 | B. Braun-Ssg Ag | Process for the selective extracorporeal precipitation of low-density lipoproteins |
US4647280A (en) * | 1984-06-27 | 1987-03-03 | Akzo Nv | Binder for low density lipoproteins |
US4680320A (en) * | 1984-12-06 | 1987-07-14 | Kanegafuchi Kagaku Kogyo Kabushiki Kaisha | Method for preparation of droplets |
US4677057A (en) * | 1985-03-11 | 1987-06-30 | Scripps Clinic And Research Foundation | Diagnostic assay for the presence of apolipoproteins associated with plasma high density lipoproteins |
US4645512A (en) * | 1985-05-06 | 1987-02-24 | The Dow Chemical Company | Continuous process for removing water-soluble particles from organic liquids |
US4895558A (en) * | 1985-07-15 | 1990-01-23 | University Of Queensland | Autologous plasma delipidation using a continuous flow system |
US5080796A (en) * | 1985-12-19 | 1992-01-14 | The Cleveland Clinic Foundation | Thermofiltration of plasma |
US5203778A (en) * | 1986-02-18 | 1993-04-20 | Boehringer Laboratories | Process and apparatus for removal of insoluble fat from blood of a patient |
US5126240A (en) * | 1986-09-29 | 1992-06-30 | Curtiss Linda K | Hybridomas and monoclonal paratopic molecules to apolipoprotein a-i |
US4832034A (en) * | 1987-04-09 | 1989-05-23 | Pizziconi Vincent B | Method and apparatus for withdrawing, collecting and biosensing chemical constituents from complex fluids |
US5128318A (en) * | 1987-05-20 | 1992-07-07 | The Rogosin Institute | Reconstituted HDL particles and uses thereof |
US6017543A (en) * | 1987-06-10 | 2000-01-25 | The Immune Response Corporation | Prevention and treatment of retroviral disease |
US5895650A (en) * | 1987-06-10 | 1999-04-20 | The Immune Response Corporation | Prevention and treatment of retroviral disease |
US5885578A (en) * | 1987-06-10 | 1999-03-23 | The Immune Response Corporation | Prevention and treatment of retroviral disease |
US5916806A (en) * | 1987-06-10 | 1999-06-29 | The Immune Response Corporation | Prevention and treatment of retroviral disease |
US5928930A (en) * | 1987-06-10 | 1999-07-27 | Immune Response Corporation | Prevention and treatment of retroviral disease |
US4909942A (en) * | 1987-10-16 | 1990-03-20 | Tanabe Seiyaku Co., Ltd. | Process for removing pyrogens |
US6037458A (en) * | 1987-11-20 | 2000-03-14 | Kanegafuchi Kagaku Kogyo Kabushiki Kaisha | Adsorbent for serum amyloid protein |
US5112956A (en) * | 1987-12-02 | 1992-05-12 | The Nutrasweet Company | Method for extraction of lipids and cholesterol |
US4909940A (en) * | 1987-12-30 | 1990-03-20 | New York Blood Center, Inc. | Extraction of process chemicals from labile biological mixtures with organic alcohols or with halogenated hydrocarbons |
US5089602A (en) * | 1988-02-08 | 1992-02-18 | Rotkreuzstiftung Zentrallaboratorium Blutspendedienst Srk | Process for the manufacture of apolipoproteins from human blood plasma or serum |
US5419759A (en) * | 1988-11-17 | 1995-05-30 | Naficy; Sadeque S. | Apparatus and methods for treatment of HIV infections and AIDS |
US5484396A (en) * | 1988-11-17 | 1996-01-16 | Naficy; Sadeque S. | Method and device for treatment of HIV infections and AIDS |
US5026479A (en) * | 1990-02-13 | 1991-06-25 | Union Carbide Industrial Gases Technology Corporation | Fluid separation device |
US5401415A (en) * | 1990-06-12 | 1995-03-28 | B. Braun Melsungen Ag | Adsorption material for the selective removal of LDL and/or vLDL and method of using therefor |
US5418061A (en) * | 1990-11-27 | 1995-05-23 | W. R. Grace & Co.-Conn. | Microporous polysulfone supports suitable for removal of low density lipoprotein-cholesterol |
US5236644A (en) * | 1990-11-27 | 1993-08-17 | W. R. Grace & Co.-Conn. | Process of making membrane for removal of low density lipoprotein-cholesterol from whole blood |
US5187010A (en) * | 1990-11-27 | 1993-02-16 | W. R. Grace & Co.-Conn. | Membrane having high affinity for low density lipoprotein-cholesterol from whole blood |
US5496637A (en) * | 1990-11-27 | 1996-03-05 | W. R. Grace & Co.-Conn. | High efficiency removal of low density lipoprotein-cholesterol from whole blood |
US5879685A (en) * | 1991-05-08 | 1999-03-09 | Schweiz, Serum- & Impfinstitut Bern | Immunostimulating and immunopotentiating reconstituted influenza virosomes and vaccines containing them |
US5211850A (en) * | 1991-07-26 | 1993-05-18 | Research Medical, Inc. | Plasma filter sorbent system for removal of components from blood |
US5393429A (en) * | 1991-11-05 | 1995-02-28 | Jgc Corporation | Liquid-liquid contactor |
US5301694A (en) * | 1991-11-12 | 1994-04-12 | Philip Morris Incorporated | Process for isolating plant extract fractions |
US5919369A (en) * | 1992-02-06 | 1999-07-06 | Hemocleanse, Inc. | Hemofiltration and plasmafiltration devices and methods |
US5877005A (en) * | 1992-03-02 | 1999-03-02 | Aphios Corporation | Viral inactivation method using near critical, supercritical or critical fluids |
US5279540A (en) * | 1992-09-24 | 1994-01-18 | Davidson Michael H | Method for reducing the risk of atherosclerosis |
US5424068A (en) * | 1992-12-07 | 1995-06-13 | P. Doina International Ltd. | Method for immunization of mammals against atherosclerosis and pharmaceutical compositions for obtaining said immunization |
US5391143A (en) * | 1993-03-12 | 1995-02-21 | Kensey Nash Corporation | Method and system for effecting weight reduction of living beings |
US5523096A (en) * | 1993-03-16 | 1996-06-04 | Applied Immune Sciences, Inc. | Removal of selected factors from whole blood or its components |
US5401466A (en) * | 1993-06-01 | 1995-03-28 | Miles Inc. | Device for the direct measurement of low density lipoprotein cholesterol |
US6039946A (en) * | 1993-07-23 | 2000-03-21 | Strahilevitz; Meir | Extracorporeal affinity adsorption devices |
US5753227A (en) * | 1993-07-23 | 1998-05-19 | Strahilevitz; Meir | Extracorporeal affinity adsorption methods for the treatment of atherosclerosis, cancer, degenerative and autoimmune diseases |
US6264623B1 (en) * | 1993-07-23 | 2001-07-24 | Meir Strahilevitz | Extracorporeal affinity adsorption methods for the treatment of atherosclerosis, cancer, degenerative and autoimmune disease |
US5744038A (en) * | 1993-07-30 | 1998-04-28 | Aruba International Pty Ltd. | Solvent extraction methods for delipidating plasma |
US5855782A (en) * | 1993-08-10 | 1999-01-05 | Falkenhagen; Dieter | Arrangement for removing substances from liquids, in particular blood |
US5652339A (en) * | 1993-12-31 | 1997-07-29 | Rotkreuzstiftung Zentrallaboratorium | Method of producing reconstituted lipoproteins |
US5600168A (en) * | 1994-04-20 | 1997-02-04 | Lg Semicon Co., Ltd. | Semiconductor element and method for fabricating the same |
US5429969A (en) * | 1994-05-31 | 1995-07-04 | Motorola, Inc. | Process for forming electrically programmable read-only memory cell with a merged select/control gate |
US5637224A (en) * | 1994-09-14 | 1997-06-10 | New Jersey Institute Of Technology | Hollow fiber contained liquid membrane pervaporation for removal of volatile organic compounds from aqueous solutions |
US5634893A (en) * | 1995-04-24 | 1997-06-03 | Haemonetics Corporation | Autotransfusion apparatus |
US5719194A (en) * | 1995-08-22 | 1998-02-17 | Ausimont S.P.A. | Prevention and treatment of topical viral infections with perfluoropolyethers or compositions thereof |
US5911698A (en) * | 1995-12-22 | 1999-06-15 | Aruba International Pty. Ltd. | Treatment for cardiovascular and related diseases |
US5858238A (en) * | 1996-03-08 | 1999-01-12 | Baxter Research Medical, Inc. | Salvage of autologous blood via selective membrane/sorption technologies |
US6171373B1 (en) * | 1996-04-23 | 2001-01-09 | Applied Ceramics, Inc. | Adsorptive monolith including activated carbon, method for making said monolith, and method for adsorbing chemical agents from fluid streams |
US6193891B1 (en) * | 1996-07-10 | 2001-02-27 | American National Red Cross | Methods for the selective separation of organic components from biological fluids |
US5707673A (en) * | 1996-10-04 | 1998-01-13 | Prewell Industries, L.L.C. | Process for extracting lipids and organics from animal and plant matter or organics-containing waste streams |
US6605588B1 (en) * | 1996-11-27 | 2003-08-12 | Boston Heart Foundation, Inc. | Low density lipoprotein binding proteins and their use in diagnosing and treating atherosclerosis |
US6022333A (en) * | 1997-05-01 | 2000-02-08 | S.L.I.M. Tech, Ltd. | Method and system for removing materials from lymphatic and other fluids |
US6337368B1 (en) * | 1997-06-03 | 2002-01-08 | Kaneka Corporation | Lipoprotein adsorbent and lipoprotein adsorber made with the use of the same |
US5891432A (en) * | 1997-07-29 | 1999-04-06 | The Immune Response Corporation | Membrane-bound cytokine compositions comprising GM=CSF and methods of modulating an immune response using same |
US6037323A (en) * | 1997-09-29 | 2000-03-14 | Jean-Louis Dasseux | Apolipoprotein A-I agonists and their use to treat dyslipidemic disorders |
US6046166A (en) * | 1997-09-29 | 2000-04-04 | Jean-Louis Dasseux | Apolipoprotein A-I agonists and their use to treat dyslipidemic disorders |
US6080778A (en) * | 1998-03-23 | 2000-06-27 | Children's Medical Center Corporation | Methods for decreasing beta amyloid protein |
US6440387B1 (en) * | 1998-03-23 | 2002-08-27 | Children's Medical Center Corporation | Methods for determining risk of Alzheimer's disease |
US6180461B1 (en) * | 1998-08-03 | 2001-01-30 | Halo Lsi Design & Device Technology, Inc. | Double sidewall short channel split gate flash memory |
US6737066B1 (en) * | 1999-05-06 | 2004-05-18 | The Immune Response Corporation | HIV immunogenic compositions and methods |
US6525371B2 (en) * | 1999-09-22 | 2003-02-25 | International Business Machines Corporation | Self-aligned non-volatile random access memory cell and process to make the same |
US6706008B2 (en) * | 2001-03-06 | 2004-03-16 | Baxter International Inc. | Automated system and method for withdrawing compounds from blood |
US6514828B2 (en) * | 2001-04-20 | 2003-02-04 | Micron Technology, Inc. | Method of fabricating a highly reliable gate oxide |
US6759712B2 (en) * | 2002-09-12 | 2004-07-06 | Micron Technology, Inc. | Semiconductor-on-insulator thin film transistor constructions |
US20050054167A1 (en) * | 2003-09-09 | 2005-03-10 | Samsung Electronics Co., Ltd. | Local SONOS-type nonvolatile memory device and method of manufacturing the same |
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US6960803B2 (en) | 2005-11-01 |
US20050090063A1 (en) | 2005-04-28 |
US7749779B2 (en) | 2010-07-06 |
US20090061547A1 (en) | 2009-03-05 |
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