US20060082938A1 - Electrostatic discharge protection device for high speed transmission lines - Google Patents
Electrostatic discharge protection device for high speed transmission lines Download PDFInfo
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- US20060082938A1 US20060082938A1 US11/075,416 US7541605A US2006082938A1 US 20060082938 A1 US20060082938 A1 US 20060082938A1 US 7541605 A US7541605 A US 7541605A US 2006082938 A1 US2006082938 A1 US 2006082938A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Definitions
- the present invention relates to a circuit for protecting transmission lines against transients, such as those caused by Electrostatic Discharge (ESD); more particularly, the invention relates to a semiconductor device having low capacitance and low leakage and which is useful for the protection of high speed data transmission lines which typically operating at voltages below 5V.
- ESD Electrostatic Discharge
- MOS metal oxide semiconductor
- TVS/Zener devices such as their part No. SLVU2.8, which is capable of handling ESD and transient protection levels intended for 3.3V systems. These devices are based on Low-voltage Punch-Through concept as described in U.S. Pat. No. 6,015,999.
- a disadvantage of the above described devices is that they must be coupled in series with a rectifier diode in order to achieve capacitance levels in the order of 10 pF or below, so as to exhibit a low insertion loss.
- An advantage of the present invention is to provide transient protection device for low voltage circuits.
- the device may be used as a transient voltage suppressor or ESD protector for high speed data transmission lines.
- a semiconductor device for coupling a transient voltage from an input node to a reference node comprising:
- the input node is coupled to a high speed data transmission line and the reference node is coupled to ground.
- the transmission line operates below 5v and the transistor is an NPN transistor.
- the driver may preferably be a gate-drain connected MOS transistor with its gate-drain terminal coupled to the collector terminal of the transistor and its source terminal coupled to the base terminal of the transistor.
- the driver may be a light emitting diode (LED) or any other diode with a different material (band-gap) and die size than the LED, connected to the bipolar transistor to create a low voltage clamping device.
- An advantage of the present invention is that it provides a low voltage clamping device having a stable breakdown or “zener” voltage characteristic in applications operating at low voltages while providing low leakage and low capacitance.
- FIGS. 1 ( a ) and ( b ) are schematic diagrams of a device configuration according to embodiments of the present invention.
- FIGS. 2 ( a ) and ( b ) are schematic diagrams of a device configuration according to further embodiments of the present invention.
- FIGS. 3 ( a ) and ( b ) are schematic diagrams showing operation of the devices of FIGS. 1 ( a ) and ( b );
- FIGS. 4 ( a ), ( b ) and ( c ) show schematically voltage-current traces for the device of the present invention
- FIGS. 5 ( a ), ( b ) and ( c ) show respectively a die layout, a schematic diagram and equivalent circuit for a two device configuration according to the present invention.
- FIG. 6 shows a schematic diagram for connecting a pair of devices, according to the present invention, to a pair of data lines.
- FIG. 1 ( a ) there is shown a first embodiment of semiconductor protection device 100 for coupling a transient voltage from an input node 102 to a reference node 104 .
- the device 100 includes an NPN bipolar transistor 106 having its collector terminal coupled to the input node 102 and its emitter terminal coupled to the reference node 104 .
- An N-channel MOSFET 108 is configured as a driver device by having its drain-gate terminals coupled to the collector terminal of the transistor 106 and its source terminal coupled to the base terminal 110 of the transistor 106 such that the MOSFET 108 is responsive to a transient voltage at the input node 102 to turn on the transistor 106 , thereby shunting the transient voltage to the reference node 104 .
- the bipolar transistor is a NPN device 126 and the N-channel MOSFET 128 has its drain-gate terminal coupled to the gate of the transistor 126 and the source terminal is coupled to the collector.
- the emitter-collector terminals are connected as above between the input and reference nodes.
- third and fourth embodiments 130 , 140 which are similar devices to those of FIGS. 1 ( a ) and ( b ) are shown; however in these embodiments the N-channel MOSFETs 108 , 128 are replaced by LEDs 138 , 148 .
- the anode terminal of the LED 138 is connected to the collector terminal of the transistor 136 and the cathode terminal to the base of the NPN transistor 136
- the anode of the LED 148 is connected to the base of the transistor 146 and the cathode to the collector.
- the LED may be any color or any other diode made of such material (band-gap) and size that could give the desired driving voltage.
- the devices 130 , 140 are connected between the input node and reference node.
- FIGS. 3 ( a ) and 3 ( b ) the devices correspond to the embodiments 120 , 140 illustrated with respect to FIGS. 1 ( b ) and 2 ( b ), respectively.
- the N-channel MOSFET 128 or the LED 148 are the driver devices when in combination with the bipolar transistor 126 .
- the MOSFET is connected as described to convert it to a voltage reference, having its drain-to-source voltage fixed and being equivalent to the gate-to source threshold voltage, typically around 2V to 3V. This has a sharp voltage knee characteristic.
- the voltage drop across the device is typically 1.7V for conventional red, green or amber LED's, and 3.6V for Blue and White LED's.
- VEB is the emitter-base voltage for the transistor
- IC, IB and IE are the corresponding collector, base and emitter currents
- VF is the forward voltage
- VGS is the gate-source threshold voltage of the MOSFET
- IDS is its drain-source current.
- the transistor gain acts to “square” the diode forward characteristic, or the gate-to source voltage characteristic in case of the MOS transistor configurations shown in FIGS. 1 ( a ) and 1 ( b ).
- FIGS. 4 ( a ) to ( c ) there is shown the emitter-collector voltage versus current characteristic traces at three levels of current: namely 2 microamps; 200 microamps 10 milliamps, showing graphically the operation of the devices for a Red LED and a PNP transistor combination of the present invention.
- MOSFET-bipolar or LED-bipolar device combinations of the present invention depend merely on the output capacitance of the transistor, which can be tailored to be smaller than any low voltage TVS/Zener.
- the transistor may be selected to be small enough to have an off-state capacitance of around 6-7 pF, with a maximum of 10 pF. This is significantly lower than that of a conventional 2.5V 1 ⁇ 2 W Zener, which has 290 pF, or the punch-through structure used on the SLVU2.8 (without the diode in series) of 30 pF, at 1 MHz 0.1 Vrms signal and zero dc bias.
- the lower capacitance value represents less insertion loss at upper band frequencies required on a USB (6 MHz and 240 MHz) transmission line or FireWire (200 MHz).
- the flexibility of the devices of the present invention allows also for the increase in the surge voltage by changing the bipolar transistor size, thereby reducing the switching resistance.
- FIGS. 5 ( a ), ( b ) and ( c ) show respectively a die layout, a corresponding schematic diagram and equivalent circuit for a two device configuration according to the present invention.
- FIG. 6 shows a schematic diagram for connecting the pair of devices to a corresponding pair of data lines or input nodes according to an embodiment of the present invention.
- the devices are unidirectional, but could offer a bi-directional protection (for negative spikes) if connected as a pair in anti-parallel.
- the maximum blocking voltage in reverse mode is about 7-8V but is not intended to operate in reverse mode. In terms of insertion loss the device is fully dependable on the transmission line used. Under USB 1.1 or 2.0 or IEEE 1394 (Fire Wire) the device could add no more than 3 dB attenuation at 240 MHz.
Abstract
A semiconductor device for coupling a transient voltage at an input node to a reference node, the device having a bipolar transistor adapted to couple its collector to an input node and its emitter to the reference node and a driver device adapted to be coupled between the input node and the base terminal of the transistor such that the driver device is responsive to a transient voltage at the input node to turn on the transistor, thereby shunting the transient voltage to the reference node. Preferably, the input node is coupled to a high speed data transmission line that operates below 5v and the reference node is coupled to ground and the transistor is an NPN transistor. The driver may preferably be a gate-drain connected MOS transistor with its gate-drain terminal coupled to the collector terminal of the transistor and its source terminal coupled to the base terminal of the transistor. Alternatively, the driver may be a light emitting diode (LED) or any other diode with a different material (band-gap) and die size than the LED, connected to the bipolar transistor to create a low voltage clamping device.
Description
- This is a continuation of a PCT international application PCT/US03/28377 filed on Sep. 11, 2003, which claims priority to and benefit of U.S. Provisional Patent Application Ser. No. 60/409,568, filed on Sep. 11, 2002.
- 1. Field of the Invention
- The present invention relates to a circuit for protecting transmission lines against transients, such as those caused by Electrostatic Discharge (ESD); more particularly, the invention relates to a semiconductor device having low capacitance and low leakage and which is useful for the protection of high speed data transmission lines which typically operating at voltages below 5V.
- 2. Description of the Related Art
- With the increase in performance and component density of digital electronic circuits, which is due in part to improved sub-micron masking processes, there is a corresponding need to reduce power supply voltages to these circuits in order to reduce the internal power dissipation of the circuitry. A further advantage of the lower voltage power supply and corresponding low power consumption is the possibility of operating these circuits at higher clock speeds a heretofore possible.
- Conventional logic voltage levels have generally decreased from the typical 5V range to 1.5V or lower. It is predicted that this logic voltage level will further decrease to the sub-one volt level in the next few years. Similarly, it is anticipated that the masking process will decrease from 1.5 microns to less than a few hundredths of a micron in the next few years.
- A disadvantage of this increased scale of integration is that semiconductor devices, in particular metal oxide semiconductor (MOS) transistors, are now more susceptible to damage by over-voltage transient pulses. These pulses are generally caused by electrostatic discharge pulses or positive or negative voltage spikes generated during switching or just caused by the inductive effect of a transmission line impedance. A further cause of damage is as a result of accidental connection to the wrong voltage supply levels as, for example, by connecting a 5V supply voltage to a 2.5V or a 1.5V input on a device.
- Many solutions to this problem have been proposed, such as the use of a single P-N (transient voltage suppressor) TVS/Zener device or clamp. However, these devices are ineffective in these low voltage applications since it is difficult to achieve low leakage levels at supply voltages below 5V. Another solution is to use steering diode line termination circuitry. However, these are effective to minimize the overshoot and undershoot switching events that could be absorbed in part by the power supply, but under an extremely fast transient event, as in an ESD, the circuitry could be damaged.
- Currently some semiconductor component manufacturers, like SEMTECH Corp, offer very low leakage TVS/Zener devices, such as their part No. SLVU2.8, which is capable of handling ESD and transient protection levels intended for 3.3V systems. These devices are based on Low-voltage Punch-Through concept as described in U.S. Pat. No. 6,015,999.
- A disadvantage of the above described devices is that they must be coupled in series with a rectifier diode in order to achieve capacitance levels in the order of 10 pF or below, so as to exhibit a low insertion loss.
- These low capacitance values are necessary in order that the protection devices can be used to protect against ESD and transient events on high speed transmission data line ports, such as 10/100/1000Ethernet, USB1.1 and 2.0 and FireWire-IEEE 1394 or similar.
- Other device solutions are described in U.S. Pat. Nos. 6,442,008; 6,163,446; 6,492,859; 6,268,639; 6,320,735; 6,015,999 and 6,268,990. However, for various reasons these devices do not exhibit the low leakage and low capacitance required for low voltage applications.
- Accordingly there is a need for a protection device that exhibits low capacitance, low leakage at low voltages and that can preferably be used to protect high speed transmission lines.
- An advantage of the present invention is to provide transient protection device for low voltage circuits.
- In a preferred embodiment the device may be used as a transient voltage suppressor or ESD protector for high speed data transmission lines.
- In accordance with this invention there is provided a semiconductor device for coupling a transient voltage from an input node to a reference node, the device comprising:
- a) a bipolar transistor adapted to couple its collector to the input node and its emitter to the reference node; and
- b) a driver device adapted to be coupled between the input node and the base terminal of the transistor such that the driver device is responsive to a transient voltage at the input node to turn on the transistor, thereby shunting the transient voltage to the reference node.
- In a preferred embodiment the input node is coupled to a high speed data transmission line and the reference node is coupled to ground.
- It is further preferred that the transmission line operates below 5v and the transistor is an NPN transistor.
- The driver may preferably be a gate-drain connected MOS transistor with its gate-drain terminal coupled to the collector terminal of the transistor and its source terminal coupled to the base terminal of the transistor. Alternatively the driver may be a light emitting diode (LED) or any other diode with a different material (band-gap) and die size than the LED, connected to the bipolar transistor to create a low voltage clamping device.
- An advantage of the present invention is that it provides a low voltage clamping device having a stable breakdown or “zener” voltage characteristic in applications operating at low voltages while providing low leakage and low capacitance.
- Embodiments of the invention may best be understood by referring to the following description and accompanying drawings wherein:
- FIGS. 1(a) and (b) are schematic diagrams of a device configuration according to embodiments of the present invention;
- FIGS. 2(a) and (b) are schematic diagrams of a device configuration according to further embodiments of the present invention;
- FIGS. 3(a) and (b) are schematic diagrams showing operation of the devices of FIGS. 1(a) and (b);
- FIGS. 4(a), (b) and (c) show schematically voltage-current traces for the device of the present invention;
- FIGS. 5(a), (b) and (c) show respectively a die layout, a schematic diagram and equivalent circuit for a two device configuration according to the present invention; and
-
FIG. 6 shows a schematic diagram for connecting a pair of devices, according to the present invention, to a pair of data lines. - In the following description, numerous specific details are set forth to provide a thorough understanding of the invention. However, it is understood that the invention may be practiced without these specific details. In other instances, well-known structures or and/or processes have not been described or shown in detail in order not to obscure the invention. In the description and drawings, like numerals refer to like structures or processes. The operation of semiconductor devices such as MOS and bipolar transistor devices are well known in the art and will not be described further except where necessary to clarify aspects of the invention.
- Referring to
FIG. 1 (a) there is shown a first embodiment ofsemiconductor protection device 100 for coupling a transient voltage from aninput node 102 to areference node 104. Thedevice 100 includes an NPNbipolar transistor 106 having its collector terminal coupled to theinput node 102 and its emitter terminal coupled to thereference node 104. An N-channel MOSFET 108 is configured as a driver device by having its drain-gate terminals coupled to the collector terminal of thetransistor 106 and its source terminal coupled to thebase terminal 110 of thetransistor 106 such that theMOSFET 108 is responsive to a transient voltage at theinput node 102 to turn on thetransistor 106, thereby shunting the transient voltage to thereference node 104. - Referring to
FIG. 1 (b) there is shown asecond embodiment 120 of theprotection device 100. In thisembodiment 120, the bipolar transistor, is aNPN device 126 and the N-channel MOSFET 128 has its drain-gate terminal coupled to the gate of thetransistor 126 and the source terminal is coupled to the collector. The emitter-collector terminals are connected as above between the input and reference nodes. - Referring to FIGS. 2(a) and (b), third and
fourth embodiments 130, 140, which are similar devices to those of FIGS. 1(a) and (b) are shown; however in these embodiments the N-channel MOSFETs LEDs FIG. 2 (a) the anode terminal of theLED 138 is connected to the collector terminal of thetransistor 136 and the cathode terminal to the base of theNPN transistor 136, whereas in the case of aPNP transistor 146 shown inFIG. 2 (b), the anode of theLED 148 is connected to the base of thetransistor 146 and the cathode to the collector. The LED may be any color or any other diode made of such material (band-gap) and size that could give the desired driving voltage. Once again thedevices 130, 140 are connected between the input node and reference node. - The operation of the devices of the present invention may be explained by referring to FIGS. 3(a) and 3(b) in which the devices correspond to the
embodiments channel MOSFET 128 or theLED 148 are the driver devices when in combination with thebipolar transistor 126. The MOSFET is connected as described to convert it to a voltage reference, having its drain-to-source voltage fixed and being equivalent to the gate-to source threshold voltage, typically around 2V to 3V. This has a sharp voltage knee characteristic. In the case of the LED, the voltage drop across the device is typically 1.7V for conventional red, green or amber LED's, and 3.6V for Blue and White LED's. - Referring to FIGS. 3(a) and 3(b), it is assumed that the PNP Transistor combinations are connected between a voltage bus represented by +Vs (input node) and ground (reference node). In the drawings, VEB is the emitter-base voltage for the transistor; IC, IB and IE are the corresponding collector, base and emitter currents; VF is the forward voltage and VGS is the gate-source threshold voltage of the MOSFET and IDS is its drain-source current. In normal operation the device is in the off-state, that is
Vs<VEB+VGS(TH) where VEC=VEB+VGS(TH)
or,
Vs<VEB+VF where VEC=VEB+VF - In this off-state condition there is a negligible current flowing from the emitter to collector of the transistor since there is not enough current flowing through the base of the transistor to turn it on. If Vs is increased enough to be equal the emitter-collector voltage, that is
Vs+Delta Vs=VEC
the device starts to act as a TVS/Zener diode with a “Zener voltage” determined by the VEC (that is equal to VEB+VGS(TH) for the MOSFET or VEB+VF for the LED), and an initial small current flows (order of microamperes) from the emitter to the collector, since there is now sufficient current flowing through the transistor base. As the voltage between emitter (or the “cathode”) and the collector (or the “anode”) goes higher, the current also flowing through the emitter-collector is higher because more base current is also flowing through it. The transistor gain acts to “square” the diode forward characteristic, or the gate-to source voltage characteristic in case of the MOS transistor configurations shown in FIGS. 1(a) and 1(b). - Referring to FIGS. 4(a) to (c), there is shown the emitter-collector voltage versus current characteristic traces at three levels of current: namely 2 microamps; 200 microamps 10 milliamps, showing graphically the operation of the devices for a Red LED and a PNP transistor combination of the present invention.
- In terms of off-state capacitance, it has been observed that the MOSFET-bipolar or LED-bipolar device combinations of the present invention depend merely on the output capacitance of the transistor, which can be tailored to be smaller than any low voltage TVS/Zener.
- The transistor may be selected to be small enough to have an off-state capacitance of around 6-7 pF, with a maximum of 10 pF. This is significantly lower than that of a conventional 2.5V ½ W Zener, which has 290 pF, or the punch-through structure used on the SLVU2.8 (without the diode in series) of 30 pF, at 1 MHz 0.1 Vrms signal and zero dc bias.
- The lower capacitance value represents less insertion loss at upper band frequencies required on a USB (6 MHz and 240 MHz) transmission line or FireWire (200 MHz).
- The flexibility of the devices of the present invention allows also for the increase in the surge voltage by changing the bipolar transistor size, thereby reducing the switching resistance.
- An advantage of the present invention is that it can be easily constructed using standard components that allow the number of devices to be easily scaled for a particular application. For example, FIGS. 5(a), (b) and (c) show respectively a die layout, a corresponding schematic diagram and equivalent circuit for a two device configuration according to the present invention.
-
FIG. 6 shows a schematic diagram for connecting the pair of devices to a corresponding pair of data lines or input nodes according to an embodiment of the present invention. - In general the devices are unidirectional, but could offer a bi-directional protection (for negative spikes) if connected as a pair in anti-parallel. The maximum blocking voltage in reverse mode is about 7-8V but is not intended to operate in reverse mode. In terms of insertion loss the device is fully dependable on the transmission line used. Under USB 1.1 or 2.0 or IEEE 1394 (Fire Wire) the device could add no more than 3 dB attenuation at 240 MHz.
- Although preferred embodiments of the invention have been described herein, it will be understood by those skilled in the art that variations may be made thereto without departing from the spirit of the invention or the scope of the appended claims.
Claims (9)
1. A semiconductor device for coupling a transient voltage from an input node to a reference node, the device comprising:
a) a bipolar transistor adapted to couple its collector to said input node and its emitter to the reference node; and
b) a driver device adapted to be coupled between the input node and the base terminal of the transistor such that the driver device is responsive to a transient voltage at the input node to turn on the transistor, thereby shunting the transient voltage to the reference node.
2. A device as defined in claim 1 , said transistor being an NPN device.
3. A device as defined in claim 1 , said transistor being an PNP device.
4. A device as defined in claim 1 , said driver device being a gate-drain coupled n-channel MOSFET device.
5. A device as defined in claim 1 , said driver device being an LED.
6. A device as defined in claim 1 , said input node being coupled to a high speed data transmission line.
7. A device as defined in claim 6 said transmission line operating below 5v and the reference node being coupled to ground terminal.
8. A method for coupling a transient voltage from an input node to a reference node, said method comprising the steps of:
a) coupling a collector terminal of a bipolar transistor to the input node and its emitter terminal to the reference node; and
b) coupling a driver device between the input node and the base terminal of the transistor such that the driver device is responsive to a transient voltage at the input node to turn on the transistor, thereby shunting the transient voltage to the reference node.
9. A device as defined in claim 1 , said device having a plurality of input nodes and a corresponding number of transistor and driver devices.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/075,416 US20060082938A1 (en) | 2002-09-11 | 2005-03-09 | Electrostatic discharge protection device for high speed transmission lines |
US12/379,294 US7817389B2 (en) | 2002-09-11 | 2009-02-18 | Electrostatic discharge protection device for high speed transmission lines |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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US40956802P | 2002-09-11 | 2002-09-11 | |
PCT/US2003/028377 WO2004025702A2 (en) | 2002-09-11 | 2003-09-11 | Electrostatic discharge protection device for high speed transmission lines |
US11/075,416 US20060082938A1 (en) | 2002-09-11 | 2005-03-09 | Electrostatic discharge protection device for high speed transmission lines |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/US2003/028377 Continuation WO2004025702A2 (en) | 2002-09-11 | 2003-09-11 | Electrostatic discharge protection device for high speed transmission lines |
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Application Number | Title | Priority Date | Filing Date |
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US12/379,294 Continuation US7817389B2 (en) | 2002-09-11 | 2009-02-18 | Electrostatic discharge protection device for high speed transmission lines |
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US20060082938A1 true US20060082938A1 (en) | 2006-04-20 |
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/075,416 Abandoned US20060082938A1 (en) | 2002-09-11 | 2005-03-09 | Electrostatic discharge protection device for high speed transmission lines |
US12/379,294 Expired - Fee Related US7817389B2 (en) | 2002-09-11 | 2009-02-18 | Electrostatic discharge protection device for high speed transmission lines |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/379,294 Expired - Fee Related US7817389B2 (en) | 2002-09-11 | 2009-02-18 | Electrostatic discharge protection device for high speed transmission lines |
Country Status (3)
Country | Link |
---|---|
US (2) | US20060082938A1 (en) |
AU (1) | AU2003267103A1 (en) |
WO (1) | WO2004025702A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090052101A1 (en) * | 2005-07-22 | 2009-02-26 | Nxp B.V. | Path sharing high-voltage esd protection using distributed low-voltage clamps |
US20090154038A1 (en) * | 2007-12-11 | 2009-06-18 | Dunnihoo Jeffrey C | Impedance compensated esd circuit for protection for high-speed interfaces and method of using the same |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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CN109244068B (en) * | 2018-08-29 | 2020-11-03 | 南京邮电大学 | LIGBT type high-voltage ESD protection device |
US10938203B2 (en) * | 2018-10-29 | 2021-03-02 | Nxp B.V. | Voltage limiting device |
CN110753417B (en) * | 2019-11-15 | 2021-09-17 | 天津光电通信技术有限公司 | Control method for controlling bipolar LED lamp by using max7219 |
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- 2003-09-11 WO PCT/US2003/028377 patent/WO2004025702A2/en not_active Application Discontinuation
- 2003-09-11 AU AU2003267103A patent/AU2003267103A1/en not_active Abandoned
-
2005
- 2005-03-09 US US11/075,416 patent/US20060082938A1/en not_active Abandoned
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2009
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US5028977A (en) * | 1989-06-16 | 1991-07-02 | Massachusetts Institute Of Technology | Merged bipolar and insulated gate transistors |
US5187110A (en) * | 1990-10-05 | 1993-02-16 | Allied-Signal Inc. | Field effect transistor-bipolar transistor darlington pair |
US5341005A (en) * | 1991-09-12 | 1994-08-23 | Sgs-Thomson Microelectronics S.R.L. | Structure for protecting an integrated circuit from electrostatic discharges |
US5808342A (en) * | 1996-09-26 | 1998-09-15 | Texas Instruments Incorporated | Bipolar SCR triggering for ESD protection of high speed bipolar/BiCMOS circuits |
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US6577480B1 (en) * | 1999-08-06 | 2003-06-10 | Sarnoff Corporation | Adjustable trigger voltage circuit for sub-micrometer silicon IC ESD protection |
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US20090052101A1 (en) * | 2005-07-22 | 2009-02-26 | Nxp B.V. | Path sharing high-voltage esd protection using distributed low-voltage clamps |
US8169758B2 (en) * | 2005-07-22 | 2012-05-01 | Nxp B.V. | Path sharing high-voltage ESD protection using distributed low-voltage clamps |
US20090154038A1 (en) * | 2007-12-11 | 2009-06-18 | Dunnihoo Jeffrey C | Impedance compensated esd circuit for protection for high-speed interfaces and method of using the same |
US8351170B2 (en) * | 2007-12-11 | 2013-01-08 | Semiconductor Components Industries, Llc | Impedance compensated electrostatic discharge circuit for protection of high-speed interfaces and method of using the same |
Also Published As
Publication number | Publication date |
---|---|
US20090251833A1 (en) | 2009-10-08 |
WO2004025702A2 (en) | 2004-03-25 |
US7817389B2 (en) | 2010-10-19 |
WO2004025702A3 (en) | 2004-07-01 |
AU2003267103A8 (en) | 2004-04-30 |
AU2003267103A1 (en) | 2004-04-30 |
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AS | Assignment |
Owner name: PAN JIT AMERICAS, INC., ARIZONA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OCHOA, ALFREDO;TEMPLETON, GEORGE;WASHBURN, JAMES;REEL/FRAME:020147/0690;SIGNING DATES FROM 20070813 TO 20070823 |
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STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |