US20060118946A1 - Semiconductor assembly with conductive rim and method of producing the same - Google Patents
Semiconductor assembly with conductive rim and method of producing the same Download PDFInfo
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- US20060118946A1 US20060118946A1 US11/248,006 US24800605A US2006118946A1 US 20060118946 A1 US20060118946 A1 US 20060118946A1 US 24800605 A US24800605 A US 24800605A US 2006118946 A1 US2006118946 A1 US 2006118946A1
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- Prior art keywords
- mems
- wafer
- rim
- wafers
- cap
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/007—Interconnections between the MEMS and external electrical signals
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0172—Seals
- B81C2203/019—Seals characterised by the material or arrangement of seals between parts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/924—Active solid-state devices, e.g. transistors, solid-state diodes with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap
Definitions
- the sealed area on the first wafer may include a number of things, such as MEMS structure.
- the conductive rim illustratively is electrically isolated from the MEMS structure.
- the second wafer may include a cap, which may in part protect the MEMS structure from the environment.
- the method may form MEMS structure within the area on the first wafer.
- Circuitry also may be formed on the first wafer.
- the circuitry may be capable of applying a bias voltage to the second wafer through the rim material.
- FIG. 5 schematically shows a cross-sectional view of another alternative embodiment of the invention implemented on MEMS device having circuitry and structure on the same die and circuitry on the cap.
Abstract
An apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area on the surface of the first wafer.
Description
- This patent application claims priority from and is a divisional patent application of U.S. patent application Ser. No. 10/737,231, filed Dec. 15, 2003, entitled, “SEMICONDUCTOR ASSEMBLY WITH CONDUCTIVE RIM AND METHOD OF PRODUCING THE SAME,” and naming Susan A. Alie, Bruce K. Wachtmann, Michael Judy, and David Kneedler as inventors, the disclosure of which is incorporated herein, in its entirety, by reference.
- The invention generally relates to electronic devices and, more particularly, the invention relates to capped electronic devices.
- Microelectromechanical systems (i.e., “MEMS”) are highly miniaturized devices that can be configured to perform a wide variety of functions. For example, a MEMS device can be implemented as an accelerometer to measure the acceleration of a moving body. One type of MEMS accelerometer, for example, has a suspended mass that, in response to an acceleration, moves relative to an underlying substrate. Acceleration thus may be calculated as a function of the movement of the suspended mass relative to its underlying substrate.
- Because of their relatively small size, the mechanical structures of MEMS devices (e.g., the suspended mass in the above noted accelerometer) typically are both fragile and sensitive. Accordingly, many seemingly innocuous things can adversely impact MEMS performance, such as dust, moisture, and static electricity. The art has responded to this problem by isolating sensitive MEMS mechanical structures from the outside environment. For example, one isolation method bonds a cap over the mechanical components.
- Although generally satisfactory for isolating MEMS structure, this solution creates other problems. In particular, the cap can accumulate a relatively large static electric charge that can adversely affect device performance and/or damage the MEMS device.
- In accordance with one aspect of the invention, an apparatus has first and second wafers, and a conductive rim between the first and second wafers. The conductive rim electrically and mechanically connects the first and second wafers. In addition, the conductive rim and second wafer at least in part seal an area on the surface of the first wafer.
- In some embodiments, the conductive rim and second wafer hermetically seal the area on the surface of the first wafer. Among other things, the conductive rim can be a silicide.
- The sealed area on the first wafer may include a number of things, such as MEMS structure. In that case, the conductive rim illustratively is electrically isolated from the MEMS structure. Moreover, the second wafer may include a cap, which may in part protect the MEMS structure from the environment.
- In some embodiments, the first wafer includes circuitry capable of delivering a bias voltage to the second wafer via the conductive rim. The circuitry may have a maximum temperature to which it can be exposed. In such case, the conductive rim illustratively is produced from a material that interdiffuses and/or melts at a temperature that is less than the maximum temperature to which the circuitry can be exposed.
- At least one of the first wafer and the second wafer may be produced from a silicon based material. For example, at least one of the first wafer and the second wafer may be comprised of polysilicon, single crystal silicon, or silicon germanium.
- In accordance with another aspect of the invention, a method of forming a MEMS device places rim material between a first wafer and a second wafer to form an intermediate apparatus. The rim material is placed so that it forms a closed loop defining an area on the first wafer. The method then both heats and applies pressure to the intermediate apparatus. After heating and applying pressure, the rim material cooperates with the first and second wafers to both seal the area on the first wafer and electrically connect the first and second wafers.
- In illustrative embodiments, the second wafer is substantially parallel with the first wafer. The rim material may cooperate with the first and second wafers by integrating with the first and second wafers to form a composite material that comprises the rim material. For example, the rim material may diffuse into the first and second wafers to form a silicide material.
- The method may form MEMS structure within the area on the first wafer. Circuitry also may be formed on the first wafer. Among other things, the circuitry may be capable of applying a bias voltage to the second wafer through the rim material.
- The foregoing and advantages of the invention will be appreciated more fully from the following further description thereof with reference to the accompanying drawings wherein:
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FIG. 1 schematically shows a perspective view of an electronic device that may be capped in accordance with illustrative embodiments of the invention. -
FIG. 2 schematically shows a cross-sectional view of the device shown inFIG. 1 along line X-X, where the device is configured in accordance with one embodiment of the invention. -
FIG. 3 shows a process of forming the electronic device shown inFIG. 2 in accordance with various embodiments of the invention. -
FIG. 4 schematically shows a cross-sectional view of an alternative embodiment of the invention implemented on MEMS device having circuitry and structure on the same die. -
FIG. 5 schematically shows a cross-sectional view of another alternative embodiment of the invention implemented on MEMS device having circuitry and structure on the same die and circuitry on the cap. -
FIG. 6 schematically shows a cross-sectional view of yet another alternative embodiment of the invention implemented on a MEMS device in which the cap effectively forms another MEMS device. - In illustrative embodiments, a MEMS device has a conductive rim that secures a cap to a MEMS die. The conductive rim both seals MEMS structure on the MEMS die and electrically connects the cap with ground or a fixed bias potential. Among other things, the conductive rim may be formed at least in part from a silicide that integrally couples the cap and MEMS die. Details of various embodiments are discussed below.
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FIG. 1 schematically shows ageneric MEMS device 10 that may be configured in accordance with illustrative embodiments of the invention. TheMEMS device 10 shown includes a cappedMEMS die 12 coupled with a circuit die 14. Accordingly, the MEMS die 12 shown has structure that is controlled and/or monitored by circuitry on thecircuit die 14. The circuit die 14 hasbond pads 16 or other interconnects to electrically communicate with an external device, such as a computer. To further protect theMEMS device 10 from the environment, conventional processes may mount theentire MEMS device 10 within a package. - The
MEMS device 10 may be any conventionally knownMEMS device 10, such as an inertial sensor. For example, theMEMS device 10 may be a gyroscope or an accelerometer. Exemplary MEMS gyroscopes are discussed in greater detail in U.S. Pat. No. 6,505,511, which is assigned to Analog Devices, Inc. of Norwood, Mass. Exemplary MEMS accelerometers are discussed in greater detail in U.S. Pat. No. 5,939,633, which also is assigned to Analog Devices, Inc. of Norwood, Mass. The disclosures of U.S. Pat. Nos. 5,939,633 and 6,505,511 are incorporated herein, in their entireties, by reference. -
FIG. 2 schematically shows a cross-sectional view of the device shown inFIG. 1 along line X-X. Specifically, theMEMS device 10 includes the above noted MEMS die 12 (e.g., comprised of a silicon-based material, such as silicon) having a silicon-basedcap 18 mounted to its top side, and the above noted circuit die 14 mounted to its bottom side. Thecap 18 illustratively is formed from polysilicon and etched to have acavity 20 defined by acap rim 22 extending from its interior side. Thecavity 20 overlies a central portion of the MEMS die 12, which includes theprimary structure 24 for effectuating the MEMS functionality. For example, if the MEMS die 12 is an accelerometer, thestructure 24 may include a movable mass suspended above asubstrate 26. - In accordance with illustrative embodiments, the
MEMS device 10 is considered to form aconductive rim 28 that circumscribes theMEMS structure 24 on the MEMS die 12. Among other things, theconductive rim 28 forms a hermetic seal that protects theMEMS structure 24 from the environment. For example, the hermetic seal may protect thestructure 24 from dust, moisture, and dirt. In alternative embodiments, theconductive rim 28 provides a non-hermetic seal to theMEMS structure 24. As known by those in the art, a non-hermetic seal may protect theMEMS structure 24 from dust and dirt, but it is not moisture impervious. - In addition to sealing the
MEMS structure 24, theconductive rim 28 also electrically connects thecap 18 with the circuit die 14 through the MEMS die 12. The MEMS die 12 thus includesvias 32 and contacts 34 (e.g., balls of a ball grid array) that extend from theconductive rim 28, through the MEMS die 12, and to the circuit die 14.Circuitry 30 on the circuit die 14 sets the potential of thecap 18 to ground or any desired voltage level. - To those ends, the MEMS die 12 has a rim of polysilicon material (extending from the
substrate 26 and referred to herein as the “MEMS rim 36”) that integrally couples with thecap rim 22 extending from thecap 18. In illustrative embodiments, thecap rim 22 and MEMS rim 36 meet at a loosely definedintersection region 38 having a relatively high silicide concentration (discussed below with regard toFIG. 3 ). The concentration of silicide may be highest at the center of thatintersection region 38 and reduce to essentially zero at its loosely defined ends. Moreover, the conductive rim 28 (formed from theintersection region 38, MEMS rim 36 and cap rim 22) preferably is electrically isolated from theMEMS structure 24 to ensure that the potential applied to thecap 18 is carefully controlled. - In illustrative embodiments, the MEMS rim 36 also acts as a sensor element. Alternatively, among other things, the
MEMS rim 36 may act as a ground plane element, a circuit element, or dummy mechanical structure. -
FIG. 3 schematically shows an illustrative process of forming theMEMS device 10 shown inFIG. 2 . It should be noted that various steps of this process may be performed in a different order than that discussed. In addition, those skilled in the art should understand that additional steps may be performed, while others may be omitted. - The process begins at
step 300, in which the MEMS die 12 is formed in accordance with conventional processes. Among other processes, conventional surface micromachining processes may be used to form the MEMS die 12. Alternatively, silicon-on-insulator (“SOI”) processes may be used. As noted above, the die may be formed from a silicon-based material, such as polysilicon. In alternative embodiments, however, other types of materials may be used. For example, single crystal silicon or silicon germanium may be used for all or selected portions of the MEMS die 12. In any case, the conductivity of the MEMS rim 36 should be controlled to be a satisfactory level. If necessary, some doping may be required to ensure appropriate conductive properties. - The
cap 18 then is formed atstep 302. In a manner similar to the MEMS die 12, thecap 18 may be formed from a polysilicon wafer (or other material) in accordance with conventional processes (e.g., surface micromachining processes). The sizes of thecavity 20 and cap rim 22 illustratively are selected to ensure a sufficient clearance with the MEMS die 12. In particular, thecavity 20 should be sufficiently large enough to not interfere with movement of thestructure 24 on the MEMS die 12. - The process then continues to step 304, in which conventional processes form the circuit die 14. Any conventional circuitry designed to perform the desired function can be used. For example, the circuitry shown in the above noted incorporated patents can be used. In particular, if the
MEMS device 10 is an accelerometer, then the circuitry shown in U.S. Pat. No. 5,939,633 can be used to sense electrostatic changes in the MEMS die 12. It should be noted that in illustrative embodiments, the MEMS die 12,cap 18 and circuit die 14 each are formed as one of an array of identical elements on a single wafer. - Conventional processes then may metalize the bottom side of the cap 18 (step 306). For example, a layer of
platinum 40 may be sputter deposited onto the bottom side of thecap 18. The metalizedcap 18 then may be placed on the MEMS die 12 so that the MEMS rim 36 directly contacts thecap rim 22. - At this point in the process, the MEMS die 12 and
cap 18 are not secured together. Accordingly, to fuse them together, this intermediate apparatus is subjected to relatively high temperatures and pressures (at step 308) sufficient to form a silicide bond in theintersection region 38. Those skilled in the art should be able to select the appropriate temperatures and pressures. By way of example only, subjecting the intermediate apparatus to temperatures of between about 280-450 degrees C. and pressures of about two atmospheres for about forty to fifty minutes should provide satisfactory results. - This step in the process thus produces platinum-silicide in the
intersection region 38. As known by those in the art, because of the inter-diffusion of the platinum into the polysilicon, the outer portions of the two rims and the platinum between the two rims cooperate to form a substantially integral and conductive connector. The concentration of platinum thus is highest in the center of the intersection region 38 (e.g., fifty percent platinum and fifty percent polysilicon), while it reduces to zero as a function of distance from the center. - Materials other than platinum may be used to produce the silicide bond. For example, tungsten or titanium may be used. Use of such noted materials, however, typically requires higher temperatures to form their respective silicide bonds than those required of platinum. Accordingly, use of tungsten or titanium with embodiments that have
circuitry 30 on the intermediate apparatus (e.g., seeFIGS. 4-6 , discussed below) may not be recommended because such high temperatures may adversely affect thecircuitry 30. In other words, the material selected to form the silicide bond should interdiffuse (and/or melt) at a temperature that is lower than temperatures that can adversely impact thecircuitry 30 or other temperature sensitive portions of theMEMS device 10. - Other types of bonds can be used. For example, rather than form a silicide bond, a solder-based bond can be used. Use of this type of bond, however, requires additional process steps. In particular, in addition to metalizing at least the cap rim 22 (as discussed above), the MEMS rim 36 also is metalized. Continuing with the above example, in a manner similar to the
cap rim 22, the MEMS rim 36 also may be sputter deposited with platinum or other solderable material. Solder then can be applied and cured at relatively low temperatures. - As noted above, the
conductive rim 28 illustratively completely encircles theMEMS structure 24 to provide both a hermetic seal and a conductive path between thecap 18 andcircuitry 30. In some embodiments, theconductive rim 28 forms a circular ring around thestructure 24. In other embodiments, theconductive rim 28 forms some other shape (e.g., oval, rectangular, or an irregular shape) around theMEMS structure 24. - After the silicide bond is formed, the process continues to step 310, in which the bottom portion of the MEMS die 12 (or wafer, as the case may be) is subjected to a thinning process (e.g., backgrinding or etch back processes) that exposes the
vias 32.Conductive contacts 34 then can be mounted to the bottom of the vias 32 (step 312), which then can be mounted to corresponding contacts on the top surface of the circuit die 14 (step 314). The wafers then can be diced, thus completing the process. As noted above, after it is fully formed, the resultingMEMS device 10 may be mounted in a package, flip chip mounted on a circuit board (after contacts are formed on one side), or used in any conventional manner. - Accordingly, as shown in
FIG. 2 and discussed above, thecap 18 is electrically connected to the circuit die 14 through theconductive rim 28, correspondingvias 32, andball contact 34 on the bottom of theMEMS substrate 26.Circuitry 30 on the circuit die 14 can set the potential of thecap 18 to ground or any desired voltage level. Alternatively, the conductive path through the MEMS die 12 to theconductive rim 28 can terminate at an external pin that can be externally grounded or set to any desired potential, such as 0.2 volts. -
FIG. 4 shows an alternative embodiment of theMEMS device 10. Rather than have a separate circuit die 14, the MEMS die 12 may include bothstructure 24 andcircuitry 30. In a manner similar to the MEMS die 12 shown inFIG. 2 , the MEMS die 12 of this embodiment may be produced in a conventional manner, such as by using surface micromachining or SOI processes. -
FIG. 5 shows another embodiment in which a “smart cap” is used. In particular, thecap 18 may havecircuitry 30 that shares or compliments processing with thecircuitry 30 in the MEMS die 12. Instead of, or in addition to, bias potentials, the conductive path between thecap 18 and MEMS die 12 also can transmit data messages.FIG. 6 shows yet another embodiment in which two MEMS die 12 are mounted together. It should be noted that components of various of the embodiments shown inFIGS. 1-6 can be combined to form other embodiments. For example, instead of MEMS die 12 withintegrated circuitry 30, thecircuitry 30 inFIG. 6 may be located on one or more separate circuit die 14 as inFIG. 2 . - Generally speaking, various embodiments of the invention have a
conductive rim 28 that couples two wafers together in a manner that seals an internal area (e.g., having sensitive structure 24) on at least one of the wafers. In addition to (or instead of) other conductive paths, thatconductive rim 28 also can be used to electrically communicate at least one of the wafers with some other wafer. Accordingly, unintended potential differences between thecap 18 andMEMS structure 24 should be avoided. - Different materials than those discussed above also may be used. Moreover, some embodiments are applicable to devices other than MEMS devices. For example, integrated circuits and other types of devices may implement aspects of the invention. Accordingly, discussion of MEMS devices is exemplary and thus, not intended to limit all embodiments of the invention.
- Although the above discussion discloses various exemplary embodiments of the invention, it should be apparent that those skilled in the art can make various modifications that will achieve some of the advantages of the invention without departing from the true scope of the invention.
Claims (9)
1. A method of forming a MEMS device, the method comprising:
placing rim material between a first wafer and a second wafer to form an intermediate apparatus, the rim material forming a closed loop defining an area on the first wafer;
applying pressure to the intermediate apparatus; and
heating the intermediate apparatus,
after heating and applying pressure, the rim material cooperating with the first and second wafers to seal the area on the first wafer and electrically connect the first and second wafers.
2. The method as defined by claim 1 wherein the second wafer is substantially parallel with the first wafer.
3. The method as defined by claim 1 wherein the rim material cooperates with the first and second wafers by integrating with the first and second wafers to form a composite material comprising the rim material.
4. The method as defined by claim 1 wherein the rim material diffuses into the first and second wafers to form a silicide material.
5. The method as defined by claim 1 further comprising:
forming MEMS structure within the area on the first wafer.
6. The method as defined by claim 1 further comprising forming circuitry on the first wafer capable of applying a bias voltage to the second wafer through the rim material.
7. A MEMS device formed by the method defined by claim 1 .
8. The method as defined by claim 1 wherein rim material cooperates with the first and second wafers to hermetically seal the area on the first wafer.
9. The method as defined by claim 1 wherein the closed loop forms an irregular shape.
Priority Applications (1)
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US11/248,006 US20060118946A1 (en) | 2003-12-15 | 2005-10-11 | Semiconductor assembly with conductive rim and method of producing the same |
Applications Claiming Priority (2)
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US10/737,231 US7034393B2 (en) | 2003-12-15 | 2003-12-15 | Semiconductor assembly with conductive rim and method of producing the same |
US11/248,006 US20060118946A1 (en) | 2003-12-15 | 2005-10-11 | Semiconductor assembly with conductive rim and method of producing the same |
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US10/737,231 Division US7034393B2 (en) | 2003-12-15 | 2003-12-15 | Semiconductor assembly with conductive rim and method of producing the same |
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US20060118946A1 true US20060118946A1 (en) | 2006-06-08 |
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US10/737,231 Expired - Lifetime US7034393B2 (en) | 2003-12-15 | 2003-12-15 | Semiconductor assembly with conductive rim and method of producing the same |
US11/248,006 Abandoned US20060118946A1 (en) | 2003-12-15 | 2005-10-11 | Semiconductor assembly with conductive rim and method of producing the same |
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US10/737,231 Expired - Lifetime US7034393B2 (en) | 2003-12-15 | 2003-12-15 | Semiconductor assembly with conductive rim and method of producing the same |
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US (2) | US7034393B2 (en) |
EP (1) | EP1708959A1 (en) |
JP (1) | JP2007513796A (en) |
CN (1) | CN1906120A (en) |
WO (1) | WO2005058749A1 (en) |
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US20080283991A1 (en) * | 2007-05-14 | 2008-11-20 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Housed active microstructures with direct contacting to a substrate |
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US20100108345A1 (en) * | 2008-10-30 | 2010-05-06 | Unimicron Technology Corporation | Lid for micro-electro-mechanical device and method for fabricating the same |
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Also Published As
Publication number | Publication date |
---|---|
US20050127525A1 (en) | 2005-06-16 |
US7034393B2 (en) | 2006-04-25 |
JP2007513796A (en) | 2007-05-31 |
CN1906120A (en) | 2007-01-31 |
EP1708959A1 (en) | 2006-10-11 |
WO2005058749A1 (en) | 2005-06-30 |
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