US20070117230A1 - Computer readable storage medium for work-in-process schedules - Google Patents
Computer readable storage medium for work-in-process schedules Download PDFInfo
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- US20070117230A1 US20070117230A1 US11/651,859 US65185907A US2007117230A1 US 20070117230 A1 US20070117230 A1 US 20070117230A1 US 65185907 A US65185907 A US 65185907A US 2007117230 A1 US2007117230 A1 US 2007117230A1
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM]
- G05B19/41865—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS], computer integrated manufacturing [CIM] characterised by job scheduling, process planning, material flow
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45031—Manufacturing semiconductor wafers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Definitions
- This invention relates to semiconductor fabrication and, more particularly, to computer readable storage media for planning operations within semiconductor fabrication facilities.
- CCM Computer Implemented Manufacturing
- the overall control of the foundry floor is by a central server having a Manufacturing Execution System (MES) with tool control system.
- MES Manufacturing Execution System
- the central server has the information on each customer job that is currently being processed and ensures that each tool in sequence is performing the correct operation.
- This server communicates with users who monitor and control the production flow and operations on client workstations.
- Standard work-in-progress (WIP) profiles or schedule, by process stage, are one of the items that manufacturing personnel and managers would like to know most. Even though WIP profiles are popular, there is no systematic method to generate a WIP profile in a timely and consistent manner.
- WIP profiles are popular, there is no systematic method to generate a WIP profile in a timely and consistent manner.
- One problem with generating WIP profiles is that a significant amount of data about process time and cycle time factor must be collected, organized, correlated, and maintained. Maintaining, let alone collecting and correlating, this information in a timely manner requires significant resources and support by Fabrication Plant and Information Technology personnel.
- Desirable in the art of is a need for a method and system for timely determining WIP profiles to allow for efficient operation of semiconductor foundries in order to maximize the capacity of the manufacturing facility.
- this invention provides a method and program for generating a work in progress (WIP) schedule in a. semiconductor manufacturing facility.
- WIP work in progress
- a computer readable storage medium encoded with computer program code, wherein, when the computer program code is executed by a processor, the processor performs a method for generating a work in progress (WIP) schedule in a semiconductor manufacturing facility.
- WIP work in progress
- remaining days are determined for completing at least one wafer lot associated with a predetermined product from the starting date.
- a starting process stage for the wafer lot is determined at the beginning of the starting date based on the remaining days, as well as an ending process stage for the wafer lot at the end of the ending date.
- Wafer numbers are assigned to each process stage of the schedule time in proportion to a process time of each stage in view of a total process time for the schedule period; and, by repeating the above steps for one or more other wafer lots under production, a total wafer number assigned to each stage is determined and the WIP schedule for the schedule period is obtained.
- FIG. 1 presents a diagram illustrating wafer process time with respect to each process stage and relevant time lines in accordance with one embodiment of the present invention.
- FIG. 2 illustrates a flow diagram for detailed steps for generating the WIP schedule in accordance with one embodiment of the present invention.
- the following is a detailed description of an improved method for generating WIP schedules so that a manufacturing facility can maximize its capacity in accordance with the present invention.
- the disclosed method assigns wafer numbers to each stage of the manufacturing based on process time needed for each
- MES Management Executive System
- WIP Wireless Fidelity
- the resultant plan or schedule may include information regarding, for embodiment, forecast of how many wafers should be manufactured for each stage of the fabrication process, and may also include other production related information about material consumption, mask requirements, etc.
- Table I illustrates that an order or a batch of product having part identifier (ID) A goes through processing stages 44 through 50 for its entire manufacturing time period. Also listed is the net processing time needed in each stage, and the corresponding accumulative process time as the wafers go through the flow.
- the total time scheduled can be 3 days.
- X Total Scheduled Time/Total Accumulative Process Time
- WIP scheduling When generating a WIP schedule, it is usually done on a daily basis during the production process. Since the schedule can change every day, the WIP scheduling can be done multiple times on an as-needed basis. Further, one or more computing devices can be used for processing information to generate the WIP schedule.
- FIG. 1 illustrates, graphically, time schedules of the process flow 100 for a particular product.
- the net process time associated with each stage_ID shown in Table I is depicted sequentially along a linear time line 110 .
- the net process time associated with each stage_ID is further shown underneath each stage.
- FIG. 1 further illustrates the association of a remaining process time line 120 with respect to each stage as the process flow progresses. For embodiment, at the beginning of a starting stage 44, total 2.17 days are remaining for finishing the flow, and similarly, at the end of stage 44, 1.94 days are left.
- the ending stage also needs to be determined.
- Wafer numbers need to be assigned to each stage for scheduling WIP purpose. Assuming the same product has a plurality of wafer lots going through the production flow and each wafer lot may have different number of wafers.
- the wafers are distributed in proportion to the net process time with respect to the total daily process time.
- a WIP schedule for the product for the predetermined day is generated. When every wafer lot is considered for the product, the scheduling may extend to other products as well so that the total usage of each stage can also be identified.
- FIG. 2 illustrates a process 200 for determining a WIP schedule in accordance with one embodiment of the present invention.
- a starting date to be scheduled is obtained as determined by the user.
- the WIP schedule can be set for any length of time. For embodiment, if a work flow takes a month, a high level weekly WIP may be scheduled in addition to daily schedules.
- step 220 a due date is obtained.
- step 230 the starting stage of the day is determined based on a cycle time factor, referred to as the “X ratio,” and the total days remaining for the process flow.
- the X ratio helps to scale the remaining days so that a time point can be identified on the remaining time line as illustrated in FIG. 1 .
- the starting stage can be determined based on the ending stage of the day immediately previous to the day under scheduling.
- step 240 the ending stage of the day is also determined.
- the total number of wafers in wafer lots for predetermined products are used for determining the number of wafers assigned to each stage based on the net process time of each stage with respect to the total daily process time.
- the WIP schedule is now completed (step 260 ) and various reports can be generated.
- Such a WIP generating process can be implemented using computer processing tools.
- Software programs can be developed to provide instructions and interfaces for generating the WIP schedule.
- the platform for developing such a software can be chosen based on the software environment of the existing manufacturing facility.
- One skilled in the art can understand that the above described functions for generating the WIP schedule can be developed using various software tools. With the networking technology in existence today, the WIP schedule can be generated, viewed, modified, or otherwise controlled by authorized users.
- the present invention may be embodied in the form of computer- implemented processes and apparatus for practicing those processes.
- the present invention may also be embodied in the form of computer program code embodied in tangible media, such as floppy diskettes, read only memories (ROMs), CD-ROMs, DVDs, hard drives, ZIPTM disks, memory sticks, or any other computer-readable storage medium, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention.
- the present invention may also be embodied in the form of computer program code, for example, whether stored in a storage medium, loaded into and/or executed by a computer, or transmitted over some transmission medium, such as over the electrical wiring or cabling, through fiber optics, or via electromagnetic radiation, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention.
- computer program code segments configure the processor to create specific logic circuits.
Abstract
A computer readable storage medium for work in progress (WIP) schedules in semiconductor manufacturing facility. After determining starting and ending dates of predetermined schedule periods for generating WIP schedules, remaining days are determined for completing at least one wafer lot associated with predetermined product from the starting date. A starting process stage for the wafer lot is determined at the starting date based on the remaining days, and an ending process stage for the wafer lot at the end of the ending date. Wafer numbers are assigned to each process stage of schedule times in proportion to process times of each stage in view of total process time for the schedule period, and by repeating the above steps for one or more other wafer lots under production, a total wafer number assigned to each stage is determined and the WIP schedule for the schedule period is obtained.
Description
- This application is a divisional application of U.S. Pat. application Ser. No. 10/840,099, filed on May 6, 2004, the contents of which are hereby incorporated by reference as if set forth in their entirety.
- This invention relates to semiconductor fabrication and, more particularly, to computer readable storage media for planning operations within semiconductor fabrication facilities.
- In a large manufacturing facility, such as a semiconductor foundry in which many tools are required to build the wafer and chip product, there are complex programs that run the tools that require monitoring and control to guide manufacturers in the way these programs may be implemented. The main framework for this system is known as the Computer Implemented Manufacturing (CIM) framework.
- The overall control of the foundry floor is by a central server having a Manufacturing Execution System (MES) with tool control system. The central server has the information on each customer job that is currently being processed and ensures that each tool in sequence is performing the correct operation. This server communicates with users who monitor and control the production flow and operations on client workstations.
- Standard work-in-progress (WIP) profiles or schedule, by process stage, are one of the items that manufacturing personnel and managers would like to know most. Even though WIP profiles are popular, there is no systematic method to generate a WIP profile in a timely and consistent manner. One problem with generating WIP profiles is that a significant amount of data about process time and cycle time factor must be collected, organized, correlated, and maintained. Maintaining, let alone collecting and correlating, this information in a timely manner requires significant resources and support by Fabrication Plant and Information Technology personnel.
- Desirable in the art of is a need for a method and system for timely determining WIP profiles to allow for efficient operation of semiconductor foundries in order to maximize the capacity of the manufacturing facility.
- In view of the foregoing, this invention provides a method and program for generating a work in progress (WIP) schedule in a. semiconductor manufacturing facility.
- In some embodiments, a computer readable storage medium encoded with computer program code, wherein, when the computer program code is executed by a processor, the processor performs a method for generating a work in progress (WIP) schedule in a semiconductor manufacturing facility. After determining the starting and ending dates of a predetermined schedule period for generating the WIP schedule, remaining days are determined for completing at least one wafer lot associated with a predetermined product from the starting date. A starting process stage for the wafer lot is determined at the beginning of the starting date based on the remaining days, as well as an ending process stage for the wafer lot at the end of the ending date. Wafer numbers are assigned to each process stage of the schedule time in proportion to a process time of each stage in view of a total process time for the schedule period; and, by repeating the above steps for one or more other wafer lots under production, a total wafer number assigned to each stage is determined and the WIP schedule for the schedule period is obtained.
- The construction and method of operation of the invention together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
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FIG. 1 presents a diagram illustrating wafer process time with respect to each process stage and relevant time lines in accordance with one embodiment of the present invention. -
FIG. 2 illustrates a flow diagram for detailed steps for generating the WIP schedule in accordance with one embodiment of the present invention. - The following is a detailed description of an improved method for generating WIP schedules so that a manufacturing facility can maximize its capacity in accordance with the present invention. The disclosed method assigns wafer numbers to each stage of the manufacturing based on process time needed for each
- stage. In semiconductor manufacturing, an order of certain products needs to be started from blank wafers, and goes through various stages of processes in the manufacturing process. In a manufacturing facility, a large number of orders are going through various stages of the facility at any time, and it is noted that an order may be split into multiple wafer lots.
- In planning semiconductor fabrication, information may be collected or drawn from a Management Executive System (MES) which may be a commercially available or a user-generated software package suitable for retaining and maintaining information items associated with semiconductor fabrication, such recipes, process steps, etc. The data may be provided to a planning software for creating the production schedule, e. g., the WIP schedule, for fabrication of the semiconductor products wafers. The resultant plan or schedule may include information regarding, for embodiment, forecast of how many wafers should be manufactured for each stage of the fabrication process, and may also include other production related information about material consumption, mask requirements, etc.
- Table I below illustrates that an order or a batch of product having part identifier (ID) A goes through
processing stages 44 through 50 for its entire manufacturing time period. Also listed is the net processing time needed in each stage, and the corresponding accumulative process time as the wafers go through the flow.TABLE I Accumulated Process Time Process Time Part ID Stage_ID Stage Order (Days) (Days) A Stage_50 50 0.40 0.4 A Stage_49 49 0.62 1.02 A Stage_48 48 0.29 1.31 A Stage_47 47 0.11 1.43 A Stage_46 46 0.21 1.64 A Stage_45 45 0.31 1.95 A Stage_44 44 0.23 2.17
As it is understood, that, although the net total accumulative process time is about 2.17 days, but due to the production reality, it is usually scheduled for more time for the entire manufacturing process. For embodiment, the total time scheduled can be 3 days. The relation between the total time scheduled and the net total accumulative process time can be mathematically represented by a ratio referred to as an X ratio for this invention:
X=Total Scheduled Time/Total Accumulative Process Time
It is further noted although mathematical representations are made above in Table I with regard to each stage, it is understood that once a process starts in any stage, it has to finish and cannot instantly stop at any arbitrary time. - When generating a WIP schedule, it is usually done on a daily basis during the production process. Since the schedule can change every day, the WIP scheduling can be done multiple times on an as-needed basis. Further, one or more computing devices can be used for processing information to generate the WIP schedule.
-
FIG. 1 illustrates, graphically, time schedules of the process flow 100 for a particular product. In this exemplary case, the net process time associated with each stage_ID shown in Table I is depicted sequentially along alinear time line 110. The net process time associated with each stage_ID is further shown underneath each stage.FIG. 1 further illustrates the association of a remainingprocess time line 120 with respect to each stage as the process flow progresses. For embodiment, at the beginning of astarting stage 44, total 2.17 days are remaining for finishing the flow, and similarly, at the end ofstage 44, 1.94 days are left. - When generating a WIP schedule for a coming day, it is first determined which stage the process flow shall be started for the day. The due date for completing the product is also determined. It then can be calculated how many days are left for production. For embodiment, if the due date is 7/4/04, and it is 7/2/04, that needs a WIP schedule. There are total 3 remaining days for processing. Using the X ratio, it can be obtained that the process should start at point 3/2=1.5 on the
process time line 120. This point is identified aspoint 130. As it is described above, the stages of processes are discrete in nature, and the identifiedpoint 130 only indicates that the process should start from the next stage, e.g.,stage 47. - Once the starting stage for the day is determined, the ending stage also needs to be determined. At the end of 7/2/04, there are only 2 days remaining so that 2 divided by the X ration to get 1 reflected by
point 140 on thetime line 120, which isstage 49. It is further determined that the total daily process time for these three stages is 0.11+0.29+0.62=1.02 days. Now, it is all determined how many stages the WIP schedule should cover for the day under scheduling. Wafer numbers need to be assigned to each stage for scheduling WIP purpose. Assuming the same product has a plurality of wafer lots going through the production flow and each wafer lot may have different number of wafers. Assuming a wafer lot has 50 wafers, the wafers are distributed in proportion to the net process time with respect to the total daily process time. In this particular embodiment, forstage stage 47. Since wafers cannot be divided, the total number of wafers has to be rounded. For embodiment, 15.39 wafers have to be rounded to 15 or 16 wafers based a rounding convention. As such, a WIP schedule for the product for the predetermined day is generated. When every wafer lot is considered for the product, the scheduling may extend to other products as well so that the total usage of each stage can also be identified. -
FIG. 2 illustrates a process 200 for determining a WIP schedule in accordance with one embodiment of the present invention. Instep 210, a starting date to be scheduled is obtained as determined by the user. Although the embodiments illustrated above or below use a daily WIP schedule for illustration, the WIP schedule can be set for any length of time. For embodiment, if a work flow takes a month, a high level weekly WIP may be scheduled in addition to daily schedules. - Assuming only daily WIP is needed, in
step 220, a due date is obtained. Instep 230, the starting stage of the day is determined based on a cycle time factor, referred to as the “X ratio,” and the total days remaining for the process flow. The X ratio helps to scale the remaining days so that a time point can be identified on the remaining time line as illustrated inFIG. 1 . Alternatively, the starting stage can be determined based on the ending stage of the day immediately previous to the day under scheduling. Instep 240, the ending stage of the day is also determined. When all the process stages are identified for the day, the total number of wafers in wafer lots for predetermined products are used for determining the number of wafers assigned to each stage based on the net process time of each stage with respect to the total daily process time. The WIP schedule is now completed (step 260) and various reports can be generated. - Such a WIP generating process can be implemented using computer processing tools. Software programs can be developed to provide instructions and interfaces for generating the WIP schedule. The platform for developing such a software can be chosen based on the software environment of the existing manufacturing facility. One skilled in the art can understand that the above described functions for generating the WIP schedule can be developed using various software tools. With the networking technology in existence today, the WIP schedule can be generated, viewed, modified, or otherwise controlled by authorized users.
- The present invention may be embodied in the form of computer- implemented processes and apparatus for practicing those processes. The present invention may also be embodied in the form of computer program code embodied in tangible media, such as floppy diskettes, read only memories (ROMs), CD-ROMs, DVDs, hard drives, ZIP™ disks, memory sticks, or any other computer-readable storage medium, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention. The present invention may also be embodied in the form of computer program code, for example, whether stored in a storage medium, loaded into and/or executed by a computer, or transmitted over some transmission medium, such as over the electrical wiring or cabling, through fiber optics, or via electromagnetic radiation, wherein, when the computer program code is loaded into and executed by a computer, the computer becomes an apparatus for practicing the invention. When implemented on a general-purpose processor, the computer program code segments configure the processor to create specific logic circuits.
- While the invention has been described with reference to the preferred embodiments thereof, it will be appreciated by those of ordinary skill in the art that modifications can be made to the parts that comprise the invention without departing from the spirit and scope thereof, as defined by the claims. It is expressly intended that all combinations of those elements that perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Substitutions of elements from one described embodiment to another are also fully intended and contemplated.
Claims (4)
1. A computer readable storage medium encoded with computer program code, wherein, when the computer program code is executed by a processor, the processor performs a method for generating a work in progress (WIP) schedule in a semiconductor manufacturing facility, comprising the steps of:
receiving starting and ending dates of a predetermined schedule period for generating the WIP schedule;
determining remaining days for completing at least one wafer lot associated with a predetermined product from the starting date;
determining a starting process stage for the wafer lot at the beginning of the starting date based on the remaining days;
determining an ending process stage for the wafer lot at the end of the ending date;
assigning wafer numbers to each process stage between the starting and the ending process stages of the schedule time in proportion to a process time of each stage in view of a total process time for the schedule period; and
generating the WIP schedule for the schedule period after repeating the above steps for one or more other wafer lots under production to determine a total wafer number assigned to each stage.
2. The computer readable storage medium of claim 1 , wherein the starting dates and the ending dates are the same.
3. The computer readable storage medium of claim 1 , wherein the step for determining a starting process stage further includes steps of:
receiving a process time for each process stage to complete the wafer lot; and
identifying the starting process stage along a remaining process time line indicating remaining time for completing the wafer lot based on the determined remaining days and a total process time for completing the wafer lot.
4. The computer readable storage medium of claim 3 , wherein the step for identifying the starting process stage further includes steps of:
scaling the remaining days by a cycle time factor to obtain a time point; and
determining the starting process stage by identifying the time point along the remaining process time line.
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US11/651,859 US20070117230A1 (en) | 2004-05-06 | 2007-01-10 | Computer readable storage medium for work-in-process schedules |
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US10/840,099 US7179664B2 (en) | 2004-05-06 | 2004-05-06 | Method for generating work-in-process schedules |
US11/651,859 US20070117230A1 (en) | 2004-05-06 | 2007-01-10 | Computer readable storage medium for work-in-process schedules |
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US10/840,099 Division US7179664B2 (en) | 2004-05-06 | 2004-05-06 | Method for generating work-in-process schedules |
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US11/651,859 Abandoned US20070117230A1 (en) | 2004-05-06 | 2007-01-10 | Computer readable storage medium for work-in-process schedules |
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US20140277667A1 (en) * | 2013-03-15 | 2014-09-18 | Applied Materials, Inc. | Method and system for filtering lot schedules using a previous schedule |
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US7477957B2 (en) * | 2006-03-30 | 2009-01-13 | International Business Machines Corporation | Method and system of controlled movement of dynamic-route WIP |
US7392105B2 (en) * | 2006-04-27 | 2008-06-24 | International Business Machines Corporation | Method and system for improved performance of manufacturing processes |
US8150541B2 (en) * | 2007-11-13 | 2012-04-03 | Fisher-Rosemount Systems, Inc. | Methods and apparatus to modify a recipe process flow associated with a process control system during recipe execution |
US8825189B2 (en) * | 2007-11-13 | 2014-09-02 | Fisher Rosemount Systems, Inc. | Methods and apparatus to execute an auxiliary recipe and a batch recipe associated with a process control system |
US8555206B2 (en) * | 2007-12-21 | 2013-10-08 | Fisher-Rosemount Systems, Inc. | Methods and apparatus to present recipe progress status information |
US8666529B2 (en) * | 2010-08-27 | 2014-03-04 | International Business Machines Corporation | Controlling non-process of record (POR) process limiting yield (PLY) inspection work |
WO2019104264A1 (en) * | 2017-11-27 | 2019-05-31 | Weiping Shi | Control product flow of semiconductor manufacture process under time constraints |
CN112163799B (en) * | 2020-12-02 | 2021-03-02 | 晶芯成(北京)科技有限公司 | Yield analysis method and yield analysis system of semiconductor product |
CN114975193B (en) * | 2022-08-01 | 2022-10-25 | 中国工业互联网研究院 | Industrial equipment control method, device, equipment and medium based on twin numbers |
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2004
- 2004-05-06 US US10/840,099 patent/US7179664B2/en not_active Expired - Fee Related
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2005
- 2005-01-31 TW TW094102863A patent/TWI294088B/en not_active IP Right Cessation
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2007
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Also Published As
Publication number | Publication date |
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TW200537339A (en) | 2005-11-16 |
TWI294088B (en) | 2008-03-01 |
US7179664B2 (en) | 2007-02-20 |
US20050250226A1 (en) | 2005-11-10 |
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