US20070188238A1 - Single-Ended Input to Differential-Ended Output Low Noise Amplifier Implemented with Cascode and Cascade Topology - Google Patents
Single-Ended Input to Differential-Ended Output Low Noise Amplifier Implemented with Cascode and Cascade Topology Download PDFInfo
- Publication number
- US20070188238A1 US20070188238A1 US11/276,830 US27683006A US2007188238A1 US 20070188238 A1 US20070188238 A1 US 20070188238A1 US 27683006 A US27683006 A US 27683006A US 2007188238 A1 US2007188238 A1 US 2007188238A1
- Authority
- US
- United States
- Prior art keywords
- transistor
- low noise
- noise amplifier
- gate
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
- H03F3/45085—Long tailed pairs
- H03F3/45089—Non-folded cascode stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/372—Noise reduction and elimination in amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/534—Transformer coupled at the input of an amplifier
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45316—Indexing scheme relating to differential amplifiers the AAC comprising one or more discrete inductive elements or coils
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45332—Indexing scheme relating to differential amplifiers the AAC comprising one or more capacitors as feedback circuit elements
Definitions
- the present invention relates to a low noise amplifier, and more particularly, to a single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology.
- a low noise amplifier is part of a receiver in a communication system and providing functions of amplifying received signals and suppressing noise figure of the receiver while designing a receiver of a general communication system.
- a conventional low noise amplifier is implemented with a single-ended input to single-ended output structure.
- a mixer connected to the conventional low noise amplifier has to be a single-ended input mixer because of the single-ended input to single-ended output structure so that common mode noises of the mixer and signals transmitted from a local oscillator and downconverted by the mixer to intermediated frequency (so called LO to IF feedthrough) cannot be efficiently reduced.
- balun balanced-to-unbalanced
- the balun not only increases cost of implementing a low noise amplifier but also increases the noise figure of a corresponding receiver since the increase of the noise figure is generated from loss of the balun.
- FIG. 1 is a diagram of a prior art low noise amplifier 100 having a single-ended input to differential-ended output structure, the low noise amplifier 100 implemented with a passive transformer.
- the low noise amplifier 100 comprises a balun 102 , a first transistor 110 , a dc (direct current) current source 112 , a second transistor 114 , a first output matching impedance 116 , a second output matching impedance 118 , a first output 120 , and a second output 122 .
- the balun 102 comprises a first coil 104 , a second coil 106 , and an input 108 .
- the gate of the first transistor 110 is coupled to a first terminal of the second coil 106 .
- the dc current source 112 is coupled to the source of the first transistor 110 .
- the gate of the second transistor 114 is coupled to a second terminal of the second coil 106 .
- the source of the second transistor 114 is coupled to the dc current source 112 .
- the first output matching impedance 116 is coupled to the drain of the first transistor 110 .
- the second output matching impedance 118 is coupled to the drain of the second transistor 114 .
- the first output 120 is coupled to the drain of the first transistor 110 .
- the second output 122 is coupled to the drain of the second transistor 114 .
- the differential-ended output structure of the low noise amplifier 100 is formed by both the first output 120 and the second output 122 .
- the first coil 104 and the second coil 106 of the balun 102 are formed from wires of a corresponding integrated circuit.
- a signal having a phase difference equivalent to 180 degrees is generated from both the first coil 104 and the second coil 106 and transmitted to both the first transistor 110 and the second transistor 114 . Then both the first transistor 110 and the second transistor 114 amplify the signal for generating a high frequency signal.
- the low noise amplifier 200 comprises a first input matching impedance 202 , an input 208 , a first transistor 210 , a dc current source 212 , a second transistor 214 , a second input matching impedance 204 , a first output matching impedance 216 , a second output matching impedance 218 , a first output 220 , and a second output 222 .
- the output 208 is coupled to a first terminal of the first input matching impedance 202 .
- the gate of the first transistor 210 is coupled to a second terminal of the first input matching impedance 202 .
- the dc current source 212 is coupled to the source of the first transistor 210 .
- the source of the second transistor 214 is coupled to the dc current source 212 .
- the second input matching impedance 204 is coupled to the gate of the second transistor 214 .
- the first output matching impedance 216 is coupled to the drain of the first transistor 210 .
- the second output matching impedance 218 is coupled to the drain of the second transistor 214 .
- the first output 220 is coupled to the drain of the first transistor 210 .
- the second output 222 is coupled to the drain of the second transistor 214 .
- the differential-ended output structure of the low noise amplifier 200 is formed by both the first output 220 and the second output 222 .
- one of the differential transistors of the low noise amplifier 200 is grounded, thereby, compared to the low noise amplifier 100 shown in FIG. 1 , the low noise amplifier 200 saves the space of the balun 102 shown in FIG. 1 and decreases the loss generated from the balun 102 .
- parasitic effects of elements are obvious. Therefore, the operations of the first transistor 210 and the second transistor 214 reveal a poor symmetry.
- the primary component of both the low noise amplifiers 100 and 200 is the differential transistors. Therefore, under the same voltage supply, current of the dc current source 112 equals to the sum of the currents of the first transistor 110 and the second transistor 114 , and current of the dc current source 212 equals to the sum of the currents of the first transistor 210 and the second transistor 214 .
- FIG. 3 is a diagram of a prior art low noise amplifier 300 having a single-ended input to differential-ended output structure.
- the low noise amplifier 300 comprises a first transistor 302 , a first inductor 304 , a second transistor 306 , a second inductor 308 , a first capacitor 310 , a third transistor 312 , a fourth transistor 314 , a second capacitor 316 , a first inductive impedance 318 , a second inductive impedance 320 , a third capacitor 322 , a fourth capacitor 324 , an input 326 , a bias input 328 , a first output 330 , and a second output 332 .
- the first inductor 304 has a first terminal coupled to the emitter of the first transistor 302 and a second terminal coupled to ground.
- the second inductor 308 has a first terminal coupled to the emitter of the second transistor 306 and a second terminal coupled to ground.
- the first capacitor 310 has a first terminal coupled to the collector of the first transistor 302 and a second terminal coupled to the base of the second transistor 306 .
- the emitter of the third transistor 312 is coupled to the collector of the first transistor 302 .
- the emitter of the fourth transistor 314 is coupled to the collector of the second transistor 306 .
- the second capacitor 316 has a first terminal coupled to the base of the third transistor 312 and the base of the fourth transistor 314 , and has a second terminal coupled to ground.
- the first inductive impedance 318 has a first terminal coupled to the collector of the third transistor 312 and a second terminal coupled to the dc voltage source VDD.
- the second inductive impedance 320 has a first terminal coupled to the collector of the fourth transistor 314 and a second terminal coupled to the dc voltage source VDD.
- the third capacitor 322 has a first terminal coupled to the collector of the third transistor 312 .
- the fourth capacitor 324 has a first terminal coupled to the collector of the fourth transistor 314 .
- the input 326 is coupled to the base of the first transistor 302 .
- the bias input 328 is coupled to the base of the third transistor 312 and the base of the fourth transistor 314 .
- the first output 330 is coupled to the second terminal of the third capacitor 322 .
- the second output 332 is coupled to a second terminal of the fourth capacitor 324 .
- an input signal is inputted from the input 326 and to the base of the first transistor 302 .
- the amplified input signal splits into two routes at the node “A” shown in FIG. 3 .
- One route passes through the second transistor 306 and the fourth transistor 314 to the second output 332 . Since the second transistor 306 forms a common-emitter configuration, thereby, a phase difference of 180 degrees is generated between the input signal and the output signal of the second transistor 306 .
- Another route passes through the third transistor 312 to the first output 330 .
- the phase between the input signal and the output signal of the third transistor 312 is the same. It is concluded that the phase difference between the output signal at the first output 330 and the output signal at the second output 332 is 180 degrees.
- the present invention provides a single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology.
- the low noise amplifier comprises a first transistor, a first inductive impedance having a first terminal connected to the source of the first transistor and a second terminal coupled to ground, a first gate voltage source coupled to the gate of the first transistor, a matching circuit having a first terminal coupled to the gate of the first transistor and a second terminal coupled to ground, an input coupled to a third terminal of the matching circuit, a second inductive impedance having a first terminal connected to the drain of the first transistor, a second transistor, the source of the second transistor connected to a second terminal of the second inductive impedance, a first capacitive impedance having a first terminal connected to the drain of the first transistor and a second terminal connected to the gate of the second transistor, a second gate voltage source coupled to the gate of the second transistor, a third transistor, the source of the third transistor connected to the drain of the first transistor, a third gate voltage source coupled to the gate of
- FIG. 1 is a diagram of a prior art low noise amplifier having a single-ended input to differential-ended output structure, and the low noise amplifier is implemented with a passive transformer.
- FIG. 2 is a diagram of a prior art low noise amplifier, and one of the differential transistors of the low noise amplifier is grounded.
- FIG. 3 is a diagram of a prior art low noise amplifier having a single-ended input to differential-ended output structure.
- FIG. 4 is a diagram of a low noise amplifier having a single-ended input to differential-ended output structure of the present invention.
- FIG. 5 is a diagram of a low noise amplifier implemented with P-type metal oxide semiconductor field-effect transistors of the present invention.
- FIG. 6 is a diagram of the low noise amplifier implemented with NPN bipolar junction transistors.
- FIG. 7 is a diagram of the low noise amplifier implemented with PNP bipolar junction transistors
- FIG. 4 is a diagram of a low noise amplifier 400 having a single-ended input to differential-ended output structure of the present invention.
- the low noise amplifier 400 comprises a first transistor 402 , a first inductive impedance 404 , a first gate voltage source 406 , a matching circuit 408 , an input 410 , a second inductive impedance 412 , a second transistor 414 , a first capacitive impedance 416 , a second gate voltage source 418 , a third transistor 420 , a third gate voltage source 422 , a second capacitive impedance 424 , a first output impedance 426 , a second output impedance 428 , a dc voltage source 430 , a first output 432 , a second output 434 , a first resistor 436 , a second resistor 438 , a third resistor 440 , a first bulk voltage source 442 ,
- the first inductive impedance 404 has a first terminal connected to the source of the first transistor 402 and a second terminal connected to ground.
- the first gate voltage source 406 is coupled to the gate of the first transistor 402 .
- the matching circuit 408 has a first terminal coupled to the gate of the first transistor 402 and a second terminal coupled to ground.
- the input 410 is coupled to a third terminal of the matching circuit 408 .
- the second inductive impedance 412 has a first terminal connected to the drain of the first transistor 402 .
- the source of the second transistor 414 is connected to a second terminal of the second inductive impedance 412 .
- the first capacitive impedance 416 has a first terminal connected to the drain of the first transistor 402 and a second terminal connected to the gate of the second transistor 414 .
- the second gate voltage source 418 is coupled to the gate of the second transistor 414 .
- the source of the third transistor 420 is connected to the drain of the first transistor 402 .
- the third gate voltage source 422 is coupled to the gate of the third transistor 420 .
- the second capacitive impedance 424 has a first terminal connected to the gate of the third transistor 420 and a second terminal connected to ground.
- the first output impedance 426 has a first terminal connected to the drain of the second transistor 414 .
- the second output impedance 428 has a first terminal connected to the drain of the third transistor 420 .
- the dc voltage source 430 is connected to a second terminal of the first output impedance 426 and a second terminal of the second output impedance 428 .
- a first output 432 is connected to the drain of the second transistor 414 .
- a second output 434 is connected to the drain of the third transistor 420 .
- the first resistor 436 is connected to the gate of the first transistor 402 and the first gate voltage source 406 .
- the second resistor 438 is connected to the gate of the second transistor 414 and the second gate voltage source 418 .
- the third resistor 440 is connected to the gate of the third transistor 420 and the third gate voltage source 422 .
- the first bulk voltage source 442 has a first terminal coupled to the bulk of the first transistor 402 .
- the second bulk voltage source 444 has a first terminal coupled to the bulk of the second transistor 414 .
- the third bulk voltage source 446 has a first terminal coupled to the bulk of the third transistor 420 .
- the first transistor 402 , the second transistor 414 , and the third transistor 420 are N-type metal oxide semiconductor field-effect transistors (MOSFET).
- MOSFET metal oxide semiconductor field-effect transistors
- the resistance of the first resistor 436 , the second resistor 438 , and the third resistor 440 is high so that the resistors are utilized for preventing signals from leaking from the gates of the transistors to neighboring bias circuits under a high frequency.
- the first inductive impedance 404 is utilized for part of impedance matching.
- the second inductive impedance 412 is utilized for segregating high frequency signals at the drain of the first transistor 402 from high frequency signals at the source of the second transistor 414 under a high frequency and conducting dc currents flowing between the drain of the first transistor 402 and the source of the second transistor 414 .
- the first capacitive impedance 416 is utilized for conducting the high frequency signal from the drain of the first transistor 402 to the gate of the second transistor 414 and prohibiting dc currents from flowing between the drain of the first transistor 402 and the gate of the second transistor 414 under a high frequency.
- the second capacitive impedance 424 is utilized for setting the electrical level of the gate at a high frequency if the third transistor 420 to converge to ground without affecting the dc electrical level of the gate of the third transistor 420 .
- the first output impedance 426 and the second output impedance 428 are the matching impedances utilized for serving as an output matching impedance, and the value of the output matching impedance may reach a desire value.
- the matching circuit 408 is a conventional matching circuit and can be implemented with various methods.
- the first bulk voltage source 442 , the second bulk voltage source 444 , and the third bulk voltage source 446 are dc voltage sources, each second terminal of the bulk voltage sources may be coupled to the source of the corresponding transistor, a dc voltage source, or ground according to requirements.
- the second inductive impedance 412 which is connected to the drain of the first transistor 402 and the source of the second transistor 414 , prevents high frequency signals at the drain of the first transistor 402 from reaching the drain of the second transistor 414 through the source of the second transistor 414 and the channel of the second transistor 414 .
- the signals at the gate of the second transistor 414 are amplified to the drain of the second transistor 414 , i.e., the first output 432 , through the common-source configuration of the second transistor 414 .
- the amplified signals at the first output 432 have a phase difference of approximately 180 degrees with the signals at the gate of the second transistor 414 so that the signals at the input 410 have a phase difference of approximately 360 degrees with the signals at the first output 432 , i.e., the signals at the input 410 have the same phase with the signals at the first output 432 .
- the signals at the drain of the first transistor 402 are amplified to the drain of the third transistor 420 , i.e., the second output 434 , through the common-gate configuration of the third transistor 420 . Because of the common-gate configuration of the third transistor 420 and the inherent properties of the medal oxide semiconductor field-effect transistors, the signals at the source of the third transistor 420 have the same phase with the signals at the drain of the third transistor 420 , i.e., the signals at the source of the third transistor 420 have the same phase with the second output 434 .
- the signals at the input 410 have a phase difference of approximately 180 degrees with the signals at the second output 434 so that the signals at the first output 432 have a phase difference of approximately 180 degrees with the signals at the second output 434 .
- a phase difference of 180 degrees is generated at both the outputs from the high frequency signals inputted at the input 410 , thereby, a single-ended input to differential-ended output low noise amplifier is implemented.
- the sizes and the bias voltages of the second transistor 414 and the third transistor 420 are not necessarily equivalent to each other.
- the required linearity, the required gain, and the phase difference of 180 degrees may be reached by adjusting the sizes and the bias voltages of the second transistor 414 and the third transistor 420 .
- the low noise amplifier 400 not only saves the wires of the balun 102 of the low noise amplifier 100 but also has higher gain and lower noise figure under the same dc supply voltage and the same supply current with the low noise amplifier 100 .
- the combination of the transistors in the low noise amplifier 400 has the same two-stage cascode structure with the low noise amplifier 100 under the same dc voltage VDD, thereby, the linearity of the low noise amplifier 400 is not less than the linearity of the low noise amplifier 100 .
- the low noise amplifier 400 Compared to the low noise amplifier 200 , one of the differential transistors of the low noise amplifier 200 connected to ground, the low noise amplifier 400 has higher gain and lower noise figure than the low noise amplifier 200 under the same dc supply voltage and the same supply current. Moreover, since the first transistor 402 of the low noise amplifier 400 has a common-source configuration, the high frequency matching of the noise figure and the gain of the low noise amplifier 400 is more precise than the low noise amplifier 200 , and the design complexity of the low noise amplifier 400 is also less than the low noise amplifier 200 .
- the first transistor 402 of the low noise amplifier 400 has the same common-source configuration with the first transistor 302 of the low noise amplifier 300 .
- the first transistor 302 is a bipolar junction transistor, thereby, the configuration of the first transistor 302 is denoted as a common-emitter configuration.
- the high frequency matching of the gain and the noise figure of the low noise amplifier 400 is more precise and less complex than the low noise amplifier 300 shown in FIG. 3 .
- FIG. 3 in FIG.
- the current flowing through the first transistor 302 is equal to the current flowing through the third transistor 312
- the current flowing through the second transistor 306 is equal to the current flowing through the fourth transistor 314
- the current utilized by the low noise amplifier 300 is the sum of the currents flowing through the first transistor 302 and the second transistor 306
- the current flowing through the first transistor 402 is the sum of the currents flowing through the second transistor 414 and the third transistor 420 , thereby, the current flowing through the first transistor 402 is the current utilized by the low noise amplifier 400 .
- the first transistor 402 of the low noise amplifier 400 of the present invention has better noise figure and higher gain than the first transistor 302 of the low noise amplifier 300 .
- the phenomenon that results is because the first transistor 402 of the low noise amplifier 400 loads more currents than the first transistor 302 of the noise amplifier 300 under the same dc current level of low noise amplifier.
- high frequency input signals are amplified by the first transistor 302 , the second transistor 306 , and the fourth transistor 314 , thereby, the linearity of the low noise amplifier 300 is much limited because of the limited voltage swing.
- the output signals of the low noise amplifier 400 of the present invention are merely amplified by two stages of transistors, therefore, the linearity of the low noise amplifier 400 is not limited as much as the low noise amplifier 300 .
- the transistors utilized for implementing the low noise amplifier of the present invention may also be P-type metal oxide semiconductor field-effect transistors and bipolar junction transistors.
- the low noise amplifier 400 shown in FIG. 4 is merely a preferred embodiment of the present invention. It means that replacing any elements of the low noise amplifier of the present invention is still within the range of the present invention. Additionally, the low noise amplifier of the present invention is not limited by FIG. 4 .
- the diagrams of FIG. 5 , FIG. 6 , and FIG. 7 illustrate other preferred embodiments of the present invention, and the embodiments merely replace some elements of the low noise amplifier 400 shown in FIG. 4 .
- FIG. 5 is a diagram of a low noise amplifier 500 implemented with P-type metal oxide semiconductor field-effect transistors of the present invention. Except for exchanging the dc voltage source 430 and the ground with each other and replacing the N-type metal oxide semiconductor field-effect transistors of the low noise amplifier 400 with P-type metal oxide semiconductor field-effect transistors, the remaining disposition of the low noise amplifier 500 is almost the same with the low noise amplifier 400 . It means that the transistors 402 , 414 , and 420 of the low noise amplifier 400 are replaced with transistors 502 , 514 , and 520 in the low noise amplifier 500 . And the transistors 502 , 514 , and 520 are P-type metal oxide semiconductor field-effect transistors.
- FIG. 6 is a diagram of the low noise amplifier 600 implemented with NPN bipolar junction transistors (NPN BJT). Except for replacing the N-type metal oxide semiconductor field-effect transistors of the low noise amplifier 400 with NPN bipolarjunction transistors, the remaining disposition of the low noise amplifier 600 is almost the same with the low noise amplifier 400 . It means that the transistors 402 , 414 , and 420 of the low noise amplifier 400 are replaced with the transistors 602 , 614 , and 620 .
- the transistors 602 , 614 , and 620 are NPN bipolar junction transistors.
- FIG. 7 is a diagram of the low noise amplifier 700 implemented with PNP bipolar junction transistors (PNP BJT). Except for exchanging the dc voltage source 430 and the ground with each other and replacing the N-type metal oxide semiconductor field-effect transistors of the low noise amplifier 400 with PNP bipolar junction transistors, the remaining disposition of the low noise amplifier 700 is almost the same with the low noise amplifier 400 . It means that the transistors 402 , 414 , and 420 of the low noise amplifier 400 are replaced with the transistors 702 , 714 , and 720 .
- the transistors 702 , 714 , and 720 are PNP bipolarjunction transistors.
- a single-ended input and differential-ended output low noise amplifier is implemented with cascode and cascade topologies in the present invention.
- the low noise amplifier of the present invention has the advantage of high gain and low noise figure. More particularly, under a high frequency, related properties of the low noise amplifier of the present invention are designed more precisely than prior art low noise amplifiers.
- the linearity of the low noise amplifier of the present invention is the same with some or better than prior art low noise amplifiers.
Abstract
Description
- 1. Field of the Invention
- The present invention relates to a low noise amplifier, and more particularly, to a single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology.
- 2. Description of the Prior Art
- A low noise amplifier is part of a receiver in a communication system and providing functions of amplifying received signals and suppressing noise figure of the receiver while designing a receiver of a general communication system. A conventional low noise amplifier is implemented with a single-ended input to single-ended output structure. However, a mixer connected to the conventional low noise amplifier has to be a single-ended input mixer because of the single-ended input to single-ended output structure so that common mode noises of the mixer and signals transmitted from a local oscillator and downconverted by the mixer to intermediated frequency (so called LO to IF feedthrough) cannot be efficiently reduced.
- While designing a differential-ended output low noise amplifier, a differential-ended input to differential-ended output low noise amplifier would be conventional. However, a balun (balanced-to-unbalanced) has to be added in a previous stage of the differential-ended input to differential-ended output low noise amplifier so that a single-ended input signal received at the balun is transformed into a differential-ended output signal. The balun not only increases cost of implementing a low noise amplifier but also increases the noise figure of a corresponding receiver since the increase of the noise figure is generated from loss of the balun.
- Please refer to
FIG. 1 , which is a diagram of a prior artlow noise amplifier 100 having a single-ended input to differential-ended output structure, thelow noise amplifier 100 implemented with a passive transformer. As shown inFIG. 1 , thelow noise amplifier 100 comprises abalun 102, afirst transistor 110, a dc (direct current)current source 112, asecond transistor 114, a firstoutput matching impedance 116, a second output matching impedance 118, afirst output 120, and asecond output 122. Thebalun 102 comprises a first coil 104, asecond coil 106, and aninput 108. The gate of thefirst transistor 110 is coupled to a first terminal of thesecond coil 106. The dccurrent source 112 is coupled to the source of thefirst transistor 110. The gate of thesecond transistor 114 is coupled to a second terminal of thesecond coil 106. The source of thesecond transistor 114 is coupled to the dccurrent source 112. The firstoutput matching impedance 116 is coupled to the drain of thefirst transistor 110. The second output matching impedance 118 is coupled to the drain of thesecond transistor 114. Thefirst output 120 is coupled to the drain of thefirst transistor 110. Thesecond output 122 is coupled to the drain of thesecond transistor 114. The differential-ended output structure of thelow noise amplifier 100 is formed by both thefirst output 120 and thesecond output 122. The first coil 104 and thesecond coil 106 of thebalun 102 are formed from wires of a corresponding integrated circuit. A signal having a phase difference equivalent to 180 degrees is generated from both the first coil 104 and thesecond coil 106 and transmitted to both thefirst transistor 110 and thesecond transistor 114. Then both thefirst transistor 110 and thesecond transistor 114 amplify the signal for generating a high frequency signal. - Please refer to
FIG. 2 , which is a diagram of a prior artlow noise amplifier 200, and one of the differential transistors of thelow noise amplifier 200 is grounded. As shown inFIG. 2 , thelow noise amplifier 200 comprises a firstinput matching impedance 202, aninput 208, afirst transistor 210, a dccurrent source 212, asecond transistor 214, a secondinput matching impedance 204, a first output matching impedance 216, a second output matching impedance 218, afirst output 220, and asecond output 222. Theoutput 208 is coupled to a first terminal of the firstinput matching impedance 202. The gate of thefirst transistor 210 is coupled to a second terminal of the firstinput matching impedance 202. The dccurrent source 212 is coupled to the source of thefirst transistor 210. The source of thesecond transistor 214 is coupled to the dccurrent source 212. The secondinput matching impedance 204 is coupled to the gate of thesecond transistor 214. The first output matching impedance 216 is coupled to the drain of thefirst transistor 210. The second output matching impedance 218 is coupled to the drain of thesecond transistor 214. Thefirst output 220 is coupled to the drain of thefirst transistor 210. Thesecond output 222 is coupled to the drain of thesecond transistor 214. The differential-ended output structure of thelow noise amplifier 200 is formed by both thefirst output 220 and thesecond output 222. As shown inFIG. 2 , one of the differential transistors of thelow noise amplifier 200 is grounded, thereby, compared to thelow noise amplifier 100 shown inFIG. 1 , thelow noise amplifier 200 saves the space of thebalun 102 shown inFIG. 1 and decreases the loss generated from thebalun 102. However, under high frequency, parasitic effects of elements are obvious. Therefore, the operations of thefirst transistor 210 and thesecond transistor 214 reveal a poor symmetry. - The primary component of both the
low noise amplifiers current source 112 equals to the sum of the currents of thefirst transistor 110 and thesecond transistor 114, and current of the dccurrent source 212 equals to the sum of the currents of thefirst transistor 210 and thesecond transistor 214. - Please refer to
FIG. 3 , which is a diagram of a prior artlow noise amplifier 300 having a single-ended input to differential-ended output structure. Thelow noise amplifier 300 comprises afirst transistor 302, afirst inductor 304, asecond transistor 306, asecond inductor 308, afirst capacitor 310, athird transistor 312, afourth transistor 314, asecond capacitor 316, a firstinductive impedance 318, a secondinductive impedance 320, athird capacitor 322, afourth capacitor 324, aninput 326, abias input 328, afirst output 330, and asecond output 332. Thefirst inductor 304 has a first terminal coupled to the emitter of thefirst transistor 302 and a second terminal coupled to ground. Thesecond inductor 308 has a first terminal coupled to the emitter of thesecond transistor 306 and a second terminal coupled to ground. Thefirst capacitor 310 has a first terminal coupled to the collector of thefirst transistor 302 and a second terminal coupled to the base of thesecond transistor 306. The emitter of thethird transistor 312 is coupled to the collector of thefirst transistor 302. The emitter of thefourth transistor 314 is coupled to the collector of thesecond transistor 306. Thesecond capacitor 316 has a first terminal coupled to the base of thethird transistor 312 and the base of thefourth transistor 314, and has a second terminal coupled to ground. The firstinductive impedance 318 has a first terminal coupled to the collector of thethird transistor 312 and a second terminal coupled to the dc voltage source VDD. The secondinductive impedance 320 has a first terminal coupled to the collector of thefourth transistor 314 and a second terminal coupled to the dc voltage source VDD. Thethird capacitor 322 has a first terminal coupled to the collector of thethird transistor 312. Thefourth capacitor 324 has a first terminal coupled to the collector of thefourth transistor 314. Theinput 326 is coupled to the base of thefirst transistor 302. Thebias input 328 is coupled to the base of thethird transistor 312 and the base of thefourth transistor 314. Thefirst output 330 is coupled to the second terminal of thethird capacitor 322. Thesecond output 332 is coupled to a second terminal of thefourth capacitor 324. As shown inFIG. 3 , an input signal is inputted from theinput 326 and to the base of thefirst transistor 302. After being amplified by thefirst transistor 302, the amplified input signal splits into two routes at the node “A” shown inFIG. 3 . One route passes through thesecond transistor 306 and thefourth transistor 314 to thesecond output 332. Since thesecond transistor 306 forms a common-emitter configuration, thereby, a phase difference of 180 degrees is generated between the input signal and the output signal of thesecond transistor 306. Another route passes through thethird transistor 312 to thefirst output 330. Since thethird transistor 312 forms a common-base configuration, thereby, the phase between the input signal and the output signal of thethird transistor 312 is the same. It is concluded that the phase difference between the output signal at thefirst output 330 and the output signal at thesecond output 332 is 180 degrees. - The present invention provides a single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology. The low noise amplifier comprises a first transistor, a first inductive impedance having a first terminal connected to the source of the first transistor and a second terminal coupled to ground, a first gate voltage source coupled to the gate of the first transistor, a matching circuit having a first terminal coupled to the gate of the first transistor and a second terminal coupled to ground, an input coupled to a third terminal of the matching circuit, a second inductive impedance having a first terminal connected to the drain of the first transistor, a second transistor, the source of the second transistor connected to a second terminal of the second inductive impedance, a first capacitive impedance having a first terminal connected to the drain of the first transistor and a second terminal connected to the gate of the second transistor, a second gate voltage source coupled to the gate of the second transistor, a third transistor, the source of the third transistor connected to the drain of the first transistor, a third gate voltage source coupled to the gate of the third transistor, a second capacitive impedance having a first terminal connected to the gate of the third transistor and a second terminal connected to ground, a first impedance having a first terminal connected to the drain of the second transistor, a second impedance having a first terminal connected to the drain of the third transistor, a direct current voltage source connected to a second terminal of the first impedance and a second terminal of the second impedance, a first output connected to the drain of the second transistor, and a second output connected to the drain of the third transistor.
- These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
-
FIG. 1 is a diagram of a prior art low noise amplifier having a single-ended input to differential-ended output structure, and the low noise amplifier is implemented with a passive transformer. -
FIG. 2 is a diagram of a prior art low noise amplifier, and one of the differential transistors of the low noise amplifier is grounded. -
FIG. 3 is a diagram of a prior art low noise amplifier having a single-ended input to differential-ended output structure. -
FIG. 4 is a diagram of a low noise amplifier having a single-ended input to differential-ended output structure of the present invention. -
FIG. 5 is a diagram of a low noise amplifier implemented with P-type metal oxide semiconductor field-effect transistors of the present invention. -
FIG. 6 is a diagram of the low noise amplifier implemented with NPN bipolar junction transistors. -
FIG. 7 is a diagram of the low noise amplifier implemented with PNP bipolar junction transistors - Please refer to
FIG. 4 , which is a diagram of alow noise amplifier 400 having a single-ended input to differential-ended output structure of the present invention. As shown inFIG. 4 , thelow noise amplifier 400 comprises afirst transistor 402, a firstinductive impedance 404, a firstgate voltage source 406, amatching circuit 408, aninput 410, a secondinductive impedance 412, asecond transistor 414, afirst capacitive impedance 416, a secondgate voltage source 418, athird transistor 420, a thirdgate voltage source 422, asecond capacitive impedance 424, afirst output impedance 426, asecond output impedance 428, adc voltage source 430, afirst output 432, asecond output 434, afirst resistor 436, asecond resistor 438, athird resistor 440, a firstbulk voltage source 442, a secondbulk voltage source 444, and a thirdbulk voltage source 446. The firstinductive impedance 404 has a first terminal connected to the source of thefirst transistor 402 and a second terminal connected to ground. The firstgate voltage source 406 is coupled to the gate of thefirst transistor 402. Thematching circuit 408 has a first terminal coupled to the gate of thefirst transistor 402 and a second terminal coupled to ground. Theinput 410 is coupled to a third terminal of thematching circuit 408. The secondinductive impedance 412 has a first terminal connected to the drain of thefirst transistor 402. The source of thesecond transistor 414 is connected to a second terminal of the secondinductive impedance 412. Thefirst capacitive impedance 416 has a first terminal connected to the drain of thefirst transistor 402 and a second terminal connected to the gate of thesecond transistor 414. The secondgate voltage source 418 is coupled to the gate of thesecond transistor 414. The source of thethird transistor 420 is connected to the drain of thefirst transistor 402. The thirdgate voltage source 422 is coupled to the gate of thethird transistor 420. Thesecond capacitive impedance 424 has a first terminal connected to the gate of thethird transistor 420 and a second terminal connected to ground. Thefirst output impedance 426 has a first terminal connected to the drain of thesecond transistor 414. Thesecond output impedance 428 has a first terminal connected to the drain of thethird transistor 420. Thedc voltage source 430 is connected to a second terminal of thefirst output impedance 426 and a second terminal of thesecond output impedance 428. Afirst output 432 is connected to the drain of thesecond transistor 414. Asecond output 434 is connected to the drain of thethird transistor 420. Thefirst resistor 436 is connected to the gate of thefirst transistor 402 and the firstgate voltage source 406. Thesecond resistor 438 is connected to the gate of thesecond transistor 414 and the secondgate voltage source 418. Thethird resistor 440 is connected to the gate of thethird transistor 420 and the thirdgate voltage source 422. The firstbulk voltage source 442 has a first terminal coupled to the bulk of thefirst transistor 402. The secondbulk voltage source 444 has a first terminal coupled to the bulk of thesecond transistor 414. The thirdbulk voltage source 446 has a first terminal coupled to the bulk of thethird transistor 420. - In
FIG. 4 , thefirst transistor 402, thesecond transistor 414, and thethird transistor 420 are N-type metal oxide semiconductor field-effect transistors (MOSFET). The resistance of thefirst resistor 436, thesecond resistor 438, and thethird resistor 440 is high so that the resistors are utilized for preventing signals from leaking from the gates of the transistors to neighboring bias circuits under a high frequency. The firstinductive impedance 404 is utilized for part of impedance matching. The secondinductive impedance 412 is utilized for segregating high frequency signals at the drain of thefirst transistor 402 from high frequency signals at the source of thesecond transistor 414 under a high frequency and conducting dc currents flowing between the drain of thefirst transistor 402 and the source of thesecond transistor 414. Thefirst capacitive impedance 416 is utilized for conducting the high frequency signal from the drain of thefirst transistor 402 to the gate of thesecond transistor 414 and prohibiting dc currents from flowing between the drain of thefirst transistor 402 and the gate of thesecond transistor 414 under a high frequency. Thesecond capacitive impedance 424 is utilized for setting the electrical level of the gate at a high frequency if thethird transistor 420 to converge to ground without affecting the dc electrical level of the gate of thethird transistor 420. Thefirst output impedance 426 and thesecond output impedance 428 are the matching impedances utilized for serving as an output matching impedance, and the value of the output matching impedance may reach a desire value. Thematching circuit 408 is a conventional matching circuit and can be implemented with various methods. The firstbulk voltage source 442, the secondbulk voltage source 444, and the thirdbulk voltage source 446 are dc voltage sources, each second terminal of the bulk voltage sources may be coupled to the source of the corresponding transistor, a dc voltage source, or ground according to requirements. - While the
low noise amplifier 400 is under a high frequency, high frequency signals are inputted from theinput 410 to the drain of thefirst transistor 402 through thematching circuit 408 and thefirst transistor 402. Because of inherent properties of the metal oxide semiconductor field-effect transistors, a phase difference of approximately 180 degrees is generated between the input signal and the output signal of thefirst transistor 402. The signals at the drain of thefirst transistor 402 are then transmitted to the gate of thesecond transistor 414 through thefirst capacitive impedance 416. Therefore, signals at the drain of thefirst transistor 402 have the same phase with the signals at the gate of thesecond transistor 414. Moreover, the secondinductive impedance 412, which is connected to the drain of thefirst transistor 402 and the source of thesecond transistor 414, prevents high frequency signals at the drain of thefirst transistor 402 from reaching the drain of thesecond transistor 414 through the source of thesecond transistor 414 and the channel of thesecond transistor 414. The signals at the gate of thesecond transistor 414 are amplified to the drain of thesecond transistor 414, i.e., thefirst output 432, through the common-source configuration of thesecond transistor 414. Moreover, the amplified signals at thefirst output 432 have a phase difference of approximately 180 degrees with the signals at the gate of thesecond transistor 414 so that the signals at theinput 410 have a phase difference of approximately 360 degrees with the signals at thefirst output 432, i.e., the signals at theinput 410 have the same phase with the signals at thefirst output 432. - At the same time, the signals at the drain of the
first transistor 402 are amplified to the drain of thethird transistor 420, i.e., thesecond output 434, through the common-gate configuration of thethird transistor 420. Because of the common-gate configuration of thethird transistor 420 and the inherent properties of the medal oxide semiconductor field-effect transistors, the signals at the source of thethird transistor 420 have the same phase with the signals at the drain of thethird transistor 420, i.e., the signals at the source of thethird transistor 420 have the same phase with thesecond output 434. Therefore, the signals at theinput 410 have a phase difference of approximately 180 degrees with the signals at thesecond output 434 so that the signals at thefirst output 432 have a phase difference of approximately 180 degrees with the signals at thesecond output 434. A phase difference of 180 degrees is generated at both the outputs from the high frequency signals inputted at theinput 410, thereby, a single-ended input to differential-ended output low noise amplifier is implemented. - In
FIG. 4 , the sizes and the bias voltages of thesecond transistor 414 and thethird transistor 420 are not necessarily equivalent to each other. The required linearity, the required gain, and the phase difference of 180 degrees may be reached by adjusting the sizes and the bias voltages of thesecond transistor 414 and thethird transistor 420. - Compared to the
low noise amplifier 100 shown inFIG. 1 , thelow noise amplifier 400 not only saves the wires of thebalun 102 of thelow noise amplifier 100 but also has higher gain and lower noise figure under the same dc supply voltage and the same supply current with thelow noise amplifier 100. Moreover, the combination of the transistors in thelow noise amplifier 400 has the same two-stage cascode structure with thelow noise amplifier 100 under the same dc voltage VDD, thereby, the linearity of thelow noise amplifier 400 is not less than the linearity of thelow noise amplifier 100. - Compared to the
low noise amplifier 200, one of the differential transistors of thelow noise amplifier 200 connected to ground, thelow noise amplifier 400 has higher gain and lower noise figure than thelow noise amplifier 200 under the same dc supply voltage and the same supply current. Moreover, since thefirst transistor 402 of thelow noise amplifier 400 has a common-source configuration, the high frequency matching of the noise figure and the gain of thelow noise amplifier 400 is more precise than thelow noise amplifier 200, and the design complexity of thelow noise amplifier 400 is also less than thelow noise amplifier 200. - Compared to the single-ended input to differential-ended output
low noise amplifier 300 shown inFIG. 3 , thefirst transistor 402 of thelow noise amplifier 400 has the same common-source configuration with thefirst transistor 302 of thelow noise amplifier 300. Note that thefirst transistor 302 is a bipolar junction transistor, thereby, the configuration of thefirst transistor 302 is denoted as a common-emitter configuration. As a result, the high frequency matching of the gain and the noise figure of thelow noise amplifier 400 is more precise and less complex than thelow noise amplifier 300 shown inFIG. 3 . However, inFIG. 3 , the current flowing through thefirst transistor 302 is equal to the current flowing through thethird transistor 312, and the current flowing through thesecond transistor 306 is equal to the current flowing through thefourth transistor 314, thereby, the current utilized by thelow noise amplifier 300 is the sum of the currents flowing through thefirst transistor 302 and thesecond transistor 306. In thelow noise amplifier 400 of the present invention, the current flowing through thefirst transistor 402 is the sum of the currents flowing through thesecond transistor 414 and thethird transistor 420, thereby, the current flowing through thefirst transistor 402 is the current utilized by thelow noise amplifier 400. Under identical dc current level of low noise amplifier, thefirst transistor 402 of thelow noise amplifier 400 of the present invention has better noise figure and higher gain than thefirst transistor 302 of thelow noise amplifier 300. The phenomenon that results is because thefirst transistor 402 of thelow noise amplifier 400 loads more currents than thefirst transistor 302 of thenoise amplifier 300 under the same dc current level of low noise amplifier. Moreover, for the output signals of thelow noise amplifier 300, high frequency input signals are amplified by thefirst transistor 302, thesecond transistor 306, and thefourth transistor 314, thereby, the linearity of thelow noise amplifier 300 is much limited because of the limited voltage swing. On the contrary, the output signals of thelow noise amplifier 400 of the present invention are merely amplified by two stages of transistors, therefore, the linearity of thelow noise amplifier 400 is not limited as much as thelow noise amplifier 300. - Besides N-type metal oxide semiconductor field-effect transistors, the transistors utilized for implementing the low noise amplifier of the present invention may also be P-type metal oxide semiconductor field-effect transistors and bipolar junction transistors. The
low noise amplifier 400 shown inFIG. 4 is merely a preferred embodiment of the present invention. It means that replacing any elements of the low noise amplifier of the present invention is still within the range of the present invention. Additionally, the low noise amplifier of the present invention is not limited byFIG. 4 . The diagrams ofFIG. 5 ,FIG. 6 , andFIG. 7 illustrate other preferred embodiments of the present invention, and the embodiments merely replace some elements of thelow noise amplifier 400 shown inFIG. 4 . - Please refer to
FIG. 5 , which is a diagram of alow noise amplifier 500 implemented with P-type metal oxide semiconductor field-effect transistors of the present invention. Except for exchanging thedc voltage source 430 and the ground with each other and replacing the N-type metal oxide semiconductor field-effect transistors of thelow noise amplifier 400 with P-type metal oxide semiconductor field-effect transistors, the remaining disposition of thelow noise amplifier 500 is almost the same with thelow noise amplifier 400. It means that thetransistors low noise amplifier 400 are replaced withtransistors low noise amplifier 500. And thetransistors - Please refer to
FIG. 6 , which is a diagram of thelow noise amplifier 600 implemented with NPN bipolar junction transistors (NPN BJT). Except for replacing the N-type metal oxide semiconductor field-effect transistors of thelow noise amplifier 400 with NPN bipolarjunction transistors, the remaining disposition of thelow noise amplifier 600 is almost the same with thelow noise amplifier 400. It means that thetransistors low noise amplifier 400 are replaced with thetransistors transistors - Please refer to
FIG. 7 , which is a diagram of thelow noise amplifier 700 implemented with PNP bipolar junction transistors (PNP BJT). Except for exchanging thedc voltage source 430 and the ground with each other and replacing the N-type metal oxide semiconductor field-effect transistors of thelow noise amplifier 400 with PNP bipolar junction transistors, the remaining disposition of thelow noise amplifier 700 is almost the same with thelow noise amplifier 400. It means that thetransistors low noise amplifier 400 are replaced with thetransistors transistors - A single-ended input and differential-ended output low noise amplifier is implemented with cascode and cascade topologies in the present invention. Under the same dc power consumption and the same high frequency, the low noise amplifier of the present invention has the advantage of high gain and low noise figure. More particularly, under a high frequency, related properties of the low noise amplifier of the present invention are designed more precisely than prior art low noise amplifiers. The linearity of the low noise amplifier of the present invention is the same with some or better than prior art low noise amplifiers.
- Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims (20)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW095104956 | 2006-02-14 | ||
TW095104956A TWI340537B (en) | 2006-02-14 | 2006-02-14 | Single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology |
Publications (2)
Publication Number | Publication Date |
---|---|
US20070188238A1 true US20070188238A1 (en) | 2007-08-16 |
US7375590B2 US7375590B2 (en) | 2008-05-20 |
Family
ID=38367751
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/276,830 Active 2026-09-06 US7375590B2 (en) | 2006-02-14 | 2006-03-15 | Single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology |
Country Status (2)
Country | Link |
---|---|
US (1) | US7375590B2 (en) |
TW (1) | TWI340537B (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080139158A1 (en) * | 2006-12-06 | 2008-06-12 | Yuyu Chang | Method and system for a transformer-based high performance cross-coupled low noise amplifier |
US20130303091A1 (en) * | 2012-05-11 | 2013-11-14 | Electronics And Telecommunications Research Institute | Method and apparatus for transmitting and receiving high frequency |
US20160061866A1 (en) * | 2014-08-26 | 2016-03-03 | Intersil Americas LLC | Remote differential voltage sensing |
JP2017017558A (en) * | 2015-07-01 | 2017-01-19 | 日本電信電話株式会社 | amplifier |
US20170070197A1 (en) * | 2014-02-28 | 2017-03-09 | Telefonaktiebolaget Lm Ericsson (Publ) | Low noise amplifier circuit |
US11152905B2 (en) | 2019-09-04 | 2021-10-19 | Apple Inc. | Wideband amplifier circuit |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7746176B2 (en) * | 2005-02-09 | 2010-06-29 | St-Ericsson Sa | Receiver comprising an amplifier |
TWI335128B (en) * | 2006-03-01 | 2010-12-21 | Princeton Technology Corp | Single-end input to differential-ends output low noise amplifier |
US8742851B2 (en) * | 2012-05-31 | 2014-06-03 | The Regents Of The University Of California | CMOS linear differential distributed amplifier and distributed active balun |
EP3258597B1 (en) * | 2016-06-13 | 2020-07-29 | Intel IP Corporation | Amplification circuit, apparatus for amplifying, low noise amplifier, radio receiver, mobile terminal, base station, and method for amplifying |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5889432A (en) * | 1997-09-30 | 1999-03-30 | Samsung Electronics Co., Ltd. | Two-stage differential microwave amplifier with bias current sharing and automatic gain control |
US5945878A (en) * | 1998-02-17 | 1999-08-31 | Motorola, Inc. | Single-ended to differential converter |
US6608527B2 (en) * | 1999-10-21 | 2003-08-19 | Broadcom Corporation | Adaptive radio transceiver with low noise amplification |
US7099646B1 (en) * | 2004-01-27 | 2006-08-29 | Marvell International Ltd. | Signal mixer having a single-ended input and a differential output |
US7102437B2 (en) * | 2003-10-01 | 2006-09-05 | Zarlink Semiconductor Limited | Integrated circuit device |
-
2006
- 2006-02-14 TW TW095104956A patent/TWI340537B/en active
- 2006-03-15 US US11/276,830 patent/US7375590B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5889432A (en) * | 1997-09-30 | 1999-03-30 | Samsung Electronics Co., Ltd. | Two-stage differential microwave amplifier with bias current sharing and automatic gain control |
US5945878A (en) * | 1998-02-17 | 1999-08-31 | Motorola, Inc. | Single-ended to differential converter |
US6608527B2 (en) * | 1999-10-21 | 2003-08-19 | Broadcom Corporation | Adaptive radio transceiver with low noise amplification |
US7102437B2 (en) * | 2003-10-01 | 2006-09-05 | Zarlink Semiconductor Limited | Integrated circuit device |
US7099646B1 (en) * | 2004-01-27 | 2006-08-29 | Marvell International Ltd. | Signal mixer having a single-ended input and a differential output |
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080139158A1 (en) * | 2006-12-06 | 2008-06-12 | Yuyu Chang | Method and system for a transformer-based high performance cross-coupled low noise amplifier |
US8073417B2 (en) * | 2006-12-06 | 2011-12-06 | Broadcom Corporation | Method and system for a transformer-based high performance cross-coupled low noise amplifier |
US20130303091A1 (en) * | 2012-05-11 | 2013-11-14 | Electronics And Telecommunications Research Institute | Method and apparatus for transmitting and receiving high frequency |
US20170070197A1 (en) * | 2014-02-28 | 2017-03-09 | Telefonaktiebolaget Lm Ericsson (Publ) | Low noise amplifier circuit |
US9948248B2 (en) * | 2014-02-28 | 2018-04-17 | Telefonaktiebolaget Lm Ericsson (Publ) | Low noise amplifier circuit |
US10454431B2 (en) | 2014-02-28 | 2019-10-22 | Telefonaktiebolaget L M Ericsson (Publ) | Low noise amplifier circuit |
US11057005B2 (en) | 2014-02-28 | 2021-07-06 | Telefonaktiebolaget Lm Ericsson (Publ) | Low noise amplifier circuit |
US20160061866A1 (en) * | 2014-08-26 | 2016-03-03 | Intersil Americas LLC | Remote differential voltage sensing |
US10175272B2 (en) * | 2014-08-26 | 2019-01-08 | Intersil Americas LLC | Remote differential voltage sensing |
JP2017017558A (en) * | 2015-07-01 | 2017-01-19 | 日本電信電話株式会社 | amplifier |
US11152905B2 (en) | 2019-09-04 | 2021-10-19 | Apple Inc. | Wideband amplifier circuit |
Also Published As
Publication number | Publication date |
---|---|
US7375590B2 (en) | 2008-05-20 |
TW200731657A (en) | 2007-08-16 |
TWI340537B (en) | 2011-04-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7375590B2 (en) | Single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology | |
US9236841B2 (en) | Current-feedback operational amplifier | |
US8279003B2 (en) | Differential RF amplifier | |
US7193475B2 (en) | Single-ended input to differential output low noise amplifier with a cascode topology | |
JP5879547B2 (en) | Low noise amplifier with through mode | |
US7439805B1 (en) | Enhancement-depletion Darlington device | |
JP4220982B2 (en) | Distributed amplifier | |
US7692493B1 (en) | High-efficiency single to differential amplifier | |
US7642858B2 (en) | Active baluns | |
US8797100B2 (en) | Circuit unit, bias circuit with circuit unit and differential amplifier circuit with first and second circuit unit | |
US20150280672A1 (en) | Low noise amplifier and receiver | |
US20090261903A1 (en) | Variable gain rf amplifier | |
US11070176B2 (en) | Amplifier linearization and related apparatus thereof | |
KR101327551B1 (en) | Low noise amplifier | |
KR100804546B1 (en) | Linearity improved differential amplifier circuit | |
US5945880A (en) | Low noise amplifier | |
US6642787B1 (en) | Differential amplifier with two long-tailed pairs of transistors | |
CN100468955C (en) | Cascode and serial low-noise amplifier implemented by single-end input and differential output | |
JP2008103889A (en) | Low-noise amplifier | |
US20170111011A1 (en) | Balanced up-conversion mixer | |
US10199992B2 (en) | Wideband single-ended IM3 distortion nulling | |
US8736382B1 (en) | Low power wide-band amplifier with reused current | |
US6801090B1 (en) | High performance differential amplifier | |
JPH11205049A (en) | Parallel push-pull amplifier using complementary element | |
US7663443B2 (en) | Active balun circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: RICHWAVE TECHNOLOGY CORP., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SU, JIONG-GUANG;LIOU, TSYR-SHYANG;CHEN, JA-HAO;AND OTHERS;REEL/FRAME:017318/0767 Effective date: 20060314 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
MAFP | Maintenance fee payment |
Free format text: PAYMENT OF MAINTENANCE FEE, 12TH YR, SMALL ENTITY (ORIGINAL EVENT CODE: M2553); ENTITY STATUS OF PATENT OWNER: SMALL ENTITY Year of fee payment: 12 |