US20070270995A1 - Recessing trench to target depth using feed forward data - Google Patents
Recessing trench to target depth using feed forward data Download PDFInfo
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- US20070270995A1 US20070270995A1 US11/832,718 US83271807A US2007270995A1 US 20070270995 A1 US20070270995 A1 US 20070270995A1 US 83271807 A US83271807 A US 83271807A US 2007270995 A1 US2007270995 A1 US 2007270995A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the invention relates generally to semiconductor device fabrication, and more particularly, to recessing a material in a trench to a target depth.
- a common process in trench technology is filling a trench with a filling material and then recessing the filling material to a predetermined depth.
- an arsenic-doped glass (ASG) layer is deposited on a trench sidewall and the trench is filled with resist.
- the resist is then recessed to a predetermined depth to expose the ASG in the upper trench.
- the exposed ASG is then selectively removed to the resist in the lower trench.
- the resist is then removed from the trench, leaving ASG only on the lower trench sidewall.
- Arsenic in the ASG is then driven into the silicon substrate in a subsequent thermal process to form the buried plate—a heavily doped region in the substrate.
- One challenge in this process is precisely controlling the depth of the resist recess, which is critical to determining device characteristics such as trench capacitance and parasitic leakage current.
- One approach to this challenge includes a ‘send ahead’ technique in which a wafer from a lot is processed first and the recess depth is measured. The process for the rest of the wafers is then adjusted based on the measured depth from the ‘send ahead’ wafer.
- the ‘send ahead’ approach has a number of disadvantages. First, it is destructive because the resist recess of the send ahead wafer is traditionally measured by a scanning electron microscope (SEM), which requires the send ahead wafer to be cleaved (destroyed) for SEM analysis. This approach is prohibitively costly.
- SEM scanning electron microscope
- the ‘send ahead’ approach is time-consuming. When a lot gets to the recess process, a send ahead wafer has to be split from the lot and processed first and the process is adjusted based on the send ahead. The turn-around-time for this send ahead approach may take several hours. Third, the process delay between the send ahead and the lot adds process variation since a condition of the recess chamber from which the send ahead wafer is pulled may change when the lot is processed. Fourth, the send ahead approach is not compatible with the currently automated 300 mm process because it requires dedicated manpower to take the send ahead wafer out of the lot, deliver it to SEM lab, and analyze the recess depth after the SEM is completed.
- the send ahead approach cannot accommodate incoming wafer-to-wafer variations such as variations of trench profile and the filling characteristics.
- the possible chamber condition change aggravates this situation. All these variations cause the recess depth variation from wafer to wafer.
- the process is adjusted only once and then all wafers are processed with the same process setup. Accordingly, process adjustment to accommodate the above variation on each wafer is impossible using the send ahead approach.
- a method includes providing a region on a wafer including a trench area that includes a trench and a field area that is free of any trench, and a material applied over the region so as to fill the trench in the trench area and form a step between the trench area and the field area; etching to partially etch the trench; determining a target etch duration (t D ) for etching to the target depth (D T ); and etching the trench to the target depth (D T ) for a period approximately equal to the target etch duration (t D ).
- the target etch duration t D may be fed forward for recessing another trench to the target depth D T .
- the method does not require a send ahead wafer, is fully compatible with conventional automated processes and provides in-situ etch time correction to each wafer.
- a first aspect of the invention provides a method of recessing a trench to a target depth (D T ), the method comprising the steps of: providing a region on a wafer including a trench area including a trench and a field area that is free of any trench, a material applied over the region so as to fill the trench in the trench area and form a step between the trench area and the field area; first etching the material until a surface of the wafer in the trench area is exposed; second etching the material until the surface of the wafer in the field area is exposed; determining a target etch duration (t D ) for a third etching for recessing the trench to the target depth; and third etching the trench to the target depth (D T ) for a period approximately equal to the target etch duration (t D ).
- a second aspect of the invention provides an etching system for recessing a trench to a target depth (D T ), the system comprising: an etching chamber for etching a region on a wafer including a trench area including at least one trench and a field area that is free of any trench, a material applied over the region so as to fill the at least one trench in the trench area and form a step between the trench area and the field area; wherein the etching includes first etching the material until a surface of the wafer in the trench area is exposed, and second etching the material until the surface of the wafer in the field area is exposed; a determinator for determining a target etch duration (t D ) for a third etching for recessing the at least one trench to the target depth; and a communicator for feeding forward the target etch duration (t D ) for the third etching for recessing another trench to the target depth (D T ).
- a third aspect of the invention provides a program product stored on a computer-readable medium, which when executed, controls recessing of a trench to a target depth (D T ), the program product comprising: program code for controlling etching of a region on a wafer including a trench area including at least one trench and a field area that is free of any trench, a material applied over the region so as to fill the at least one trench in the trench area and form a step between the trench area and the field area; wherein the etching includes first etching the material until a surface of the wafer in the trench area is exposed and second etching the material until the surface of the wafer in the field area is exposed; program code for determining a target etch duration (t D ) for a third etching for recessing the at least one trench to the target depth; and program code for feeding forward the target etch duration (t D ) for the third etching for recessing at least one trench to a target etch depth (D T ).
- FIG. 1 shows an etching system for recessing a trench to a target depth (D T ) using feed forward of data according to one embodiment of the invention.
- FIGS. 2-5 show stages of etching according to one embodiment of the invention.
- FIG. 6 shows an endpoint trace according to one embodiment of the invention.
- FIG. 1 shows one embodiment of an etching system 10 for recessing a trench to a target depth (D T ) using feed forward of data according to the invention.
- Etching system 10 includes an etching chamber 12 for etching a region 14 on a wafer 16 .
- Etching chamber 12 may include any now known or later developed structures for etching material on wafer 16 , e.g., wet etching structure, plasma etching structure, chemical downstream etching structure, reaction ion etching structure, etc.
- region 14 includes a trench area 20 including at least one trench 22 and a field area 24 that is free of any trench.
- a material 26 is applied over region 14 so as to fill at least one trench 22 in trench area 20 and form a step 28 between trench area 20 and field area 24 .
- material 26 may include a photoresist or any other material now known or later developed for use in filling a trench.
- Wafer 16 may also include a pad layer 29 of, for example, silicon nitride with an underlying silicon dioxide.
- etching system 10 also may include an etch controller system 30 for controlling recessing of a trench according to the invention.
- Etching system 10 may access a measurer 32 such as an atomic force microscope (AFM) for measuring a height H s of step 28 ( FIG. 2 ).
- Etch controller system 30 may include a computer infrastructure 102 that can perform the various process steps described herein, inter alia, for recessing a trench to a target depth (D T ).
- computer infrastructure 102 is shown including a computing device 104 that comprises an etch controller 106 , which enables computing device 104 to control the process steps of the invention.
- Computing device 104 is shown including a memory 112 , a processor unit (PU) 114 , an input/output (I/O) interface 116 , and a bus 118 . Further, computing device 104 is shown in communication with an external I/O device/resource 120 and a storage system 122 .
- processor unit 114 executes computer program code, such as etch controller 106 , which is stored in memory 112 and/or storage system 122 . While executing computer program code, processor 114 can read and/or write data, such as etching parameter data, to/from memory 112 , storage system 122 , and/or I/O interface 116 .
- Bus 118 provides a communications link between each of the components in computing device 104 .
- I/O device 120 can comprise any device that enables a user to interact with computing device 104 or any device that enables computing device 104 to communicate with one or more other computing devices.
- computing device 104 can comprise any general purpose computing article of manufacture capable of executing computer program code installed by a user (e.g., a personal computer, server, handheld device, etc.).
- computing device 104 and etch controller 106 are only representative of various possible equivalent computing devices that may perform the various process steps of the invention.
- computing device 104 and etch controller 106 can comprise any specific purpose computing article of manufacture comprising hardware and/or computer program code for performing specific functions, any computing article of manufacture that comprises a combination of specific purpose and general purpose hardware/software, or the like.
- the program code and hardware can be created using standard programming and engineering techniques, respectively.
- computer infrastructure 102 is only illustrative of various types of computer infrastructures for implementing the invention.
- computer infrastructure 102 comprises two or more computing devices (e.g., a server cluster) that communicate over any type of wired and/or wireless communications link, such as a network, a shared memory, or the like, to perform the various process steps of the invention.
- the communications link comprises a network
- the network can comprise any combination of one or more types of networks (e.g., the Internet, a wide area network, a local area network, a virtual private network, etc.).
- communications between the computing devices may utilize any combination of various types of transmission techniques.
- etch controller 106 enables computing infrastructure 102 to control recessing of a trench to a target depth D T .
- etch controller 106 is shown including: conventional etch parameter controller 130 , a determinator 132 for determining a target etch duration td for recessing the trench to target depth D T , a communicator 134 for feeding forward target etch duration t D for recessing another trench to target depth D T , and a recorder 136 for recording an etch duration t of a predetermined part of an etching process. Operation of each of the above-described systems is discussed further below. However, it is understood that some of the various systems shown in FIG.
- etch parameter controller 130 may include any functionality known to those skilled in the art as being provided with a conventional etch system for controlling etching of region 14 . Operational structure of etch chamber 12 has not been illustrated for clarity.
- region 14 on wafer 16 including trench area 20 having at least one trench 22 , and field area 24 that is free of any trench 22 is provided.
- trench area 20 includes an array of trenches, but this is not necessary.
- material 26 e.g., a photoresist or other fill material, is applied over region 14 so as to fill at least one trench 22 in trench area 20 and form step 28 between trench area 20 and field area 24 .
- Step 28 has a height H s that can be measured by a profilometer such as an atomic force microscope (AFM).
- wafer 16 may include a pad layer 29 which may include a silicon nitride and an underlying silicon dioxide.
- FIGS. 2-5 show various stages of etching at least one trench 22 .
- the type of etching conducted e.g., reactive ion etching, wet etching, plasma etching, downstream etching, etc., is not described in detail herein because it varies depending on the material being etched and is within the purview of one with skill in the art.
- recorder 136 may record durations of the different stages and/or generate an endpoint trace 150 of the etching. That is, recorder 136 may perform endpoint tracing and monitor the trace of the etching stages to determine an endpoint of each etching stage.
- an “endpoint trace” can be generated by monitoring the trace of emissions from a reactive species or volatile product using optical emission during etching, which changes as different materials are etched.
- a change in endpoint trace 150 indicates a change in materials that are being etched, and hence different stages of the etching, the durations of which can be determined readily from endpoint trace 150 .
- a first dip 152 indicates that the etching has reached pad layer 29 in trench area 20 , as shown in FIG. 3 .
- First dip 152 may be caused by all resist material 26 in trench area 20 above pad layer 29 being removed and pad layer 29 being exposed.
- a first etching 160 shown in FIG. 3 , material 26 is etched until a surface 162 of wafer 16 in trench area 20 , e.g., pad layer 29 , is exposed.
- Recorder 136 ( FIG. 1 ) may record that etching 160 has an etch rate R 0 and a duration t 0 , as indicated in FIG. 6 . That is, recorder 136 may monitor endpoint trace 150 of first etching 160 to determine an endpoint of the etching step.
- a next stage of etching 164 includes etching material 26 until a surface 166 of wafer 16 in field area 24 is exposed.
- trench(es) 22 are etched to a first depth D 1 , which is less than target depth D T .
- recorder 136 may record that etching 164 has an etch rate R 1 in trench area 20 and an etch rate R F in field area 24 and a duration t 1 , i.e., recorder 136 may monitor endpoint trace 150 of second etching 164 to determine an endpoint of the etching step.
- a next step of the method includes determinator 132 ( FIG. 1 ) determining a target etch duration t D for etching 168 ( FIG. 5 ) for recessing trench(es) 22 to target depth D T .
- etching 168 recesses material 26 (now only in trench(es) 22 ) until target depth D T is achieved in trench(es) 22 .
- recorder 136 FIG.
- etching 168 may record that etching 168 has an etch rate R 2 in trench area 20 and a duration t 2 .
- etch rate R 2 may be greater than etch rate R 1 in trench area 20 at the same etching conditions because of the absence of material 26 in field area 24 .
- All etch rates can be predetermined based on conventional techniques, e.g., based on known etch rates of known etch chemistries.
- target etch duration t D corresponds to etch duration t 2 in FIG. 6 .
- t 1 is the duration of etching 160 ( FIG. 3 )
- R 1 is the etch rate of trench area 20 during etching 164 ( FIG. 4 )
- R 2 is the etch rate of trench area 24 during etching 168 ( FIG. 5 ).
- first depth D 1 R 1 t 1
- second depth D 2 R 2 t 2 , where t D and t 2 are equivalent
- D T D 1 +D 2 .
- H s is the height of step 28 ( FIG. 2 )
- R 1 is the etch rate of trench area 20 during etching 164 ( FIG. 4 )
- R 2 is the etch rate of trench area 20 during etching 168 ( FIG. 5 )
- R F is the etch rate of field area 24 during etching 168 ( FIG. 5 ).
- first depth D 1 R 1 t 1
- second depth D 2 R 2 t 2
- step height H s R F t 1 where t D and t 2 are equivalent
- D T D 1 +D 2 .
- This embodiment requires measurer 32 ( FIG. 1 ) to measure height H s of step 28 ( FIG. 2 ), but it does not require information from the endpoint trace as all variables for calculating t D based on equation (2) are known.
- a final step includes etching 168 ( FIG. 5 ) in trench(es) 22 to target depth (D T ) for a period approximately equal to target etch duration (t D ).
- This step may also include communicator 134 feeding forward target etch duration t D for etching 168 ( FIG. 5 ) for recessing the same trench or another trench in wafer 16 or another wafer 170 ( FIG. 1 ) to target depth D T .
- the implementation of communicator 134 may vary depending on the environment.
- communicator 134 may simply be an internal recordation for use in etching other regions of wafer 16 in etch chamber 12 , or it may include some form of communication mechanism, e.g., a network, for feed forwarding data to other etch chambers (not shown).
- communicator 134 may simply be an internal recordation for use in etching other regions of wafer 16 in etch chamber 12 , or it may include some form of communication mechanism, e.g., a network, for feed forwarding data to other etch chambers (not shown).
- the invention provides a computer-readable medium that includes computer program code to enable a computer infrastructure to control recessing of a trench to target depth D T using feed forward of data.
- the computer-readable medium includes program code, such as etch controller 106 ( FIG. 2 ), which implements each of the various process steps of the invention.
- program code such as etch controller 106 ( FIG. 2 )
- the term “computer-readable medium” comprises one or more of any type of physical embodiment of the program code.
- the computer-readable medium can comprise program code embodied on one or more portable storage articles of manufacture (e.g., a compact disc, a magnetic disk, a tape, etc.), on one or more data storage portions of a computing device, such as memory 112 ( FIG. 2 ) and/or storage system 122 ( FIG. 2 ) (e.g., a fixed disk, a read-only memory, a random access memory, a cache memory, etc.), and/or as a data signal traveling over a network (e.g., during a wired/wireless electronic distribution of the program code).
- portable storage articles of manufacture e.g., a compact disc, a magnetic disk, a tape, etc.
- data storage portions of a computing device such as memory 112 ( FIG. 2 ) and/or storage system 122 ( FIG. 2 ) (e.g., a fixed disk, a read-only memory, a random access memory, a cache memory, etc.)
- a data signal traveling over a network
- the invention provides a business method that performs the process steps of the invention on a subscription, advertising, and/or fee basis. That is, a service provider, such as an Application Service Provider, could offer to control recessing a trench to a target depth (D T ) using feed forward of data on a remote etch chamber 12 ( FIG. 1 ), as described above.
- the service provider can manage (e.g., create, maintain, support, etc.) a computer infrastructure, such as computer infrastructure 102 ( FIG. 1 ), that performs the process steps of the invention for one or more customers.
- the service provider can receive payment from the customer(s) under a subscription and/or fee agreement and/or the service provider can receive payment from the sale of advertising space to one or more third parties.
- the invention provides a method of generating a system for controlling recessing a trench to a target depth (D T ) using feed forward of data.
- a computer infrastructure such as computer infrastructure 102 ( FIG. 1 )
- one or more systems for performing the process steps of the invention can be obtained (e.g., created, purchased, used, modified, etc.) and deployed to the computer infrastructure.
- the deployment of each system can comprise one or more of (1) installing program code on a computing device, such as computing device 104 ( FIG. 1 ), from a computer-readable medium; (2) adding one or more computing devices to the computer infrastructure; and (3) incorporating and/or modifying one or more existing systems of the computer infrastructure, to enable the computer infrastructure to perform the process steps of the invention.
- program code and “computer program code” are synonymous and mean any expression, in any language, code or notation, of a set of instructions intended to cause a computing device having an information processing capability to perform a particular function either directly or after any combination of the following: (a) conversion to another language, code or notation; (b) reproduction in a different material form; and/or (c) decompression.
- program code can be embodied as one or more types of program products, such as an application/software program, component software/a library of functions, an operating system, a basic I/O system/driver for a particular computing and/or I/O device, and the like
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Abstract
Description
- 1. Technical Field
- The invention relates generally to semiconductor device fabrication, and more particularly, to recessing a material in a trench to a target depth.
- 2. Background Art
- A common process in trench technology is filling a trench with a filling material and then recessing the filling material to a predetermined depth. For example, to form a buried plate of a trench capacitor, an arsenic-doped glass (ASG) layer is deposited on a trench sidewall and the trench is filled with resist. The resist is then recessed to a predetermined depth to expose the ASG in the upper trench. The exposed ASG is then selectively removed to the resist in the lower trench. The resist is then removed from the trench, leaving ASG only on the lower trench sidewall. Arsenic in the ASG is then driven into the silicon substrate in a subsequent thermal process to form the buried plate—a heavily doped region in the substrate.
- One challenge in this process is precisely controlling the depth of the resist recess, which is critical to determining device characteristics such as trench capacitance and parasitic leakage current. One approach to this challenge includes a ‘send ahead’ technique in which a wafer from a lot is processed first and the recess depth is measured. The process for the rest of the wafers is then adjusted based on the measured depth from the ‘send ahead’ wafer. The ‘send ahead’ approach has a number of disadvantages. First, it is destructive because the resist recess of the send ahead wafer is traditionally measured by a scanning electron microscope (SEM), which requires the send ahead wafer to be cleaved (destroyed) for SEM analysis. This approach is prohibitively costly. Second, the ‘send ahead’ approach is time-consuming. When a lot gets to the recess process, a send ahead wafer has to be split from the lot and processed first and the process is adjusted based on the send ahead. The turn-around-time for this send ahead approach may take several hours. Third, the process delay between the send ahead and the lot adds process variation since a condition of the recess chamber from which the send ahead wafer is pulled may change when the lot is processed. Fourth, the send ahead approach is not compatible with the currently automated 300 mm process because it requires dedicated manpower to take the send ahead wafer out of the lot, deliver it to SEM lab, and analyze the recess depth after the SEM is completed. Finally, the send ahead approach cannot accommodate incoming wafer-to-wafer variations such as variations of trench profile and the filling characteristics. The possible chamber condition change aggravates this situation. All these variations cause the recess depth variation from wafer to wafer. With the send ahead approach, the process is adjusted only once and then all wafers are processed with the same process setup. Accordingly, process adjustment to accommodate the above variation on each wafer is impossible using the send ahead approach.
- Therefore, a simple process with precise recess control but without send ahead is desired.
- Recessing a trench using feed forward data is disclosed. In one embodiment, a method includes providing a region on a wafer including a trench area that includes a trench and a field area that is free of any trench, and a material applied over the region so as to fill the trench in the trench area and form a step between the trench area and the field area; etching to partially etch the trench; determining a target etch duration (tD) for etching to the target depth (DT); and etching the trench to the target depth (DT) for a period approximately equal to the target etch duration (tD). The target etch duration tD may be fed forward for recessing another trench to the target depth DT. The method does not require a send ahead wafer, is fully compatible with conventional automated processes and provides in-situ etch time correction to each wafer.
- A first aspect of the invention provides a method of recessing a trench to a target depth (DT), the method comprising the steps of: providing a region on a wafer including a trench area including a trench and a field area that is free of any trench, a material applied over the region so as to fill the trench in the trench area and form a step between the trench area and the field area; first etching the material until a surface of the wafer in the trench area is exposed; second etching the material until the surface of the wafer in the field area is exposed; determining a target etch duration (tD) for a third etching for recessing the trench to the target depth; and third etching the trench to the target depth (DT) for a period approximately equal to the target etch duration (tD).
- A second aspect of the invention provides an etching system for recessing a trench to a target depth (DT), the system comprising: an etching chamber for etching a region on a wafer including a trench area including at least one trench and a field area that is free of any trench, a material applied over the region so as to fill the at least one trench in the trench area and form a step between the trench area and the field area; wherein the etching includes first etching the material until a surface of the wafer in the trench area is exposed, and second etching the material until the surface of the wafer in the field area is exposed; a determinator for determining a target etch duration (tD) for a third etching for recessing the at least one trench to the target depth; and a communicator for feeding forward the target etch duration (tD) for the third etching for recessing another trench to the target depth (DT).
- A third aspect of the invention provides a program product stored on a computer-readable medium, which when executed, controls recessing of a trench to a target depth (DT), the program product comprising: program code for controlling etching of a region on a wafer including a trench area including at least one trench and a field area that is free of any trench, a material applied over the region so as to fill the at least one trench in the trench area and form a step between the trench area and the field area; wherein the etching includes first etching the material until a surface of the wafer in the trench area is exposed and second etching the material until the surface of the wafer in the field area is exposed; program code for determining a target etch duration (tD) for a third etching for recessing the at least one trench to the target depth; and program code for feeding forward the target etch duration (tD) for the third etching for recessing at least one trench to a target etch depth (DT).
- The illustrative aspects of the present invention are designed to solve the problems herein described and/or other problems not discussed.
- These and other features of this invention will be more readily understood from the following detailed description of the various aspects of the invention taken in conjunction with the accompanying drawings that depict various embodiments of the invention, in which:
-
FIG. 1 shows an etching system for recessing a trench to a target depth (DT) using feed forward of data according to one embodiment of the invention. -
FIGS. 2-5 show stages of etching according to one embodiment of the invention. -
FIG. 6 shows an endpoint trace according to one embodiment of the invention. - It is noted that the drawings of the invention are not to scale. The drawings are intended to depict only typical aspects of the invention, and therefore should not be considered as limiting the scope of the invention. In the drawings, like numbering represents like elements between the drawings.
- Turning to the drawings,
FIG. 1 shows one embodiment of anetching system 10 for recessing a trench to a target depth (DT) using feed forward of data according to the invention.Etching system 10 includes anetching chamber 12 for etching aregion 14 on awafer 16.Etching chamber 12 may include any now known or later developed structures for etching material onwafer 16, e.g., wet etching structure, plasma etching structure, chemical downstream etching structure, reaction ion etching structure, etc. As shown inFIG. 2 ,region 14 includes atrench area 20 including at least onetrench 22 and afield area 24 that is free of any trench. Amaterial 26 is applied overregion 14 so as to fill at least onetrench 22 intrench area 20 and form astep 28 betweentrench area 20 andfield area 24. In one embodiment,material 26 may include a photoresist or any other material now known or later developed for use in filling a trench. Wafer 16 may also include apad layer 29 of, for example, silicon nitride with an underlying silicon dioxide. - As is described in greater detail herein, and as shown in
FIG. 1 ,etching system 10 also may include anetch controller system 30 for controlling recessing of a trench according to the invention.Etching system 10 may access ameasurer 32 such as an atomic force microscope (AFM) for measuring a height Hs of step 28 (FIG. 2 ).Etch controller system 30 may include acomputer infrastructure 102 that can perform the various process steps described herein, inter alia, for recessing a trench to a target depth (DT). In particular,computer infrastructure 102 is shown including acomputing device 104 that comprises anetch controller 106, which enablescomputing device 104 to control the process steps of the invention. -
Computing device 104 is shown including amemory 112, a processor unit (PU) 114, an input/output (I/O)interface 116, and abus 118. Further,computing device 104 is shown in communication with an external I/O device/resource 120 and astorage system 122. As is known in the art, in general,processor unit 114 executes computer program code, such asetch controller 106, which is stored inmemory 112 and/orstorage system 122. While executing computer program code,processor 114 can read and/or write data, such as etching parameter data, to/frommemory 112,storage system 122, and/or I/O interface 116.Bus 118 provides a communications link between each of the components incomputing device 104. I/O device 120 can comprise any device that enables a user to interact withcomputing device 104 or any device that enablescomputing device 104 to communicate with one or more other computing devices. - In any event,
computing device 104 can comprise any general purpose computing article of manufacture capable of executing computer program code installed by a user (e.g., a personal computer, server, handheld device, etc.). However, it is understood thatcomputing device 104 and etchcontroller 106 are only representative of various possible equivalent computing devices that may perform the various process steps of the invention. To this extent, in other embodiments,computing device 104 and etchcontroller 106 can comprise any specific purpose computing article of manufacture comprising hardware and/or computer program code for performing specific functions, any computing article of manufacture that comprises a combination of specific purpose and general purpose hardware/software, or the like. In each case, the program code and hardware can be created using standard programming and engineering techniques, respectively. - Similarly,
computer infrastructure 102 is only illustrative of various types of computer infrastructures for implementing the invention. For example, in one embodiment,computer infrastructure 102 comprises two or more computing devices (e.g., a server cluster) that communicate over any type of wired and/or wireless communications link, such as a network, a shared memory, or the like, to perform the various process steps of the invention. When the communications link comprises a network, the network can comprise any combination of one or more types of networks (e.g., the Internet, a wide area network, a local area network, a virtual private network, etc.). Regardless, communications between the computing devices may utilize any combination of various types of transmission techniques. - As previously mentioned and discussed further below, etch
controller 106 enablescomputing infrastructure 102 to control recessing of a trench to a target depth DT. To this extent, etchcontroller 106 is shown including: conventional etch parameter controller 130, adeterminator 132 for determining a target etch duration td for recessing the trench to target depth DT, acommunicator 134 for feeding forward target etch duration tD for recessing another trench to target depth DT, and arecorder 136 for recording an etch duration t of a predetermined part of an etching process. Operation of each of the above-described systems is discussed further below. However, it is understood that some of the various systems shown inFIG. 1 can be implemented independently, combined, and/or stored in memory for one or more separate computing devices that are included incomputer infrastructure 102. Further, it is understood that some of the systems and/or functionality may not be implemented, or additional systems and/or functionality may be included as part of the environment ofetching system 10. Conventional etch parameter controller 130 may include any functionality known to those skilled in the art as being provided with a conventional etch system for controlling etching ofregion 14. Operational structure ofetch chamber 12 has not been illustrated for clarity. - Turning to
FIGS. 2-6 , various embodiments of a method of recessing a trench to target depth DT using feed forward of data and etchcontroller system 30 will now be described. In a first step, as shown inFIG. 2 ,region 14 onwafer 16 includingtrench area 20 having at least onetrench 22, andfield area 24 that is free of anytrench 22, is provided. In one embodiment,trench area 20 includes an array of trenches, but this is not necessary. In addition,material 26, e.g., a photoresist or other fill material, is applied overregion 14 so as to fill at least onetrench 22 intrench area 20 andform step 28 betweentrench area 20 andfield area 24.Step 28 has a height Hs that can be measured by a profilometer such as an atomic force microscope (AFM). In one embodiment,wafer 16 may include apad layer 29 which may include a silicon nitride and an underlying silicon dioxide. -
FIGS. 2-5 show various stages of etching at least onetrench 22. The type of etching conducted, e.g., reactive ion etching, wet etching, plasma etching, downstream etching, etc., is not described in detail herein because it varies depending on the material being etched and is within the purview of one with skill in the art. As shown inFIG. 6 , as the etching stages proceed, recorder 136 (FIG. 1 ) may record durations of the different stages and/or generate anendpoint trace 150 of the etching. That is,recorder 136 may perform endpoint tracing and monitor the trace of the etching stages to determine an endpoint of each etching stage. As known in the art, an “endpoint trace” can be generated by monitoring the trace of emissions from a reactive species or volatile product using optical emission during etching, which changes as different materials are etched. A change inendpoint trace 150 indicates a change in materials that are being etched, and hence different stages of the etching, the durations of which can be determined readily fromendpoint trace 150. For example, inFIG. 6 , afirst dip 152 indicates that the etching has reachedpad layer 29 intrench area 20, as shown inFIG. 3 .First dip 152 may be caused by all resistmaterial 26 intrench area 20 abovepad layer 29 being removed andpad layer 29 being exposed. - In a
first etching 160, shown inFIG. 3 ,material 26 is etched until asurface 162 ofwafer 16 intrench area 20, e.g.,pad layer 29, is exposed. Recorder 136 (FIG. 1 ) may record that etching 160 has an etch rate R0 and a duration t0, as indicated inFIG. 6 . That is,recorder 136 may monitorendpoint trace 150 offirst etching 160 to determine an endpoint of the etching step. As shown inFIG. 4 , a next stage ofetching 164 includesetching material 26 until asurface 166 ofwafer 16 infield area 24 is exposed. Simultaneously, trench(es) 22 are etched to a first depth D1, which is less than target depth DT. As indicated inFIG. 6 , recorder 136 (FIG. 1 ) may record that etching 164 has an etch rate R1 intrench area 20 and an etch rate RF infield area 24 and a duration t1, i.e.,recorder 136 may monitorendpoint trace 150 ofsecond etching 164 to determine an endpoint of the etching step. - A next step of the method includes determinator 132 (
FIG. 1 ) determining a target etch duration tD for etching 168 (FIG. 5 ) for recessing trench(es) 22 to target depth DT. As shown inFIG. 5 , etching 168 recesses material 26 (now only in trench(es) 22) until target depth DT is achieved in trench(es) 22. Target depth DT is the sum of first depth D1 and a second depth D2, the latter achieved by etching 168, i.e., DT=D1+D2. As indicated inFIG. 6 , recorder 136 (FIG. 1 ) may record that etching 168 has an etch rate R2 intrench area 20 and a duration t2. Note that etch rate R2 may be greater than etch rate R1 intrench area 20 at the same etching conditions because of the absence ofmaterial 26 infield area 24. All etch rates can be predetermined based on conventional techniques, e.g., based on known etch rates of known etch chemistries. Note that target etch duration tD corresponds to etch duration t2 inFIG. 6 . In a first embodiment,determinator 132 may determine target etch duration tD according to the following equation:
t D=(D T −R 1 t 1)/R 2 (1) - As noted above, t1 is the duration of etching 160 (
FIG. 3 ), R1 is the etch rate oftrench area 20 during etching 164 (FIG. 4 ) and R2 is the etch rate oftrench area 24 during etching 168 (FIG. 5 ). The above equation is derived from the knowledge that first depth D1=R1t1, second depth D2=R2t2, where tD and t2 are equivalent, and DT=D1+D2. - In another embodiment, determinator 132 (
FIG. 1 ) determines target etch duration tD according to the following equation:
t D=(D T −H s R 1 /R F)/R 2 (2) - As noted above, Hs is the height of step 28 (
FIG. 2 ), R1 is the etch rate oftrench area 20 during etching 164 (FIG. 4 ), R2 is the etch rate oftrench area 20 during etching 168 (FIG. 5 ) and RF is the etch rate offield area 24 during etching 168 (FIG. 5 ). The above equation is derived from the knowledge that first depth D1=R1t1, second depth D2=R2t2, step height Hs=RFt1 where tD and t2 are equivalent, and DT=D1+D2. This embodiment requires measurer 32 (FIG. 1 ) to measure height Hs of step 28 (FIG. 2 ), but it does not require information from the endpoint trace as all variables for calculating tD based on equation (2) are known. - A final step includes etching 168 (
FIG. 5 ) in trench(es) 22 to target depth (DT) for a period approximately equal to target etch duration (tD). This step may also includecommunicator 134 feeding forward target etch duration tD for etching 168 (FIG. 5 ) for recessing the same trench or another trench inwafer 16 or another wafer 170 (FIG. 1 ) to target depth DT. The implementation ofcommunicator 134 may vary depending on the environment. For example,communicator 134 may simply be an internal recordation for use in etching other regions ofwafer 16 inetch chamber 12, or it may include some form of communication mechanism, e.g., a network, for feed forwarding data to other etch chambers (not shown). - It is understood that the order of the above-described steps is only illustrative. To this extent, one or more steps can be performed in parallel, in a different order, at a remote time, etc. Further, one or more of the steps may not be performed in various embodiments of the invention.
- While shown and described herein as a method and system for recessing a trench to a target depth DT using feed forward of data, it is understood that the invention further provides various alternative embodiments. For example, in one embodiment, the invention provides a computer-readable medium that includes computer program code to enable a computer infrastructure to control recessing of a trench to target depth DT using feed forward of data. To this extent, the computer-readable medium includes program code, such as etch controller 106 (
FIG. 2 ), which implements each of the various process steps of the invention. It is understood that the term “computer-readable medium” comprises one or more of any type of physical embodiment of the program code. In particular, the computer-readable medium can comprise program code embodied on one or more portable storage articles of manufacture (e.g., a compact disc, a magnetic disk, a tape, etc.), on one or more data storage portions of a computing device, such as memory 112 (FIG. 2 ) and/or storage system 122 (FIG. 2 ) (e.g., a fixed disk, a read-only memory, a random access memory, a cache memory, etc.), and/or as a data signal traveling over a network (e.g., during a wired/wireless electronic distribution of the program code). - In another embodiment, the invention provides a business method that performs the process steps of the invention on a subscription, advertising, and/or fee basis. That is, a service provider, such as an Application Service Provider, could offer to control recessing a trench to a target depth (DT) using feed forward of data on a remote etch chamber 12 (
FIG. 1 ), as described above. In this case, the service provider can manage (e.g., create, maintain, support, etc.) a computer infrastructure, such as computer infrastructure 102 (FIG. 1 ), that performs the process steps of the invention for one or more customers. In return, the service provider can receive payment from the customer(s) under a subscription and/or fee agreement and/or the service provider can receive payment from the sale of advertising space to one or more third parties. - In still another embodiment, the invention provides a method of generating a system for controlling recessing a trench to a target depth (DT) using feed forward of data. In this case, a computer infrastructure, such as computer infrastructure 102 (
FIG. 1 ), can be obtained (e.g., created, maintained, having made available to, etc.) and one or more systems for performing the process steps of the invention can be obtained (e.g., created, purchased, used, modified, etc.) and deployed to the computer infrastructure. To this extent, the deployment of each system can comprise one or more of (1) installing program code on a computing device, such as computing device 104 (FIG. 1 ), from a computer-readable medium; (2) adding one or more computing devices to the computer infrastructure; and (3) incorporating and/or modifying one or more existing systems of the computer infrastructure, to enable the computer infrastructure to perform the process steps of the invention. - As used herein, it is understood that the terms “program code” and “computer program code” are synonymous and mean any expression, in any language, code or notation, of a set of instructions intended to cause a computing device having an information processing capability to perform a particular function either directly or after any combination of the following: (a) conversion to another language, code or notation; (b) reproduction in a different material form; and/or (c) decompression. To this extent, program code can be embodied as one or more types of program products, such as an application/software program, component software/a library of functions, an operating system, a basic I/O system/driver for a particular computing and/or I/O device, and the like
- The foregoing description of various aspects of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed, and obviously, many modifications and variations are possible. Such modifications and variations that may be apparent to a person skilled in the art are intended to be included within the scope of the invention as defined by the accompanying claims.
Claims (12)
t D=(D T −R 1 t 1)/R 2,
t D=(D T −H s R 1 /R F)/R2,
t D=(D T −R 1 t 1)/R 2,
t D=(D T −H s R 1/R F)/R 2,
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US11/832,718 US20070270995A1 (en) | 2006-03-21 | 2007-08-02 | Recessing trench to target depth using feed forward data |
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US11/308,394 US7375034B2 (en) | 2006-03-21 | 2006-03-21 | Recessing trench to target depth using feed forward data |
US11/832,718 US20070270995A1 (en) | 2006-03-21 | 2007-08-02 | Recessing trench to target depth using feed forward data |
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US11/832,718 Abandoned US20070270995A1 (en) | 2006-03-21 | 2007-08-02 | Recessing trench to target depth using feed forward data |
US12/044,145 Expired - Fee Related US7713880B2 (en) | 2006-03-21 | 2008-03-07 | Recessing trench to target depth using feed forward data |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI611478B (en) * | 2013-02-04 | 2018-01-11 | 蘭姆研究公司 | Controlling cd and cd uniformity with trim time and temperature on a wafer by wafer basis |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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US7375034B2 (en) * | 2006-03-21 | 2008-05-20 | International Business Machines Corporation | Recessing trench to target depth using feed forward data |
US7795045B2 (en) * | 2008-02-13 | 2010-09-14 | Icemos Technology Ltd. | Trench depth monitor for semiconductor manufacturing |
JP6504915B2 (en) * | 2015-05-25 | 2019-04-24 | 株式会社日立ハイテクノロジーズ | Plasma processing apparatus and plasma processing method |
US9768084B1 (en) * | 2016-03-21 | 2017-09-19 | Globalfoundries Inc. | Inline monitoring of transistor-to-transistor critical dimension |
CN111766013B (en) * | 2020-07-09 | 2021-11-30 | 苏州大观信息技术有限公司 | Intelligent vacuum meter, vacuum pressure intelligent monitoring system and monitoring method |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6173358B1 (en) * | 1993-12-16 | 2001-01-09 | International Business Machines Corporation | Computer system having dual bus architecture with audio/video/CD drive controller/coprocessor having integral bus arbitrator |
US20020039143A1 (en) * | 2000-10-02 | 2002-04-04 | Mega Chips Corporation | Image processing circuit |
US20020041554A1 (en) * | 2000-08-09 | 2002-04-11 | Yuji Kitamura | Information processing system for holding number of times of record restarting |
US20020048241A1 (en) * | 2000-09-04 | 2002-04-25 | Sony Corporation | Disk recording medium and disk drive apparatus |
US20040054846A1 (en) * | 2002-09-16 | 2004-03-18 | Wen-Tsung Liu | Backup device with flash memory drive embedded |
US20050223136A1 (en) * | 2003-03-05 | 2005-10-06 | Fujitsu Limited | System and method for controlling DMA data transfer |
US20050281160A1 (en) * | 2000-10-25 | 2005-12-22 | Mediatek, Inc. | Link writing method for a recordable or rewritable compact disk and drive for using the method |
US20060176785A1 (en) * | 1999-10-20 | 2006-08-10 | Sony Corporation | Recording/reproducing apparatus and recording/reproducing method |
US20060215304A1 (en) * | 2002-06-12 | 2006-09-28 | Sony Corporation | Recording apparatus, server apparatus, recording method, program, and storage medium |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR920000708B1 (en) * | 1988-07-22 | 1992-01-20 | 현대전자산업 주식회사 | Trench capacitor forming method using photo-resister etch-back technics |
EP0511448A1 (en) * | 1991-04-30 | 1992-11-04 | International Business Machines Corporation | Method and apparatus for in-situ and on-line monitoring of a trench formation process |
US5389559A (en) * | 1993-12-02 | 1995-02-14 | International Business Machines Corporation | Method of forming integrated interconnect for very high density DRAMs |
JPH0864579A (en) * | 1994-08-23 | 1996-03-08 | Toshiba Corp | Manufacture of semiconductor device |
EP0756318A1 (en) * | 1995-07-24 | 1997-01-29 | International Business Machines Corporation | Method for real-time in-situ monitoring of a trench formation process |
US6107135A (en) * | 1998-02-11 | 2000-08-22 | Kabushiki Kaisha Toshiba | Method of making a semiconductor memory device having a buried plate electrode |
JP2001284323A (en) * | 2000-03-30 | 2001-10-12 | Toshiba Corp | Etching depth detecting apparatus, etching apparatus, etching depth detecting method, etching method and method of manufacturing semiconductor device |
EP1217657A1 (en) * | 2000-12-20 | 2002-06-26 | Semiconductor 300 GmbH & Co. KG | Method of forming a buried strap in a dram cell |
TWI223376B (en) * | 2003-05-19 | 2004-11-01 | Nanya Technology Corp | Method for forming uniform bottom electrode in trench of trench capacitor |
US7087498B2 (en) * | 2003-09-30 | 2006-08-08 | Agere Systems Inc. | Method for controlling trench depth in shallow trench isolation features |
US7375034B2 (en) * | 2006-03-21 | 2008-05-20 | International Business Machines Corporation | Recessing trench to target depth using feed forward data |
-
2006
- 2006-03-21 US US11/308,394 patent/US7375034B2/en not_active Expired - Fee Related
-
2007
- 2007-02-20 JP JP2007039465A patent/JP4953855B2/en not_active Expired - Fee Related
- 2007-03-13 CN CN2007101359308A patent/CN101042997B/en not_active Expired - Fee Related
- 2007-08-02 US US11/832,718 patent/US20070270995A1/en not_active Abandoned
-
2008
- 2008-03-07 US US12/044,145 patent/US7713880B2/en not_active Expired - Fee Related
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6173358B1 (en) * | 1993-12-16 | 2001-01-09 | International Business Machines Corporation | Computer system having dual bus architecture with audio/video/CD drive controller/coprocessor having integral bus arbitrator |
US20060176785A1 (en) * | 1999-10-20 | 2006-08-10 | Sony Corporation | Recording/reproducing apparatus and recording/reproducing method |
US20020041554A1 (en) * | 2000-08-09 | 2002-04-11 | Yuji Kitamura | Information processing system for holding number of times of record restarting |
US20020048241A1 (en) * | 2000-09-04 | 2002-04-25 | Sony Corporation | Disk recording medium and disk drive apparatus |
US20020039143A1 (en) * | 2000-10-02 | 2002-04-04 | Mega Chips Corporation | Image processing circuit |
US20050281160A1 (en) * | 2000-10-25 | 2005-12-22 | Mediatek, Inc. | Link writing method for a recordable or rewritable compact disk and drive for using the method |
US20060215304A1 (en) * | 2002-06-12 | 2006-09-28 | Sony Corporation | Recording apparatus, server apparatus, recording method, program, and storage medium |
US20040054846A1 (en) * | 2002-09-16 | 2004-03-18 | Wen-Tsung Liu | Backup device with flash memory drive embedded |
US20050223136A1 (en) * | 2003-03-05 | 2005-10-06 | Fujitsu Limited | System and method for controlling DMA data transfer |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI611478B (en) * | 2013-02-04 | 2018-01-11 | 蘭姆研究公司 | Controlling cd and cd uniformity with trim time and temperature on a wafer by wafer basis |
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US20070221619A1 (en) | 2007-09-27 |
CN101042997A (en) | 2007-09-26 |
US20080160651A1 (en) | 2008-07-03 |
CN101042997B (en) | 2012-05-23 |
JP4953855B2 (en) | 2012-06-13 |
US7375034B2 (en) | 2008-05-20 |
JP2007258693A (en) | 2007-10-04 |
US7713880B2 (en) | 2010-05-11 |
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