US20080013298A1 - Methods and apparatus for passive attachment of components for integrated circuits - Google Patents
Methods and apparatus for passive attachment of components for integrated circuits Download PDFInfo
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- US20080013298A1 US20080013298A1 US11/457,626 US45762606A US2008013298A1 US 20080013298 A1 US20080013298 A1 US 20080013298A1 US 45762606 A US45762606 A US 45762606A US 2008013298 A1 US2008013298 A1 US 2008013298A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49589—Capacitor integral with or on the leadframe
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D11/00—Component parts of measuring arrangements not specially adapted for a specific variable
- G01D11/24—Housings ; Casings for instruments
- G01D11/245—Housings for sensors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
- G01R33/07—Hall effect devices
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
- G01R33/02—Measuring direction or magnitude of magnetic fields or magnetic flux
- G01R33/06—Measuring direction or magnitude of magnetic fields or magnetic flux using galvano-magnetic devices
- G01R33/09—Magnetoresistive devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N52/00—Hall-effect devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N52/00—Hall-effect devices
- H10N52/80—Constructional details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
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- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
Description
- Techniques for semiconductor packaging are well known in the art. In general, a die is cut from a wafer, processed, and attached to a leadframe. After assembly of the integrated circuit (IC) package, the IC package may then placed on a circuit board with other components, including passive components such as capacitors, resistors and inductors. Such passive components, which can be used in filtering the like, can result in the addition of a circuit board near the sensor, or additional real estate on a circuit board that may be present.
- As is known in the art, integrated circuits (ICs) are typically overmolded with a plastic or other material to form a package. Such ICs, for example sensors, often require external components, such as capacitors, to be coupled to the IC for proper operation. Magnetic sensors, for example, can require decoupling capacitors to reduce noise and enhance EMC (electromagnetic compatibility). However, external components require real estate on a printed circuit board (PCB) and additional processing steps.
- U.S. Pat. No. 5,973,388 to Chew et al. discloses a technique in which a leadframe includes a flag portion and a lead portion with a wire bonds connecting a die to the leadframe. Inner ends of the lead portions are etched to provide a locking structure for epoxy compound. The assembly is then encapsulated in an epoxy plastic compound.
- U.S. Pat. No. 6,563,199 to Yasunaga et al. discloses a lead frame with leads having a recess to receive a wire that can be contained in resin for electrical connection to a semiconductor chip.
- U.S. Pat. No. 6,642,609 to Minamio et al. discloses a leadframe having leads with land electrodes. A land lead has a half-cut portion and a land portion, which is inclined so that in a resin molding process the land electrode adheres to a seal sheet for preventing resin from reaching the land electrode.
- U.S. Pat. No. 6,713,836 to Liu et al, discloses a packaging structure including a leadframe having leads and a die pad to which a chip can be bonded. A passive device is mounted between the contact pads. Bonding wires connect the chip, passive device, and leads, all of which are encapsulated.
- U.S. Patent Application Publication No. US 2005/0035448 of Hsu et al. discloses a chip package structure including a carrier, a die, a passive component, and conducting wires. Electrodes of the passive component are coupled to power and ground via respective conducting wires.
- The exemplary embodiments contained herein will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
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FIG. 1 is a pictorial representation of a sensor having an integrated capacitor in accordance with exemplary embodiments of the invention; -
FIG. 2A is a top view of a capacitor and leadframe; -
FIG. 2B is a side view of the capacitor and leadframe ofFIG. 2A ; -
FIG. 3A is a top view of a capacitor secured to a leadframe by conductive epoxy; -
FIG. 3B is a side view of the assembly ofFIG. 3A ; -
FIG. 4A is a top view of a sensor having integrated capacitors in accordance with an exemplary embodiment of the invention; -
FIG. 4B is a side view of the sensor ofFIG. 4A ; -
FIG. 4C is a top view of the capacitors ofFIG. 4A ; -
FIG. 4D is a side view of the capacitors ofFIG. 4C ; -
FIG. 4E is a top view of a sensor having integrated capacitors in accordance with an exemplary embodiment of the invention; -
FIG. 4F is a side view of the sensor ofFIG. 4E ; -
FIG. 5 is a flow diagram showing an exemplary sequence of steps to fabricate the sensor ofFIG. 4A ; -
FIG. 5A is a flow diagram showing an alternative sequence of steps to fabricate a sensor in accordance with exemplary embodiments of the invention; -
FIG. 5B is a flow diagram showing a further sequence of steps to fabricate a sensor in accordance with exemplary embodiments of the invention; -
FIG. 6A is a top view of a capacitor coupled to a leadframe in accordance with exemplary embodiments of the invention; -
FIG. 6B is a cross-sectional view of the assembly ofFIG. 6A ; -
FIG. 6C is a flow diagram showing an exemplary sequence of steps to fabricate the assembly ofFIG. 6A ; -
FIG. 7A is a top view of a capacitor coupled to a leadframe; -
FIG. 7B is a cross-sectional view of the assembly ofFIG. 7A ; -
FIG. 8A is a top view of a capacitor coupled to a leadframe; -
FIG. 8B is a cross-sectional view of the assembly ofFIG. 8 along lines A-A; -
FIG. 8C is a cross-sectional view of the assembly ofFIG. 8 along lines B-B; -
FIG. 9A is a top view of a capacitor coupled to a leadframe; -
FIG. 9B is a cross-sectional view of the assembly ofFIG. 9A along lines A-A; -
FIG. 9C is a cross-sectional view of the assembly ofFIG. 9A along lines B-B; -
FIG. 9D is a top view of a capacitor coupled to a leadframe; -
FIG. 9E is a cross-sectional view of the assembly ofFIG. 9D along lines A-A; -
FIG. 9F is a cross-sectional view of the assembly ofFIG. 9D along lines B-B; -
FIG. 9G is a pictorial representation of the assembly ofFIG. 9D ; -
FIG. 10A is a top view of a capacitor coupled to a leadframe; -
FIG. 10B is a cross sectional view of the assembly ofFIG. 10 along lines A-A; -
FIG. 10C is a cross-sectional view of the assembly ofFIG. 10 along lines B-B; -
FIG. 10D is a cross-sectional view of the assembly ofFIG. 10 along lines C-C; -
FIG. 11A is a front view of a sensor having an integrated capacitor; -
FIG. 11B is a side view of the sensor ofFIG. 11A ; -
FIG. 12A is a front view of a prior art sensor; -
FIG. 12B is a side view of the prior art sensor ofFIG. 12A ; and -
FIG. 12C is a pictorial representation of the prior art sensor ofFIG. 12A . -
FIG. 1 shows an integrated circuit (IC)package 100 having integratedcapacitors 102 a,b in accordance with an exemplary embodiment of the invention. In the illustrated embodiment, theIC package 100 includes adie 104 having a magnetic sensor to detect a magnetic field, or change in magnetic field, which may change with the movement of an object of interest. Thedie 104 and capacitor(s) 102 can be positioned on aleadframe 106 having a series oflead fingers 108. - By integrating one or more capacitors 102 in accordance with exemplary embodiments described more fully below, the vertical direction of the package, or the magnetic field, is either minimally or not impacted, e.g., increased, as compared with known sensor packages. As will be appreciated by one of ordinary skill in the art, it is desirable for sensor ICs to minimize a distance between the sensor package and the object of interest.
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FIGS. 2A and 2B show acapacitor 200 placed ontape 202, such as KAPTON tape, in aregion 204 defined by aleadframe 206. More particularly, the leadframe is formed, cut, or otherwise manipulated to form theregion 204 for thecapacitor 200. Thecapacitor 200 is below asurface 208 of theleadframe 206 so that a vertical dimension of the package is reduced when compared to the capacitor on the leadframe. - The
capacitor 200 is electrically coupled to theleadframe 206 using any suitable technique, such as wire-bonding, solder, conductive epoxy, etc. In certain embodiments, wire-bonding and/or conductive epoxy may be preferred as solder may potentially crack at the interface with the capacitor or leadframe due to thermal expansion caused by coefficient of thermal expansion (CTE) mismatches over temperature cycles. -
FIGS. 3A and 3B show another embodiment of a sensor having acapacitor 300 located below asurface 302 of aleadframe 304. In the illustrated embodiment, a bottom 306 of the capacitor is below abottom surface 308 of theleadframe 304.Conductive epoxy 310 is used to electrically connect and secure thecapacitor 300 to theleadframe 304. With this arrangement, more of a body of the package for the sensor can be used in the vertical direction for package thickness. This direction is a significant factor in the operation of magnetic sensors as will be readily appreciated by one of ordinary skill in the art. - In an exemplary embodiment, a
capacitor 300 is placed below aleadframe 302 and electrically connected to the leadframe and secured in position by theconductive epoxy 310. In one embodiment, thecapacitor 300 is generally centered on alongitudinal center 312 of theleadframe 302. That is, an equal portion of the capacitor is above thetop surface 314 and below thebottom surface 316 of the leadframe. However, in other embodiments, thecapacitor 300 can be positioned differently with respect to theleadframe 302. - In an exemplary embodiment, an assembly fixture 350 (
FIG. 3B ) to position thecapacitor 300 in relation to theleadframe 302 includes atray 352 to provide a depression to secure thecapacitor 300 in position during the assembly process. A die, for example silicon, would also be present on another portion of the leadframe, but is not shown for clarity. Thetray 352 can be positioned to place the capacitor in a desired position with respect to theleadframe 302 while theconductive epoxy 310 is applied and cured. After the epoxy, or other connecting means, has cured, or set the tray may be removed and a mold compound, for example, can be over molded about the assembly to form an IC package. - In another embodiment, solder is used to electrically connect and secure the capacitor to the leadframe. It is understood that other suitable materials can be used that can withstand mechanical forces present during the plastic package injection molding process.
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FIGS. 4A and 4B show a further embodiment of anIC package 400 having first and secondintegrated capacitors 402 a,b and illustrative dimensions in accordance with an exemplary embodiment of the invention. Adie 404 is connected to aleadframe 406 having acutout region 408 in which the capacitors 402 can be positioned below asurface 410 of theleadframe 406. A plastic or other material can be used asmolding 412 to encapsulate the assembly. - As shown in
FIGS. 4C and 4D , in the illustrated embodiment, the capacitors 402 are mounted ontape 414, such as polyimide tape (KAPTON is one trade name for polyimide tape) with conductive foil. A tape automated bonding process (TAB) with a continuous reel can be used for the capacitors 402. With this arrangement, the assembly will remain intact during the molding process. With the capacitors 402 placed below theleadframe surface 410, the required thickness of the package is reduced as compared with a package having a capacitor mounted on the leadframe. - In the illustrative package of
FIGS. 4A and 4B , theIC package 400 having integratedcapacitors 402 a,b is a Hall effect sensor. As is well known in the art, thesensor 400 is useful to detect movement of an object of interest by monitoring changes in a magnetic field. - The
exemplary sensor package 400 has dimensions of about 0.24 inch long, about 0.184 inch wide, and about 0.76 inch deep, i.e., thickness. Theleadframe 406 is about 0.01 inch in thickness with the cutout region about 0.04 inch to enable placement of the capacitors 402 below the leadframe surface. - The capacitive impedance provided by the capacitors can vary. In general, the capacitance can range from about 500 pF to about 200 nF.
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FIGS. 4E-F show anothersensor package embodiment 450 includingintegrated capacitors leadframe 452 with afirst slot 454 to reduce eddy currents in accordance with exemplary embodiments of the invention. In other embodiments,further slots sensor 450 has some commonality with thesensor 400 ofFIG. 4A , where like reference numbers indicate like elements. - As is well known in the art, in the presence of an AC magnetic field (e.g., a magnetic field surrounding a current carrying conductor), AC eddy currents can be induced in the
conductive leadframe 452. Eddy currents form into closed loops that tend to result in a smaller magnetic field so that a Hall effect element experiences a smaller magnetic field than it would otherwise experience, resulting in a less sensitivity. Furthermore, if the magnetic field associated with the eddy current is not uniform or symmetrical about the Hall effect element, the Hall effect element might also generate an undesirable offset voltage. - The slot(s) 454 tends to reduce a size (e.g., a diameter or path length) of the closed loops in which the eddy currents travel in the
leadframe 452. It will be understood that the reduced size of the closed loops in which the eddy currents travel results in smaller eddy currents for a smaller local affect on the AC magnetic field that induced the eddy current. Therefore, the sensitivity of a current sensor having a Hall effect 460 element is less affected by eddy currents due to the slot(s) 454. - Instead of an eddy current rotating about the Hall effect element 460, the
slot 454 results in eddy currents to each side of the Hall element. While the magnetic fields resulting from the eddy currents are additive, the overall magnitude field strength, compared to a single eddy current with no slot, is lower due to the increased proximity of the eddy currents. - It is understood that any number of slots can be formed in a wide variety of configurations to meet the needs of a particular application. In the illustrative embodiment of
FIG. 4E , first, second andthird slots leadframe 452 in relation to a Hall effect element 460 centrally located in the die. The slots reduce the eddy current flows and enhance the overall performance of the sensor. - It is understood that the term slot should be broadly construed to cover generally interruptions in the conductivity of the leadframe. For example, slots can includes a few relatively large holes as well as smaller holes in a relatively high density. In addition, the term slot is not intended to refer to any particular geometry. For example, slot includes a wide variety of regular and irregular shapes, such as tapers, ovals, etc. Further, it is understood that the direction of the slot(s) can vary. Also, it will be apparent that it may be desirable to position the slot(s) based upon the type of sensor.
- The slotted
leadframe 452 can be formed from a metal layer of suitable conductive materials including, for example, aluminum, copper, gold, titanium, tungsten, chromium, and/or nickel. -
FIG. 5 shows aprocess 500 having an exemplary sequence of steps to provide a sensor having one or more integrated capacitors. Instep 502, conductive epoxy is applied to a desired location and in step 504 a die is attached to a leadframe. Instep 506, a capacitor is attached to the leadframe by the conductive epoxy. The assembly is cured instep 508 followed by wirebonding lead fingers to the die instep 510. The assembly is then overmolded with a plastic material, for example, instep 512 followed by finishingsteps - Alternatively a flip-chip attachment could be used in which solder balls and/or bumps are applied to the die, which is then attached to the leadframe. A capacitor is attached to the leadframe followed by overmolding of the assembly after solder reflow.
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FIG. 5A shows analternative embodiment 550 of theprocess 500 ofFIG. 5 in which solder is used instead of conductive epoxy, wherein like reference numbers indicate like elements. Instep 552, solder is printed or otherwise dispensed in desired locations for attachment of capacitors instep 554. Instep 556, the die is attached to the leadframe followed by curing etc in a manner similar to that ofFIG. 5 .FIG. 5B shows a furtheralternative embodiment 560 that may reduce cracking during wirebonding. Instep 562, epoxy is dispensed and instep 564 the die is attached. The epoxy is then cured instep 566 followed by wirebonding instep 568. Then the capacitor is attached instep 572 and the assembly is cured instep 574 followed by molding, deflash/plating and trimming/singulation inrespective steps - It is understood that the illustrative process embodiments are exemplary. In addition, all steps may not be shown, for example, typically after molding the package the leads are plated, trimmed and then formed. It would also be possible to attach the capacitor with one type of solder and then the die can be flip chip attached to the leadframe with a second type of solder. Further, the process steps may be reversed depending on which solder has the higher reflow temperature. The higher temperature solder should be used first. The case of flip chip attach of the die and then the capacitors with an epoxy would also be possible.
- It is understood that a variety of attachment mechanisms can be used to secure and/or electrically connect the capacitor and leadframe. Exemplary mechanisms include tape and conductive epoxy, solder, tape and wire bonds, TAB (tape automated bonding), and non-conductive epoxy and wire bonding.
-
FIGS. 6A and 6B show asemiconductor package structure 600 including aleadframe 602 to which adie 604 andcomponents 606 a, b, c are attached. In general, components, such as capacitors and passive devices, can be coupled to the leadframe and fingers. This arrangement enhances the life cycle of components, such as passive components, improves noise reduction capability, and creates more space on printed circuit boards. - A series of unattached
lead fingers 608 a, b, c are positioned in a spaced relationship to theleadframe 602 to enable finger-leadframe connection viarespective components 606 a, b, c in the illustrated embodiment. Thedie 604 is positioned on atop surface 602 a of theleadframe 602 and one or more of thecomponents 606 are attached to abottom surface 602 b of the leadframe. Thecomponents 606 can also be coupled to a lead finger to electrically connect the lead finger 608 to theleadframe 602.Wire bonds 610, for example, can be used to make electrical connections between the die 604 and the leadframe. - With this arrangement, passive component integration can be achieved on a leadframe pad using one or more matured surface mount technology (SMT) process, such as screen printing, dispensing, surface mount device attachment, etc.
- The
leadframe 602 and/or lead fingers 608 can be fabricated by etching, stamping, grinding and/or the like. Thepassive component 606 attachment can be performed before singulation and package body molding so that the singulation process will not adversely affect the quality of the internal components. As is known in the art, and disclosed for example in U.S. Pat. No. 6,886,247 to Drussel, et al., singulation refers to the separation of printed circuit boards from the interconnected PCB's in the panel of substrate material. -
FIG. 6C shows an exemplary sequence ofsteps 650 for fabricating the assembly ofFIGS. 6A and 6B . Instep 652, the die is attached to the leadframe followed by curing instep 654. After curing, wirebonds are attached instep 656 and the assembly is then molded instep 658 and deflashed/plated instep 660. Instep 662, solder is printed or otherwise dispensed followed by attachment of the capacitor(s), solder reflow, and washing instep 664. Instep 666, trimming and singulation is performed. In the illustrated embodiment, the copper of leadframe is exposed for attachment of the capacitor to the package after the molding is completed. -
FIGS. 7A and 7B show anassembly 700 having an embeddedcapacitor 702 provided using an integration approach. Adie 704 is positioned on atop surface 706 a of aleadframe 706 withlead fingers 708 a, b, c positioned with respect to the leadframe. Thecapacitor 702, or other component, has afirst end 702 a placed on afirst bonding pad 710 on the leadframe and asecond end 702 b placed on asecond bonding pad 712 on the firstlead finger 708 a. The leadframe has adownset area 714 having a surface that is below atop surface 706 a of the leadframe to receive thecapacitor 702. Similarly, the firstlead finger 708 a has adownset area 716 below atop surface 718 of the lead finger to receive the capacitorsecond end 702 b. - With this arrangement, the
top surface 720 of the capacitor is lowered with respect to thetop surface 706 a of the leadframe due to thedownset areas - An exemplary impedance range for the capacitors is from about 500 pF to about 100 nF. It is understood that a variety of capacitor types and attachment technology techniques can be used to provide sensors having integrated capacitors. In one particular embodiment, surface mount capacitors are used having exemplary dimensions of 1.6 mm long by 0.85 mm wide by 0.86 mm thick.
-
FIGS. 8A-C show anotherembodiment 700′ having some commonality with the assembly ofFIGS. 2A and 2B . Thedownset areas 714′, 716′ are formed as squared grooves in therespective leadframe 706′ and firstlead finger 708 a. - An integrated circuit having an integrated capacitor is useful for applications requiring noise filtering at its input or output, such as with a bypass capacitor. For example, positions sensors, such as Hall effect devices, often use bypass capacitors in automotive applications.
-
FIGS. 9A-C show afurther embodiment 800 of an assembly having first and secondintegrated components die 805 is positioned on aleadframe 806 having first and second 808 a, b lead fingers extending from the lead frame. Further lead fingers 810 a-e, which are separate from theleadframe 806, are in spaced relation to the leadframe. The firstintact lead finger 808 a has first and seconddownset areas 812 a, b on outer areas of the lead finger to receive ends of the first andsecond components detached lead fingers 810 a, b have respectivedownset areas second components components Wire bonds 818 can provide electrical connections between the lead fingers and thedie 805. - In the illustrated embodiment, the
lead fingers downset areas - Such an arrangement provides advantages for a magnetic field sensor since the package thickness may be reduced. That is, an inventive sensor having an integrated component can have the same thickness as a comparable conventional sensor without an integrated component. It is readily understood by one of ordinary skill in the art that the magnetic gap is a parameter of interest for magnetic sensors and the ability to reduce a package thickness may provide enhanced magnetic sensor designs.
-
FIGS. 9D-G show anotherembodiment 800′ of an assembly having first andsecond components embodiment 800′ has some similarity with theembodiment 800 ofFIGS. 9A-C , where like reference numbers indicate like elements. Thecomponents leadframe 806′ without downset areas. Thecomponents wirebonds 818 used to connect various die locations to the leadfingers. Thecomponents leads 820 that extend from the package. In the illustrated embodiment, the tie bars proximate thecomponents components external leads 820, a more compact package is provided. -
FIGS. 10A-D show anotherembodiment 900 having some similarity with the assembly ofFIGS. 9D-F . The components are placed on an opposite side of theleadframe 806′ as thedie 805′. This arrangement optimizes the device for use with a magnetic sensor where a magnet is placed of the back side of the device and the leads are angled at ninety degrees (seeFIG. 6 ) to optimize the size of the sensor. -
FIGS. 11A-B show anexemplary sensor package 950 having an integrated capacitor with a body diameter that is reduced as compared with a conventional sensor without an integrated capacitor shown inFIGS. 12A-C . The leads 952 are angled ninety degrees from the leadframe within thepackage body 954. In one embodiment, the external leads 952 are on the opposite side of the die as the integrated capacitor, as shown inFIG. 9D . With the inventive integrated capacitor, the sensor provides a robust, noise-filtered solution in a reduced size. For example, thesensor package 950 ofFIGS. 11A , B can have a diameter of about 7.6 mm, while a comparable prior art sensor shown inFIGS. 12A-C has a diameter of about 9.8 mm. - To fabricate the
package 950 ofFIGS. 11A-B , the leads are formed/bent by ninety degrees. The part is inserted in a premolded housing to align the package body and the leads. For a Hall sensor, for example, a magnet and concentrator (not shown) may be added. The assembly is then overmolded. - The exemplary invention embodiments are useful for System-in-Package (SiP) technology in a variety of applications, such as automotive applications. The inventive packaging contributes to optimizing the life cycle of passive components, improving noise reduction capability, and creating more space on circuit boards. In addition, the invention optimizes the positioning of components to reduce space requirements and enhance device sensing ability.
- In another embodiment, a sensor includes on a leadframe a first die having a sensor element and a second die having circuitry and at least one integrated capacitor. While exemplary embodiments contained herein discuss the use of a Hall effect sensor, it would be apparent to one of ordinary skill in the art that other types of magnetic field sensors may also be used in place of or in combination with a Hall element. For example the device could use an anisotropic magnetoresistance (AMR) sensor and/or a Giant Magnetoresistance (GMR) sensor. In the case of GMR sensors, the GMR element is intended to cover the range of sensors comprised of multiple material stacks, for example: linear spin valves, a tunneling magnetoresistance (TMR), or a colossal magnetoresistance (CMR) sensor. In other embodiments, the sensor includes a back bias magnet. The dies can be formed independently from Silicon, GaAs, InGaAs, InGaAsP, SiGe or other suitable material.
- Other embodiments of the present invention include pressure sensors, and other contactless sensor packages in general in which it is desirable to have integrated components, such as capacitors.
- One skilled in the art will appreciate further features and advantages of the invention based on the above-described embodiments. Accordingly, the invention is not to be limited by what has been particularly shown and described, except as indicated by the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.
Claims (17)
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CN201510933381.3A CN105321921B (en) | 2006-07-14 | 2007-06-04 | Method and apparatus for passive attachment of components for integrated circuits |
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EP07795814.8A EP2041592B1 (en) | 2006-07-14 | 2007-06-04 | Methods and apparatus for passive attachment of components for integrated circuits |
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US14/741,644 US20150285874A1 (en) | 2006-07-14 | 2015-06-17 | Methods and Apparatus for Passive Attachment of Components for Integrated Circuits |
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WO2008008140A3 (en) | 2008-05-08 |
KR20090031757A (en) | 2009-03-27 |
US20120086090A1 (en) | 2012-04-12 |
CN105321921A (en) | 2016-02-10 |
JP5378209B2 (en) | 2013-12-25 |
JP2018082203A (en) | 2018-05-24 |
US20200355525A1 (en) | 2020-11-12 |
JP2014060404A (en) | 2014-04-03 |
CN101467058A (en) | 2009-06-24 |
JP6462907B2 (en) | 2019-01-30 |
US9228860B2 (en) | 2016-01-05 |
EP2041592A2 (en) | 2009-04-01 |
CN105321921B (en) | 2020-11-27 |
WO2008008140A2 (en) | 2008-01-17 |
JP2016225634A (en) | 2016-12-28 |
JP2009544149A (en) | 2009-12-10 |
US20150285874A1 (en) | 2015-10-08 |
EP2041592B1 (en) | 2021-11-10 |
JP5969969B2 (en) | 2016-08-17 |
KR101367089B1 (en) | 2014-02-24 |
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