US20080238623A1

US20080238623A1 - Transceiver front-end having tx and rx isolation

Info

Publication number: US20080238623A1
Application number: US12/039,775
Authority: US
Inventors: Ahmadreza (Reza) Rofougaran; Maryam Rofougaran
Original assignee: Broadcom Corp
Current assignee: Avago Technologies International Sales Pte Ltd
Priority date: 2007-03-30
Filing date: 2008-02-29
Publication date: 2008-10-02
Also published as: US8093990B2; US20080238624A1; US20080238688A1; US8207825B2; US8838047B2; US20080238625A1; US8115598B2; US20080238621A1; US20080238626A1; US20080238622A1

Abstract

A transceiver front-end comprises a transmitter section a receiver section, and an isolation circuit. The transmitter section includes an oscillation module that generates a radio frequency (RF) oscillation and a power amplifier module that amplifies and modulates the RF oscillation in accordance with outbound modulation information to produce an outbound RF signal. The receiver section includes a low noise amplifier that amplifies an inbound RF signal to produce an amplified inbound RF signal and a down conversion module that converts the amplified inbound RF signal into an encoded inbound signal. The isolation circuit reduces a blocking effect of the outbound RF signal on the receiver section.

Description

This patent application is claiming priority under 35 USC §119 to a provisionally filed patent application entitled RFID SYSTEM, having a provisional filing date of Mar. 30, 2007, and a provisional Ser. No. of 60/921,221 (attorney docket no. BP 6250); and to a provisionally filed patent application entitled RFID SYSTEM, having a provisional filing date of May 31, 2007, and a provisional Ser. No. of 60/932,411 (attorney docket no. BP 6250.1).

CROSS REFERENCE TO RELATED PATENTS

NOT APPLICABLE

STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

NOT APPLICABLE

INCORPORATION-BY-REFERENCE OF MATERIAL SUBMITTED ON A COMPACT DISC

NOT APPLICABLE

BACKGROUND OF THE INVENTION

1. Technical Field of the Invention
This invention relates generally to communication systems and more particularly to RFID systems.
2. Description of Related Art
A radio frequency identification (RFID) system generally includes a reader, also known as an interrogator, and a remote tag, also known as a transponder. Each tag stores identification data for use in identifying a person, article, parcel or other object. RFID systems may use active tags that include an internal power source, such as a battery, and/or passive tags that do not contain an internal power source, but instead are remotely powered by the reader.
Communication between the reader and the remote tag is enabled by radio frequency (RF) signals. In general, to access the identification data stored on an RFID tag, the RFID reader generates a modulated RF interrogation signal designed to evoke a modulated RF response from a tag. The RF response from the tag includes the coded identification data stored in the RFID tag. The RFID reader decodes the coded identification data to identify the person, article, parcel or other object associated with the RFID tag. For passive tags, the RFID reader also generates an unmodulated, continuous wave (CW) signal to activate and power the tag during data transfer.
RFID systems typically employ either far-field technology, in which the distance between the reader and the tag is great compared to the wavelength of the carrier signal, or near-field technology, in which the operating distance is less than one wavelength of the carrier signal, to facilitate communication between the RFID reader and RFID tag. In far-field applications, the RFID reader generates and transmits an RF signal via an antenna to all tags within range of the antenna. One or more of the tags that receive the RF signal responds to the reader using a backscattering technique in which the tags modulate and reflect the received RF signal. In near-field applications, the RFID reader and tag communicate via mutual inductance between corresponding reader and tag inductors.
Currently, RFID readers are formed of separate and discrete components whose interfaces are well-defined. For example, an RFID reader may consist of a controller or microprocessor implemented on a CMOS integrated circuit and a radio implemented on one or more separate CMOS, BiCMOS or GaAs integrated circuits that are uniquely designed for optimal signal processing in a particular technology (e.g., near-field or far-field). However, the high cost of such discrete-component RFID readers has been a deterrent to wide-spread deployment of RFID systems. In addition, there are a number of different RFID standards, each defining a different protocol for enabling communication between the reader and the tag. Discrete RFID reader designs inhibit multi-standard capabilities in the reader.
Therefore, a need exists for a highly integrated, low-cost RFID reader. In addition, a need exists for an RF front-end that provides isolation between the transmitter and receiver.

BRIEF SUMMARY OF THE INVENTION

The present invention is directed to apparatus and methods of operation that are further described in the following Brief Description of the Drawings, the Detailed Description of the Invention, and the claims. Other features and advantages of the present invention will become apparent from the following detailed description of the invention made with reference to the accompanying drawings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

FIG. 1 is a schematic block diagram of an embodiment of an RFID system in accordance with the present invention;

FIG. 2 is a schematic block diagram of an embodiment of an RFID reader in accordance with the present invention;

FIG. 3 is a schematic block diagram of an embodiment of a transceiver front-end in accordance with the present invention;

FIG. 4 is a schematic block diagram of another embodiment of a transceiver front-end in accordance with the present invention;

FIG. 5 is a schematic block diagram of another embodiment of a transceiver front-end in accordance with the present invention; and

FIG. 6 is a schematic block diagram of another embodiment of a transceiver front-end in accordance with the present invention.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic block diagram of an RFID (radio frequency identification) system that includes a computer/server 12, a plurality of RFID readers 14-18 and a plurality of RFID tags 20-30. The RFID tags 20-30 may each be associated with a particular object for a variety of purposes including, but not limited to, tracking inventory, tracking status, location determination, assembly progress, et cetera. The RFID tags may be active devices that include internal power sources or passive devices that derive power from the RFID readers 14-18.
Each RFID reader 14-18 wirelessly communicates with one or more RFID tags 20-30 within its coverage area. For example, RFID tags 20 and 22 may be within the coverage area of RFID reader 14, RFID tags 24 and 26 may be within the coverage area of RFID reader 16, and RFID tags 28 and 30 may be within the coverage area of RFID reader 18. In one embodiment, the RF communication scheme between the RFID readers 14-18 and RFID tags 20-30 is a backscatter technique whereby the RFID readers 14-18 request data from the RFID tags 20-30 via an RF signal, and the RF tags 20-30 respond with the requested data by modulating and backscattering the RF signal provided by the RFID readers 14-18. In another embodiment, the RF communication scheme between the RFID readers 14-18 and RFID tags 20-30 is an inductance technique whereby the RFID readers 14-18 magnetically couple to the RFID tags 20-30 via an RF signal to access the data on the RFID tags 20-30. In either embodiment, the RFID tags 20-30 provide the requested data to the RFID readers 14-18 on the same RF carrier frequency as the RF signal.
In this manner, the RFID readers 14-18 collect data as may be requested from the computer/server 12 from each of the RFID tags 20-30 within its coverage area. The collected data is then conveyed to computer/server 12 via the wired or wireless connection 32 and/or via peer-to-peer communication 34. In addition, and/or in the alternative, the computer/server 12 may provide data to one or more of the RFID tags 20-30 via the associated RFID reader 14-18. Such downloaded information is application dependent and may vary greatly. Upon receiving the downloaded data, the RFID tag can store the data in a non-volatile memory therein.
As indicated above, the RFID readers 14-18 may optionally communicate on a peer-to-peer basis such that each RFID reader does not need a separate wired or wireless connection 32 to the computer/server 12. For example, RFID reader 14 and RFID reader 16 may communicate on a peer-to-peer basis utilizing a back scatter technique, a wireless LAN technique, and/or any other wireless communication technique. In this instance, RFID reader 16 may not include a wired or wireless connection 32 to computer/server 12. In embodiments in which communications between RFID reader 16 and computer/server 12 are conveyed through the wired or wireless connection 32, the wired or wireless connection 32 may utilize any one of a plurality of wired standards (e.g., Ethernet, fire wire, et cetera) and/or wireless communication standards (e.g., IEEE 802.11x, Bluetooth, et cetera).
The RFID system of FIG. 1 may be expanded to include a multitude of RFID readers 14-18 distributed throughout a desired location (for example, a building, office site, et cetera) where the RFID tags may be associated with equipment, inventory, personnel, et cetera. In addition, the computer/server 12 may be coupled to another server and/or network connection to provide wide area network coverage.
FIG. 2 is a schematic block diagram of an RFID reader 14-18 that includes an integrated circuit 56 and may further include a host interface module 54. The integrated circuit 56 includes a baseband processing module 40, a transmitter section 42, a receiver section 44, and an isolation circuit 46. The baseband processing module 40 may be a single processing device or a plurality of processing devices. Such a processing device may be a microprocessor, micro-controller, digital signal processor, microcomputer, central processing unit, field programmable gate array, programmable logic device, state machine, logic circuitry, analog circuitry, digital circuitry, and/or any device that manipulates signals (analog and/or digital) based on hard coding of the circuitry and/or operational instructions. The processing module 40 may have an associated memory and/or memory element, which may be a single memory device, a plurality of memory devices, and/or embedded circuitry of the processing module. Such a memory device may be a read-only memory, random access memory, volatile memory, non-volatile memory, static memory, dynamic memory, flash memory, cache memory, and/or any device that stores digital information. Note that when the processing module 40 implements one or more of its functions via a state machine, analog circuitry, digital circuitry, and/or logic circuitry, the memory and/or memory element storing the corresponding operational instructions may be embedded within, or external to, the circuitry comprising the state machine, analog circuitry, digital circuitry, and/or logic circuitry. Further note that, the memory element stores, and the processing module executes, hard coded and/or operational instructions corresponding to at least some of the steps and/or functions illustrated in FIGS. 1-6.
As shown, the baseband processing module 40 may include a protocol processing module 48, an encoding module 50, a digital-to-analog converter (DAC) 52, a digitization module 54, a predecoding module 56 and a decoding module 58. The transmitter section 42 includes a power amplifier module 62 and an oscillator. The receiver section 44 includes a low noise amplifier (LNA) module 64 and a down conversion module 66. Note that the host interface module 54 may include a communication interface to a host device, such as a USB dongle, compact flash or PCMCIA.
The protocol processing module 48 is coupled to prepare data for encoding in accordance with a particular RFID standardized protocol. In an embodiment, the protocol processing module 48 is programmed with multiple RFID standardized protocols to enable the RFID reader 14-18 to communicate with RFID tags, regardless of the particular protocol associated with the tag. The protocol processing module 48 operates to program filters and other components of the encoding module 50, decoding module 58, and pre-decoding module 56 in accordance with the particular RFID standardized protocol of the tag(s) currently communicating with the RFID reader 14-18.
In operation, once the particular RFID standardized protocol has been selected for communication with one or more RFID tags, the protocol processing module 48 generates and provides digital data to be communicated to the RFID tag to the encoding module 50 for encoding into modulation data. By way of example, but not limitation, the RFID protocols may include one or more line encoding schemes, such as Manchester encoding, FM0 encoding, FM1 encoding, etc. The DAC 52 converts the digital modulation data into analog modulation information 70, which is provided to the power amplifier module 62.
The power amplifier module 62, which includes one or more power amplifiers coupled in series and/or parallel and/or one or more power amplifier drivers coupled in series and/or parallel, amplifies an RF oscillation 72 based on the modulation information 70 to produce an outbound RF signal 74. The modulation information 70 may be amplitude modulation data such as amplitude modulation (AM) or amplitude shift keying (ASK), phase modulation data such as phase shift keying (PSK), and/or frequency modulation data such as frequency modulation, minimum shift keying (MSK), or frequency shift keying (FSK). As shown, the oscillation module 60, which may be a phase locked loop, crystal oscillator, etc. generates the RF oscillation 72. Note that the RF oscillation may have a frequency within one of a plurality of frequency bands (e.g., 900 MHz, 2.4 GHz, 5 GHz, 56-63 GHz, etc.).
The LNA module 64, which includes one or more low noise amplifiers coupled in series and/or parallel, receives an inbound RF signal 76, which has a carrier frequency substantially the same as, or similar to (e.g., within a few percent), the carrier frequency of the outbound RF signal 74. The LNA module 64 amplifies the inbound RF signal to produce an amplified inbound RF signal. The down conversion module 66 converts the amplified inbound RF signal into an encoded inbound baseband signal 78. In an embodiment, the down conversion module 66 includes one or more mixers, filters, and/or gain stages to convert the inbound RF signal, which may have an in-phase component and a quadrature component, into the encoding inbound baseband signal 78.
The digitization module 54, which may be a limiting module or an analog-to-digital converter, converts the encoding inbound baseband signal 78 into a digital signal. The predecoding module 56 converts the digital signal into a biphase encoded signal in accordance with the particular RFID protocol being utilized. The biphase encoded data is provided to the decoding module 58, which recaptures data therefrom in accordance with the particular encoding scheme of the selected RFID protocol. The protocol processing module 48 processes the recovered data to identify the object(s) associated with the RFID tag(s) and/or provides the recovered inbound data 80 to the server and/or computer for further processing.
The isolation circuit 46 (embodiments of which will be discussed with reference to FIGS. 3-6) functions to reduce a blocking effect of the outbound RF signal 74 on the receiver section 44. The blocking effect is essentially the outbound RF signal 74 overshadowing, or blocking, the inbound RF signal 66 at the input of the receiver section 44. This overshadowing is caused by the outbound and inbound RF signals 74 and 76 having substantially the same, or similar, carrier frequencies and the outbound RF signal 74 having a power level that is much greater (e.g., at least 20 dB) than that of the inbound RF signal 76. In an embodiment, the isolation circuit 46 reduces the blocking effect by reducing the power level of the outbound RF signal 74 received by the receiver section 44.
The transmitter section 42, the isolation circuit 46, and the receiver section 44 may be used as a transceiver front-end in radio devices beyond RFID readers. For example, the transceiver front-end may be used in backscattering transceivers, cellular telephones, radar, high frequency imaging, etc. Regardless of the particular application, the isolation circuit 46 may be on-chip, off-chip or a combination thereof with the transmitter section 42 and the receiver section 44.
FIG. 3 is a schematic block diagram of an embodiment of a transceiver front-end that includes the transmitter section 42, the receiver section 44, and the isolation circuit 46. The transmitter section 42 includes the power amplifier module 62 and the oscillator 60. The receiver section includes the LNA module 64, a blocking module 95, and the down conversion module 66. The blocking module 95 may include a limiting module 98 and a subtraction module 97. The isolation circuit 46 includes a first polarized antenna 90 and a second polarized antenna 92. The isolation circuit 46 may further include antenna interfaces 94 and 96.
In this embodiment, the outbound RF signal 74 is transmitted via the first antenna 90, which has a first polarization (e.g., 0°) and the inbound RF signal 76 is received via a second antenna 92, which has a second polarization (e.g., 90°). The first and second antennas 90 and 92 may be monopole or dipole antennas that have a directional radiation pattern. With the antennas 90 and 92 positioned orthogonally to each other, the radiation patterns of the antennas are at approximately 90° thereby reducing the interference between them (e.g., reducing the blocking signal received by the receiver section 44) by 20 dB or more.
If the isolation module 46 includes antennas interfaces 94 and 96, each interface may include an impedance matching circuit, a bandpass filtering circuit, and/or a transmission line. In this instance, the antenna interfaces 94 provide optimal energy transfer between the antennas 90 and 92 and the corresponding sections 42 and 44.
The blocking module 95 of the receiver section 44 further reduces the blocking component (e.g., the received outbound RF signal) of the inbound RF signal 76 such that the desired signal component of the inbound RF signal 76 is provided to the down conversion module 66. As configured, the limiting module 98 limits the inbound RFID signal to produce a limited inbound RFID signal that includes a substantially attenuated desired signal component and a substantially unattenuated blocking signal component. In an embodiment, the limiting module 98 a limiter that limits the inbound RF signal 76, which is amplitude modulated, to a constant envelope signal. The limiting module 98 may further include a scaling module such that the blocking signal component of the limited inbound signal has a substantially similar magnitude of the received blocking signal component.
The subtraction module 97 subtracts the limited inbound RFID signal from the amplified inbound RFID signal (i.e., the output of the LNA module 64) to produce an amplified and blocked inbound RFID signal. In this instance, the amplified and block signal includes a real component of the desired signal component with the imaginary component of the desired signal component and the blocking signal component substantially attenuated.
FIG. 4 is a schematic block diagram of another embodiment of a transceiver front-end that includes the transmitter section 42, the receiver section 44, and the isolation circuit 46. The transmitter section 42 and the receiver section 44 function as previously discussed with reference to FIG. 2. Note that the receiver section 44 may further include the blocking circuit 95 of FIG. 3.
The isolation circuit 46 includes an antenna 100 and a circulator 102. The circulator 102 may a passive device that includes three ports (one for coupling to the antenna 100, one for coupling to the transmitter section 42, and one for coupling to the receiver section 44). When a signal is present at one of the ports, it is fed to the next port and isolated from the third port. In this instance, when the transmitter section 42 is providing the outbound RF signal 74 via the circulator 102 to the antenna 100, the outbound RF signal 74 component to the receiver section 42 is reduced (e.g., 3 dB).
FIG. 5 is a schematic block diagram of another embodiment of a transceiver front-end that includes the transmitter section 42, the receiver section 44, and the isolation circuit 46. The transmitter section 42 and the receiver section 44 function as previously discussed with reference to FIG. 3. Alternatively, the receiver section 44 may be configured as shown in FIG. 2.
The isolation circuit 46 includes the antenna 100, the circulator 102, and an adjustable antenna module 103. The circulator 102 functions as previously discussed with respect to transmitting the outbound RF signal 74. When the inbound RF signal 76 is being received, the circulator 102 couples the antenna 100 to the adjustable attenuation module 103. The adjustable attenuation module 103 may include an adjustable low pass filter, an adjustable notch filter, an adjustable bandpass filter, or an adjustable gain stage to reduce the signal strength of the inbound RF signal 76, which includes the blocking signal component. By reducing the signal strength of the inbound RF signal 76, the LNA module 64 operates in a more optimal manner (e.g., more linear) thereby improving the sensitivity of receiver section 44 to detect the desired signal component.
FIG. 6 is a schematic block diagram of another embodiment of a transceiver front-end that includes the transmitter section 42, the receiver section 44, and the isolation circuit 46. The receiver section 44 functions as previously discussed with reference to FIG. 2. Alternatively, the receiver section 44 may be configured as shown in FIG. 3. The isolation circuit 46 includes the antenna 100 and an adjustable antenna module 103, which operates as previously discussed.
In this figure, the power amplifier module 62 includes a power amplifier 104 and a transformer 106. The power amplifier 104 amplifies and modulates the RF oscillation in accordance with the outbound modulation information 70 to produce an amplified and modulated RF signal. The transformer 106, which may be an on-chip or off-chip transformer balun, electromagnetically produces the outbound RF signal 74 from the amplified and modulated RF signal. In an embodiment, the transformer 106 includes a turns ratio of M such that the voltage of the outbound RF signal 74 is greater than the voltage of the amplified and modulated RF signal. Note that the power amplifier module 62 of FIGS. 2-5 may be implemented as shown in FIG. 6.
As may be used herein, the terms “substantially” and “approximately” provides an industry-accepted tolerance for its corresponding term and/or relativity between items. Such an industry-accepted tolerance ranges from less than one percent to fifty percent and corresponds to, but is not limited to, component values, integrated circuit process variations, temperature variations, rise and fall times, and/or thermal noise. Such relativity between items ranges from a difference of a few percent to magnitude differences. As may also be used herein, the term(s) “coupled to” and/or “coupling” and/or includes direct coupling between items and/or indirect coupling between items via an intervening item (e.g., an item includes, but is not limited to, a component, an element, a circuit, and/or a module) where, for indirect coupling, the intervening item does not modify the information of a signal but may adjust its current level, voltage level, and/or power level. As may further be used herein, inferred coupling (i.e., where one element is coupled to another element by inference) includes direct and indirect coupling between two items in the same manner as “coupled to”. As may even further be used herein, the term “operable to” indicates that an item includes one or more of power connections, input(s), output(s), etc., to perform one or more its corresponding functions and may further include inferred coupling to one or more other items. As may still further be used herein, the term “associated with”, includes direct and/or indirect coupling of separate items and/or one item being embedded within another item. As may be used herein, the term “compares favorably”, indicates that a comparison between two or more items, signals, etc., provides a desired relationship. For example, when the desired relationship is that signal 1 has a greater magnitude than signal 2, a favorable comparison may be achieved when the magnitude of signal 1 is greater than that of signal 2 or when the magnitude of signal 2 is less than that of signal 1.
The present invention has also been described above with the aid of method steps illustrating the performance of specified functions and relationships thereof. The boundaries and sequence of these functional building blocks and method steps have been arbitrarily defined herein for convenience of description. Alternate boundaries and sequences can be defined so long as the specified functions and relationships are appropriately performed. Any such alternate boundaries or sequences are thus within the scope and spirit of the claimed invention.
The present invention has been described above with the aid of functional building blocks illustrating the performance of certain significant functions. The boundaries of these functional building blocks have been arbitrarily defined for convenience of description. Alternate boundaries could be defined as long as the certain significant functions are appropriately performed. Similarly, flow diagram blocks may also have been arbitrarily defined herein to illustrate certain significant functionality. To the extent used, the flow diagram block boundaries and sequence could have been defined otherwise and still perform the certain significant functionality. Such alternate definitions of both functional building blocks and flow diagram blocks and sequences are thus within the scope and spirit of the claimed invention. One of average skill in the art will also recognize that the functional building blocks, and other illustrative blocks, modules and components herein, can be implemented as illustrated or by discrete components, application specific integrated circuits, processors executing appropriate software and the like or any combination thereof.

Claims

1. A radio frequency identification (RFID) reader comprises:

a baseband processing module coupled to:

convert outbound data into outbound modulation information; and

convert an encoded inbound signal into inbound data;

a transmitter section that includes:

an oscillation module coupled to convert a reference oscillation into a radio frequency (RF) oscillation; and

a power amplifier module coupled to amplify and to modulate the RF oscillation in accordance with the outbound modulation information to produce an outbound RF signal;

a receiver section that includes:

a low noise amplifier coupled to amplify an inbound RF signal to produce an amplified inbound RF signal; and

a down conversion module coupled to convert the amplified inbound RF signal into the encoded inbound signal;

an isolation circuit coupled to reduce a blocking effect of the outbound RF signal on the receiver section.

2. The RFID reader of claim 1, wherein the isolation circuit comprises:

a first antenna coupled to the receiver section, wherein the first antenna has a first polarization; and

a second antenna coupled to the transmitter section, wherein the second antenna has a second polarization, and wherein the first polarization is substantially orthogonal to the second polarization.

3. The RFID reader of claim 2, wherein the isolation circuit further comprises:

a first antenna interface to provide the coupling between the first antenna and the receiver section; and

a second antenna interface to provide the coupling between the second antenna and the transmit section, wherein each of the first and second antenna interfaces provides at least one of: impedance matching, bandpass filtering, and a transmission line.

4. The RFID reader of claim 2, wherein the receiver section further comprises:

a blocking module coupled to the low noise amplifier, wherein the inbound RF signal includes a blocking component and a desired signal component, wherein the blocking component corresponds to reception of the outbound RF signal by the first antenna, and wherein the blocking module substantially attenuates the blocking component and passes, substantially unattenuated, the desired signal component to produce the amplified inbound RF signal.

5. The RFID reader of claim 1, wherein the isolation circuit comprises:

an antenna; and

a circulator coupled to the antenna, the receiver section, and the transmitter section.

6. The RFID reader of claim 5, wherein the receiver section further comprises:

7. The RFID reader of claim 5, wherein the isolation circuit further comprises:

an adjustable attenuation module coupled between the circulator and the receiver section, wherein the adjustable attenuation module attenuates the inbound RF signal.

8. The RFID reader of claim 1, wherein the isolation circuit comprises:

an antenna coupled to the transmit section; and

an adjustable attenuation module coupled between the antenna and the receiver section, wherein the adjustable attenuation module attenuates the inbound RF signal.

9. The RFID reader of claim 1, wherein the power amplifier module comprises:

a power amplifier coupled to amplify and to modulate the RF oscillation in accordance with the outbound modulation information to produce an amplified and modulated RF signal; and

a transformer coupled to electromagnetically produce the outbound RF signal from the amplified and modulated RF signal.

10. A transceiver front-end comprises:

a transmitter section that includes:

a power amplifier module coupled to amplify and to modulate the RF oscillation in accordance with outbound modulation information to produce an outbound RF signal;

a receiver section that includes:

a down conversion module coupled to convert the amplified inbound RF signal into an encoded inbound signal; and

11. The transceiver front-end of claim 10, wherein the isolation circuit comprises:

12. The transceiver front-end of claim 11, wherein the isolation circuit further comprises:

13. The transceiver front-end of claim 12, wherein the receiver section further comprises:

14. The transceiver front-end of claim 10, wherein the isolation circuit comprises:

an antenna; and

15. The transceiver front-end of claim 14, wherein the receiver section further comprises:

16. The transceiver front-end of claim 14, wherein the isolation circuit further comprises:

17. The transceiver front-end of claim 10, wherein the isolation circuit comprises:

an antenna coupled to the transmit section; and

18. The transceiver front-end of claim 10, wherein the power amplifier module comprises: