US20080278901A9 - Memory module system and method - Google Patents
Memory module system and method Download PDFInfo
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- US20080278901A9 US20080278901A9 US11/077,952 US7795205A US2008278901A9 US 20080278901 A9 US20080278901 A9 US 20080278901A9 US 7795205 A US7795205 A US 7795205A US 2008278901 A9 US2008278901 A9 US 2008278901A9
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- circuit
- flex circuit
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- memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/189—Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/05—Flexible printed circuits [FPCs]
- H05K2201/056—Folded around rigid support or component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09081—Tongue or tail integrated in planar structure, e.g. obtained by cutting from the planar structure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09445—Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
Definitions
- the present invention relates to systems and methods for creating high density circuit modules.
- DIMM Device In-line Memory Module
- PCB printed circuit board
- the DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector.
- Systems that employ DIMMs provide limited space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.
- the FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility.
- DIMM DIMM
- other circuit board There are several known methods to improve the limited capacity of a DIMM or other circuit board.
- small circuit boards aughter cards
- the additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card while the additional thickness of the daughter card(s) increases the profile of the DIMM.
- MDP Multiple die packages
- This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package.
- the additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed.
- the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.
- Stacked packages or “stacks” are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a stacked high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits in such stacks.
- Staktek Group LP has developed multiple innovations in memory module design and applications including stacks and larger modules. Some designs aggregate several packaged ICs on plug-in modules that replace conventional DIMMs (including, for example, fully buffered, registered or simple DIMM designs).
- circuits other than memory are increasingly included in memory modules.
- the use of other circuitry that may exhibit a profile or dimensionality that differs from that of the memory circuits can increase manufacturing complexity. Consequently, what is needed are methods and systems to adapt flex circuit-based memory modules to more readily incorporate integrated circuit packages of a variety of sizes and dimensions.
- Memory module flex circuitry is devised to accommodate packaged integrated circuit devices (ICs) of varying heights or thicknesses.
- ICs integrated circuit devices
- the invention may be employed to advantage in a variety of modules that employ flex circuitry including, but not limited to, fully-buffered, registered or more simple memory modules. Many such modules may replace conventionally-constructed DIMMs without change to the system in which the module is employed.
- Regions of the flex circuitry devised to provide one or more mounting locales for ICs are delineated or separated, in part, from the main body of the flex circuit.
- the delineation or separation may be implemented in a preferred embodiment by separating a designated IC mounting area or peninsula from the main body of the flex circuitry either with isolating areas or separations or with tabs that extend from the primary perimeter of the flex circuitry.
- FIG. 1 is a depiction of a first side of a flex circuit devised in accordance with a preferred embodiment of the present invention.
- FIG. 2 depicts a second side of a flex circuit that may be employed in a memory module in accordance with a preferred embodiment of the present invention.
- FIG. 3 is a cross-sectional depiction through certain devices of a module constructed in accordance with a preferred embodiment of the present invention.
- FIG. 4 is a cross-sectional depiction through certain devices of a module constructed in accordance with a preferred embodiment of the present invention.
- FIG. 5 depicts a flex circuit devised in accordance with another preferred embodiment of the present invention.
- FIG. 6 depicts a memory module devised in accordance with another preferred embodiment of the present invention.
- FIG. 7 depicts an alternative embodiment in accordance with the invention.
- FIGS. 8 and 9 depict cross-sectional views of alternative embodiments in accordance with the present invention taken along line A of FIG. 7 .
- FIGS. 10 and 11 depict cross-sectional views of alternative embodiments in accord with the present invention taken along line B of FIG. 8 .
- FIGS. 1 and 2 depict opposing sides 8 and 9 , respectively, of a preferred flex circuit 12 (“flex”, “flex circuitry”, “flexible circuit”) used in constructing a module according to a preferred embodiment of the present invention.
- Flex circuit 12 is preferably made from one or more conductive layers supported by one or more flexible substrate layers as described with further detail in U.S. patent application Ser. No. 10/934,027 which has been incorporated by reference and which application is owned by the assignee of the present invention.
- the entirety of the flex circuit 12 may be flexible or, as those of skill in the art will recognize, the flexible circuit 12 may be made flexible in certain areas to allow conformability to required shapes or bends, and rigid in other areas to provide rigid and planar mounting surfaces.
- Preferred flex circuit 12 has openings 17 for use in aligning flex circuit 12 to substrate 14 during assembly.
- ICs 18 on flexible circuit 12 are, in the depicted embodiment, chip-scale packaged memory devices.
- chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die.
- CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP.
- Embodiments of the present invention may be employed with leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an IC 18 is indicated in the exemplar Figs.
- Multiple integrated circuit die may be included in a package depicted as a single IC 18 . While in this embodiment memory ICs are used to provide a memory expansion board or module, various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGA's, RF transceiver circuitry, and digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability.
- IC 18 may be devices of a first primary function or type such as, for example, memory, while other devices such as depicted circuit 25 , for example, or circuit 19 may be devices of a second primary function or type such as, for example, thermal sensing in which the circuit generates a signal which may be employed to calculate the heat accumulation or temperature of a module.
- Circuit 19 depicted on FIGS. 1 and 2 may be a memory buffer or controller and, in a fully-buffered module, it may also be considered a representation of the well known advanced memory buffer or “AMB”, although its representation scale is merely exemplar and should not be considered literal.
- AMB advanced memory buffer
- Depicted circuit 25 shown on FIG. 2 is mounted on mounting peninsula or peninsular mounting area 26 of flex circuit 12 .
- Peninsula or peninsular mounting area 26 is separate, in part, from main body 29 of flex circuit 12 and, in this case, that separation is effectuated by separations 27 .
- peninsular mounting area 26 is within the perimeter edge of main body 29 but other embodiments may exhibit a peninsular mounting area that extends beyond a perimeter edge of main body 29 as will be shown in the exemplar embodiment depicted in later FIG. 5 .
- Separations 27 give peninsula 26 freedom of movement that will be shown in later Figs. to provide flexibility in positioning integrated circuit (IC) 25 particularly when IC 25 exhibits a profile or thickness that varies from that exhibited by ICs 18 .
- FIG. 1 depicts a top or outer side 8 of flex circuit 12 having ICs 18 mounted in two rows IC R1 and IC R2 .
- Contact arrays are disposed beneath ICs 18 and circuits 19 and 25 to provide conductive pads for interconnection to the ICs.
- An exemplar contact array 11 A is shown as is exemplar IC 18 to be mounted at contact array 11 A as depicted.
- the contact arrays 11 A that correspond to an IC plurality such as IC R1 and IC R2 may be considered a contact array set.
- flex circuit 12 has two rows (C R1 and C R2 ) of module contacts 20 . These contacts are adapted for insertion in a circuit board socket such as in a preferred embodiment, an expansion board edge connector.
- a circuit board socket such as in a preferred embodiment, an expansion board edge connector.
- Side 9 of flex circuit 12 is on the inside in several depicted configurations of module 10 and thus side 9 is closer to substrate 14 about which flex circuit 12 is disposed than is side 8 .
- Other embodiments may have other numbers of ranks and combinations of plural CSPs connected to create the module of the present invention.
- some embodiments may be configured to supplant conventional fully-buffered DIMMs as disclosed in detail in co-pending U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 which has been incorporated by reference.
- circuit 25 may be mounted on either or both sides 8 and 9 of flex 12 .
- circuit 25 is depicted on side 9 which will be on the inner side of module 10 .
- circuit 25 represents a thermal sensor to indicate the temperatures exhibited by the module and, consequently, circuit 25 is placed closer to the substrate by mounting it on what will be the inner side of flex circuit 12 when flex 12 is assembled with the module.
- Flex circuit 12 may also depicted with reference to the perimeter edges of its main body 29 , two of which perimeter edges are typically long (PE long1 and PE long 2 ) and two of which are typically shorter (PE short1 and PE short2 ).
- Other embodiments may employ flex circuits 12 that are not rectangular in shape and may be square in which case the perimeter edges would be of equal size or other convenient shape to adapt to manufacturing particulars. Rectangular shapes for flex circuit 12 assist, however, in providing a low profile for a preferred module devised with use of flex circuit 12 .
- FIG. 1 depicts an exemplar conductive trace 21 connecting rows CR 1 and C R2 of module contacts 20 to ICs 18 .
- Traces 21 may also connect to vias that may transit to other conductive layers of flex 12 in certain embodiments having more than one conductive layer.
- exemplar vias 23 connecting a signal trace 21 from circuit 19 to a trace 24 disposed on another conductive layer of flex 12 as illustrated by the dotted line of trace 24 .
- vias connect ICs 18 on side 9 of flex 12 to module contacts 20 .
- Traces may make other connections between the ICs on either side of flex 12 and may traverse the rows of module contacts 20 to interconnect ICs.
- the present invention may be implemented as a module bearing ICs on only one side of flex circuit 12 .
- FIG. 3 is a cross section view of a module 10 devised in accordance with a preferred embodiment of the present invention.
- Module 10 is populated with ICs 18 having top surfaces 18 T and bottom surfaces 18 B .
- Substrate or support structure 14 has first and second perimeter edges 16 A and 16 B appearing in the depiction of FIG. 3 as ends.
- Substrate or support structure 14 typically has first and second lateral sides S 1 and S 2 .
- Flex 12 is wrapped about or passed about perimeter edge 16 A of substrate 14 , which in the depicted embodiment, provides the basic shape of a common DIMM form factor such as that defined by JEDEC standard MO-256. That places a first part ( 121 ) of flex circuit 12 proximal to side S 1 of substrate 14 and a second part ( 122 ) of flex circuit 12 proximal to side S 2 of substrate 14 .
- IC 25 is shown as having a thickness, profile, or height “H” which, in the case of the embodiment of FIG. 3 is less than thickness, profile, or height H M of ICs 18 and is greater than H M in the embodiment of FIG. 4 .
- H thickness, profile, or height
- IC 25 is representative of any of a variety of ICs that exhibit a profile that is different from that exhibited by ICs 18 and need not be a thermal sensor.
- ICs 18 that are proximal to substrate 14 may preferably be attached to substrate 14 with an adhesive attachment of their respective upper sides, so too may IC 25 be attached to substrate 14 with an adhesive such as that depicted by reference 30 . While in this embodiment, the four depicted ICs are attached to flex circuit 12 in opposing pairs, this is not limiting and more ICs may be connected in other arrangements such as, for example, staggered or offset arrangements, examples of which may be found in U.S. patent application Ser. No. 10/934,027 filed Sep. 3, 2004 and U.S. patent application Ser. No. 11/005,992 filed Dec. 7, 2004, both of which have been incorporated by reference.
- flex circuit 12 has module contacts 20 positioned in a manner devised to fit in a circuit board card edge connector or socket such as edge connector 31 shown in FIG. 4 and connect to corresponding contacts in the connector (not shown).
- edge connector 31 may be a part of a variety of other devices such as general purpose computers and notebooks.
- module contacts 20 are shown protruding from the surface of flex circuit 12 , this is not limiting and other embodiments may have flush contacts or contacts below the surface level of flex 12 .
- Substrate 14 supports module contacts 20 from behind flex circuit 12 in a manner devised to provide the mechanical form required for insertion into a socket.
- the thickness or surface of substrate 14 may vary in a variety of ways such as shown, for example in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004. Further, in the vicinity of perimeter edge 16 A or the vicinity of perimeter edge 16 B the shape of substrate 14 may also differ from a uniform taper. Non-limiting examples of such possible variations are found in U.S. patent application Ser. No. 10/934,027, filed Sep.
- Substrate 14 in the depicted embodiment is preferably made of a metal such as aluminum or copper, as non-limiting examples, or where thermal management is less of an issue, materials such as FR4 (flame retardant type 4) epoxy laminate, PTFE (poly-tetra-fluoro-ethylene) or plastic.
- FR4 flame retardant type 4
- PTFE poly-tetra-fluoro-ethylene
- advantageous features from multiple technologies may be combined with use of FR4 having a layer of copper on both sides to provide a substrate 14 devised from familiar materials which may provide heat conduction or a ground plane.
- a flex circuit 12 is provided with one or more mounting peninsulas that have been delineated from the body of flex circuit 12 . That flex circuit 12 is laid flat and one or both sides are populated according to circuit board assembly techniques known in the art. Flex circuit 12 is then folded about end 16 A of substrate 14 . Next, optionally, tooling holes 17 may be used to align flex 12 to substrate 14 . Flex 12 may be laminated or otherwise attached to substrate 14 at portions 24 . Further, top surfaces 18 T of ICs 18 and the top surface of circuit 25 may be attached to substrate 14 in a manner devised to provide mechanical integrity or thermal conduction.
- the depicted adhesive 30 and flex 12 may vary in thickness and are not drawn to scale to simplify the drawing.
- the depicted substrate 14 has a thickness such that when assembled with the flex 12 and adhesive 30 , the thickness measured between module contacts 20 falls in the range specified for the mating connector.
- flex circuit 12 may be wrapped about perimeter edge 16 B or both perimeter edges 16 A and 16 B of substrate 14 .
- multiple flex circuits may be employed or a single flex circuit may connect one or both sets of contacts 20 to the resident ICs.
- a variety of representative embodiments of module 10 that may employ the inventions disclosed herein can be found in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 all of which are owned by the assignee of the present invention and are each incorporated by reference into this application.
- FIG. 5 depicts side 8 of a flex circuit 12 and illustrates peninsula 26 devised as an outcropping from main body 29 of flex circuit 12 .
- Peninsular mounting area 26 extends beyond a perimeter line of main body 29 of flex circuit 12 .
- Perimeter line of main body 29 is identified by line “P F ” shown in FIG. 5 .
- Side or peninsular mounting area 26 bears IC 25 .
- FIG. 6 depicts an exemplar module 10 as may be assembled using flex circuit 12 devised as illustrated in FIG. 5 .
- flex circuit 12 extends generally along a plane “P” that lies between two ICs 18 on the S2 side of substrate 14 .
- flex circuit 12 is arced over at arc, bend, or directional reversal point 32 on the S2 side of substrate 14 to place peninsula 26 on the S2 side of substrate 14 but more proximal to substrate 14 than is the main body 29 of flex circuit 12 on that side of substrate 14 .
- This allows circuit 25 to be disposed so that it may be placed as close to substrate 14 as desired including in contact with substrate 14 .
- FIG. 7 depicts an alternative embodiment in accordance with the invention.
- Module 10 may be connected so that one-half of the flex circuit 12 supports one-half of the data bits.
- Each half of flex circuit 12 has two sets of three rows of four CSPs 18 each.
- the resulting module 10 has a thickness “T” shown in FIG. 8 which is 3 ⁇ the thickness of a CSP 18 plus 2 ⁇ the thickness of flex circuit 12 .
- This arrangement provides several combinations of one-half of the data bits as those of skill will recognize after appreciating this specification.
- FIGS. 8 and 9 depict cross-sectional views of alternative embodiments in accordance with the present invention taken along line A of FIG. 7 .
- FIGS. 10 and 11 depict cross-sectional views of alternative embodiments in accord with the present invention taken along line B of FIG. 8 .
- the present invention may be employed to advantage in a variety of applications and environment such as, for example, in computers such as servers and notebook computers by being placed in motherboard expansion slots to provide enhanced memory capacity while utilizing fewer sockets.
- Two high rank embodiments or single rank high embodiments may both be employed to such advantage as those of skill will recognize after appreciating this specification as well as the U.S. patent applications that have been incorporated herein by reference.
Abstract
Description
- This application incorporates by reference each of the following U.S. patent applications: U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004.
- The present invention relates to systems and methods for creating high density circuit modules.
- The well-known DIMM (Dual In-line Memory Module) board has been used for years, in various forms, to provide memory expansion. A typical DIMM includes a conventional PCB (printed circuit board) with memory devices and supporting digital logic devices mounted on both sides. The DIMM is typically mounted in the host computer system by inserting a contact-bearing edge of the DIMM into a card edge connector. Systems that employ DIMMs provide limited space for such devices and conventional DIMM-based solutions have typically provided only a moderate amount of memory expansion.
- As die sizes increase, the limited surface area available on conventional DIMMs limits the number of devices that may be carried on a memory expansion module devised according to conventional DIMM techniques. Further, as bus speeds have increased, fewer devices per channel can be reliably addressed with a DIMM-based solution. For example, 288 ICs or devices per channel may be addressed using the SDRAM-100 bus protocol with an unbuffered DIMM. Using the DDR-200 bus protocol, approximately 144 devices may be addressed per channel. With the DDR2-400 bus protocol, only 72 devices per channel may be addressed. This constraint has led to the development of the fully-buffered DIMM (FB-DIMM) with buffered C/A and data in which 288 devices per channel may be addressed. With the FB-DIMM, not only has capacity increased, pin count has declined to approximately 69 from the approximately 240 pins previously required.
- The FB-DIMM circuit solution is expected to offer practical motherboard memory capacities of up to about 192 gigabytes with six channels and eight DIMMs per channel and two ranks per DIMM using one gigabyte DRAMs. This solution should also be adaptable to next generation technologies and should exhibit significant downward compatibility.
- This great improvement has, however, come with some cost and will eventually be self-limiting. The basic principle of systems that employ FB-DIMM relies upon a point-to-point or serial addressing scheme rather than the parallel multi-drop interface that dictates non-buffered DIMM addressing. That is, one DIMM is in point-to-point relationship with the memory controller and each DIMM is in point-to-point relationship with adjacent DIMMs. Consequently, as bus speeds increase, the number of DIMMs on a bus will decline as the discontinuities caused by the chain of point-to-point connections from the controller to the “last” DIMM become magnified in effect as speeds increase. Consequently, methods to increase the capacity of a single DIMM find value in contemporary memory and computing systems.
- There are several known methods to improve the limited capacity of a DIMM or other circuit board. In one strategy, for example, small circuit boards (daughter cards) are connected to the DIMM to provide extra mounting space. The additional connection may cause, however, flawed signal integrity for the data signals passing from the DIMM to the daughter card while the additional thickness of the daughter card(s) increases the profile of the DIMM.
- Multiple die packages (MDP) are also used to increase DIMM capacity while preserving profile conformity. This scheme increases the capacity of the memory devices on the DIMM by including multiple semiconductor die in a single device package. The additional heat generated by the multiple die typically requires, however, additional cooling capabilities to operate at maximum operating speed. Further, the MDP scheme may exhibit increased costs because of increased yield loss from packaging together multiple die that are not fully pre-tested.
- Stacked packages or “stacks” are yet another strategy used to increase circuit board capacity. This scheme increases capacity by stacking packaged integrated circuits to create a stacked high-density circuit module for mounting on the circuit board. In some techniques, flexible conductors are used to selectively interconnect packaged integrated circuits in such stacks.
- Staktek Group LP has developed multiple innovations in memory module design and applications including stacks and larger modules. Some designs aggregate several packaged ICs on plug-in modules that replace conventional DIMMs (including, for example, fully buffered, registered or simple DIMM designs).
- As signal management is brought on-board and capacities and consequent thermal issues multiply, circuits other than memory are increasingly included in memory modules. The use of other circuitry that may exhibit a profile or dimensionality that differs from that of the memory circuits can increase manufacturing complexity. Consequently, what is needed are methods and systems to adapt flex circuit-based memory modules to more readily incorporate integrated circuit packages of a variety of sizes and dimensions.
- Memory module flex circuitry is devised to accommodate packaged integrated circuit devices (ICs) of varying heights or thicknesses. The invention may be employed to advantage in a variety of modules that employ flex circuitry including, but not limited to, fully-buffered, registered or more simple memory modules. Many such modules may replace conventionally-constructed DIMMs without change to the system in which the module is employed.
- Regions of the flex circuitry devised to provide one or more mounting locales for ICs are delineated or separated, in part, from the main body of the flex circuit. The delineation or separation may be implemented in a preferred embodiment by separating a designated IC mounting area or peninsula from the main body of the flex circuitry either with isolating areas or separations or with tabs that extend from the primary perimeter of the flex circuitry.
-
FIG. 1 is a depiction of a first side of a flex circuit devised in accordance with a preferred embodiment of the present invention. -
FIG. 2 depicts a second side of a flex circuit that may be employed in a memory module in accordance with a preferred embodiment of the present invention. -
FIG. 3 is a cross-sectional depiction through certain devices of a module constructed in accordance with a preferred embodiment of the present invention. -
FIG. 4 is a cross-sectional depiction through certain devices of a module constructed in accordance with a preferred embodiment of the present invention. -
FIG. 5 depicts a flex circuit devised in accordance with another preferred embodiment of the present invention. -
FIG. 6 depicts a memory module devised in accordance with another preferred embodiment of the present invention. -
FIG. 7 depicts an alternative embodiment in accordance with the invention. -
FIGS. 8 and 9 depict cross-sectional views of alternative embodiments in accordance with the present invention taken along line A ofFIG. 7 . -
FIGS. 10 and 11 depict cross-sectional views of alternative embodiments in accord with the present invention taken along line B ofFIG. 8 . -
FIGS. 1 and 2 depictopposing sides Flex circuit 12 is preferably made from one or more conductive layers supported by one or more flexible substrate layers as described with further detail in U.S. patent application Ser. No. 10/934,027 which has been incorporated by reference and which application is owned by the assignee of the present invention. The entirety of theflex circuit 12 may be flexible or, as those of skill in the art will recognize, theflexible circuit 12 may be made flexible in certain areas to allow conformability to required shapes or bends, and rigid in other areas to provide rigid and planar mounting surfaces. Preferredflex circuit 12 hasopenings 17 for use in aligningflex circuit 12 tosubstrate 14 during assembly. -
ICs 18 onflexible circuit 12 are, in the depicted embodiment, chip-scale packaged memory devices. For purposes of this disclosure, the term chip-scale or “CSP” shall refer to integrated circuitry of any function with an array package providing connection to one or more die through contacts (often embodied as “bumps” or “balls” for example) distributed across a major surface of the package or die. CSP does not refer to leaded devices that provide connection to an integrated circuit within the package through leads emergent from at least one side of the periphery of the package such as, for example, a TSOP. - Embodiments of the present invention may be employed with leaded or CSP devices or other devices in both packaged and unpackaged forms but where the term CSP is used, the above definition for CSP should be adopted. Consequently, although CSP excludes leaded devices, references to CSP are to be broadly construed to include the large variety of array devices (and not to be limited to memory only) and whether die-sized or other size such as BGA and micro BGA as well as flip-chip. As those of skill will understand after appreciating this disclosure, some embodiments of the present invention may be devised to employ stacks of ICs each disposed where an
IC 18 is indicated in the exemplar Figs. - Multiple integrated circuit die may be included in a package depicted as a
single IC 18. While in this embodiment memory ICs are used to provide a memory expansion board or module, various embodiments may include a variety of integrated circuits and other components. Such variety may include microprocessors, FPGA's, RF transceiver circuitry, and digital logic, as a list of non-limiting examples, or other circuits or systems which may benefit from a high-density circuit board or module capability. Thus the depicted multiple instances ofIC 18 may be devices of a first primary function or type such as, for example, memory, while other devices such as depictedcircuit 25, for example, orcircuit 19 may be devices of a second primary function or type such as, for example, thermal sensing in which the circuit generates a signal which may be employed to calculate the heat accumulation or temperature of a module.Circuit 19 depicted onFIGS. 1 and 2 may be a memory buffer or controller and, in a fully-buffered module, it may also be considered a representation of the well known advanced memory buffer or “AMB”, although its representation scale is merely exemplar and should not be considered literal. - Depicted
circuit 25 shown onFIG. 2 is mounted on mounting peninsula orpeninsular mounting area 26 offlex circuit 12. Peninsula orpeninsular mounting area 26 is separate, in part, frommain body 29 offlex circuit 12 and, in this case, that separation is effectuated byseparations 27. In this embodiment,peninsular mounting area 26 is within the perimeter edge ofmain body 29 but other embodiments may exhibit a peninsular mounting area that extends beyond a perimeter edge ofmain body 29 as will be shown in the exemplar embodiment depicted in laterFIG. 5 . -
Separations 27 givepeninsula 26 freedom of movement that will be shown in later Figs. to provide flexibility in positioning integrated circuit (IC) 25 particularly whenIC 25 exhibits a profile or thickness that varies from that exhibited byICs 18. -
FIG. 1 depicts a top orouter side 8 offlex circuit 12 havingICs 18 mounted in two rows ICR1 and ICR2. Contact arrays are disposed beneathICs 18 andcircuits exemplar contact array 11A is shown as isexemplar IC 18 to be mounted atcontact array 11A as depicted. Thecontact arrays 11A that correspond to an IC plurality such as ICR1 and ICR2 may be considered a contact array set. - Between the rows ICR1 and ICR2 of
ICs 18,flex circuit 12 has two rows (CR1 and CR2) ofmodule contacts 20. These contacts are adapted for insertion in a circuit board socket such as in a preferred embodiment, an expansion board edge connector. Whenflex circuit 12 is folded as depicted in later Figs.,side 8 depicted inFIG. 1 is presented at the outside ofmodule 10. The opposingside 9 of flex circuit 12 (FIG. 2 ) is on the inside in the folded configurations ofFIGS. 3 and 4 , for example. Other embodiments may have other numbers of contacts arranged in one or more rows or otherwise and there may be only one such row of contacts. Those of skill will recognize that the identified pluralities of CSPs (i.e, ICR1 and ICR2) when disposed in the configurations depicted, are typically described as “ranks”. -
Side 9 offlex circuit 12 is on the inside in several depicted configurations ofmodule 10 and thusside 9 is closer tosubstrate 14 about whichflex circuit 12 is disposed than isside 8. Other embodiments may have other numbers of ranks and combinations of plural CSPs connected to create the module of the present invention. In particular, some embodiments may be configured to supplant conventional fully-buffered DIMMs as disclosed in detail in co-pending U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 which has been incorporated by reference. - Various discrete components such as termination resistors, bypass capacitors, and bias resistors, in addition to the
circuits 19 shown onsides flex circuit 12 as well ascircuit 25 may be mounted on either or bothsides flex 12. In the depicted embodiment, however,circuit 25 is depicted onside 9 which will be on the inner side ofmodule 10. In the depicted embodiment,circuit 25 represents a thermal sensor to indicate the temperatures exhibited by the module and, consequently,circuit 25 is placed closer to the substrate by mounting it on what will be the inner side offlex circuit 12 whenflex 12 is assembled with the module. -
Flex circuit 12 may also depicted with reference to the perimeter edges of itsmain body 29, two of which perimeter edges are typically long (PElong1 and PElong 2) and two of which are typically shorter (PEshort1 and PEshort2). Other embodiments may employflex circuits 12 that are not rectangular in shape and may be square in which case the perimeter edges would be of equal size or other convenient shape to adapt to manufacturing particulars. Rectangular shapes forflex circuit 12 assist, however, in providing a low profile for a preferred module devised with use offlex circuit 12. -
FIG. 1 depicts an exemplarconductive trace 21 connecting rows CR1 and CR2 ofmodule contacts 20 toICs 18. Those of skill will understand that there are many such traces in a typical embodiment.Traces 21 may also connect to vias that may transit to other conductive layers offlex 12 in certain embodiments having more than one conductive layer. Also shown areexemplar vias 23 connecting asignal trace 21 fromcircuit 19 to atrace 24 disposed on another conductive layer offlex 12 as illustrated by the dotted line oftrace 24. In a preferred embodiment, vias connectICs 18 onside 9 offlex 12 tomodule contacts 20. Traces may make other connections between the ICs on either side offlex 12 and may traverse the rows ofmodule contacts 20 to interconnect ICs. Together the various traces and vias make interconnections needed to convey data and control signals amongst the various ICs and buffer circuits. Those of skill will understand that amongst other embodiments, the present invention may be implemented as a module bearing ICs on only one side offlex circuit 12. -
FIG. 3 is a cross section view of amodule 10 devised in accordance with a preferred embodiment of the present invention.Module 10 is populated withICs 18 havingtop surfaces 18 T and bottom surfaces 18 B. Substrate orsupport structure 14 has first and second perimeter edges 16A and 16B appearing in the depiction ofFIG. 3 as ends. Substrate orsupport structure 14 typically has first and second lateral sides S1 and S2. Flex 12 is wrapped about or passed aboutperimeter edge 16A ofsubstrate 14, which in the depicted embodiment, provides the basic shape of a common DIMM form factor such as that defined by JEDEC standard MO-256. That places a first part (121) offlex circuit 12 proximal to side S1 ofsubstrate 14 and a second part (122) offlex circuit 12 proximal to side S2 ofsubstrate 14. - In both
FIGS. 3 and 4 , the pair ofICs 18 depicted on the S2 side ofsubstrate 14 are shown with less pronounced lines to illustrate that the cross-section is taken along a plane that intersectsIC 25 rather thanICs 18 on the S2 side ofsubstrate 14. InFIGS. 3 and 4 ,IC 25 is shown as having a thickness, profile, or height “H” which, in the case of the embodiment ofFIG. 3 is less than thickness, profile, or height HM ofICs 18 and is greater than HM in the embodiment ofFIG. 4 . Those of skill will recognize thatIC 25 is representative of any of a variety of ICs that exhibit a profile that is different from that exhibited byICs 18 and need not be a thermal sensor. Just asICs 18 that are proximal tosubstrate 14 may preferably be attached tosubstrate 14 with an adhesive attachment of their respective upper sides, so too mayIC 25 be attached tosubstrate 14 with an adhesive such as that depicted byreference 30. While in this embodiment, the four depicted ICs are attached to flexcircuit 12 in opposing pairs, this is not limiting and more ICs may be connected in other arrangements such as, for example, staggered or offset arrangements, examples of which may be found in U.S. patent application Ser. No. 10/934,027 filed Sep. 3, 2004 and U.S. patent application Ser. No. 11/005,992 filed Dec. 7, 2004, both of which have been incorporated by reference. - In the embodiments depicted in
FIGS. 3 and 4 ,flex circuit 12 hasmodule contacts 20 positioned in a manner devised to fit in a circuit board card edge connector or socket such asedge connector 31 shown inFIG. 4 and connect to corresponding contacts in the connector (not shown). As those of skill will recognize,edge connector 31 may be a part of a variety of other devices such as general purpose computers and notebooks. Whilemodule contacts 20 are shown protruding from the surface offlex circuit 12, this is not limiting and other embodiments may have flush contacts or contacts below the surface level offlex 12.Substrate 14 supportsmodule contacts 20 from behindflex circuit 12 in a manner devised to provide the mechanical form required for insertion into a socket. While the depictedsubstrate 14 has uniform thickness, this is not limiting and in other embodiments the thickness or surface ofsubstrate 14 may vary in a variety of ways such as shown, for example in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004. Further, in the vicinity ofperimeter edge 16A or the vicinity ofperimeter edge 16B the shape ofsubstrate 14 may also differ from a uniform taper. Non-limiting examples of such possible variations are found in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004 which is owned by the assignee of the present invention and has been incorporated herein by reference.Substrate 14 in the depicted embodiment is preferably made of a metal such as aluminum or copper, as non-limiting examples, or where thermal management is less of an issue, materials such as FR4 (flame retardant type 4) epoxy laminate, PTFE (poly-tetra-fluoro-ethylene) or plastic. In another embodiment, advantageous features from multiple technologies may be combined with use of FR4 having a layer of copper on both sides to provide asubstrate 14 devised from familiar materials which may provide heat conduction or a ground plane. - One advantageous methodology for efficiently assembling a
circuit module 10 such as described and depicted herein is as follows. In a preferred method of assembling apreferred module assembly 10, aflex circuit 12 is provided with one or more mounting peninsulas that have been delineated from the body offlex circuit 12. Thatflex circuit 12 is laid flat and one or both sides are populated according to circuit board assembly techniques known in the art.Flex circuit 12 is then folded aboutend 16A ofsubstrate 14. Next, optionally, tooling holes 17 may be used to alignflex 12 tosubstrate 14.Flex 12 may be laminated or otherwise attached tosubstrate 14 atportions 24. Further,top surfaces 18T ofICs 18 and the top surface ofcircuit 25 may be attached tosubstrate 14 in a manner devised to provide mechanical integrity or thermal conduction. - The depicted adhesive 30 and
flex 12 may vary in thickness and are not drawn to scale to simplify the drawing. The depictedsubstrate 14 has a thickness such that when assembled with theflex 12 and adhesive 30, the thickness measured betweenmodule contacts 20 falls in the range specified for the mating connector. In some other embodiments,flex circuit 12 may be wrapped aboutperimeter edge 16B or bothperimeter edges substrate 14. In other instances, multiple flex circuits may be employed or a single flex circuit may connect one or both sets ofcontacts 20 to the resident ICs. A variety of representative embodiments ofmodule 10 that may employ the inventions disclosed herein can be found in U.S. patent application Ser. No. 10/934,027, filed Sep. 3, 2004; U.S. patent application Ser. No. 11/005,992, filed Dec. 7, 2004; and U.S. patent application Ser. No. 11/007,551, filed Dec. 8, 2004 all of which are owned by the assignee of the present invention and are each incorporated by reference into this application. -
FIG. 5 depictsside 8 of aflex circuit 12 and illustratespeninsula 26 devised as an outcropping frommain body 29 offlex circuit 12.Peninsular mounting area 26 extends beyond a perimeter line ofmain body 29 offlex circuit 12. Perimeter line ofmain body 29 is identified by line “PF” shown inFIG. 5 . Peninsula orpeninsular mounting area 26bears IC 25.FIG. 6 depicts anexemplar module 10 as may be assembled usingflex circuit 12 devised as illustrated inFIG. 5 . - As shown in the embodiment depicted in
FIG. 6 , on side S2 ofsubstrate 14,flex circuit 12 extends generally along a plane “P” that lies between twoICs 18 on the S2 side ofsubstrate 14. As shown,flex circuit 12 is arced over at arc, bend, ordirectional reversal point 32 on the S2 side ofsubstrate 14 to placepeninsula 26 on the S2 side ofsubstrate 14 but more proximal tosubstrate 14 than is themain body 29 offlex circuit 12 on that side ofsubstrate 14. This allowscircuit 25 to be disposed so that it may be placed as close tosubstrate 14 as desired including in contact withsubstrate 14. -
FIG. 7 depicts an alternative embodiment in accordance with the invention.Module 10 may be connected so that one-half of theflex circuit 12 supports one-half of the data bits. Each half offlex circuit 12 has two sets of three rows of fourCSPs 18 each. The resultingmodule 10 has a thickness “T” shown inFIG. 8 which is 3× the thickness of aCSP 18 plus 2× the thickness offlex circuit 12. This arrangement provides several combinations of one-half of the data bits as those of skill will recognize after appreciating this specification. -
FIGS. 8 and 9 depict cross-sectional views of alternative embodiments in accordance with the present invention taken along line A ofFIG. 7 . -
FIGS. 10 and 11 depict cross-sectional views of alternative embodiments in accord with the present invention taken along line B ofFIG. 8 . - The present invention may be employed to advantage in a variety of applications and environment such as, for example, in computers such as servers and notebook computers by being placed in motherboard expansion slots to provide enhanced memory capacity while utilizing fewer sockets. Two high rank embodiments or single rank high embodiments may both be employed to such advantage as those of skill will recognize after appreciating this specification as well as the U.S. patent applications that have been incorporated herein by reference.
- Although the present invention has been described in detail, it will be apparent to those skilled in the art that many embodiments taking a variety of specific forms and reflecting changes, substitutions and alterations can be made without departing from the spirit and scope of the invention. Therefore, the described embodiments illustrate but do not restrict the scope of the claims.
Claims (22)
Priority Applications (1)
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US11/077,952 US7606040B2 (en) | 2004-09-03 | 2005-03-11 | Memory module system and method |
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US11/007,551 US7511968B2 (en) | 2004-09-03 | 2004-12-08 | Buffered thin module system and method |
US11/077,952 US7606040B2 (en) | 2004-09-03 | 2005-03-11 | Memory module system and method |
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US11/007,551 Continuation-In-Part US7511968B2 (en) | 2004-09-03 | 2004-12-08 | Buffered thin module system and method |
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