US20090165711A1 - Substrate treating apparatus with substrate reordering - Google Patents

Substrate treating apparatus with substrate reordering Download PDF

Info

Publication number
US20090165711A1
US20090165711A1 US12/343,302 US34330208A US2009165711A1 US 20090165711 A1 US20090165711 A1 US 20090165711A1 US 34330208 A US34330208 A US 34330208A US 2009165711 A1 US2009165711 A1 US 2009165711A1
Authority
US
United States
Prior art keywords
substrate
substrates
treating
transport mechanism
exposing machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/343,302
Inventor
Hiroyuki Ogura
Tsuyoshi Mitsuhashi
Yoshiteru Fukutomi
Kenya Morinishi
Yasuo Kawamatsu
Hiromichi Nagashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Screen Semiconductor Solutions Co Ltd
Original Assignee
Screen Semiconductor Solutions Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=40796578&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US20090165711(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Screen Semiconductor Solutions Co Ltd filed Critical Screen Semiconductor Solutions Co Ltd
Assigned to SOKUDO CO., LTD. reassignment SOKUDO CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUKUTOMI, YOSHITERU, KAWAMATSU, YASUO, MORINISHI, KENYA, Nagashima, Hiromichi, MITSUHASHI, TSUYOSHI, OGURA, HIROYUKI
Publication of US20090165711A1 publication Critical patent/US20090165711A1/en
Priority to US14/447,409 priority Critical patent/US9368383B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67745Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/708Construction of apparatus, e.g. environment aspects, hygiene aspects or materials
    • G03F7/70975Assembly, maintenance, transport or storage of apparatus
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70Microphotolithographic exposure; Apparatus therefor
    • G03F7/70691Handling of masks or workpieces
    • G03F7/70733Handling masks and workpieces, e.g. exchange of workpiece or mask, transport of workpiece or mask
    • G03F7/7075Handling workpieces outside exposure position, e.g. SMIF box
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/6715Apparatus for applying a liquid, a resin, an ink or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67155Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H01L21/67178Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers vertical arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67276Production flow monitoring, e.g. for increasing throughput
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67754Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a batch of workpieces
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/6776Continuous loading and unloading into and out of a processing chamber, e.g. transporting belts within processing chambers

Definitions

  • JP 2007-340427 This application claims priority to Japanese Patent Application 2007-340427, filed Dec. 28, 2007.
  • the disclosure of JP 2007-340427 is hereby incorporated by reference its entirety for all purposes.
  • This invention relates to a substrate treating apparatus for performing a series of treatments of substrates such as semiconductor wafers, glass substrates for liquid crystal displays, glass substrates for photomasks, and substrates for optical disks (hereinafter called simply “substrates”).
  • substrates such as semiconductor wafers, glass substrates for liquid crystal displays, glass substrates for photomasks, and substrates for optical disks (hereinafter called simply “substrates”).
  • this type of substrate treating apparatus is used to form a resist film on substrates and develop the substrates exposed in a separate exposing machine.
  • the apparatus includes a treating section having, arranged therein, a treating block for forming film such as resist film, a treating block for developing the substrates, and so on.
  • Each treating block includes a single main transport mechanism and various treating units. The main transport mechanism of each block, while transporting substrates to the treating units in that block, transfers the substrates to and from the main transport mechanism of another, adjacent treating block.
  • An interface section is provided for the treating block located at one end.
  • the exposing machine separate from this apparatus is disposed adjacent to the interface section. The interface section transports substrates between the treating section and the exposing machine.
  • the treating section carries out a series of treatments for forming resist film and the like on the substrates, and then feeds the substrates to the interface section.
  • the interface section transports the substrates to the exposing machine.
  • the treating section treats the substrates in an order in which the substrates are loaded into the treating section.
  • the order of the substrates fed from the treating section to the interface section is the same as the order of the substrates loaded into the treating section.
  • the interface section transfers the substrates received from the treating section directly to the exposing machine. Consequently, the substrates are transported to the exposing machine in the order of loading into the treating section.
  • the exposing machine exposes the substrates transported thereto and feeds them back to the interface section.
  • the interface section transports the substrates received from the exposing machine to the treating section, which then develops these substrates.
  • the series of treatments includes also the treatment in the exposing machine separate from this apparatus, the substrates are transported in the same order to each treating block and the exposing machine. It is therefore easy to manage and control each substrate, and to conduct a follow-up check on the treatment history of each substrate, for example (as disclosed in Japanese Unexamined Patent Publication No. 2003-324139, for example).
  • the conventional apparatus with such a construction has the following drawbacks.
  • each treating block has only a single main transport mechanism, making it difficult to improve the throughput of the entire apparatus significantly.
  • the different transport paths could produce an inequality in time taken from introduction into the treating section to feeding to the interface section.
  • the order of substrates transported from the interface section to the exposing machine may not be the same as the order of loading into the treating section. This will result in an inconvenience that the control of each substrate and a follow-up check on the treatment history of each substrate cannot be conducted reliably.
  • This invention has been made having regard to the state of the art noted above. Its object is to provide a substrate treating apparatus that can effectively control the order of substrates transported from a treating section to a separate exposing machine even where the treating section has a plurality of substrate transport paths.
  • a substrate treating apparatus comprising a treating section including a plurality of substrate treatment lines for treating substrates while transporting the substrates substantially horizontally, the substrate treatment lines being capable of treating the substrates in parallel; and an interface section disposed adjacent the treating section for transporting the substrates fed from the substrate treatment lines to an exposing machine provided separately from the apparatus; wherein the substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section.
  • the treating section has a plurality of substrate treatment lines to improve the throughput of the substrate treating apparatus significantly.
  • the substrates can receive treatment in the substrate treatment lines in parallel, and can be transported to the exposing machine in the order in which the substrates are loaded into the treating section. Since the order of the substrates transported to the exposing machine is the same as the order in which the substrates are loaded into the treating section, each substrate can be controlled easily. A follow-up check can also be performed easily on the history of treatment of each substrate in the treating section or in the exposing machine.
  • the substrate treatment lines may be arranged one over another.
  • the substrate treatment lines arranged one over another can prevent an enlarged footprint of the apparatus.
  • the interface section may be arranged to adjust the order of the substrates fed from the substrate treatment lines to the order in which the substrates are loaded into the treating section.
  • the interface section arranged to adjust the order of the substrates fed from the substrate treatment lines, there is no need to adjust timing of substrate feeding between the substrate treatment lines. This allows each of the substrate treatment lines to proceed with treatment of the substrates independently.
  • the interface section may include an interface transport mechanism for transporting the substrates to and from each of the substrate treatment lines and the exposing machine and a buffer unit for temporarily storing the substrates.
  • the interface transport mechanism is arranged to receive a substrate from the substrate treatment lines, to transport the substrate received to the exposing machine when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine.
  • the interface section will receive the substrate. This enables the substrate treatment line to feed a new substrate.
  • the substrate treatment line can feed the substrates promptly after the treatment, thereby preventing a lowering of the throughput of the substrate treating apparatus.
  • the interface section has the buffer unit and when a substrate fed from one of the substrate treatment lines is not the next one to be transported to the exposing machine the substrate is temporarily put on standby in the buffer unit.
  • the order of the substrates fed from the treating section can be adjusted conveniently in the interface section.
  • the “next substrate to be transported to the exposing machine” means the substrate to be transported to the exposing machine after the substrate that has already been transported to the exposing machine when the interface transport mechanism interface receives a substrate fed from one of the substrate treatment lines.
  • the interface transport mechanism may be arranged to transport a substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the interface transport mechanism transports the substrate to the exposing machine.
  • the interface transport mechanism may be arranged to prioritize receiving a substrate being fed from one of the substrate treatment lines above transporting the next substrate currently in the buffer unit to the exposing machine. Then, the substrate treatment lines can always be fed the substrates promptly after the treatment.
  • the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and to the buffer unit; and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine.
  • the first transport mechanism is arranged to transfer a substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, to place the received substrate in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and to transfer the next substrate from the buffer unit to the second transport mechanism when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine.
  • the interface transport mechanism includes a first transport mechanism for receiving the substrates fed from the substrate treatment lines and a separate second transport mechanism for transporting the substrates to the exposing machine.
  • the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and to the buffer unit; and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine.
  • the first transport mechanism is arranged to transfer a substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine.
  • the second transport mechanism is arranged to transport any substrate received from the first transport mechanism to the exposing machine, and to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the interface transport mechanism includes a first transport mechanism for receiving the substrates fed from the substrate treatment lines, and a separate second transport mechanism for transporting the substrates to the exposing machine.
  • the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • a higher efficiency is realized with the second transport mechanism capable of transporting substrates directly from the buffer unit to the exposing machine.
  • the interface transport mechanism may be arranged to change positions of substrates placed in the buffer unit according to the substrate treatment lines from which the substrates are fed. Considering each substrate treatment line, the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line. Thus, by changing positions of substrates placed in the buffer unit according to the substrate treatment lines, the order of substrates to be transported to the exposing machine can be adjusted conveniently in the interface section.
  • the order in which the substrates are loaded into the treating section may be determined based on a relationship of substrate identifying information with the order in which the substrates are loaded into the treating section. Then, the order of loading into the treating section can be determined with respect to the substrates fed from each substrate treatment line. This facilitates an adjustment of the order of substrates to be transported to the exposing machine.
  • the order in which the substrates are loaded into the treating section may be determined based on a relationship of the substrate treatment lines transporting the substrates with the order in which the substrates are loaded into the treating section.
  • the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line.
  • the order in which the substrates are loaded into the treating section can be presumed with respect to the substrates fed from each substrate treatment line.
  • a substrate treating apparatus comprises a treating section including a plurality of treating blocks arranged in juxtaposition, each having treating units arranged on each of vertical stories for treating substrates, and a main transport mechanism provided on each story for transporting the substrates to and from the treating units on the each story, the main transport mechanisms on the same story of adjacent treating blocks being constructed to transfer the substrates to and from each other, the treating blocks arranged at opposite ends acting as a first treating block and a second treating block, respectively, the substrates receiving a series of treatments on each story while the substrates loaded into each story of the first treating block are transported to the second treating block through the same story of each treating block; an indexer section disposed adjacent to the first treating block for transporting the substrates to each story of the first treating block; an interface section disposed adjacent to the second treating block and having an interface transport mechanism for transporting the substrates to and from each story of the second treating block and an exposing machine provided separately from the apparatus; and a controller for controlling the interface transport mechanism to transport the substrates fed from the second treating
  • the indexer section loads the substrates into the treating section.
  • the substrates loaded from the indexer section are transported to either story of the first treating block located at one end of the treating section, respectively.
  • Each story of the first treating block transports the substrates received to the same story of an adjoining treating block.
  • the substrates loaded into each story of the first treating block are transported through the same story of each treating block to the second treating block located at the other end of the treating section.
  • the substrates are treated in the treating units arranged on each story of each treating block.
  • the second treating block feeds the substrates transported from the first treating block to the interface section.
  • the interface transport mechanism provided in the interface section receives the substrates fed from each story of the second treating block and transports the substrates to the exposing machine.
  • the controller controls the interface transport mechanism to transport the substrates fed from the second treating block to the exposing machine in the order in which the substrates are loaded into the first treating block.
  • the plurality of stories of each treating block are arranged one over another, which significantly improves the throughput of the substrate treating apparatus without increasing its footprint. While treating the substrates in parallel in different stories from the first treating block to the second treating block, the substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section.
  • each substrate can be controlled easily.
  • a follow-up check can also be performed easily on the history of treatment of each substrate in the treating section or in the exposing machine.
  • the interface transport mechanism may be arranged to adjust the substrates fed from the second treating block to the order in which the substrates are loaded into the first treating block.
  • the interface transport mechanism arranged to adjust the order of the substrates fed from the second treating block, there is no need to adjust timing of substrate feeding between the different stories from the first treating block to the second treating block. This allows each of the different stories from the first treating block to the second treating block to proceed with treatment of the substrates independently.
  • the interface section may include a buffer unit for temporarily storing the substrates, wherein under control of the controller the interface transport mechanism is arranged to transport the substrate received from the second treating block to the exposing machine when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine.
  • the interface transport mechanism will receive the substrate. This enables each story of the second treating block to be fed a new substrate.
  • the second treating block can feed the substrates smoothly, thereby preventing a lowering of the throughput of the substrate treating apparatus.
  • the interface section has the buffer unit. A substrate other than the next one to be transported to the exposing machine is temporarily put on standby in the buffer unit.
  • the interface section can conveniently adjust the order of the substrates fed from the second treating block.
  • the interface transport mechanism may be arranged to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the interface transport mechanism transports the substrate to the exposing machine.
  • the interface transport mechanism may be arranged to prioritize receiving the substrate fed from the second treating block over transporting a substrate placed in the buffer unit even when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. Then, each story of the second treating block can always be fed the substrates smoothly.
  • the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each story of the second treating block and to the buffer unit and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine.
  • the first transport mechanism under control of the controller, is arranged to transfer a substrate received from each story of the second treating block to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine, and to transfer the next substrate from the buffer unit to the second transport mechanism when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the second transport mechanism under control of the controller, is arranged to transport a substrate received from the first transport mechanism to the exposing machine.
  • the interface transport mechanism includes a first transport mechanism for receiving the substrates fed from each story of the second treating block and a separate second transport mechanism for transporting the substrates to the exposing machine.
  • the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each story of the second treating block and the buffer unit and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine.
  • the first transport mechanism under control of the controller, is arranged to transfer a substrate received from each story of the second treating block to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine.
  • the second transport mechanism is arranged to transport any substrate received from the first transport mechanism to the exposing machine and to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine.
  • the interface transport mechanism includes a first transport mechanism for receiving the substrates fed from each story of the second treating block and a separate, second transport mechanism for transporting the substrates to the exposing machine.
  • the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • a higher efficiency is realized with the second transport mechanism capable of transporting substrates directly from the buffer unit to the exposing machine.
  • the controller may be arranged to stop loading the substrates from the indexer section into the treating section when the substrates placed in the buffer unit exceeds a predetermined number.
  • the buffer unit is unable to receive any further substrates, it is impossible to feed substrates smoothly from the treating section to the interface section. If substrates were loaded into the treating section under such circumstances, variations would occur with the substrates in the time taken from loading into the treating section to feeding from the treating section resulting, for example, in deterioration in the quality of treatment of the substrates.
  • loading of the substrates from the indexer section into the treating section is stopped when the substrates placed in the buffer unit exceed a predetermined number. Thus, the deterioration in the quality of treatment of the substrates can be precluded.
  • the controller may be arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of substrate identifying information with the order in which the substrates are loaded from the indexer section into the treating section. Then, the order of loading into the treating section can be determined with respect to the substrates fed from each story of the second treating block. This facilitates an adjustment of the order of substrates to be transported to the exposing machine.
  • the controller may be arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of the stories of the first treating block transporting the substrates with the order in which the substrates are loaded from the indexer section into the treating section.
  • the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line.
  • the order in which the substrates are loaded into the treating section can be presumed based on the relationship of information showing to which story of the first treating block the substrates have been distributed, with the order in which the substrates are loaded into the treating section. This facilitates adjustment of the order of substrates. Therefore, the order of substrates to be transported to the exposing machine can be adjusted easily.
  • the indexer section may be arranged to distribute the substrate loaded into the treating section regularly and alternately to the stories of the first treating block. Then, the order of the substrates loaded into the first treating block is clear, which enables the order of substrates to be transported to the exposing machine to be adjusted conveniently.
  • the treating section may include coating blocks and developing blocks as the treating blocks.
  • Each of the coating blocks has resist film coating units as the treating units for applying a resist film material to the substrates and each of the developing blocks has developing units as the treating units for supplying a developer to the substrates. Then, resist film can be formed on the substrates and the substrates can be developed effectively.
  • each substrate treatment line can feed following substrates promptly.
  • each of the substrate treatment lines is arranged to carry out treatment for forming resist film on the substrates.
  • each of the substrate treatment lines is arranged to carry out treatment for developing the substrates.
  • each of the substrate treatment lines includes a plurality of main transport mechanisms arranged horizontally, a plurality of treating units provided for each of the main transport mechanisms for treating the substrates, wherein each of the main transport mechanisms is arranged to transfer the substrates to and from a different one of the main transport mechanisms horizontally adjacent thereto while transporting the substrates to and from the treating units associated therewith, thereby carrying out a series of treatments on the substrates.
  • each substrate treatment line can treat the substrates effectively.
  • treating units provided for each of the substrate treatment lines include resist film coating units for applying a resist film material to the substrates.
  • treating units provided for each of the substrate treatment lines include developing units for supplying a developer to the substrates.
  • the substrates can be transferred efficiently between the first transport mechanism and the second transport mechanism.
  • the buffer unit is capable of receiving a plurality of substrates.
  • the order of substrates can be adjusted conveniently.
  • each story of the second treating block can feed following substrates promptly.
  • FIG. 1 is a schematic view showing an outline of a substrate treating apparatus according to this invention
  • FIG. 2 is a plan view showing an outline of the substrate treating apparatus according to this invention.
  • FIG. 3 is a schematic side view showing an arrangement of treating units included in the substrate treating apparatus
  • FIG. 4 is a schematic side view showing an arrangement of treating units included in the substrate treating apparatus
  • FIG. 5 is a view in vertical section taken on line a-a of FIG. 2 ;
  • FIG. 6 is a view in vertical section taken on line b-b of FIG. 2 ;
  • FIG. 7 is a view in vertical section taken on line c-c of FIG. 2 ;
  • FIG. 8 is a view in vertical section taken on line d-d of FIG. 2 ;
  • FIG. 9A is a plan view of coating units
  • FIG. 9B is a sectional view of a coating unit
  • FIG. 10 is a perspective view of a main transport mechanism
  • FIG. 11 is a control block diagram of the substrate treating apparatus according to the invention.
  • FIG. 12 is a flow chart of a series of treatments of substrates
  • FIG. 13 is a view schematically showing operations repeated by each transport mechanism
  • FIG. 14 is a schematic view showing information on a relationship between identification information on substrates and an order of substrates loaded from an ID section into a treating section;
  • FIG. 15 is a schematic view showing information on a relationship between an order of substrates loaded from the ID section into the treating section and substrate treatment lines to which the substrates are transported;
  • FIG. 16A is a schematic view showing information on a relationship between an order of substrates fed from a substrate treatment line to an IF section and an order of substrates loaded from the ID section into the treating section;
  • FIG. 16B is a schematic view showing information on a relationship between an order of substrates fed from a substrate treatment line to the IF section and an order of substrates transported from the ID section to the treating section;
  • FIG. 17A is a view schematically showing how, with progress of time, a plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17B is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17C is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17D is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17E is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17F is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17G is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17H is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17I is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17J is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 18 is a view schematically showing operations repeated by a first and a second transport mechanisms in a modified embodiment.
  • FIG. 1 is a plan view showing an outline of a substrate treating apparatus according to this embodiment.
  • This embodiment provides a substrate treating apparatus 10 for forming resist film or the like on substrates (e.g. semiconductor wafers) W, and developing exposed wafers W.
  • the substrate treating apparatus 10 will be referred to simply as the apparatus 10 as appropriate.
  • This apparatus 10 includes an indexer section (hereinafter called “ID section”) 1 , a treating section 3 and an interface section (hereinafter called “IF section”) 5 .
  • the ID section 1 , treating section 3 and IF section 5 are arranged adjacent one another in the stated order.
  • An exposing machine EXP which is an external apparatus separate from this apparatus 10 , is disposed adjacent the IF section 5 .
  • the ID section 1 transfers wafers W to the treating section 3 .
  • the treating section 3 includes a plurality of (e.g. two) substrate treatment lines Lu and Ld. Each substrate treatment line Lu or Ld treats the wafers W while transporting the wafers W substantially horizontally.
  • the substrate treatment lines Lu and Ld are arranged one over the other.
  • Each substrate treatment line Lu or Lu has one end thereof opposed to the ID section 1 , and the other end opposed to the IF section 5 .
  • Each substrate treatment line Lu or Ld has main transport mechanisms and treating units as described hereinafter. In the following description, the substrate treatment lines Lu and Ld will be referred to simply as the “substrate treatment lines L” when they are not distinguished.
  • the IF section 5 transfers the wafers W between the treating section 3 and exposing machine EXP.
  • the exposing machine EXP exposes the wafers W.
  • the apparatus 10 constructed in this way operates as follows.
  • the ID section 1 transports a plurality of wafers W into the treating section 3 .
  • FIG. 1 a case of transporting eight wafers Wa, Wb, Wc, . . . , and Wh from the ID section 1 to the treating section 3 will be described by way of example.
  • the arrow affixed with sign OA in FIG. 1 indicates an order in which the wafers W are transported from the ID section 1 to the treating section 3 ; it signifies that wafer Wa is the first, wafer Wb is the second, wafers Wc and Wd are the third and fourth, respectively, . . . and wafer Wh is the eighth.
  • order OB of wafers W fed from the substrate treatment line Lu to the IF section 5 indicates the following orders: order OB of wafers W fed from the substrate treatment line Lu to the IF section 5 ; order OC of wafers W fed from the substrate treatment line Ld to the IF section 5 , order OD of wafers W fed from the substrate treatment lines Lu Ld as a whole, i.e. from the treating section 3 to the IF section 5 , and order OE of wafers W transported from the IF section 5 to the exposing machine EXP.
  • orders will be referred to hereinafter simply as “order OA”, “order OB” and so on as appropriate.
  • wafers Wa, Wc, We and Wg which are the first, third, fifth and seventh in the order OA
  • wafers Wb, Wd, Wf and Wh which are the second, fourth, sixth and eighth in the order OA, are transported to the substrate treatment line Ld.
  • Each of the substrate treatment lines Lu and Ld carries out a series of treatments for the wafers W transported thereto, and feeds the wafers W to the IF section 5 .
  • the order OB is the same as the order of wafers W transported from the ID section 1 to the substrate treatment line Lu.
  • the order OC is the same as the order of wafers W transported from the ID section 1 to the substrate treatment line Ld.
  • the time taken from loading-in to feeding-out is not necessarily the same between the substrate treatment lines Lu and Ld even if the same treatment is carried out.
  • FIG. 1 illustrates the case where the order OD of wafers W fed out of the treating section 3 differs from the order OA of wafers W loaded into the treating section 3 .
  • the IF section 5 successively receives wafers W fed from the respective substrate treatment lines Lu and Ld. Therefore, the IF section 5 receives wafers W from the treating section 3 is the same order as order OD.
  • the IF section 5 adjusts the wafers W fed from the treating section 3 to the order OA of loading into the treating section 3 . Then, the IF section 5 transports the wafers W to the exposing machine EXP in the same order as the order OA of wafers W loaded into the treating section 3 . That is, the order OE in which the IF section 5 transports the wafers W to the exposing machine EXP is the same as the order OA.
  • the exposing machine EXP exposes the wafers W transported thereto. Although not shown in FIG. 1 , the exposing machine EXP transports the exposed wafers W back to the IF section 5 .
  • the IF section 5 receives the wafers W from the exposing machine EXP, and transports the wafers W to the treating section 3 .
  • the treating section 3 transports the wafers W to the ID section 1 through each substrate treatment line L.
  • the order OE of wafers W transported to the exposing machine EXP is the same as the order OA of wafers W loaded into the treating section 3 . Therefore, each of the wafers W can be controlled easily. A follow-up check may also be carried out easily on the history of treatment of each wafer W in the treating section 3 and exposing machine EXP.
  • This apparatus 10 including the plurality of (two) substrate treatment lines Lu and Ld treats wafers W in parallel in the substrate treatment lines L, thereby significantly improves throughput.
  • the substrate treatment lines Lu and Ld are arranged one over the other, and this arrangement can prevent an enlarged footprint of the apparatus 10 .
  • FIG. 2 is a plan view showing an outline of the substrate treating apparatus according to this embodiment.
  • FIGS. 3 and 4 are schematic side views showing an arrangement of treating units included in the substrate treating apparatus.
  • FIGS. 5 through 8 are views in vertical section taken on lines a-a, b-b, c-c and d-d of FIG. 2 , respectively.
  • the ID section 1 takes wafers W out of each cassette C which stores a plurality of wafers W and deposits wafers W in the cassette C.
  • the ID section 1 has a cassette table 9 for receiving cassettes C.
  • the cassette table 9 can receive four cassettes C as arranged in a row.
  • the ID section 1 has also an ID transport mechanism T ID . As shown in FIG. 5 , the ID transport mechanism T ID transports wafers W to and from each cassette C, and transports wafers W to and from receivers PASS 1 and PASS 3 to be described hereinafter.
  • the ID transport mechanism T ID has a movable base 21 for moving horizontally alongside the cassette table 9 in the direction of arrangement of the cassettes C, a lift shaft 23 vertically extendible and contractible relative to the movable base 21 , and a holding arm 25 swivelable on the lift shaft 23 , and extendible and retractable radially of the swivel motion, for holding a wafer W.
  • Each substrate treatment line L of the treating section is constructed to transport wafers W in a substantially horizontal direction between the ID section 1 and IF section 5 .
  • Each substrate treatment line L has main transport mechanisms T for transporting wafers W.
  • each substrate treatment line L has a plurality of main transport mechanisms T (two for each substrate treatment line L, and thus a total of four).
  • the main transport mechanisms T provided for the same substrate treatment line L are arranged in the direction in which the wafers W are transported, and the wafers W can be transferred between the main transport mechanisms T adjacent each other in the transport direction.
  • Each main transport mechanism T transports wafers W to and from various treating units described hereinafter, and transfers wafers W to and from the other main transport mechanism T adjacent thereto.
  • the substrate treatment line Lu includes a main transport mechanism T 1 and a main transport mechanism T 2 arranged in a row.
  • the main transport mechanism T 1 is disposed adjacent to the ID section, while the main transport mechanism T 2 is disposed adjacent to the IF section 5 .
  • the substrate treatment line Ld includes a main transport mechanism T 3 and a main transport mechanism T 4 arranged in a row.
  • the main transport mechanism T 3 is disposed adjacent to the ID section, while the main transport mechanism T 4 is disposed adjacent to the IF section 5 .
  • the treating section 3 which has the above substrate treatment lines L includes a plurality of (two) treating blocks Ba and Bb arranged side by side (in substantially the same direction as the transport direction).
  • the treating block Ba is located adjacent the ID section 1
  • the treating block Bb is located adjacent the IF section 5 .
  • Each of the treating blocks Ba and Ba is vertically divided into a plurality of (two) stories K.
  • the upper story K 1 of the treating block Ba has the main transport mechanism T 1 noted above, and the lower story K 3 has the main transport mechanism T 3 .
  • the upper story K 2 of the treating block Bb has the main transport mechanism T 2
  • the lower story K 4 has the main transport mechanism T 4 .
  • the story K 1 and story K 2 are at the same height, and the story K 3 and story K 4 are at the same height. In this sense, the story K 1 and story K 2 are “the same stories” and the story K 3 and story K 4 are “the same stories”.
  • the main transport mechanisms T 1 and T 2 on the same stories K 1 and K 2 of the adjoining treating blocks Ba and Bb can transfer wafers W to and from each other.
  • the stories K 1 and K 2 constitute the substrate treatment line Lu.
  • the main transport mechanisms T 3 and T 4 can transfer wafers W to and from each other.
  • the stories K 3 and K 4 constitute the substrate treatment line Ld.
  • Receivers PASS 1 and PASS 3 for receiving wafers W are provided between the ID section 1 and the respective stories K 1 and K 3 of the treating block Ba.
  • the receiver PASS 1 receives, as temporarily placed thereon, wafers W passed between the ID transport mechanism T ID and the main transport mechanism T 1 .
  • the receiver PASS 3 receives, as temporarily placed thereon, wafers W passed between the ID transport mechanism T ID and the main transport mechanism T 3 .
  • the receiver PASS 1 is disposed at a height adjacent a lower part of the upper story K 2
  • the receiver PASS 3 is disposed at a height adjacent an upper part of the lower story K 3 .
  • the positions of receiver PASS 1 and receiver PASS 3 are relatively close to each other for allowing the ID transport mechanism T ID to move between the receiver PASS 1 and receiver PASS 3 through using only a small amount of vertical movement.
  • Receivers PASS 2 and PASS 4 for receiving wafers W are provided also between the treating blocks Ba and Bb.
  • the receiver PASS 2 is disposed between the story K 1 and story K 2 , and the receiver PASS 4 between the story K 3 and story K 4 .
  • the main transport mechanisms T 1 and T 2 transfer wafers W through the receiver PASS 2 , and the main transport mechanisms T 3 and T 4 through the receiver PASS 4 .
  • the receiver PASS 1 includes a plurality of receivers (two in this embodiment). These receivers PASS 1 are arranged vertically adjacent each other. Of the two receivers PASS 1 , one PASS 1A receives wafers W passed from the ID transport mechanism T ID to the main transport mechanism T 1 . The other receiver PASS 1B receives wafers W passed from the main transport mechanism T 1 to the ID transport mechanism T ID .
  • Each of the receivers PASS 2 -PASS 4 and receivers PASS 5 and PASS 6 described hereinafter similarly includes a plurality of (two) receivers, one of which is selected according to a direction for transferring wafers W.
  • Each of the receivers PASS 1A and PASS 1B has a sensor (not shown) for detecting presence or absence of a wafer W. Based on detection signals of each sensor, the transfer of wafers W by the ID transport mechanism T ID and main transport mechanism T 1 is controlled. Similar sensors are attached also to the receivers PASS 2 -PASS 6 , respectively.
  • the story K 1 will now be described.
  • the main transport mechanism T 1 is movable in a transporting space A 1 extending substantially through the center of the story K 1 and parallel to the direction of transport.
  • the story K 1 has, arranged thereon, coating units 31 for applying a treating solution to wafers W, and heat-treating units 41 for heat-treating the wafers W.
  • the coating units 31 are arranged on one side of the transporting space A 1 , while the heat-treating units 41 are arranged on the other side thereof.
  • the coating units 31 are arranged vertically and horizontally, each facing the transporting space A 1 .
  • four coating units 31 in total are arranged in two columns and two rows.
  • the coating units 31 include anti-reflection film coating units BARC for applying an anti-reflection film material to the wafers W, and resist film coating units RESIST for applying a resist film material to the wafers W.
  • anti-reflection film coating units BARC for applying an anti-reflection film material to the wafers W
  • resist film coating units RESIST for applying a resist film material to the wafers W.
  • the treatment carried out in the anti-reflection film coating units BARC is referred to as anti-reflection film material coating treatment as appropriate
  • resist film material coating treatment is referred to as resist film material coating treatment as appropriate.
  • the plurality of (two) anti-reflection film coating units BARC are arranged at substantially the same height in the lower row.
  • the plurality of resist film coating units RESIST are arranged at substantially the same height in the upper row. No dividing wall or partition is provided between the antireflection film coating units BARC. That is, all the antireflection film coating units BARC are only housed in a common chamber, and the atmosphere around each antireflection film coating unit BARC is not blocked off (i.e. is in communication). Similarly, the atmosphere around each resist film coating unit RESIST is not blocked off.
  • FIG. 9A is a plan view of the coating units 31 .
  • FIG. 9B is a sectional view of a coating unit 31 .
  • Each coating unit 31 includes a spin holder 32 for holding and spinning a wafer W, a cup 33 surrounding the wafer W, and a supply device 34 for supplying a treating solution to the wafer W.
  • the supply device 34 includes a plurality of nozzles 35 , a gripper 36 for gripping one of the nozzles 35 , and a nozzle moving mechanism 37 for moving the gripper 36 to move one of the nozzles 35 between a treating position above the wafer W and a standby position away from above the wafer W.
  • Each nozzle 35 has one end of a treating solution pipe 38 connected thereto.
  • the treating solution pipe 38 is arranged movable (flexible) to permit movement of the nozzle 35 between the standby position and treating position.
  • the other end of each treating solution pipe 38 is connected to a treating solution source (not shown).
  • the treating solution sources supply different types of treating solution for antireflection film to the respective nozzles 35 .
  • the treating solution sources supply different types of resist film material to the respective nozzles 35 .
  • the nozzle moving mechanism 37 has first guide rails 37 a and a second guide rail 37 b .
  • the first guide rails 37 a are arranged parallel to each other and opposed to each other across the two cups 33 arranged sideways.
  • the second guide rail 37 b is slidably supported by the two first guide rails 37 a and disposed above the two cups 33 .
  • the gripper 36 is slidably supported by the second guide rail 37 b .
  • the first guide rails 37 a and second guide rail 37 b take guiding action substantially horizontally and in directions substantially perpendicular to each other.
  • the nozzle moving mechanism 37 further includes drive members (not shown) for sliding the second guide rail 37 b , and sliding the gripper 36 .
  • the drive members are operable to move the nozzle 35 gripped by the gripper 36 to the treating positions above the two spin holders 32 .
  • the plurality of heat-treating units 41 are arranged vertically and horizontally, each facing the transporting space A 1 .
  • three heat-treating units 41 can be arranged horizontally, and five heat-treating units 41 can be stacked vertically.
  • Each heat-treating unit 41 has a plate 43 for receiving a wafer W.
  • the heat-treating units 41 include cooling units CP for cooling wafers W, heating and cooling units PHP for carrying out heating and cooling treatments continually, and adhesion units AHL for heat-treating wafers W in an atmosphere of hexamethyldisilazane (HMDS) vapor in order to promote adhesion of coating film to the wafers W.
  • HMDS hexamethyldisilazane
  • each heating and cooling unit PHP has two plates 43 , and a local transport mechanism (not shown) for moving a wafer W between the two plates 43 .
  • the various types of heat-treating units CP, PHP and AHL are arranged in appropriate positions.
  • the treatment carried out in the heating and cooling units PHP is referred to as heating/cooling treatment as appropriate.
  • FIG. 10 is a perspective view of the main transport mechanism T 1 .
  • the main transport mechanism T 1 has two third guide rails 51 for providing vertical guidance, and a fourth guide rail 52 for providing horizontal guidance.
  • the third guide rails 51 are fixed opposite each other at one side of the transporting space A 1 .
  • the third guide rails 51 are arranged at the side adjacent the coating units 31 .
  • the fourth guide rail 52 is slidably attached to the third guide rails 51 .
  • the fourth guide rail 52 has a base 53 slidably attached thereto. The base 53 extends transversely, substantially to the center of the transporting space Al.
  • drive members are provided for vertically moving the fourth guide rail 52 , and horizontally moving the base 53 .
  • the drive members are operable to move the base 53 to positions for accessing the coating units 31 and heat-treating units 41 arranged vertically and horizontally.
  • the base 53 has a turntable 55 rotatable about a vertical axis Q.
  • the turntable 55 has two holding arms 57 a and 57 b horizontally movably attached thereto for holding wafers W, respectively.
  • the two holding arms 57 a and 57 b are arranged vertically close to each other.
  • drive members (not shown) are provided for rotating the turntable 55 , and moving the holding arms 57 a and 57 b .
  • the drive members are operable to move the turntable 55 to positions opposed to the coating units 31 , heat-treating units 41 and receivers PASS 1 and PASS 2 , and to extend and retract the holding arms 57 a and 57 b to and from the coating units 31 and so on.
  • the story K 3 will be described next. Like reference numerals are used to identify like parts which are the same as in the story K 1 , and will not be described again.
  • the layout (arrangement) in plan view of the main transport mechanism T 3 and treating units in the story K 3 is substantially the same as in the story K 1 .
  • the arrangement of the various treating units of the story K 3 as seen from the main transport mechanism T 3 is substantially the same as the arrangement of the various treating units of the story K 1 as seen from the main transport mechanism T 1 .
  • the coating units 31 and heat-treating units 41 of the story K 3 are stacked under the coating units 31 and heat-treating units 41 of the story K 1 , respectively.
  • resist film coating units RESIST 1 when distinguishing the resist film coating units RESIST in the stories K 1 and K 3 , subscripts “1” and “3” will be affixed (for example, the resist film coating units RESIST in the story K 1 will be referred to as “resist film coating units RESIST 1 ”).
  • each of the transporting spaces A 1 and A 3 has a first blowout unit 61 for blowing out a clean gas, and an exhaust unit 62 for sucking the gas.
  • Each of the first blowout unit 61 and exhaust unit 62 is in the form of a flat box having substantially the same area as the transporting space A 1 in plan view.
  • Each of the first blowout unit 61 and exhaust unit 62 has first blowout openings 61 a or exhaust openings 62 a formed in one surface thereof.
  • the first blowout openings 61 a or exhaust openings 62 a are in the form of numerous small bores f (see FIG. 10 ).
  • the first blowout units 61 a re arranged over the transporting spaces A 1 and A 3 with the first blowout openings 61 a directed downward.
  • the exhaust units 62 are arranged under the transporting spaces A 1 and A 3 with the exhaust openings 62 a directed upward.
  • the atmosphere in the transporting space Al and the atmosphere in the transporting space A 3 are blocked off by the exhaust unit 62 of the transporting space A 1 and the first blowout unit 61 of the transporting space A 3 .
  • each of the stories K 1 and K 3 has the atmosphere blocked off from the other.
  • the first blowout units 61 of the transporting spaces A 1 and A 3 are connected to a common, first gas supply pipe 63 .
  • the first gas supply pipe 63 extends laterally of the receivers PASS 2 and PASS 4 from an upper position of the transporting space A 1 to a lower position of the transporting space A 3 , and is bent below the transporting space A 3 to extend horizontally.
  • the other end of the first gas supply pipe 63 is connected to a gas source not shown.
  • the exhaust units 62 of the transporting spaces A 1 and A 3 are connected to a common, first gas exhaust pipe 64 .
  • the first gas exhaust pipe 64 extends laterally of the receivers PASS 2 and PASS 4 from a lower position of the transporting space A 1 to a lower position of the transporting space A 3 , and is bent below the transporting space A 2 to extend horizontally. As the gas is blown out of each first blowout opening 61 a and sucked and exhausted through each exhaust opening 62 a of the transporting spaces A 1 and A 3 , gas currents are formed to flow from top to bottom of the transporting spaces A 1 and A 3 , thereby keeping each of the transporting spaces A 1 and A 3 in a clean state.
  • each coating unit 31 of the stories K 1 and K 3 has a pit portion PS extending vertically.
  • the pit portion PS accommodates a second gas supply pipe 65 extending vertically for supplying the clean gas, and a second gas exhaust pipe 66 extending vertically for exhausting the gas.
  • Each of the second gas supply pipe 65 and second gas exhaust pipe 66 branches at a predetermined height in each coating unit 31 to extend substantially horizontally from the pit portion PS.
  • a plurality of branches of the second gas supply pipe 65 are connected to second blowout units 67 for blowing out the gas downward.
  • a plurality of branches of the second gas exhaust pipe 66 are connected for communication to the bottoms of the respective cups 33 .
  • the other end of the second gas supply pipe 65 is connected to the first gas supply pipe 63 below the story K 3 .
  • the other end of the second gas exhaust pipe 66 is connected to the first gas exhaust pipe 64 below the story K 3 .
  • the pit portions PS further accommodate piping of the treating solutions, electric wiring and the like (not shown).
  • the pit portions PS accommodating the piping and electric wiring provided for the coating units 31 of the stories K 1 and K 3 , the piping and electric wiring can be reduced in length.
  • the treating block Ba has one housing 75 for accommodating the main transport mechanisms T 1 and T 3 , coating units 31 and heat-treating units 41 described hereinbefore.
  • the treating block Bb described hereinafter also has a housing 75 for accommodating the main transport mechanisms T 2 and T 4 and the treating units included in the treating block Bb.
  • the housing 75 of the treating block Ba and the housing 75 of the treating block Bb are separate entities. Thus, with each of the treating blocks Ba and Bb having the housing 75 accommodating the main transport mechanisms T and treating units U en bloc, the treating section 3 may be manufactured and assembled simply.
  • the treating block Ba corresponds to the coating block in this invention.
  • the treating block Ba corresponds also to the first treating block in this invention.
  • the story K 2 will be described. Like reference numerals are used to identify like parts which are the same as in the story K 1 and will not be described again.
  • the story K 2 has a transporting space A 2 formed as an extension of the transporting space A 1 .
  • the story K 2 has, arranged thereon, developing units DEV for supplying a developing solution to wafers W, heat-treating units 42 for heat-treating the wafers W, and an edge exposing unit EEW for exposing peripheral regions of the wafers W.
  • the developing units DEV are arranged at one side of the transporting space A 2
  • the heat-treating units 42 and edge exposing unit EEW are arranged at the other side of the transporting space A 2 .
  • the developing units DEV are arranged at the same side as the coating units 31 .
  • the heat-treating units 42 and edge exposing unit EEW are arranged in the same row as the heat-treating units 41 .
  • the treatment carried out in the developing units DEV is referred to as developing treatment as appropriate
  • the treatment carried out in the edge exposing unit EEW is referred to as edge exposure as appropriate.
  • the number of developing units DEV is four, and sets of two units DEV arranged horizontally along the transporting space A 2 are stacked one over the other. As shown in FIGS. 2 and 7 , each developing unit DEV includes a spin holder 77 for holding and spinning a wafer W, and a cup 79 surrounding the wafer W. The two developing units DEV arranged at the lower level are not separated from each other by a partition wall or the like.
  • a supply device 81 is provided for supplying developers to the two developing units DEV.
  • the supply device 81 includes two slit nozzles 81 a having a slit or a row of small bores for delivering the developers.
  • the slit or row of small bores preferably, has a length corresponding to the diameter of wafer W.
  • the two slit nozzles 81 a are arranged to deliver developers of different types or concentrations.
  • the supply device 81 further includes a moving mechanism 81 b for moving each slit nozzle 81 a .
  • the slit nozzles 81 a are movable, respectively, over the two spin holders 77 juxtaposed sideways.
  • the plurality of heat-treating units 42 are arranged sideways along the transporting space A 2 , and stacked one over the other.
  • the heat-treating units 42 include heating units HP for heating wafers W, cooling units CP for cooling wafers W, and heating and cooling units PHP for carrying out heating/cooling treatment.
  • the plurality of heating and cooling units PHP are vertically stacked in the column closest to the IF section 5 , each having one side facing the IF section 5 .
  • the heating and cooling units PHP on the story K 2 have transport ports formed in the sides thereof for passage of wafers W. IF transport mechanisms T IF to be described hereinafter transport wafers W through the above transport ports to the heating and cooling units PHP.
  • the heating and cooling units PHP arranged on the story K 2 carry out post-exposure baking (PEB) treatment.
  • PEB treatment post-exposure baking
  • the single edge exposing unit EEW is disposed in a predetermined position.
  • the edge exposing unit EEW includes a spin holder (not shown) for holding and spinning a wafer W, and a light emitter (not shown) for exposing edges of the wafer W held by the spin holder.
  • the receiver PASS 5 is formed on top of the heating and cooling units PHP.
  • the main transport mechanism T 2 and IF transport mechanisms T IF to be described hereinafter transfer wafers W through the receiver PASS 5 .
  • the main transport mechanism T 2 is disposed substantially centrally of the transporting space A 2 in plan view.
  • the main transport mechanism T 2 has the same construction as the main transport mechanism T 1 .
  • the main transport mechanism T 2 transports wafers W to and from the receiver PASS 2 , various heat-treating units 42 , edge exposing unit EEW and receiver PASS 5 .
  • the story K 4 will be described briefly.
  • the relationship in construction between story K 2 and story K 4 is similar to that between stories K 1 and K 3 .
  • the treating units U on the story K 4 are developing units DEV, heat-treating units 42 and an edge exposing unit EEW.
  • the heat-treating units 42 on the story K 4 include heating units HP, cooling units CP and heating and cooling units PHP.
  • the receiver PASS 6 is formed on top of the heating and cooling units PHP on the story K 4 .
  • the main transport mechanism T 4 and IF transport mechanisms T IF described hereinafter transfer wafers W through the receiver PASS 6 .
  • the heating and cooling units PHP on the story K 4 also carry out post-exposure baking (PEB) treatment.
  • PEB post-exposure baking
  • heating units HP 2 when distinguishing the developing units DEV, edge exposing units EEW and so on provided on the stories K 2 and K 4 , subscripts “2” and “4” will be affixed (for example, the heating units HP on the story K 2 will be referred to as “heating units HP 2 ”).
  • Each of the transporting spaces A 2 and A 4 of the stories K 2 and K 4 also has constructions corresponding to the first blowout unit 61 and exhaust unit 62 .
  • Each developing unit DEV of the stories K 2 and K 4 also has constructions corresponding to the second blowout unit 67 and second gas exhaust pipe 66 .
  • the treating block Bb constructed in this way corresponds to the developing block in this invention.
  • the treating block Bb corresponds also to the second treating block in this invention.
  • the IF section 5 transfers wafers W between each of the substrate treatment lines Lu and Ld (stories K 2 and K 4 ) of the treating section 3 and the exposing machine EXP.
  • the IF section 5 has IF transport mechanisms T IF for transporting wafers W.
  • the IF transport mechanisms T IF include a first transport mechanism T IFA and a second transport mechanism T IFB that can transfer wafers W to and from each other.
  • the first transport mechanism T IFA transports wafers W to and from the substrate treatment lines Lu and Ld.
  • the first transport mechanism T IFA transports wafers W to and from the receivers PASS 5 and PASS 6 on the stories K 2 and K 4 , and to and from the heating and cooling units PHP on the stories K 3 and K 4 .
  • the second transport mechanism T IFB transports wafers W to and from the exposing machine EXP.
  • the first transport mechanism T IFA and second transport mechanism T IFB are arranged in a transverse direction perpendicular to the transport direction of the substrate treatment lines L.
  • the first transport mechanism T IFA is disposed at the side where the heat-treating units 42 and so on of the stories K 2 and K 4 are located.
  • the second transport mechanism T IFB is disposed at the side where the developing units DEV of the stories K 2 and K 4 are located.
  • Provided between the first and second transport mechanisms T IFA and T IFB are a receiver PASS-CP for receiving and cooling wafers W, a receiver PASS 7 for receiving wafers W, and buffers BF for temporarily storing wafers W.
  • the buffers BF can receive or store a plurality of wafers W.
  • the first and second transport mechanisms T IFA and T IFB transfer wafers W through the receiver PASS-CP and receiver PASS 7 .
  • the buffers BF are accessed exclusively by the first transport mechanism T IFA .
  • the first transport mechanism T IFA includes a fixed base 83 , lift shafts 85 vertically extendible and contractible relative to the base 83 , and a holding arm 87 swivelable on the lift shafts 85 , and extendible and retractable radially of the swivel motion, for holding a wafer W.
  • the second transport mechanism T IFB also has a base 83 , lift shafts 85 and a holding arm 87 .
  • FIG. 11 is a control block diagram of the substrate treating apparatus according to the invention.
  • the control section 90 of this apparatus 10 includes a main controller 91 and a first to a seventh controllers 93 , 94 , 95 , 96 , 97 , 98 and 99 .
  • the main controller 91 performs overall control of the first to seventh controllers 93 - 99 .
  • the first controller 93 controls substrate transport by the ID transport mechanism T ID .
  • the second controller 94 controls substrate transport by the main transport mechanism T 1 , and substrate treatment in the resist film coating units RESIST 1 , antireflection film coating units BARC 1 , cooling units CP 1 , heating and cooling units PHP 1 and adhesion units AHL 1 .
  • the third controller 95 controls substrate transport by the main transport mechanism T 2 , and substrate treatment in the edge exposing unit EEW 2 , developing units DEV 2 , heating units HP 2 and cooling units CP 2 .
  • the controls by the fourth and fifth controllers 96 and 97 correspond to those by the second and third controllers 94 and 95 , respectively.
  • the sixth controller 98 controls substrate transport by the first transport mechanism T IFA , and substrate treatment in the heating and cooling units PHP 2 and PHP 4 .
  • the seventh controller 99 controls substrate transport by the second transport mechanism T IFB .
  • the first to seventh controllers 93 - 99 carry out the controls independently of one another.
  • Each of the main controller 91 and the first to seventh controllers 93 - 99 is realized by a central processing unit (CPU) which performs various processes, a RAM (Random Access Memory) used as the workspace for operation processes, and a storage medium such as a fixed disk.
  • the storage medium stores a variety of information including a predetermined processing recipe (processing program), and information specifying an order of wafers W to be loaded into the treating section 3 .
  • FIG. 12 is a flow chart of a series of treatments of wafers W, indicating the treating units and receivers to which the wafers W are transported in order.
  • FIG. 13 is a view schematically showing operations repeated by each transport mechanism, and specifying an order of treating units, receivers and cassettes accessed by the transport mechanisms. The following description will be made separately for each transport mechanism.
  • FIGS. 12 and 13 show an example of basic operation where the order OD of wafers W the IF section 5 receives from the treating section 3 is the same as the order OA of wafers W transported from the ID section 1 to the treating section 3 .
  • An operation taking place where the order OD is different from the order OA will be described in connection with operation of IF transport mechanisms T IF
  • the ID transport mechanism T ID moves to a position opposed to one of the cassettes C, holds with the holding arm 25 a wafer W to be treated and takes the wafer W out of the cassette C.
  • the ID transport mechanism T ID swivels the holding arm 25 , vertically moves the lift shaft 23 , moves to a position opposed to the receiver PASS 1 , and places the wafer W on the receiver PASS 1A (which corresponds to step S 1 a in FIG. 12 ; only step numbers will be indicated hereinafter).
  • a wafer W usually is present on the receiver PASS 1B , and the ID transport mechanism T ID receives this wafer W and stores it in a cassette C (step S 23 ).
  • step S 23 is omitted.
  • the ID transport mechanism T ID accesses the cassette C, and transports a wafer W from the cassette C to the receiver PASS 3A (step S 1 b ).
  • the ID transport mechanism T ID will store this wafer W in a cassette C (step S 23 ).
  • the ID transport mechanism T ID repeats the above operation.
  • This operation of the ID transport mechanism T ID is controlled by the first controller 93 .
  • the wafers W in the cassette C are fed to the story K 1 , and the wafers W delivered from the story K 1 are stored in the cassette C.
  • the wafers W in the cassette C are fed to the story K 3 , and the wafers W delivered from the story K 3 are stored in the cassette C.
  • the main transport mechanism T 1 moves to a position opposed to the receiver PASS 1 . At this time, the main transport mechanism T 1 holds, on one holding arm 57 (e.g. 57 b ), a wafer W received immediately before from the receiver PASS 2B . The main transport mechanism T 1 places this wafer W on the receiver PASS 1B (step S 22 ), and holds the wafer W present on the receiver PASS 1A with the other holding arm 57 (e.g. 57 a ).
  • the main transport mechanism T 1 accesses one of the cooling units CP 1 . There is a different wafer W having already received cooling treatment in the cooling unit CP 1 .
  • the main transport mechanism T 1 holds the different wafer W with the unloaded holding arm 57 (holding no wafer W), takes it out of the cooling unit CP 1 , and loads into the cooling unit CP 1 the wafer W having received from the receiver PASS 1A . Then, the main transport mechanism T 1 , holding the cooled wafer W, moves to one of the antireflection film coating units BARC 1 .
  • the cooling unit CP 1 starts cooling treatment of the wafer W loaded therein (step S 2 ).
  • This heat treatment (cooling) will have been finished by the time the main transport mechanism T 1 accesses this cooling unit CP 1 next time.
  • the following description assumes that wafers W having received predetermined treatments are present also in the other, different heat-treating units 41 and coating units 31 when the main transport mechanism T 1 makes access thereto.
  • the main transport mechanism T 1 takes a wafer W having antireflection film formed thereon from the antireflection film coating unit BARC 1 , and places the cooled wafer W on the spin holder 32 of the antireflection film coating unit BARC 1 . Then, the main transport mechanism T 1 , holding the wafer W having antireflection film formed thereon, moves to one of the heating and cooling units PHP 1 . The antireflection film coating unit BARC 1 starts antireflection film material coating treatment of the wafer W placed on the spin holder 32 (step S 3 a ).
  • the spin holder 32 spins the wafer W in horizontal posture, the gripper 26 grips one of the nozzles 35 , the nozzle moving mechanism 37 moves the gripped nozzle 35 to a position above the wafer W, and the treating solution for antireflection film is supplied from the nozzle 35 to the wafer W.
  • the treating solution supplied spreads all over the wafer W, and is scattered away from the wafer W.
  • the cup 33 collects the scattering treating solution. In this way, the treatment is carried out for forming antireflection film on the wafer W.
  • the main transport mechanism T 1 takes a wafer W having received heat treatment out of the heating and cooling unit PHP 1 , and loads the wafer W having antireflection film formed thereon into the heating and cooling unit PHP 1 . Then, the main transport mechanism T 1 , holding the wafer W taken out of the heating and cooling unit PHP 1 , moves to one of the cooling units CP 1 . The heating and cooling unit PHP 1 receives a wafer W successively on the two plates 43 , to heat the wafer W on one of the plates 43 and then to cool the wafer W on the other plate 43 (step S 4 a ).
  • the main transport mechanism T 1 takes a wafer W out of the cooling unit CP 1 , and loads the wafer W held by the transport mechanism T 1 into the cooling unit CP 1 .
  • the cooling unit CP 1 cools the wafer W loaded therein (step S 5 a ).
  • the main transport mechanism T 1 moves to one of the resist film coating units RESIST 1 .
  • the main transport mechanism T 1 takes a wafer W having resist film formed thereon from the resist film coating unit RESIST 1 , and loads the wafer W held by the main transport mechanism T 1 into the resist film coating unit RESIST 1 .
  • the resist film coating unit RESIST 1 while spinning the wafer W loaded therein, applies the resist film material to the wafer W (step S 6 a ).
  • the main transport mechanism T 1 further moves to one of the heating and cooling units PHP 1 and one of the cooling units CP 1 .
  • the main transport mechanism T 1 loads the wafer W having resist film formed thereon into the heating and cooling unit PHP 1 , transfers a wafer W treated in the heating and cooling unit PHP 1 to the cooling unit CP 1 , and receives a wafer W treated in the cooling unit CP 1 .
  • the heating and cooling unit PHP 1 and cooling unit CP 1 carry out predetermined treatments of newly loaded wafers W, respectively (steps S 7 a and S 8 a ).
  • the main transport mechanism T 1 moves to the receiver PASS 2 , places the wafer W it is holding on the receiver PASS 2A (step S 9 a ), and receives a wafer W present on the receiver PASS 2B (step S 21 a ).
  • the main transport mechanism T 1 accesses the receiver PASS 1 again, and repeats the above operation.
  • This operation is controlled by the second controller 94 .
  • all the wafers W transported from the cassette C to the receiver PASS 1 are transported to and from the various treating units through the transport path on the story K 1 to receive the predetermined treatment successively in the treating units to which the wafers W are transported.
  • the main transport mechanism T 1 transports a wafer W having been transported to the receiver PASS 1 to a predetermined treating unit (a cooling unit CP 1 in this embodiment), and takes a treated wafer W from this treating unit. Subsequently, the main transport mechanism T 1 transports the wafer W taken out to a next treating unit (an antireflection film coating unit BARC 1 ), and takes a treated wafer W from this treating unit. In this way, the treatment is carried out in parallel for a plurality of wafers W by transferring a treated wafer W from each treating unit to a new treating unit. Starting with a wafer W first placed on the receiver PASS 1 , the wafers W are successively placed on the receiver PASS 2 to be fed to the story K 2 . Similarly, the wafers W are placed on the receiver PASS 1 in the order of placement on the receiver PASS 2 to be fed to the ID section 1 .
  • the main transport mechanism T 2 moves to a position opposed to the receiver PASS 2 . At this time, the main transport mechanism T 2 holds a wafer W received from a cooling unit CP 2 accessed immediately before. The main transport mechanism T 2 places this wafer W on the receiver PASS 2B (step S 21 a ), and holds the wafer W present on the receiver PASS 2A (step S 9 a ).
  • the main transport mechanism T 2 accesses the edge exposing unit EEW 2 .
  • the main transport mechanism T 2 receives a wafer W having received a predetermined treatment in the edge exposing unit EEW 2 , and loads the cooled wafer W into the edge exposing unit EEW 2 . While spinning the wafer W loaded therein, the edge exposing unit EEW 2 irradiates peripheral regions of the wafer W with light from the light emitter not shown, thereby exposing the peripheral regions of the wafer W (step S 10 a ).
  • the main transport mechanism T 2 holding the wafer W received from the edge exposing unit EEW 2 , accesses the receiver PASS 5 .
  • the main transport mechanism T 2 places the wafer W on the receiver PASS 5A (step S 11 a ), and holds a wafer W present on the receiver PASS 5B (step S 16 a ).
  • the main transport mechanism T 2 moves to one of the cooling units CP 2 , and replaces a wafer W in the cooling unit CP 2 with the wafer W held by the main transport mechanism T 2 .
  • the main transport mechanism T 2 holds the wafer W having received cooling treatment, and accesses one of the developing units DEV 2 .
  • the cooling unit CP 2 starts treatment of the newly loaded wafer W (step S 17 a ).
  • the main transport mechanism T 2 takes a developed wafer W from the developing unit DEV 2 , and places the cooled wafer W on the spin holder 77 of the developing unit DEV 2 .
  • the developing unit DEV 2 develops the wafer W placed on the spin holder 77 (step S 18 a ). Specifically, while the spin holder 77 spins the wafer W in horizontal posture, the developer is supplied from one of the slit nozzles 81 a to the wafer W, thereby developing the wafer W.
  • the main transport mechanism T 2 holds the developed wafer W, and accesses one of the heating units HP 2 .
  • the main transport mechanism T 2 takes a wafer W out of the heating unit HP 2 , and loads the wafer W it is holding into the heating unit HP 2 .
  • the main transport mechanism T 2 transports the wafer W taken out of the heating unit HP 2 to one of the cooling units CP 2 , and takes out a wafer W already treated in this cooling unit CP 2 .
  • the heating unit HP 2 and cooling unit CP 2 carry out predetermined treatments for the newly loaded wafers W, respectively (steps S 19 a and S 20 a ).
  • the main transport mechanism T 2 accesses the receiver PASS 2 again, and repeats the above operation.
  • This operation is controlled by the third controller 95 .
  • the wafers W are forwarded to the receiver PASS 5A in the order in which they are placed on the receiver PASS 2A .
  • the wafers W are forwarded to the receiver PASS 2B in the order in which they are placed on the receiver PASS 5B .
  • the sensor (not shown) provided for the receiver PASS 5 detects the wafer W placed on the receiver PASS 5 .
  • the first transport mechanism T IFA accesses the receiver PASS 5 , and receives the wafer W placed on the receiver PASS 5A (step S 11 a ).
  • the control section 90 puts the wafer W received by the IF section 5 in a proper place in the order of loading into the treating section 3 , so that an order in which wafers W are transported to the exposing machine EXP may agree with the order of wafers loaded into the treating section 3 .
  • control section 90 refers to the information specifying the order OA of loading into the treating section 3 , and determines whether the wafer W received is a next wafer W to be transported to the exposing machine EXP. According to a result of this determination, the destination of the wafer W received by the first transport mechanism T IFA is changed. Two methods of this determination will be described first, and thereafter operation of first transport mechanism T IFA and second transport mechanism T IFB will be described.
  • FIG. 14 is a view schematically showing information for determining the order of wafers W loaded into the treating section 3 .
  • FIG. 14 shows information on a relationship of identification information on wafers W matched with the order OA of wafers W loaded into the treating section 3 (hereinafter called “relational information”).
  • “Wa”, “Wb”, . . . , and “Wh” are identification information which identifies each wafer W, and “1”, “2”, . . . , and “8” indicate the order OA of loading into the treating section 3 .
  • the relational information shown in FIG. 14 corresponds to the example of transport of wafers W shown in FIG. 1 .
  • the control section 90 Based on a wafer W actually received by the first transport mechanism T IFA , the control section 90 first acquires identification information applied to that wafer W.
  • the control section 90 refers to the above relational information, and determines a place in the order OA matched with the identification information acquired. Further, the control section 90 determines a place in the order of the next wafer W to be transported to the exposing machine EXP, by counting a total of wafers W already transported to the exposing machine EXP. Then, the control section 90 determines whether the determined place in the order OA and the place in the order of the next wafer W to be transported to exposing machine EXP are in agreement.
  • control section 90 determines that the wafer W received is the next wafer W to be transported to the exposing machine EXP. When not in agreement, the control section 90 determines that the wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • the place in the order OA matched therewith is “2” (see FIG. 14 ). If one wafer W has already been transported to the exposing machine EXP when the first transport mechanism T IFA receives this wafer W, the place in the order of the next wafer W to be transported is “2”. When the place in the order OA (“2”) of the wafer W received by the first transport mechanism T IFA agrees with the next place in the order (“2”) for transport to the exposing machine EXP, the wafer W received is determined to be the next wafer W transported to the exposing machine EXP.
  • FIG. 15 is a view schematically showing information for determining the order of wafers W loaded into the treating section 3 .
  • FIG. 15 shows information on the substrate treatment lines Lu and Ld to which wafers W are transported, and which are selectively matched with the order OA of wafers W loaded into the treating section 3 .
  • the relational information shown in FIG. 15 also corresponds to the example of transport of wafers W shown in FIG. 1 .
  • FIG. 16A is information showing a relationship of the order OA of wafers W loaded into the treating section 3 which is matched with the order OB of wafers W fed from the substrate treatment line Lu to the IF section 5 .
  • FIG. 16B is information showing the order OA of wafers W loaded into the treating section 3 which is matched with the order OC of wafers W fed from the substrate treatment line Ld to the IF section 5 .
  • the control section 90 first determines that, when the first transport mechanism T IFA receives a wafer W from the receiver PASS 5 , the wafer W is fed from the substrate treatment line Lu. At this time, the control section 90 determines the order OB of wafers W fed from the substrate treatment line Lu. Then, the control section 90 refers to the relational information shown in FIG. 15 (or FIG. 16A ), and determines the order OA matched with the order OB. On the other hand, the control section 90 determines that, when the first transport mechanism T IFA receives a wafer W from the receiver PASS 6 , the wafer W is fed from the substrate treatment line Ld, and determines the order OC of wafers W fed from the substrate treatment line Ld. In this case, the control section 90 refers to the relational information shown in FIG. 15 (or FIG. 16B ), and determines the order OA matched with the order OC.
  • the control section 90 determines also the order of wafers W to be transported to the exposing machine EXP. Then, the control section 90 determines whether the place in the order of a wafer W to be transported next to the exposing machine EXP agrees with its place in the order OA. When they are found in agreement, the control section 90 determines that the wafer W received is the next wafer W to be transported to the exposing machine EXP. When not in agreement, the control section 90 determines that the wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • this wafer W has place “2” in the order OB and place “3” in the order OA (see FIG. 15 or FIG. 16A ). If one wafer W has already been transported to the exposing machine EXP when the first transport mechanism T IFA receives this wafer W, the place in the order of the next wafer W to be transported is “2”.
  • the wafer W received is determined not to be the next wafer W transported to the exposing machine EXP.
  • the relational information shown in FIG. 15 or FIGS. 16A and 16B includes the substrate treatment lines Lu and Ld, but this is not limitative.
  • the technical meaning does not change even if the substrate treatment lines Lu and Ld are replaced by the stories K 2 and K 4 , respectively, for example. That is, even with this replacement, the control section 90 can determine, as in determining method 2 described above, whether a wafer W received is the next wafer W to be transported to the exposing machine EXP.
  • the control section 90 carries out the following control.
  • the first transport mechanism T IFA holds the wafer W received, moves to the receiver PASS-CP, and loads the wafer W into the PASS-CP (step S 12 ).
  • the second transport mechanism T IFB takes the wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP.
  • the wafer W is exposed in the exposing machine EXP (step S 13 ).
  • the control section 90 carries out the following control.
  • the first transport mechanism T IFA holds the wafer W received, moves to the buffers BF, and places the wafer W in one of the buffers BF. (This step is omitted from FIG. 12 . See FIG. 13 .)
  • the control section 90 determines whether the wafer W placed in the buffer BF is now the next wafer W to be transported to the exposing machine EXP.
  • the control section 90 determines a place in the order OA of each wafer W placed in a buffer BF when the wafer W is received from the treating section 3 . Therefore, the order OA already determined is compared with the order OE of wafers W to be transported to the exposing machine EXP, to determine whether they are in agreement for each wafer W. When in agreement, the control section 90 determines that the wafer W is the next one to be transported to the exposing machine EXP.
  • control section 90 carries out the following control.
  • the first transport mechanism T IFA accesses the buffers BF, takes out the wafer W for which the orders are in agreement, and loads the wafer W into the receiver PASS-CP (step S 12 ).
  • the second transport mechanism T IFB takes this wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP (step S 13 ).
  • FIG. 17 gives views schematically showing how eight wafers W fed from both substrate treatment lines Lu and Ld are transported through the IF section 5 to the exposing machine EXP, the views reflecting the progress of time from (a) to (j).
  • FIGS. 17A through 17J correspond to the example of transport of wafers W shown in FIG. 1 .
  • wafers Wa, Wc, We, Wb, Wg, Wd, Wf and Wh are fed in this order from the treating section 3 , and wafers Wa, Wb, Wc, Wd, We, Wf, Wg and Wh are transported in this order to the exposing machine EXP.
  • FIG. 17A wafer Wa fed from the substrate treatment line Lu is transported to the exposing machine EXP without being placed in a buffer BF.
  • FIG. 17D wafer Wb is transported similarly, and in FIG. 17F , wafer Wd is transported similarly.
  • the substrate transport shown in FIGS. 17A , 17 D and 17 F is the case where the control section 90 determines that each wafer W received is the next wafer W to be transported to the exposing machine EXP.
  • FIG. 17B wafer Wc fed from the substrate treatment line Lu is placed in a buffer BF.
  • FIG. 17C wafer We is transported similarly, in FIG. 17E , wafer Wg is transported similarly, in FIG. 17G , wafer Wf is transported similarly, and in FIG. 17H , wafer Wh is transported similarly.
  • the substrate transport shown in FIGS. 17B , 17 C, 17 E, 17 G and 17 H is the case where the control section 90 determines that each wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • wafer Wc is transported from the buffer BF to the exposing machine EXP.
  • FIG. 17G wafer We is transported similarly, and in FIGS. 17H , 17 I and 17 J, wafer Wf, wafer Wg and wafer Wh are transported similarly, respectively.
  • the substrate transport shown in FIGS. 17E and 17G through 17 J is the case where the control section 90 determines that each wafer W placed in the buffer BF is the next wafer W to be transported to the exposing machine EXP.
  • wafer Wg is fed from the substrate treatment line Lu, and wafer Wc placed in the buffer BF is determined the next wafer W to be transported to the exposing machine EXP.
  • FIG. 17E wafer Wg is fed from the substrate treatment line Lu, and wafer Wc placed in the buffer BF is determined the next wafer W to be transported to the exposing machine EXP.
  • the first transport mechanism T IFA receives a wafer W from the receiver PASS 7 (step S 14 ), and moves to a position opposed to one of the heating and cooling units PHP 2 .
  • the first transport mechanism T IFA takes a wafer W having received PEB treatment from the heating and cooling unit PHP 2 , and loads the wafer W received from the receiver PASS 7 into the heating and cooling unit PHP 2 .
  • the heating and cooling unit PHP 2 carries out heat treatment for the newly loaded wafer W (step S 15 a ).
  • the first transport mechanism T IFA transports the wafer W taken out of the heating and cooling unit PHP 2 to the receiver PASS 5B . Subsequently, the first transport mechanism T IFA transports a wafer W from the receiver PASS 6A to the receiver PASS-CP (Step S 11 b , S 12 ). Next, the first transport mechanism T IFA transports a wafer W from the receiver PASS 7 to one of the heating and cooling units PHP 4 . At this time, the first transport mechanism T IFA takes out a wafer W having received the PEB treatment in the heating and cooling unit PHP 4 , and places the wafer W on the receiver PASS 6B (steps S 14 , S 15 b , S 16 b ).
  • the first transport mechanism T IFA accesses the receiver PASS 5 again and repeats the above operation. This operation is controlled by the sixth controller.
  • the second transport mechanism T IFB takes a wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP.
  • the wafer W is exposed in the exposing machine EXP (step S 13 ).
  • the second transport mechanism T IFB accesses the receiver PASS-CP again and repeats the above operation.
  • the order of wafers W to be transported to the exposing machine EXP is adjusted to the order OA of wafers W loaded into the treating section 3 , whereby the order OE of wafers W transported to the exposing machine EXP corresponds to the order OA of loading into the treating section 3 . Therefore, each wafer W can be controlled easily. A follow-up check can also be performed easily on the history of treatment of each wafer W in the treating section 3 or the exposing machine EXP.
  • the first transport mechanism T IFA When wafers W are fed to the receivers PASS 5 and PASS 6 , the first transport mechanism T IFA will receive the wafers W placed on the receivers PASS 5 and PASS 6 . This enables the substrate treatment lines Lu and Ld (stories K 3 and K 4 ) to feed new wafers W immediately, thereby preventing a lowering of the treating efficiency of the substrate treatment lines L due to the feeding of wafers W.
  • the IF section 5 with the buffers BF can conveniently adjust the order OE of wafers W received by the IF section 5 to the order OD of wafers W transported to the exposing machine EXP. Further, the order OE can be secured effectively since, when a wafer W placed in a buffer BF becomes the next wafer W to be transported to the exposing machine EXP, the control section 90 causes this wafer W to be transported to the exposing machine EXP.
  • the buffers BF can receive or store a plurality of wafers W, which enables an effective adjustment to the order OE.
  • the control section 90 refers to the information for determining the order OA of loading into the treating section 3 as illustrated in FIG. 15 or FIGS. 16A and 16B , to determine effectively whether a wafer W received by the first transport mechanism T IFA is the next wafer W to be transported to the exposing machine EXP.
  • the ID section 1 in loading wafers W into the treating section 3 , distributes the wafers W regularly and alternately to the stories K 1 and K 3 (see FIG. 1 ). Thus, wafers W can be transported to the substrate treatment lines L at substantially the same pace. This inhibits variations in operation between the substrate treatment lines L.
  • Embodiments of the present invention are not limited to the foregoing embodiments, but may be modified as follows:
  • the buffers BF is accessible only to the first transport mechanism T IFA , and wafers W are transferred from the first transport mechanism T IFA to the second transport mechanism T IFB only through the receiver PASS-CP.
  • the invention is not limited to this construction.
  • the buffers BF may be constructed accessible to the first and second transport mechanisms T IFA and T IFB , and wafers W may be transferred between the first and second transport mechanisms T IFA and T IFB through the buffers BF as well as the receiver PASS-CP.
  • FIG. 18 is a view schematically showing operations repeated by the first and second transport mechanisms T IFA and T IFB in such a modified embodiment for transporting wafers W as noted above.
  • This modification can omit the operation of the first transport mechanism T IFA to access the buffer BF in order to take the wafer W out of the buffer BF, thereby improving transporting efficiency. Even if a wafer is fed from one of the substrate treatment lines L when a different wafer W placed in a buffer BF is determined the next wafer W to be transported to the exposing machine EXP, the first transport mechanism T IFA may receive the wafer W from the substrate treatment line L, with the second transport mechanism T IFB transporting the different wafer W to the exposing machine EXP. That is, the first transport mechanism T IFA need not engage in receipt from the substrate treatment line L and transport to the exposing machine EXP in the order of priority as done in the foregoing embodiment. Thus, the control burden of the sixth controller 98 is lightened.
  • the information for determining the order OA of wafers W loaded into the treating section 3 as illustrated in FIGS. 14 and 15 has been described as set to the control section 90 beforehand.
  • the invention is not limited to this.
  • the order OA of loading may be acquired through cooperation with the first controller 91 which controls ID transport mechanism T ID .
  • the buffers BF have been described as capable of receiving or storing a plurality of wafers W. Instead, only one wafer W may be received or stored at a time.
  • the first transport mechanism T IFA when the wafer W received by the first transport mechanism T IFA is not the next wafer W to be transported to the exposing machine EXP, the first transport mechanism T IFA simply places the wafer W in one of the buffers BF. Instead, the following arrangement may be adopted. Different buffers BF may be assigned to receiving wafers W fed from each substrate treatment line L. As far as each of the substrate treatment lines Lu and Ld is concerned, wafers W are loaded into and unloaded from each substrate treatment line Lu or Ld in the same order OB or OC. Thus, by placing wafers W fed from the substrate treatment lines L in different buffers BF, the order OE of wafers W to be transported to the exposing machine EXP can be adjusted simply in the IF section 5 .
  • the foregoing embodiment may be further modified to stop loading wafers W from the ID section 1 into the treating section 3 when the wafers W currently placed in the buffers BF exceed a predetermined number. If the buffers BF were unable to receive any further wafers W, it would be impossible to feed wafers W smoothly from the treating section 3 to the IF section 5 . If wafers W were loaded into the treating section 3 under such circumstances, variations would occur with wafers W in the time taken from loading into the treating section 3 to feeding from the treating section 3 , resulting in deterioration in the quality of treatment of the wafers W, for example.
  • IF transport mechanisms T IF have been described as including the first transport mechanism T IFA and the second transport mechanism T IFB .
  • the invention is not limited to this. It may be modified to provide one transport mechanism or three or more transport mechanisms.
  • wafers W loaded from the ID section 1 into the treating section 3 are distributed alternately to the stories K 1 and K 3 .
  • a method of distribution may be varied and selected as appropriate.
  • wafers W loaded from the ID section 1 into the treating section 3 may be distributed in units of two or more to the substrate treatment lines L.
  • the ratio of wafers W transported to the substrate treatment lines L may be made equal or different between the substrate treatment lines L.
  • the foregoing embodiment provides two substrate treatment lines L, but the invention not limited to this.
  • the construction may be modified to include three or more substrate treatment lines L vertically arranged in multiple stages.
  • the substrate treatment lines L are arranged one over the other, but the invention is not limited to this.
  • a plurality of substrate treatment lines may be arranged sideways or horizontally.
  • a plurality of substrate treatment lines may be arranged sideways as well as vertically.
  • the treating section 3 is formed of two treating blocks Ba and Bb arranged in juxtaposition, but the invention not limited to this.
  • the treating section 3 may be formed of a single block, or three or more blocks.
  • a single treating block providing the substrate treatment line Lu and a single treating block providing the substrate treatment line Ld may be arranged one over the other.
  • the substrate treatment lines L carry out the treatment for forming resist film and antireflection film on the wafers W, as well as the post-exposure baking (PEB) treatment and developing treatment.
  • the substrate treatment lines L may be modified to perform other treatment such as cleaning of the wafers W. Accordingly, the type, number and the like of treating units are selected or designed as appropriate.

Abstract

A treating section has substrate treatment lines arranged one over the other for treating substrates while transporting the substrates substantially horizontally. An IF section transports the substrates fed from each substrate treatment line to an exposing machine provided separately from this apparatus. The substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section. The throughput of this apparatus can be improved greatly, without increasing the footprint, since the substrate treatment lines are arranged one over the other. Each substrate can be controlled easily since the order of the substrates transported to the exposing machine is in agreement with the order of the substrates loaded into the treating section.

Description

    CROSS-REFERENCES TO RELATED APPLICATIONS
  • This application claims priority to Japanese Patent Application 2007-340427, filed Dec. 28, 2007. The disclosure of JP 2007-340427 is hereby incorporated by reference its entirety for all purposes.
  • BACKGROUND OF THE INVENTION
  • This invention relates to a substrate treating apparatus for performing a series of treatments of substrates such as semiconductor wafers, glass substrates for liquid crystal displays, glass substrates for photomasks, and substrates for optical disks (hereinafter called simply “substrates”).
  • Conventionally, this type of substrate treating apparatus is used to form a resist film on substrates and develop the substrates exposed in a separate exposing machine. The apparatus includes a treating section having, arranged therein, a treating block for forming film such as resist film, a treating block for developing the substrates, and so on. Each treating block includes a single main transport mechanism and various treating units. The main transport mechanism of each block, while transporting substrates to the treating units in that block, transfers the substrates to and from the main transport mechanism of another, adjacent treating block. An interface section is provided for the treating block located at one end. The exposing machine separate from this apparatus is disposed adjacent to the interface section. The interface section transports substrates between the treating section and the exposing machine.
  • In the conventional apparatus having the above construction, the treating section carries out a series of treatments for forming resist film and the like on the substrates, and then feeds the substrates to the interface section. The interface section transports the substrates to the exposing machine. The treating section treats the substrates in an order in which the substrates are loaded into the treating section. Thus, the order of the substrates fed from the treating section to the interface section is the same as the order of the substrates loaded into the treating section. The interface section transfers the substrates received from the treating section directly to the exposing machine. Consequently, the substrates are transported to the exposing machine in the order of loading into the treating section. The exposing machine exposes the substrates transported thereto and feeds them back to the interface section. The interface section transports the substrates received from the exposing machine to the treating section, which then develops these substrates.
  • Although the series of treatments includes also the treatment in the exposing machine separate from this apparatus, the substrates are transported in the same order to each treating block and the exposing machine. It is therefore easy to manage and control each substrate, and to conduct a follow-up check on the treatment history of each substrate, for example (as disclosed in Japanese Unexamined Patent Publication No. 2003-324139, for example).
  • The conventional apparatus with such a construction has the following drawbacks.
  • In the conventional apparatus, each treating block has only a single main transport mechanism, making it difficult to improve the throughput of the entire apparatus significantly. On the other hand, it is conceivable to increase the number of main transport mechanisms in each treating block and to provide a plurality of substrate transport paths in the treating section to enable parallel treatment of substrates. With such a treating section, however, the different transport paths could produce an inequality in time taken from introduction into the treating section to feeding to the interface section. The order of substrates transported from the interface section to the exposing machine may not be the same as the order of loading into the treating section. This will result in an inconvenience that the control of each substrate and a follow-up check on the treatment history of each substrate cannot be conducted reliably.
  • SUMMARY OF THE INVENTION
  • This invention has been made having regard to the state of the art noted above. Its object is to provide a substrate treating apparatus that can effectively control the order of substrates transported from a treating section to a separate exposing machine even where the treating section has a plurality of substrate transport paths.
  • The above object is fulfilled, according to this invention, by a substrate treating apparatus comprising a treating section including a plurality of substrate treatment lines for treating substrates while transporting the substrates substantially horizontally, the substrate treatment lines being capable of treating the substrates in parallel; and an interface section disposed adjacent the treating section for transporting the substrates fed from the substrate treatment lines to an exposing machine provided separately from the apparatus; wherein the substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section.
  • According to this invention, the treating section has a plurality of substrate treatment lines to improve the throughput of the substrate treating apparatus significantly. The substrates can receive treatment in the substrate treatment lines in parallel, and can be transported to the exposing machine in the order in which the substrates are loaded into the treating section. Since the order of the substrates transported to the exposing machine is the same as the order in which the substrates are loaded into the treating section, each substrate can be controlled easily. A follow-up check can also be performed easily on the history of treatment of each substrate in the treating section or in the exposing machine.
  • In the invention noted above, the substrate treatment lines may be arranged one over another. The substrate treatment lines arranged one over another can prevent an enlarged footprint of the apparatus.
  • In the invention noted above, the interface section may be arranged to adjust the order of the substrates fed from the substrate treatment lines to the order in which the substrates are loaded into the treating section. With the interface section arranged to adjust the order of the substrates fed from the substrate treatment lines, there is no need to adjust timing of substrate feeding between the substrate treatment lines. This allows each of the substrate treatment lines to proceed with treatment of the substrates independently.
  • In the invention noted above, the interface section may include an interface transport mechanism for transporting the substrates to and from each of the substrate treatment lines and the exposing machine and a buffer unit for temporarily storing the substrates. The interface transport mechanism is arranged to receive a substrate from the substrate treatment lines, to transport the substrate received to the exposing machine when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine. When one of the substrate treatment lines feeds a substrate, the interface section will receive the substrate. This enables the substrate treatment line to feed a new substrate. Thus, the substrate treatment line can feed the substrates promptly after the treatment, thereby preventing a lowering of the throughput of the substrate treating apparatus. The interface section has the buffer unit and when a substrate fed from one of the substrate treatment lines is not the next one to be transported to the exposing machine the substrate is temporarily put on standby in the buffer unit. Thus, the order of the substrates fed from the treating section can be adjusted conveniently in the interface section.
  • The “next substrate to be transported to the exposing machine” means the substrate to be transported to the exposing machine after the substrate that has already been transported to the exposing machine when the interface transport mechanism interface receives a substrate fed from one of the substrate treatment lines.
  • In the invention noted above, the interface transport mechanism may be arranged to transport a substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. When a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine, the interface transport mechanism transports the substrate to the exposing machine. Thus, even where the order of substrates fed from the treating section is different from the order of substrates loaded into the treating section, the order of substrates transported to the exposing machine can be brought into agreement with the order of substrates loaded into the treating section.
  • In the invention noted above, the interface transport mechanism may be arranged to prioritize receiving a substrate being fed from one of the substrate treatment lines above transporting the next substrate currently in the buffer unit to the exposing machine. Then, the substrate treatment lines can always be fed the substrates promptly after the treatment.
  • In the invention noted above, the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and to the buffer unit; and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine. The first transport mechanism is arranged to transfer a substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, to place the received substrate in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and to transfer the next substrate from the buffer unit to the second transport mechanism when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. The second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine. The interface transport mechanism includes a first transport mechanism for receiving the substrates fed from the substrate treatment lines and a separate second transport mechanism for transporting the substrates to the exposing machine. Thus, the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • In the invention noted above, the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and to the buffer unit; and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine. The first transport mechanism is arranged to transfer a substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine. The second transport mechanism is arranged to transport any substrate received from the first transport mechanism to the exposing machine, and to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. The interface transport mechanism includes a first transport mechanism for receiving the substrates fed from the substrate treatment lines, and a separate second transport mechanism for transporting the substrates to the exposing machine. Thus, the interface section can transport the substrates efficiently between the treating section and the exposing machine. A higher efficiency is realized with the second transport mechanism capable of transporting substrates directly from the buffer unit to the exposing machine.
  • In the invention noted above, the interface transport mechanism may be arranged to change positions of substrates placed in the buffer unit according to the substrate treatment lines from which the substrates are fed. Considering each substrate treatment line, the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line. Thus, by changing positions of substrates placed in the buffer unit according to the substrate treatment lines, the order of substrates to be transported to the exposing machine can be adjusted conveniently in the interface section.
  • In the invention noted above, the order in which the substrates are loaded into the treating section may be determined based on a relationship of substrate identifying information with the order in which the substrates are loaded into the treating section. Then, the order of loading into the treating section can be determined with respect to the substrates fed from each substrate treatment line. This facilitates an adjustment of the order of substrates to be transported to the exposing machine.
  • In the invention noted above, the order in which the substrates are loaded into the treating section may be determined based on a relationship of the substrate treatment lines transporting the substrates with the order in which the substrates are loaded into the treating section. Considering each substrate treatment line, the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line. Thus, based on the relationship of information showing to which substrate treatment line the substrates have been distributed with the order in which the substrates are loaded into the treating section, the order in which the substrates are loaded into the treating section can be presumed with respect to the substrates fed from each substrate treatment line. Thus, the order of substrates to be transported to the exposing machine can be adjusted easily.
  • In another aspect of the invention, a substrate treating apparatus comprises a treating section including a plurality of treating blocks arranged in juxtaposition, each having treating units arranged on each of vertical stories for treating substrates, and a main transport mechanism provided on each story for transporting the substrates to and from the treating units on the each story, the main transport mechanisms on the same story of adjacent treating blocks being constructed to transfer the substrates to and from each other, the treating blocks arranged at opposite ends acting as a first treating block and a second treating block, respectively, the substrates receiving a series of treatments on each story while the substrates loaded into each story of the first treating block are transported to the second treating block through the same story of each treating block; an indexer section disposed adjacent to the first treating block for transporting the substrates to each story of the first treating block; an interface section disposed adjacent to the second treating block and having an interface transport mechanism for transporting the substrates to and from each story of the second treating block and an exposing machine provided separately from the apparatus; and a controller for controlling the interface transport mechanism to transport the substrates fed from the second treating block to the exposing machine in an order in which the substrates are loaded into the first treating block.
  • According to this invention, the indexer section loads the substrates into the treating section. The substrates loaded from the indexer section are transported to either story of the first treating block located at one end of the treating section, respectively. Each story of the first treating block transports the substrates received to the same story of an adjoining treating block. In this way, the substrates loaded into each story of the first treating block are transported through the same story of each treating block to the second treating block located at the other end of the treating section. At this time, the substrates are treated in the treating units arranged on each story of each treating block. The second treating block feeds the substrates transported from the first treating block to the interface section. The interface transport mechanism provided in the interface section receives the substrates fed from each story of the second treating block and transports the substrates to the exposing machine. The controller controls the interface transport mechanism to transport the substrates fed from the second treating block to the exposing machine in the order in which the substrates are loaded into the first treating block. The plurality of stories of each treating block are arranged one over another, which significantly improves the throughput of the substrate treating apparatus without increasing its footprint. While treating the substrates in parallel in different stories from the first treating block to the second treating block, the substrates are transported to the exposing machine in the order in which the substrates are loaded into the treating section. Thus, each substrate can be controlled easily. A follow-up check can also be performed easily on the history of treatment of each substrate in the treating section or in the exposing machine.
  • In the invention noted above, under control of the controller, the interface transport mechanism may be arranged to adjust the substrates fed from the second treating block to the order in which the substrates are loaded into the first treating block. With the interface transport mechanism arranged to adjust the order of the substrates fed from the second treating block, there is no need to adjust timing of substrate feeding between the different stories from the first treating block to the second treating block. This allows each of the different stories from the first treating block to the second treating block to proceed with treatment of the substrates independently.
  • In the invention noted above, the interface section may include a buffer unit for temporarily storing the substrates, wherein under control of the controller the interface transport mechanism is arranged to transport the substrate received from the second treating block to the exposing machine when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine. When each story of the second treating block feeds a substrate, the interface transport mechanism will receive the substrate. This enables each story of the second treating block to be fed a new substrate. Thus, the second treating block can feed the substrates smoothly, thereby preventing a lowering of the throughput of the substrate treating apparatus. The interface section has the buffer unit. A substrate other than the next one to be transported to the exposing machine is temporarily put on standby in the buffer unit. Thus, the interface section can conveniently adjust the order of the substrates fed from the second treating block.
  • In the invention noted above, under control of the controller, the interface transport mechanism may be arranged to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. When a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine, the interface transport mechanism transports the substrate to the exposing machine. Thus, even where the order of substrates fed from the second treating block is different from the order of substrates loaded into the first treating block, the order of substrates transported to the exposing machine can be brought into agreement with the order of substrates loaded into the first treating block.
  • In the invention noted above, under control of the controller the interface transport mechanism may be arranged to prioritize receiving the substrate fed from the second treating block over transporting a substrate placed in the buffer unit even when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. Then, each story of the second treating block can always be fed the substrates smoothly.
  • In the invention noted above, the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each story of the second treating block and to the buffer unit and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine. The first transport mechanism, under control of the controller, is arranged to transfer a substrate received from each story of the second treating block to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine, and to transfer the next substrate from the buffer unit to the second transport mechanism when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. The second transport mechanism, under control of the controller, is arranged to transport a substrate received from the first transport mechanism to the exposing machine. The interface transport mechanism includes a first transport mechanism for receiving the substrates fed from each story of the second treating block and a separate second transport mechanism for transporting the substrates to the exposing machine. Thus, the interface section can transport the substrates efficiently between the treating section and the exposing machine.
  • In the invention noted above, the interface transport mechanism may include a first transport mechanism for transporting the substrates to and from each story of the second treating block and the buffer unit and a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine. The first transport mechanism, under control of the controller, is arranged to transfer a substrate received from each story of the second treating block to the second transport mechanism when the substrate is the next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from the next substrate to be transported to the exposing machine. The second transport mechanism is arranged to transport any substrate received from the first transport mechanism to the exposing machine and to transport the next substrate from the buffer unit to the exposing machine when a substrate placed in the buffer unit becomes the next substrate to be transported to the exposing machine. The interface transport mechanism includes a first transport mechanism for receiving the substrates fed from each story of the second treating block and a separate, second transport mechanism for transporting the substrates to the exposing machine. Thus, the interface section can transport the substrates efficiently between the treating section and the exposing machine. A higher efficiency is realized with the second transport mechanism capable of transporting substrates directly from the buffer unit to the exposing machine.
  • In the invention noted above, the controller may be arranged to stop loading the substrates from the indexer section into the treating section when the substrates placed in the buffer unit exceeds a predetermined number. When the buffer unit is unable to receive any further substrates, it is impossible to feed substrates smoothly from the treating section to the interface section. If substrates were loaded into the treating section under such circumstances, variations would occur with the substrates in the time taken from loading into the treating section to feeding from the treating section resulting, for example, in deterioration in the quality of treatment of the substrates. However, according to this invention, loading of the substrates from the indexer section into the treating section is stopped when the substrates placed in the buffer unit exceed a predetermined number. Thus, the deterioration in the quality of treatment of the substrates can be precluded.
  • In the invention noted above, the controller may be arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of substrate identifying information with the order in which the substrates are loaded from the indexer section into the treating section. Then, the order of loading into the treating section can be determined with respect to the substrates fed from each story of the second treating block. This facilitates an adjustment of the order of substrates to be transported to the exposing machine.
  • In the invention noted above, the controller may be arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of the stories of the first treating block transporting the substrates with the order in which the substrates are loaded from the indexer section into the treating section. Considering each of the same stories from the first treating block to the second treating block, the order of substrates fed from each substrate treatment line is the same as the order of substrates loaded into this substrate treatment line. Thus, the order in which the substrates are loaded into the treating section can be presumed based on the relationship of information showing to which story of the first treating block the substrates have been distributed, with the order in which the substrates are loaded into the treating section. This facilitates adjustment of the order of substrates. Therefore, the order of substrates to be transported to the exposing machine can be adjusted easily.
  • In the invention noted above, the indexer section may be arranged to distribute the substrate loaded into the treating section regularly and alternately to the stories of the first treating block. Then, the order of the substrates loaded into the first treating block is clear, which enables the order of substrates to be transported to the exposing machine to be adjusted conveniently.
  • In the invention noted above, the treating section may include coating blocks and developing blocks as the treating blocks. Each of the coating blocks has resist film coating units as the treating units for applying a resist film material to the substrates and each of the developing blocks has developing units as the treating units for supplying a developer to the substrates. Then, resist film can be formed on the substrates and the substrates can be developed effectively.
  • This specification discloses an invention directed to the following substrate treating apparatus also:
  • (1) The apparatus according to an embodiment wherein the interface section is arranged to receive the substrates in an order of feeding from the substrate treatment lines.
  • According to the apparatus defined in (1) above, each substrate treatment line can feed following substrates promptly.
  • (2) The apparatus according to an embodiment wherein each of the substrate treatment lines is arranged to carry out treatment for forming resist film on the substrates.
  • (3) The apparatus according to an embodiment wherein each of the substrate treatment lines is arranged to carry out treatment for developing the substrates.
  • (4) The apparatus according to an embodiment wherein each of the substrate treatment lines includes a plurality of main transport mechanisms arranged horizontally, a plurality of treating units provided for each of the main transport mechanisms for treating the substrates, wherein each of the main transport mechanisms is arranged to transfer the substrates to and from a different one of the main transport mechanisms horizontally adjacent thereto while transporting the substrates to and from the treating units associated therewith, thereby carrying out a series of treatments on the substrates.
  • According to the apparatus defined in (4) above each substrate treatment line can treat the substrates effectively.
  • (5) The apparatus according to (4) above wherein the treating units provided for each of the substrate treatment lines include resist film coating units for applying a resist film material to the substrates.
  • (6) The apparatus according to (4) above wherein the treating units provided for each of the substrate treatment lines include developing units for supplying a developer to the substrates.
  • (7) The apparatus according to an embodiment, wherein the first transport mechanism and the second transport mechanism are arranged to transfer the substrates through a receiver.
  • According to the apparatus defined in (7) above, the substrates can be transferred efficiently between the first transport mechanism and the second transport mechanism.
  • (8) The apparatus according to an embodiment wherein the buffer unit is capable of receiving a plurality of substrates.
  • According to the apparatus defined in (8) above, the order of substrates can be adjusted conveniently.
  • (9) The apparatus according to an embodiment wherein the interface section is arranged to receive the substrates in an order of feeding from each story of the second treating block.
  • According to the apparatus defined in (9) above, each story of the second treating block can feed following substrates promptly.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • For the purpose of illustrating the invention, there are shown in the drawings several embodiments, it being understood, however, that the invention is not limited to the precise arrangement and instrumentalities shown.
  • FIG. 1 is a schematic view showing an outline of a substrate treating apparatus according to this invention;
  • FIG. 2 is a plan view showing an outline of the substrate treating apparatus according to this invention;
  • FIG. 3 is a schematic side view showing an arrangement of treating units included in the substrate treating apparatus;
  • FIG. 4 is a schematic side view showing an arrangement of treating units included in the substrate treating apparatus;
  • FIG. 5 is a view in vertical section taken on line a-a of FIG. 2;
  • FIG. 6 is a view in vertical section taken on line b-b of FIG. 2;
  • FIG. 7 is a view in vertical section taken on line c-c of FIG. 2;
  • FIG. 8 is a view in vertical section taken on line d-d of FIG. 2;
  • FIG. 9A is a plan view of coating units;
  • FIG. 9B is a sectional view of a coating unit;
  • FIG. 10 is a perspective view of a main transport mechanism;
  • FIG. 11 is a control block diagram of the substrate treating apparatus according to the invention;
  • FIG. 12 is a flow chart of a series of treatments of substrates;
  • FIG. 13 is a view schematically showing operations repeated by each transport mechanism;
  • FIG. 14 is a schematic view showing information on a relationship between identification information on substrates and an order of substrates loaded from an ID section into a treating section;
  • FIG. 15 is a schematic view showing information on a relationship between an order of substrates loaded from the ID section into the treating section and substrate treatment lines to which the substrates are transported;
  • FIG. 16A is a schematic view showing information on a relationship between an order of substrates fed from a substrate treatment line to an IF section and an order of substrates loaded from the ID section into the treating section;
  • FIG. 16B is a schematic view showing information on a relationship between an order of substrates fed from a substrate treatment line to the IF section and an order of substrates transported from the ID section to the treating section;
  • FIG. 17A is a view schematically showing how, with progress of time, a plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17B is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17C is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17D is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17E is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17F is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17G is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17H is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17I is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine;
  • FIG. 17J is a view schematically showing how, with progress of time, the plurality of substrates fed from each substrate treatment line are transported through the IF section to the exposing machine; and
  • FIG. 18 is a view schematically showing operations repeated by a first and a second transport mechanisms in a modified embodiment.
  • DETAILED DESCRIPTION OF THE INVENTION
  • One embodiment of this invention will be described in detail hereinafter with reference to the drawings.
  • An outline of this embodiment will be described first. FIG. 1 is a plan view showing an outline of a substrate treating apparatus according to this embodiment.
  • This embodiment provides a substrate treating apparatus 10 for forming resist film or the like on substrates (e.g. semiconductor wafers) W, and developing exposed wafers W. The substrate treating apparatus 10 will be referred to simply as the apparatus 10 as appropriate. This apparatus 10 includes an indexer section (hereinafter called “ID section”) 1, a treating section 3 and an interface section (hereinafter called “IF section”) 5. The ID section 1, treating section 3 and IF section 5 are arranged adjacent one another in the stated order. An exposing machine EXP, which is an external apparatus separate from this apparatus 10, is disposed adjacent the IF section 5.
  • The ID section 1 transfers wafers W to the treating section 3. The treating section 3 includes a plurality of (e.g. two) substrate treatment lines Lu and Ld. Each substrate treatment line Lu or Ld treats the wafers W while transporting the wafers W substantially horizontally. The substrate treatment lines Lu and Ld are arranged one over the other. Each substrate treatment line Lu or Lu has one end thereof opposed to the ID section 1, and the other end opposed to the IF section 5. Each substrate treatment line Lu or Ld has main transport mechanisms and treating units as described hereinafter. In the following description, the substrate treatment lines Lu and Ld will be referred to simply as the “substrate treatment lines L” when they are not distinguished. The IF section 5 transfers the wafers W between the treating section 3 and exposing machine EXP. The exposing machine EXP exposes the wafers W.
  • The apparatus 10 constructed in this way operates as follows. The ID section 1 transports a plurality of wafers W into the treating section 3. Here, as shown in FIG. 1, a case of transporting eight wafers Wa, Wb, Wc, . . . , and Wh from the ID section 1 to the treating section 3 will be described by way of example. The arrow affixed with sign OA in FIG. 1 indicates an order in which the wafers W are transported from the ID section 1 to the treating section 3; it signifies that wafer Wa is the first, wafer Wb is the second, wafers Wc and Wd are the third and fourth, respectively, . . . and wafer Wh is the eighth. The other arrows indicates the following orders: order OB of wafers W fed from the substrate treatment line Lu to the IF section 5; order OC of wafers W fed from the substrate treatment line Ld to the IF section 5, order OD of wafers W fed from the substrate treatment lines Lu Ld as a whole, i.e. from the treating section 3 to the IF section 5, and order OE of wafers W transported from the IF section 5 to the exposing machine EXP. These orders will be referred to hereinafter simply as “order OA”, “order OB” and so on as appropriate.
  • In transporting the wafers W from the ID section 1 to the treating section 3, the wafers W are distributed alternately to the substrate treatment lines Lu and Ld. As a result, wafers Wa, Wc, We and Wg, which are the first, third, fifth and seventh in the order OA, are transported to the substrate treatment line Lu, and wafers Wb, Wd, Wf and Wh, which are the second, fourth, sixth and eighth in the order OA, are transported to the substrate treatment line Ld.
  • Each of the substrate treatment lines Lu and Ld carries out a series of treatments for the wafers W transported thereto, and feeds the wafers W to the IF section 5. As far as the substrate treatment line Lu is concerned, the order OB is the same as the order of wafers W transported from the ID section 1 to the substrate treatment line Lu. As far as the substrate treatment line Ld is concerned, the order OC is the same as the order of wafers W transported from the ID section 1 to the substrate treatment line Ld. However, the time taken from loading-in to feeding-out is not necessarily the same between the substrate treatment lines Lu and Ld even if the same treatment is carried out. Therefore, when the substrate treatment lines Lu and Ld are seen as a whole, the order OD of wafers W fed therefrom is not necessarily the same as the order OA. FIG. 1 illustrates the case where the order OD of wafers W fed out of the treating section 3 differs from the order OA of wafers W loaded into the treating section 3.
  • The IF section 5 successively receives wafers W fed from the respective substrate treatment lines Lu and Ld. Therefore, the IF section 5 receives wafers W from the treating section 3 is the same order as order OD.
  • The IF section 5 adjusts the wafers W fed from the treating section 3 to the order OA of loading into the treating section 3. Then, the IF section 5 transports the wafers W to the exposing machine EXP in the same order as the order OA of wafers W loaded into the treating section 3. That is, the order OE in which the IF section 5 transports the wafers W to the exposing machine EXP is the same as the order OA.
  • The exposing machine EXP exposes the wafers W transported thereto. Although not shown in FIG. 1, the exposing machine EXP transports the exposed wafers W back to the IF section 5. The IF section 5 receives the wafers W from the exposing machine EXP, and transports the wafers W to the treating section 3. The treating section 3 transports the wafers W to the ID section 1 through each substrate treatment line L.
  • Thus, even where wafers W are treated in parallel in a plurality of (two) substrate treatment lines Lu and Ld, the order OE of wafers W transported to the exposing machine EXP is the same as the order OA of wafers W loaded into the treating section 3. Therefore, each of the wafers W can be controlled easily. A follow-up check may also be carried out easily on the history of treatment of each wafer W in the treating section 3 and exposing machine EXP.
  • This apparatus 10, including the plurality of (two) substrate treatment lines Lu and Ld treats wafers W in parallel in the substrate treatment lines L, thereby significantly improves throughput. The substrate treatment lines Lu and Ld are arranged one over the other, and this arrangement can prevent an enlarged footprint of the apparatus 10.
  • This embodiment will be described in greater detail hereinafter. FIG. 2 is a plan view showing an outline of the substrate treating apparatus according to this embodiment. FIGS. 3 and 4 are schematic side views showing an arrangement of treating units included in the substrate treating apparatus. FIGS. 5 through 8 are views in vertical section taken on lines a-a, b-b, c-c and d-d of FIG. 2, respectively.
  • ID Section 1
  • The ID section 1 takes wafers W out of each cassette C which stores a plurality of wafers W and deposits wafers W in the cassette C. The ID section 1 has a cassette table 9 for receiving cassettes C. The cassette table 9 can receive four cassettes C as arranged in a row. The ID section 1 has also an ID transport mechanism TID. As shown in FIG. 5, the ID transport mechanism TID transports wafers W to and from each cassette C, and transports wafers W to and from receivers PASS1 and PASS3 to be described hereinafter. The ID transport mechanism TID has a movable base 21 for moving horizontally alongside the cassette table 9 in the direction of arrangement of the cassettes C, a lift shaft 23 vertically extendible and contractible relative to the movable base 21, and a holding arm 25 swivelable on the lift shaft 23, and extendible and retractable radially of the swivel motion, for holding a wafer W.
  • Treating Section 3
  • Each substrate treatment line L of the treating section is constructed to transport wafers W in a substantially horizontal direction between the ID section 1 and IF section 5. Each substrate treatment line L has main transport mechanisms T for transporting wafers W. In this embodiment, each substrate treatment line L has a plurality of main transport mechanisms T (two for each substrate treatment line L, and thus a total of four). The main transport mechanisms T provided for the same substrate treatment line L are arranged in the direction in which the wafers W are transported, and the wafers W can be transferred between the main transport mechanisms T adjacent each other in the transport direction. Each main transport mechanism T transports wafers W to and from various treating units described hereinafter, and transfers wafers W to and from the other main transport mechanism T adjacent thereto.
  • Specifically, the substrate treatment line Lu includes a main transport mechanism T1 and a main transport mechanism T2 arranged in a row. The main transport mechanism T1 is disposed adjacent to the ID section, while the main transport mechanism T2 is disposed adjacent to the IF section 5. Similarly, the substrate treatment line Ld includes a main transport mechanism T3 and a main transport mechanism T4 arranged in a row. The main transport mechanism T3 is disposed adjacent to the ID section, while the main transport mechanism T4 is disposed adjacent to the IF section 5.
  • In this embodiment, the treating section 3 which has the above substrate treatment lines L includes a plurality of (two) treating blocks Ba and Bb arranged side by side (in substantially the same direction as the transport direction). The treating block Ba is located adjacent the ID section 1, while the treating block Bb is located adjacent the IF section 5. Each of the treating blocks Ba and Ba is vertically divided into a plurality of (two) stories K. The upper story K1 of the treating block Ba has the main transport mechanism T1 noted above, and the lower story K3 has the main transport mechanism T3. Similarly, the upper story K2 of the treating block Bb has the main transport mechanism T2, and the lower story K4 has the main transport mechanism T4. The story K1 and story K2 are at the same height, and the story K3 and story K4 are at the same height. In this sense, the story K1 and story K2 are “the same stories” and the story K3 and story K4 are “the same stories”.
  • The main transport mechanisms T1 and T2 on the same stories K1 and K2 of the adjoining treating blocks Ba and Bb can transfer wafers W to and from each other. The stories K1 and K2 constitute the substrate treatment line Lu. Similarly, the main transport mechanisms T3 and T4 can transfer wafers W to and from each other. The stories K3 and K4 constitute the substrate treatment line Ld.
  • Treating Section 3—Treating Block Ba
  • Receivers PASS1 and PASS3 for receiving wafers W are provided between the ID section 1 and the respective stories K1 and K3 of the treating block Ba. The receiver PASS1 receives, as temporarily placed thereon, wafers W passed between the ID transport mechanism TID and the main transport mechanism T1. Similarly, the receiver PASS3 receives, as temporarily placed thereon, wafers W passed between the ID transport mechanism TID and the main transport mechanism T3. Seen in a sectional view, the receiver PASS1 is disposed at a height adjacent a lower part of the upper story K2, while the receiver PASS3 is disposed at a height adjacent an upper part of the lower story K3. Thus, the positions of receiver PASS1 and receiver PASS3 are relatively close to each other for allowing the ID transport mechanism TID to move between the receiver PASS1 and receiver PASS3 through using only a small amount of vertical movement.
  • Receivers PASS2 and PASS4 for receiving wafers W are provided also between the treating blocks Ba and Bb. The receiver PASS2 is disposed between the story K1 and story K2, and the receiver PASS4 between the story K3 and story K4. The main transport mechanisms T1 and T2 transfer wafers W through the receiver PASS2, and the main transport mechanisms T3 and T4 through the receiver PASS4.
  • The receiver PASS1 includes a plurality of receivers (two in this embodiment). These receivers PASS1 are arranged vertically adjacent each other. Of the two receivers PASS1, one PASS1A receives wafers W passed from the ID transport mechanism TID to the main transport mechanism T1. The other receiver PASS1B receives wafers W passed from the main transport mechanism T1 to the ID transport mechanism TID. Each of the receivers PASS2-PASS4 and receivers PASS5 and PASS6 described hereinafter similarly includes a plurality of (two) receivers, one of which is selected according to a direction for transferring wafers W. Each of the receivers PASS1A and PASS1B has a sensor (not shown) for detecting presence or absence of a wafer W. Based on detection signals of each sensor, the transfer of wafers W by the ID transport mechanism TID and main transport mechanism T1 is controlled. Similar sensors are attached also to the receivers PASS2-PASS6, respectively.
  • The story K1 will now be described. The main transport mechanism T1 is movable in a transporting space A1 extending substantially through the center of the story K1 and parallel to the direction of transport. The story K1 has, arranged thereon, coating units 31 for applying a treating solution to wafers W, and heat-treating units 41 for heat-treating the wafers W. The coating units 31 are arranged on one side of the transporting space A1, while the heat-treating units 41 are arranged on the other side thereof.
  • The coating units 31 are arranged vertically and horizontally, each facing the transporting space A1. In this embodiment, four coating units 31 in total are arranged in two columns and two rows.
  • The coating units 31 include anti-reflection film coating units BARC for applying an anti-reflection film material to the wafers W, and resist film coating units RESIST for applying a resist film material to the wafers W. In this specification, the treatment carried out in the anti-reflection film coating units BARC is referred to as anti-reflection film material coating treatment as appropriate, and the treatment carried out in the resist film coating units RESIST is referred to as resist film material coating treatment as appropriate.
  • The plurality of (two) anti-reflection film coating units BARC are arranged at substantially the same height in the lower row. The plurality of resist film coating units RESIST are arranged at substantially the same height in the upper row. No dividing wall or partition is provided between the antireflection film coating units BARC. That is, all the antireflection film coating units BARC are only housed in a common chamber, and the atmosphere around each antireflection film coating unit BARC is not blocked off (i.e. is in communication). Similarly, the atmosphere around each resist film coating unit RESIST is not blocked off.
  • Reference is made to FIGS. 9A and 9B. FIG. 9A is a plan view of the coating units 31. FIG. 9B is a sectional view of a coating unit 31. Each coating unit 31 includes a spin holder 32 for holding and spinning a wafer W, a cup 33 surrounding the wafer W, and a supply device 34 for supplying a treating solution to the wafer W.
  • The supply device 34 includes a plurality of nozzles 35, a gripper 36 for gripping one of the nozzles 35, and a nozzle moving mechanism 37 for moving the gripper 36 to move one of the nozzles 35 between a treating position above the wafer W and a standby position away from above the wafer W. Each nozzle 35 has one end of a treating solution pipe 38 connected thereto. The treating solution pipe 38 is arranged movable (flexible) to permit movement of the nozzle 35 between the standby position and treating position. The other end of each treating solution pipe 38 is connected to a treating solution source (not shown). Specifically, in the case of antireflection film coating units BARC, the treating solution sources supply different types of treating solution for antireflection film to the respective nozzles 35. In the case of resist film coating units RESIST, the treating solution sources supply different types of resist film material to the respective nozzles 35.
  • The nozzle moving mechanism 37 has first guide rails 37 a and a second guide rail 37 b. The first guide rails 37 a are arranged parallel to each other and opposed to each other across the two cups 33 arranged sideways. The second guide rail 37 b is slidably supported by the two first guide rails 37 a and disposed above the two cups 33. The gripper 36 is slidably supported by the second guide rail 37 b. The first guide rails 37 a and second guide rail 37 b take guiding action substantially horizontally and in directions substantially perpendicular to each other. The nozzle moving mechanism 37 further includes drive members (not shown) for sliding the second guide rail 37 b, and sliding the gripper 36. The drive members are operable to move the nozzle 35 gripped by the gripper 36 to the treating positions above the two spin holders 32.
  • The plurality of heat-treating units 41 are arranged vertically and horizontally, each facing the transporting space A1. In this embodiment, three heat-treating units 41 can be arranged horizontally, and five heat-treating units 41 can be stacked vertically. Each heat-treating unit 41 has a plate 43 for receiving a wafer W. The heat-treating units 41 include cooling units CP for cooling wafers W, heating and cooling units PHP for carrying out heating and cooling treatments continually, and adhesion units AHL for heat-treating wafers W in an atmosphere of hexamethyldisilazane (HMDS) vapor in order to promote adhesion of coating film to the wafers W. As shown in FIG. 6, each heating and cooling unit PHP has two plates 43, and a local transport mechanism (not shown) for moving a wafer W between the two plates 43. The various types of heat-treating units CP, PHP and AHL are arranged in appropriate positions. In this specification, the treatment carried out in the heating and cooling units PHP is referred to as heating/cooling treatment as appropriate.
  • The main transport mechanism T1 will be described specifically. Reference is made to FIG. 10. FIG. 10 is a perspective view of the main transport mechanism T1. The main transport mechanism T1 has two third guide rails 51 for providing vertical guidance, and a fourth guide rail 52 for providing horizontal guidance. The third guide rails 51 are fixed opposite each other at one side of the transporting space A1. In this embodiment, the third guide rails 51 are arranged at the side adjacent the coating units 31. The fourth guide rail 52 is slidably attached to the third guide rails 51. The fourth guide rail 52 has a base 53 slidably attached thereto. The base 53 extends transversely, substantially to the center of the transporting space Al. Further, drive members (not shown) are provided for vertically moving the fourth guide rail 52, and horizontally moving the base 53. The drive members are operable to move the base 53 to positions for accessing the coating units 31 and heat-treating units 41 arranged vertically and horizontally.
  • The base 53 has a turntable 55 rotatable about a vertical axis Q. The turntable 55 has two holding arms 57 a and 57 b horizontally movably attached thereto for holding wafers W, respectively. The two holding arms 57 a and 57 b are arranged vertically close to each other. Further, drive members (not shown) are provided for rotating the turntable 55, and moving the holding arms 57 a and 57 b. The drive members are operable to move the turntable 55 to positions opposed to the coating units 31, heat-treating units 41 and receivers PASS1 and PASS2, and to extend and retract the holding arms 57 a and 57 b to and from the coating units 31 and so on.
  • The story K3 will be described next. Like reference numerals are used to identify like parts which are the same as in the story K1, and will not be described again. The layout (arrangement) in plan view of the main transport mechanism T3 and treating units in the story K3 is substantially the same as in the story K1. Thus, the arrangement of the various treating units of the story K3 as seen from the main transport mechanism T3 is substantially the same as the arrangement of the various treating units of the story K1 as seen from the main transport mechanism T1. The coating units 31 and heat-treating units 41 of the story K3 are stacked under the coating units 31 and heat-treating units 41 of the story K1, respectively.
  • In the following description, when distinguishing the resist film coating units RESIST in the stories K1 and K3, subscripts “1” and “3” will be affixed (for example, the resist film coating units RESIST in the story K1 will be referred to as “resist film coating units RESIST1”).
  • The other aspects of the treating block Ba will be described. As shown in FIGS. 5 and 6, each of the transporting spaces A1 and A3 has a first blowout unit 61 for blowing out a clean gas, and an exhaust unit 62 for sucking the gas. Each of the first blowout unit 61 and exhaust unit 62 is in the form of a flat box having substantially the same area as the transporting space A1 in plan view. Each of the first blowout unit 61 and exhaust unit 62 has first blowout openings 61 a or exhaust openings 62 a formed in one surface thereof. In this embodiment, the first blowout openings 61 a or exhaust openings 62 a are in the form of numerous small bores f (see FIG. 10). The first blowout units 61 a re arranged over the transporting spaces A1 and A3 with the first blowout openings 61 a directed downward. The exhaust units 62 are arranged under the transporting spaces A1 and A3 with the exhaust openings 62 a directed upward. The atmosphere in the transporting space Al and the atmosphere in the transporting space A3 are blocked off by the exhaust unit 62 of the transporting space A1 and the first blowout unit 61 of the transporting space A3. Thus, each of the stories K1 and K3 has the atmosphere blocked off from the other.
  • The first blowout units 61 of the transporting spaces A1 and A3 are connected to a common, first gas supply pipe 63. The first gas supply pipe 63 extends laterally of the receivers PASS2 and PASS4 from an upper position of the transporting space A1 to a lower position of the transporting space A3, and is bent below the transporting space A3 to extend horizontally. The other end of the first gas supply pipe 63 is connected to a gas source not shown. Similarly, the exhaust units 62 of the transporting spaces A1 and A3 are connected to a common, first gas exhaust pipe 64. The first gas exhaust pipe 64 extends laterally of the receivers PASS2 and PASS4 from a lower position of the transporting space A1 to a lower position of the transporting space A3, and is bent below the transporting space A2 to extend horizontally. As the gas is blown out of each first blowout opening 61 a and sucked and exhausted through each exhaust opening 62 a of the transporting spaces A1 and A3, gas currents are formed to flow from top to bottom of the transporting spaces A1 and A3, thereby keeping each of the transporting spaces A1 and A3 in a clean state.
  • As shown in FIGS. 2, 7 and 9A, each coating unit 31 of the stories K1 and K3 has a pit portion PS extending vertically. The pit portion PS accommodates a second gas supply pipe 65 extending vertically for supplying the clean gas, and a second gas exhaust pipe 66 extending vertically for exhausting the gas. Each of the second gas supply pipe 65 and second gas exhaust pipe 66 branches at a predetermined height in each coating unit 31 to extend substantially horizontally from the pit portion PS. A plurality of branches of the second gas supply pipe 65 are connected to second blowout units 67 for blowing out the gas downward. A plurality of branches of the second gas exhaust pipe 66 are connected for communication to the bottoms of the respective cups 33. The other end of the second gas supply pipe 65 is connected to the first gas supply pipe 63 below the story K3. The other end of the second gas exhaust pipe 66 is connected to the first gas exhaust pipe 64 below the story K3. As the gas is blown out of the second blowout units 67 and exhausted through the second exhaust pipes 62 a, the atmosphere inside each cup 33 is constantly maintained clean, thereby allowing for excellent treatment of the wafer W held by the spin holder 32.
  • The pit portions PS further accommodate piping of the treating solutions, electric wiring and the like (not shown). Thus, with the pit portions PS accommodating the piping and electric wiring provided for the coating units 31 of the stories K1 and K3, the piping and electric wiring can be reduced in length.
  • The treating block Ba has one housing 75 for accommodating the main transport mechanisms T1 and T3, coating units 31 and heat-treating units 41 described hereinbefore. The treating block Bb described hereinafter also has a housing 75 for accommodating the main transport mechanisms T2 and T4 and the treating units included in the treating block Bb. The housing 75 of the treating block Ba and the housing 75 of the treating block Bb are separate entities. Thus, with each of the treating blocks Ba and Bb having the housing 75 accommodating the main transport mechanisms T and treating units U en bloc, the treating section 3 may be manufactured and assembled simply. The treating block Ba corresponds to the coating block in this invention. The treating block Ba corresponds also to the first treating block in this invention.
  • Treating Section 3—Treating Block Bb
  • The story K2 will be described. Like reference numerals are used to identify like parts which are the same as in the story K1 and will not be described again. The story K2 has a transporting space A2 formed as an extension of the transporting space A1.
  • The story K2 has, arranged thereon, developing units DEV for supplying a developing solution to wafers W, heat-treating units 42 for heat-treating the wafers W, and an edge exposing unit EEW for exposing peripheral regions of the wafers W. The developing units DEV are arranged at one side of the transporting space A2, and the heat-treating units 42 and edge exposing unit EEW are arranged at the other side of the transporting space A2. Preferably, the developing units DEV are arranged at the same side as the coating units 31. It is also preferable that the heat-treating units 42 and edge exposing unit EEW are arranged in the same row as the heat-treating units 41. In this specification, the treatment carried out in the developing units DEV is referred to as developing treatment as appropriate, and the treatment carried out in the edge exposing unit EEW is referred to as edge exposure as appropriate.
  • The number of developing units DEV is four, and sets of two units DEV arranged horizontally along the transporting space A2 are stacked one over the other. As shown in FIGS. 2 and 7, each developing unit DEV includes a spin holder 77 for holding and spinning a wafer W, and a cup 79 surrounding the wafer W. The two developing units DEV arranged at the lower level are not separated from each other by a partition wall or the like. A supply device 81 is provided for supplying developers to the two developing units DEV. The supply device 81 includes two slit nozzles 81 a having a slit or a row of small bores for delivering the developers. The slit or row of small bores, preferably, has a length corresponding to the diameter of wafer W. Preferably, the two slit nozzles 81 a are arranged to deliver developers of different types or concentrations. The supply device 81 further includes a moving mechanism 81 b for moving each slit nozzle 81 a. Thus, the slit nozzles 81 a are movable, respectively, over the two spin holders 77 juxtaposed sideways.
  • The plurality of heat-treating units 42 are arranged sideways along the transporting space A2, and stacked one over the other. The heat-treating units 42 include heating units HP for heating wafers W, cooling units CP for cooling wafers W, and heating and cooling units PHP for carrying out heating/cooling treatment.
  • The plurality of heating and cooling units PHP are vertically stacked in the column closest to the IF section 5, each having one side facing the IF section 5. The heating and cooling units PHP on the story K2 have transport ports formed in the sides thereof for passage of wafers W. IF transport mechanisms TIF to be described hereinafter transport wafers W through the above transport ports to the heating and cooling units PHP. The heating and cooling units PHP arranged on the story K2 carry out post-exposure baking (PEB) treatment. Thus, the heating/cooling treatment carried out in the heating and cooling units PHP on the story K2 in particular is referred to as PEB treatment. Similarly, the heating/cooling treatment carried out in the heating and cooling units PHP on the story K4 in particular is referred to as PEB treatment.
  • The single edge exposing unit EEW is disposed in a predetermined position. The edge exposing unit EEW includes a spin holder (not shown) for holding and spinning a wafer W, and a light emitter (not shown) for exposing edges of the wafer W held by the spin holder.
  • The receiver PASS5 is formed on top of the heating and cooling units PHP. The main transport mechanism T2 and IF transport mechanisms TIF to be described hereinafter transfer wafers W through the receiver PASS5.
  • The main transport mechanism T2 is disposed substantially centrally of the transporting space A2 in plan view. The main transport mechanism T2 has the same construction as the main transport mechanism T1. The main transport mechanism T2 transports wafers W to and from the receiver PASS2, various heat-treating units 42, edge exposing unit EEW and receiver PASS5.
  • The story K4 will be described briefly. The relationship in construction between story K2 and story K4 is similar to that between stories K1 and K3. The treating units U on the story K4 are developing units DEV, heat-treating units 42 and an edge exposing unit EEW. The heat-treating units 42 on the story K4 include heating units HP, cooling units CP and heating and cooling units PHP. The receiver PASS6 is formed on top of the heating and cooling units PHP on the story K4. The main transport mechanism T4 and IF transport mechanisms TIF described hereinafter transfer wafers W through the receiver PASS6. The heating and cooling units PHP on the story K4 also carry out post-exposure baking (PEB) treatment.
  • In the following description, when distinguishing the developing units DEV, edge exposing units EEW and so on provided on the stories K2 and K4, subscripts “2” and “4” will be affixed (for example, the heating units HP on the story K2 will be referred to as “heating units HP2”).
  • Each of the transporting spaces A2 and A4 of the stories K2 and K4 also has constructions corresponding to the first blowout unit 61 and exhaust unit 62. Each developing unit DEV of the stories K2 and K4 also has constructions corresponding to the second blowout unit 67 and second gas exhaust pipe 66.
  • The treating block Bb constructed in this way corresponds to the developing block in this invention. The treating block Bb corresponds also to the second treating block in this invention.
  • IF Section 5
  • The IF section 5 transfers wafers W between each of the substrate treatment lines Lu and Ld (stories K2 and K4) of the treating section 3 and the exposing machine EXP. The IF section 5 has IF transport mechanisms TIF for transporting wafers W. The IF transport mechanisms TIF include a first transport mechanism TIFA and a second transport mechanism TIFB that can transfer wafers W to and from each other. The first transport mechanism TIFA transports wafers W to and from the substrate treatment lines Lu and Ld. In this embodiment, as described hereinbefore, the first transport mechanism TIFA transports wafers W to and from the receivers PASS5 and PASS6 on the stories K2 and K4, and to and from the heating and cooling units PHP on the stories K3 and K4. The second transport mechanism TIFB transports wafers W to and from the exposing machine EXP.
  • As shown in FIG. 2, the first transport mechanism TIFA and second transport mechanism TIFB are arranged in a transverse direction perpendicular to the transport direction of the substrate treatment lines L. The first transport mechanism TIFA is disposed at the side where the heat-treating units 42 and so on of the stories K2 and K4 are located. The second transport mechanism TIFB is disposed at the side where the developing units DEV of the stories K2 and K4 are located. Provided between the first and second transport mechanisms TIFA and TIFB are a receiver PASS-CP for receiving and cooling wafers W, a receiver PASS7 for receiving wafers W, and buffers BF for temporarily storing wafers W. The buffers BF can receive or store a plurality of wafers W. The first and second transport mechanisms TIFA and TIFB transfer wafers W through the receiver PASS-CP and receiver PASS7. The buffers BF are accessed exclusively by the first transport mechanism TIFA.
  • As shown in FIG. 8, the first transport mechanism TIFA includes a fixed base 83, lift shafts 85 vertically extendible and contractible relative to the base 83, and a holding arm 87 swivelable on the lift shafts 85, and extendible and retractable radially of the swivel motion, for holding a wafer W. The second transport mechanism TIFB also has a base 83, lift shafts 85 and a holding arm 87.
  • A control system of this apparatus 10 will be described next. FIG. 11 is a control block diagram of the substrate treating apparatus according to the invention. As shown, the control section 90 of this apparatus 10 includes a main controller 91 and a first to a seventh controllers 93, 94, 95, 96, 97, 98 and 99.
  • The main controller 91 performs overall control of the first to seventh controllers 93-99. The first controller 93 controls substrate transport by the ID transport mechanism TID. The second controller 94 controls substrate transport by the main transport mechanism T1, and substrate treatment in the resist film coating units RESIST1, antireflection film coating units BARC1, cooling units CP1, heating and cooling units PHP1 and adhesion units AHL1. The third controller 95 controls substrate transport by the main transport mechanism T2, and substrate treatment in the edge exposing unit EEW2, developing units DEV2, heating units HP2 and cooling units CP2. The controls by the fourth and fifth controllers 96 and 97 correspond to those by the second and third controllers 94 and 95, respectively. The sixth controller 98 controls substrate transport by the first transport mechanism TIFA, and substrate treatment in the heating and cooling units PHP2 and PHP4. The seventh controller 99 controls substrate transport by the second transport mechanism TIFB. The first to seventh controllers 93-99 carry out the controls independently of one another.
  • Each of the main controller 91 and the first to seventh controllers 93-99 is realized by a central processing unit (CPU) which performs various processes, a RAM (Random Access Memory) used as the workspace for operation processes, and a storage medium such as a fixed disk. The storage medium stores a variety of information including a predetermined processing recipe (processing program), and information specifying an order of wafers W to be loaded into the treating section 3.
  • Next, operation of the substrate treating apparatus in this embodiment will be described. FIG. 12 is a flow chart of a series of treatments of wafers W, indicating the treating units and receivers to which the wafers W are transported in order. FIG. 13 is a view schematically showing operations repeated by each transport mechanism, and specifying an order of treating units, receivers and cassettes accessed by the transport mechanisms. The following description will be made separately for each transport mechanism. FIGS. 12 and 13 show an example of basic operation where the order OD of wafers W the IF section 5 receives from the treating section 3 is the same as the order OA of wafers W transported from the ID section 1 to the treating section 3. An operation taking place where the order OD is different from the order OA will be described in connection with operation of IF transport mechanisms TIF
  • ID Transport Mechanism TID
  • The ID transport mechanism TID moves to a position opposed to one of the cassettes C, holds with the holding arm 25 a wafer W to be treated and takes the wafer W out of the cassette C. The ID transport mechanism TID swivels the holding arm 25, vertically moves the lift shaft 23, moves to a position opposed to the receiver PASS1, and places the wafer W on the receiver PASS1A (which corresponds to step S1 a in FIG. 12; only step numbers will be indicated hereinafter). At this time, a wafer W usually is present on the receiver PASS1B, and the ID transport mechanism TID receives this wafer W and stores it in a cassette C (step S23). When there is no wafer W on the receiver PASS1B, step S23 is omitted. Then, the ID transport mechanism TID accesses the cassette C, and transports a wafer W from the cassette C to the receiver PASS3A (step S1 b). Here again, if a wafer W is present on the receiver PASS3B, the ID transport mechanism TID will store this wafer W in a cassette C (step S23). The ID transport mechanism TID repeats the above operation.
  • This operation of the ID transport mechanism TID is controlled by the first controller 93. As a result, the wafers W in the cassette C are fed to the story K1, and the wafers W delivered from the story K1 are stored in the cassette C. Similarly, the wafers W in the cassette C are fed to the story K3, and the wafers W delivered from the story K3 are stored in the cassette C.
  • Main Transport Mechanisms T1, T3
  • Since operation of the main transport mechanism T3 is substantially the same as operation of the main transport mechanism T1, only the main transport mechanism T1 will be described. The main transport mechanism T1 moves to a position opposed to the receiver PASS1. At this time, the main transport mechanism T1 holds, on one holding arm 57 (e.g. 57 b), a wafer W received immediately before from the receiver PASS2B. The main transport mechanism T1 places this wafer W on the receiver PASS1B (step S22), and holds the wafer W present on the receiver PASS1A with the other holding arm 57 (e.g. 57 a).
  • The main transport mechanism T1 accesses one of the cooling units CP1. There is a different wafer W having already received cooling treatment in the cooling unit CP1. The main transport mechanism T1 holds the different wafer W with the unloaded holding arm 57 (holding no wafer W), takes it out of the cooling unit CP1, and loads into the cooling unit CP1 the wafer W having received from the receiver PASS1A. Then, the main transport mechanism T1, holding the cooled wafer W, moves to one of the antireflection film coating units BARC1. The cooling unit CP1 starts cooling treatment of the wafer W loaded therein (step S2). This heat treatment (cooling) will have been finished by the time the main transport mechanism T1 accesses this cooling unit CP1 next time. The following description assumes that wafers W having received predetermined treatments are present also in the other, different heat-treating units 41 and coating units 31 when the main transport mechanism T1 makes access thereto.
  • Accessing the antireflection film coating unit BARC1, the main transport mechanism T1 takes a wafer W having antireflection film formed thereon from the antireflection film coating unit BARC1, and places the cooled wafer W on the spin holder 32 of the antireflection film coating unit BARC1. Then, the main transport mechanism T1, holding the wafer W having antireflection film formed thereon, moves to one of the heating and cooling units PHP1. The antireflection film coating unit BARC1 starts antireflection film material coating treatment of the wafer W placed on the spin holder 32 (step S3 a).
  • Specifically, the spin holder 32 spins the wafer W in horizontal posture, the gripper 26 grips one of the nozzles 35, the nozzle moving mechanism 37 moves the gripped nozzle 35 to a position above the wafer W, and the treating solution for antireflection film is supplied from the nozzle 35 to the wafer W. The treating solution supplied spreads all over the wafer W, and is scattered away from the wafer W. The cup 33 collects the scattering treating solution. In this way, the treatment is carried out for forming antireflection film on the wafer W.
  • Accessing the heating and cooling unit PHP1, the main transport mechanism T1 takes a wafer W having received heat treatment out of the heating and cooling unit PHP1, and loads the wafer W having antireflection film formed thereon into the heating and cooling unit PHP1. Then, the main transport mechanism T1, holding the wafer W taken out of the heating and cooling unit PHP1, moves to one of the cooling units CP1. The heating and cooling unit PHP1 receives a wafer W successively on the two plates 43, to heat the wafer W on one of the plates 43 and then to cool the wafer W on the other plate 43 (step S4 a).
  • Having moved to the cooling unit CP1, the main transport mechanism T1 takes a wafer W out of the cooling unit CP1, and loads the wafer W held by the transport mechanism T1 into the cooling unit CP1. The cooling unit CP1 cools the wafer W loaded therein (step S5 a).
  • Then, the main transport mechanism T1 moves to one of the resist film coating units RESIST1. The main transport mechanism T1 takes a wafer W having resist film formed thereon from the resist film coating unit RESIST1, and loads the wafer W held by the main transport mechanism T1 into the resist film coating unit RESIST1. The resist film coating unit RESIST1, while spinning the wafer W loaded therein, applies the resist film material to the wafer W (step S6 a).
  • The main transport mechanism T1 further moves to one of the heating and cooling units PHP1 and one of the cooling units CP1. The main transport mechanism T1 loads the wafer W having resist film formed thereon into the heating and cooling unit PHP1, transfers a wafer W treated in the heating and cooling unit PHP1 to the cooling unit CP1, and receives a wafer W treated in the cooling unit CP1. The heating and cooling unit PHP1 and cooling unit CP1 carry out predetermined treatments of newly loaded wafers W, respectively (steps S7 a and S8 a).
  • The main transport mechanism T1 moves to the receiver PASS2, places the wafer W it is holding on the receiver PASS2A (step S9 a), and receives a wafer W present on the receiver PASS2B (step S21 a).
  • Subsequently, the main transport mechanism T1 accesses the receiver PASS1 again, and repeats the above operation. This operation is controlled by the second controller 94. As a result, all the wafers W transported from the cassette C to the receiver PASS1 are transported to and from the various treating units through the transport path on the story K1 to receive the predetermined treatment successively in the treating units to which the wafers W are transported.
  • The main transport mechanism T1 transports a wafer W having been transported to the receiver PASS1 to a predetermined treating unit (a cooling unit CP1 in this embodiment), and takes a treated wafer W from this treating unit. Subsequently, the main transport mechanism T1 transports the wafer W taken out to a next treating unit (an antireflection film coating unit BARC1), and takes a treated wafer W from this treating unit. In this way, the treatment is carried out in parallel for a plurality of wafers W by transferring a treated wafer W from each treating unit to a new treating unit. Starting with a wafer W first placed on the receiver PASS1, the wafers W are successively placed on the receiver PASS2 to be fed to the story K2. Similarly, the wafers W are placed on the receiver PASS1 in the order of placement on the receiver PASS2 to be fed to the ID section 1.
  • Main Transport Mechanisms T2, T4
  • Since operation of the main transport mechanism T4 is substantially the same as operation of the main transport mechanism T2, only the main transport mechanism T2 will be described. The main transport mechanism T2 moves to a position opposed to the receiver PASS2. At this time, the main transport mechanism T2 holds a wafer W received from a cooling unit CP2 accessed immediately before. The main transport mechanism T2 places this wafer W on the receiver PASS2B (step S21 a), and holds the wafer W present on the receiver PASS2A (step S9 a).
  • The main transport mechanism T2 accesses the edge exposing unit EEW2. The main transport mechanism T2 receives a wafer W having received a predetermined treatment in the edge exposing unit EEW2, and loads the cooled wafer W into the edge exposing unit EEW2. While spinning the wafer W loaded therein, the edge exposing unit EEW2 irradiates peripheral regions of the wafer W with light from the light emitter not shown, thereby exposing the peripheral regions of the wafer W (step S10 a).
  • The main transport mechanism T2, holding the wafer W received from the edge exposing unit EEW2, accesses the receiver PASS5. The main transport mechanism T2 places the wafer W on the receiver PASS5A (step S11 a), and holds a wafer W present on the receiver PASS5B (step S16 a).
  • The main transport mechanism T2 moves to one of the cooling units CP2, and replaces a wafer W in the cooling unit CP2 with the wafer W held by the main transport mechanism T2. The main transport mechanism T2 holds the wafer W having received cooling treatment, and accesses one of the developing units DEV2. The cooling unit CP2 starts treatment of the newly loaded wafer W (step S17 a).
  • The main transport mechanism T2 takes a developed wafer W from the developing unit DEV2, and places the cooled wafer W on the spin holder 77 of the developing unit DEV2. The developing unit DEV2 develops the wafer W placed on the spin holder 77 (step S18 a). Specifically, while the spin holder 77 spins the wafer W in horizontal posture, the developer is supplied from one of the slit nozzles 81 a to the wafer W, thereby developing the wafer W.
  • The main transport mechanism T2 holds the developed wafer W, and accesses one of the heating units HP2. The main transport mechanism T2 takes a wafer W out of the heating unit HP2, and loads the wafer W it is holding into the heating unit HP2. Then, the main transport mechanism T2 transports the wafer W taken out of the heating unit HP2 to one of the cooling units CP2, and takes out a wafer W already treated in this cooling unit CP2. The heating unit HP2 and cooling unit CP2 carry out predetermined treatments for the newly loaded wafers W, respectively (steps S19 a and S20 a).
  • Subsequently, the main transport mechanism T2 accesses the receiver PASS2 again, and repeats the above operation. This operation is controlled by the third controller 95. As a result, the wafers W are forwarded to the receiver PASS5A in the order in which they are placed on the receiver PASS2A. Similarly, the wafers W are forwarded to the receiver PASS2B in the order in which they are placed on the receiver PASS5B.
  • IF Transport Mechanisms TIF—First Transport Mechanism TIFA and Second Transport Mechanism TIFB
  • When a wafer W is forwarded to the receiver PASS5, the sensor (not shown) provided for the receiver PASS5 detects the wafer W placed on the receiver PASS5. Then, the first transport mechanism TIFA accesses the receiver PASS5, and receives the wafer W placed on the receiver PASS5A (step S11 a). At this time, the control section 90 puts the wafer W received by the IF section 5 in a proper place in the order of loading into the treating section 3, so that an order in which wafers W are transported to the exposing machine EXP may agree with the order of wafers loaded into the treating section 3. Specifically, the control section 90 refers to the information specifying the order OA of loading into the treating section 3, and determines whether the wafer W received is a next wafer W to be transported to the exposing machine EXP. According to a result of this determination, the destination of the wafer W received by the first transport mechanism TIFA is changed. Two methods of this determination will be described first, and thereafter operation of first transport mechanism TIFA and second transport mechanism TIFB will be described.
  • Determining Method 1
  • The first method will be described with reference to FIG. 14. FIG. 14 is a view schematically showing information for determining the order of wafers W loaded into the treating section 3. FIG. 14 shows information on a relationship of identification information on wafers W matched with the order OA of wafers W loaded into the treating section 3 (hereinafter called “relational information”). In this relational information, “Wa”, “Wb”, . . . , and “Wh” are identification information which identifies each wafer W, and “1”, “2”, . . . , and “8” indicate the order OA of loading into the treating section 3. The relational information shown in FIG. 14 corresponds to the example of transport of wafers W shown in FIG. 1.
  • Based on a wafer W actually received by the first transport mechanism TIFA, the control section 90 first acquires identification information applied to that wafer W. The control section 90 refers to the above relational information, and determines a place in the order OA matched with the identification information acquired. Further, the control section 90 determines a place in the order of the next wafer W to be transported to the exposing machine EXP, by counting a total of wafers W already transported to the exposing machine EXP. Then, the control section 90 determines whether the determined place in the order OA and the place in the order of the next wafer W to be transported to exposing machine EXP are in agreement. When they are found in agreement, the control section 90 determines that the wafer W received is the next wafer W to be transported to the exposing machine EXP. When not in agreement, the control section 90 determines that the wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • For example, if the identification information on the wafer W received by the first transport mechanism TIFA is “Wb”, the place in the order OA matched therewith is “2” (see FIG. 14). If one wafer W has already been transported to the exposing machine EXP when the first transport mechanism TIFA receives this wafer W, the place in the order of the next wafer W to be transported is “2”. When the place in the order OA (“2”) of the wafer W received by the first transport mechanism TIFA agrees with the next place in the order (“2”) for transport to the exposing machine EXP, the wafer W received is determined to be the next wafer W transported to the exposing machine EXP.
  • Determining Method 2
  • The second method will be described with reference to FIGS. 15, 16A and 16B. FIG. 15 is a view schematically showing information for determining the order of wafers W loaded into the treating section 3. FIG. 15 shows information on the substrate treatment lines Lu and Ld to which wafers W are transported, and which are selectively matched with the order OA of wafers W loaded into the treating section 3. The relational information shown in FIG. 15 also corresponds to the example of transport of wafers W shown in FIG. 1.
  • Concerning the substrate treatment lines Lu and Ld, the order of wafers W fed from each of the substrate treatment lines Lu and Ld is the same as the order of wafers W loaded into each of the substrate treatment lines Lu and Ld. Considering this fact, the relational information shown in FIG. 15 leads to the relational information shown in FIGS. 16A and 6B. FIG. 16A is information showing a relationship of the order OA of wafers W loaded into the treating section 3 which is matched with the order OB of wafers W fed from the substrate treatment line Lu to the IF section 5. FIG. 16B is information showing the order OA of wafers W loaded into the treating section 3 which is matched with the order OC of wafers W fed from the substrate treatment line Ld to the IF section 5.
  • The control section 90 first determines that, when the first transport mechanism TIFA receives a wafer W from the receiver PASS5, the wafer W is fed from the substrate treatment line Lu. At this time, the control section 90 determines the order OB of wafers W fed from the substrate treatment line Lu. Then, the control section 90 refers to the relational information shown in FIG. 15 (or FIG. 16A), and determines the order OA matched with the order OB. On the other hand, the control section 90 determines that, when the first transport mechanism TIFA receives a wafer W from the receiver PASS6, the wafer W is fed from the substrate treatment line Ld, and determines the order OC of wafers W fed from the substrate treatment line Ld. In this case, the control section 90 refers to the relational information shown in FIG. 15 (or FIG. 16B), and determines the order OA matched with the order OC.
  • The control section 90 determines also the order of wafers W to be transported to the exposing machine EXP. Then, the control section 90 determines whether the place in the order of a wafer W to be transported next to the exposing machine EXP agrees with its place in the order OA. When they are found in agreement, the control section 90 determines that the wafer W received is the next wafer W to be transported to the exposing machine EXP. When not in agreement, the control section 90 determines that the wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • For example, if one wafer W has already been received from the receiver PASS5 when the first transport mechanism TIFA receives a wafer W from the receiver PASS5, this wafer W has place “2” in the order OB and place “3” in the order OA (see FIG. 15 or FIG. 16A). If one wafer W has already been transported to the exposing machine EXP when the first transport mechanism TIFA receives this wafer W, the place in the order of the next wafer W to be transported is “2”. When the place in the order OA (“3”) of the wafer W received by the first transport mechanism TIFA does not agree with the next place in the order (“2”) for transport to the exposing machine EXP, the wafer W received is determined not to be the next wafer W transported to the exposing machine EXP.
  • The relational information shown in FIG. 15 or FIGS. 16A and 16B includes the substrate treatment lines Lu and Ld, but this is not limitative. The technical meaning does not change even if the substrate treatment lines Lu and Ld are replaced by the stories K2 and K4, respectively, for example. That is, even with this replacement, the control section 90 can determine, as in determining method 2 described above, whether a wafer W received is the next wafer W to be transported to the exposing machine EXP.
  • When a determination is made, with determining method 1 or 2 described above, that a wafer W received is the next wafer W to be transported to the exposing machine EXP, the control section 90 carries out the following control. The first transport mechanism TIFA holds the wafer W received, moves to the receiver PASS-CP, and loads the wafer W into the PASS-CP (step S12). Then, the second transport mechanism TIFB takes the wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP. The wafer W is exposed in the exposing machine EXP (step S13).
  • On the other hand, when a determination is made that the wafer W received is not the next wafer W to be transported to the exposing machine EXP, the control section 90 carries out the following control. The first transport mechanism TIFA holds the wafer W received, moves to the buffers BF, and places the wafer W in one of the buffers BF. (This step is omitted from FIG. 12. See FIG. 13.)
  • The control section 90 determines whether the wafer W placed in the buffer BF is now the next wafer W to be transported to the exposing machine EXP. The control section 90 determines a place in the order OA of each wafer W placed in a buffer BF when the wafer W is received from the treating section 3. Therefore, the order OA already determined is compared with the order OE of wafers W to be transported to the exposing machine EXP, to determine whether they are in agreement for each wafer W. When in agreement, the control section 90 determines that the wafer W is the next one to be transported to the exposing machine EXP.
  • In this case, the control section 90 carries out the following control. The first transport mechanism TIFA accesses the buffers BF, takes out the wafer W for which the orders are in agreement, and loads the wafer W into the receiver PASS-CP (step S12). Then, the second transport mechanism TIFB takes this wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP (step S13).
  • Even when a wafer W placed in a buffer BF is determined to be the next one to be transported to the exposing machine EXP, if a wafer W is being fed from either substrate treatment line L, it is preferable to give priority to receipt of the wafer W fed from the substrate treatment line L.
  • Reference is made to FIG. 17. FIG. 17 gives views schematically showing how eight wafers W fed from both substrate treatment lines Lu and Ld are transported through the IF section 5 to the exposing machine EXP, the views reflecting the progress of time from (a) to (j). FIGS. 17A through 17J correspond to the example of transport of wafers W shown in FIG. 1.
  • In the course of time from the point in time of FIG. 17A to the point in time of FIG. 17J, wafers Wa, Wc, We, Wb, Wg, Wd, Wf and Wh are fed in this order from the treating section 3, and wafers Wa, Wb, Wc, Wd, We, Wf, Wg and Wh are transported in this order to the exposing machine EXP.
  • In FIG. 17A, wafer Wa fed from the substrate treatment line Lu is transported to the exposing machine EXP without being placed in a buffer BF. In FIG. 17D, wafer Wb is transported similarly, and in FIG. 17F, wafer Wd is transported similarly. The substrate transport shown in FIGS. 17A, 17D and 17F is the case where the control section 90 determines that each wafer W received is the next wafer W to be transported to the exposing machine EXP.
  • In FIG. 17B, wafer Wc fed from the substrate treatment line Lu is placed in a buffer BF. In FIG. 17C, wafer We is transported similarly, in FIG. 17E, wafer Wg is transported similarly, in FIG. 17G, wafer Wf is transported similarly, and in FIG. 17H, wafer Wh is transported similarly. The substrate transport shown in FIGS. 17B, 17C, 17E, 17G and 17H is the case where the control section 90 determines that each wafer W received is not the next wafer W to be transported to the exposing machine EXP.
  • In FIG. 17E, wafer Wc is transported from the buffer BF to the exposing machine EXP. In FIG. 17G, wafer We is transported similarly, and in FIGS. 17H, 17I and 17J, wafer Wf, wafer Wg and wafer Wh are transported similarly, respectively. The substrate transport shown in FIGS. 17E and 17G through 17J is the case where the control section 90 determines that each wafer W placed in the buffer BF is the next wafer W to be transported to the exposing machine EXP.
  • At the time of FIG. 17E, wafer Wg is fed from the substrate treatment line Lu, and wafer Wc placed in the buffer BF is determined the next wafer W to be transported to the exposing machine EXP. In such a case, it is preferable to receive wafer Wg fed from the substrate treatment line Lu first, and thereafter to transport wafer Wc to the exposing machine EXP. This permits the substrate treatment line Lu to feed promptly wafer W following wafer Wg (not shown in FIGS. 17A through 17J). As a result, a lowering of substrate transporting efficiency and treating efficiency is prevented. Similarly, in FIG. 17G, it is preferable to receive wafer Wf fed from the substrate treatment line Ld first, and thereafter to transport wafer We to the exposing machine EXP. This permits the substrate treatment line Ld to feed promptly wafer Wh following wafer Wf. In FIG. 17H, it is preferable to receive wafer Wh fed from the substrate treatment line Ld, and thereafter to transport wafer Wf to the exposing machine EXP.
  • Other operation of the first transport mechanism TIFA will be described. The first transport mechanism TIFA receives a wafer W from the receiver PASS7 (step S14), and moves to a position opposed to one of the heating and cooling units PHP2. The first transport mechanism TIFA takes a wafer W having received PEB treatment from the heating and cooling unit PHP2, and loads the wafer W received from the receiver PASS7 into the heating and cooling unit PHP2. The heating and cooling unit PHP2 carries out heat treatment for the newly loaded wafer W (step S15 a).
  • The first transport mechanism TIFA transports the wafer W taken out of the heating and cooling unit PHP2 to the receiver PASS5B. Subsequently, the first transport mechanism TIFA transports a wafer W from the receiver PASS6A to the receiver PASS-CP (Step S11 b, S12). Next, the first transport mechanism TIFA transports a wafer W from the receiver PASS7 to one of the heating and cooling units PHP4. At this time, the first transport mechanism TIFA takes out a wafer W having received the PEB treatment in the heating and cooling unit PHP4, and places the wafer W on the receiver PASS6B (steps S14, S15 b, S16 b).
  • Subsequently, the first transport mechanism TIFA accesses the receiver PASS5 again and repeats the above operation. This operation is controlled by the sixth controller.
  • Other operation of the second transport mechanism TIFB will be described. The second transport mechanism TIFB takes a wafer W out of the receiver PASS-CP, and transports it to the exposing machine EXP. The wafer W is exposed in the exposing machine EXP (step S13).
  • Subsequently, the second transport mechanism TIFB accesses the receiver PASS-CP again and repeats the above operation.
  • In the substrate treating apparatus according to this embodiment, as described above, the order of wafers W to be transported to the exposing machine EXP is adjusted to the order OA of wafers W loaded into the treating section 3, whereby the order OE of wafers W transported to the exposing machine EXP corresponds to the order OA of loading into the treating section 3. Therefore, each wafer W can be controlled easily. A follow-up check can also be performed easily on the history of treatment of each wafer W in the treating section 3 or the exposing machine EXP.
  • Since the order (corresponding to the order OD) of wafers W fed from the substrate treatment lines Lu and Ld is adjusted in the IF section 5, there is no need to adjust timing of substrate feeding between the substrate treatment lines Lu and Ld. This allows each of the substrate treatment lines Lu and Ld to proceed with treatment of wafers W independently. Thus, there is no need for coordination between the second and third controllers 94 and 95 which control the substrate treatment line Lu, and the fourth and fifth controllers 96 and 97 which control the substrate treatment line Ld. This enable a reduction in the burden of the controls carried out by the second to fifth controllers 94-97.
  • When wafers W are fed to the receivers PASS5 and PASS6, the first transport mechanism TIFA will receive the wafers W placed on the receivers PASS5 and PASS6. This enables the substrate treatment lines Lu and Ld (stories K3 and K4) to feed new wafers W immediately, thereby preventing a lowering of the treating efficiency of the substrate treatment lines L due to the feeding of wafers W.
  • The IF section 5 with the buffers BF can conveniently adjust the order OE of wafers W received by the IF section 5 to the order OD of wafers W transported to the exposing machine EXP. Further, the order OE can be secured effectively since, when a wafer W placed in a buffer BF becomes the next wafer W to be transported to the exposing machine EXP, the control section 90 causes this wafer W to be transported to the exposing machine EXP.
  • The buffers BF can receive or store a plurality of wafers W, which enables an effective adjustment to the order OE.
  • The control section 90 refers to the information for determining the order OA of loading into the treating section 3 as illustrated in FIG. 15 or FIGS. 16A and 16B, to determine effectively whether a wafer W received by the first transport mechanism TIFA is the next wafer W to be transported to the exposing machine EXP.
  • The ID section 1, in loading wafers W into the treating section 3, distributes the wafers W regularly and alternately to the stories K1 and K3 (see FIG. 1). Thus, wafers W can be transported to the substrate treatment lines L at substantially the same pace. This inhibits variations in operation between the substrate treatment lines L.
  • Embodiments of the present invention are not limited to the foregoing embodiments, but may be modified as follows:
  • (1) In the foregoing embodiment, the buffers BF is accessible only to the first transport mechanism TIFA, and wafers W are transferred from the first transport mechanism TIFA to the second transport mechanism TIFB only through the receiver PASS-CP. The invention is not limited to this construction. For example, the buffers BF may be constructed accessible to the first and second transport mechanisms TIFA and TIFB, and wafers W may be transferred between the first and second transport mechanisms TIFA and TIFB through the buffers BF as well as the receiver PASS-CP.
  • Specifically, a modification may be made such that, when the control section 90 determines that a wafer W placed in one of the buffers BF has become the next wafer W to be transported to the exposing machine EXP, the second transport mechanism TIFB accesses the buffer BF, takes out the wafer W determined to be in agreement, and transports it to the exposing machine EXP. FIG. 18 is a view schematically showing operations repeated by the first and second transport mechanisms TIFA and TIFB in such a modified embodiment for transporting wafers W as noted above.
  • This modification can omit the operation of the first transport mechanism TIFA to access the buffer BF in order to take the wafer W out of the buffer BF, thereby improving transporting efficiency. Even if a wafer is fed from one of the substrate treatment lines L when a different wafer W placed in a buffer BF is determined the next wafer W to be transported to the exposing machine EXP, the first transport mechanism TIFA may receive the wafer W from the substrate treatment line L, with the second transport mechanism TIFB transporting the different wafer W to the exposing machine EXP. That is, the first transport mechanism TIFA need not engage in receipt from the substrate treatment line L and transport to the exposing machine EXP in the order of priority as done in the foregoing embodiment. Thus, the control burden of the sixth controller 98 is lightened.
  • (2) In the foregoing embodiment, the information for determining the order OA of wafers W loaded into the treating section 3 as illustrated in FIGS. 14 and 15 has been described as set to the control section 90 beforehand. The invention is not limited to this. For example, the order OA of loading may be acquired through cooperation with the first controller 91 which controls ID transport mechanism TID.
  • (3) In the foregoing embodiment, the buffers BF have been described as capable of receiving or storing a plurality of wafers W. Instead, only one wafer W may be received or stored at a time.
  • (4) In the foregoing embodiment, when the wafer W received by the first transport mechanism TIFA is not the next wafer W to be transported to the exposing machine EXP, the first transport mechanism TIFA simply places the wafer W in one of the buffers BF. Instead, the following arrangement may be adopted. Different buffers BF may be assigned to receiving wafers W fed from each substrate treatment line L. As far as each of the substrate treatment lines Lu and Ld is concerned, wafers W are loaded into and unloaded from each substrate treatment line Lu or Ld in the same order OB or OC. Thus, by placing wafers W fed from the substrate treatment lines L in different buffers BF, the order OE of wafers W to be transported to the exposing machine EXP can be adjusted simply in the IF section 5.
  • (5) The foregoing embodiment may be further modified to stop loading wafers W from the ID section 1 into the treating section 3 when the wafers W currently placed in the buffers BF exceed a predetermined number. If the buffers BF were unable to receive any further wafers W, it would be impossible to feed wafers W smoothly from the treating section 3 to the IF section 5. If wafers W were loaded into the treating section 3 under such circumstances, variations would occur with wafers W in the time taken from loading into the treating section 3 to feeding from the treating section 3, resulting in deterioration in the quality of treatment of the wafers W, for example. However, according to this modification, loading of wafers W from the ID section 1 into the treating section 3 is stopped when the wafers W placed in the buffers BF exceed a predetermined number. Thus, the deterioration in the quality of treatment of the wafers W noted above can be precluded.
  • (6) In the foregoing embodiment, IF transport mechanisms TIF have been described as including the first transport mechanism TIFA and the second transport mechanism TIFB. The invention is not limited to this. It may be modified to provide one transport mechanism or three or more transport mechanisms.
  • (7) In the foregoing embodiment, wafers W loaded from the ID section 1 into the treating section 3 are distributed alternately to the stories K1 and K3. A method of distribution may be varied and selected as appropriate. For example, wafers W loaded from the ID section 1 into the treating section 3 may be distributed in units of two or more to the substrate treatment lines L. The ratio of wafers W transported to the substrate treatment lines L may be made equal or different between the substrate treatment lines L.
  • (8) In the foregoing embodiment, it has been described that, even when a wafer W placed in a buffer BF is determined to be the next one to be transported to the exposing machine EXP, if a wafer W is being fed from either substrate treatment line L, it is preferable to give priority to receipt of the wafer W fed from the substrate treatment line L. The invention is not limited to this. Priority may be given to the operation to transport the wafer W placed in the buffer BF to the exposing machine EXP.
  • (9) The foregoing embodiment provides two substrate treatment lines L, but the invention not limited to this. The construction may be modified to include three or more substrate treatment lines L vertically arranged in multiple stages.
  • (10) In the foregoing embodiment, the substrate treatment lines L are arranged one over the other, but the invention is not limited to this. For example, a plurality of substrate treatment lines may be arranged sideways or horizontally. Or a plurality of substrate treatment lines may be arranged sideways as well as vertically.
  • (11) In the foregoing embodiment, the treating section 3 is formed of two treating blocks Ba and Bb arranged in juxtaposition, but the invention not limited to this. For example the treating section 3 may be formed of a single block, or three or more blocks. A single treating block providing the substrate treatment line Lu and a single treating block providing the substrate treatment line Ld may be arranged one over the other.
  • (12) In the foregoing embodiment, the substrate treatment lines L carry out the treatment for forming resist film and antireflection film on the wafers W, as well as the post-exposure baking (PEB) treatment and developing treatment. The substrate treatment lines L may be modified to perform other treatment such as cleaning of the wafers W. Accordingly, the type, number and the like of treating units are selected or designed as appropriate.
  • This invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof and, accordingly, reference should be made to the appended claims, rather than to the foregoing specification, as indicating the scope of the invention.

Claims (23)

1. A substrate treating apparatus comprising:
a treating section including a plurality of substrate treatment lines for treating substrates while transporting the substrates substantially horizontally, the substrate treatment lines being capable of treating the substrates in parallel; and
an interface section disposed adjacent to the treating section for transporting the substrates fed from the substrate treatment lines to an exposing machine provided separately from the apparatus, wherein the substrates are transported to the exposing machine in an order in which the substrates are loaded into the treating section.
2. The apparatus according to claim 1, wherein the substrate treatment lines are arranged one over another.
3. The apparatus according to claim 1, wherein the interface section is arranged to adjust an order of the substrates fed from the substrate treatment lines to the order in which the substrates are loaded into the treating section.
4. The apparatus according to claim 1, wherein the interface section includes:
an interface transport mechanism for transporting the substrates to and from each of the substrate treatment lines and the exposing machine; and
a buffer unit for temporarily storing the substrates,
wherein the interface transport mechanism is arranged, when a substrate is fed from one of the substrate treatment lines, to receive the substrate and to transport the substrate received to the exposing machine when the substrate is a next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine.
5. The apparatus according to claim 4, wherein the interface transport mechanism is arranged, when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transport the substrate from the buffer unit to the exposing machine.
6. The apparatus according to claim 5, wherein the interface transport mechanism is arranged, when a substrate is being fed from one of the substrate treatment lines even when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to receive the fed substrate by priority.
7. The apparatus according to claim 4, wherein the interface transport mechanism includes:
a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and the buffer unit; and
a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine,
wherein the first transport mechanism is arranged to transfer the substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is a next substrate to be transported to the exposing machine, to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transfer the substrate from the buffer unit to the second transport mechanism, and
wherein the second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine.
8. The apparatus according to claim 4, wherein the interface transport mechanism includes:
a first transport mechanism for transporting the substrates to and from each of the substrate treatment lines and the buffer unit; and
a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine
wherein the first transport mechanism is arranged to transfer the substrate received from one of the substrate treatment lines to the second transport mechanism when the substrate is a next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and
wherein the second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine, and when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transport the substrate from the buffer unit to the exposing machine.
9. The apparatus according to claim 4, wherein the interface transport mechanism is arranged to change positions of substrates placed in the buffer unit according to the substrate treatment lines from which the substrates are fed.
10. The apparatus according to claim 1, wherein the order in which the substrates are loaded into the treating section is determined based on a relationship of substrate identifying information with the order in which the substrates are loaded into the treating section.
11. The apparatus according to claim 1, wherein the order in which the substrates are loaded into the treating section is determined based on a relationship of the substrate treatment lines transporting the substrates with the order in which the substrates are loaded into the treating section.
12. A substrate treating apparatus comprising:
a treating section including a plurality of treating blocks arranged in juxtaposition, each having treating units arranged on each of vertical stories for treating substrates, and a main transport mechanism provided on each story for transporting the substrates to and from the treating units on the each story, the main transport mechanisms on the same story of adjacent treating blocks being constructed to transfer the substrates to and from each other, the treating blocks arranged at opposite ends acting as a first treating block and a second treating block, respectively, the substrates receiving a series of treatments on each story while the substrates loaded into each story of the first treating block are transported to the second treating block through the same story of each treating block;
an indexer section disposed adjacent the first treating block for transporting the substrates to each story of the first treating block;
an interface section disposed adjacent the second treating block and having an interface transport mechanism for transporting the substrates to and from each story of the second treating block and an exposing machine provided separately from the apparatus; and
a controller for controlling the interface transport mechanism to transport the substrates fed from the second treating block to the exposing machine in an order in which the substrates are loaded into the first treating block.
13. The apparatus according to claim 12, wherein, under control of the controller, the interface transport mechanism is arranged to adjust the substrates fed from the second treating block to the order in which the substrates are loaded into the first treating block.
14. The apparatus according to claim 12 wherein the interface section includes a buffer unit for temporarily storing the substrates and wherein, under control of the controller, the interface transport mechanism is arranged to transport the substrate received from the second treating block to the exposing machine when the substrate is a next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine.
15. The apparatus according to claim 14 wherein, under control of the controller, the interface transport mechanism is arranged, when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transport the substrate from the buffer unit to the exposing machine.
16. The apparatus according to claim 15 wherein, under control of the controller, the interface transport mechanism is arranged, when a substrate is being fed from the second treating block even when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to receive the fed substrate by priority.
17. The apparatus according to claim 14, wherein the interface transport mechanism includes:
a first transport mechanism for transporting the substrates to and from each story of the second treating block and the buffer unit; and
a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the exposing machine
wherein, under control of the controller, the first transport mechanism is arranged to transfer the substrate received from each story of the second treating block to the second transport mechanism when the substrate is a next substrate to be transported to the exposing machine, to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transfer the substrate from the buffer unit to the second transport mechanism; and
wherein the second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine.
18. The apparatus according to claim 14, wherein the interface transport mechanism includes:
a first transport mechanism for transporting the substrates to and from each story of the second treating block and the buffer unit; and
a second transport mechanism for transferring the substrates to and from the first transport mechanism and transporting the substrates to and from the buffer unit and the exposing machine;
wherein, under control of the controller, the first transport mechanism is arranged to transfer the substrate received from each story of the second treating block to the second transport mechanism when the substrate is a next substrate to be transported to the exposing machine, and to place the substrate received in the buffer unit when the substrate is different from a next substrate to be transported to the exposing machine, and
wherein the second transport mechanism is arranged to transport a substrate received from the first transport mechanism to the exposing machine, and when a substrate placed in the buffer unit becomes a next substrate to be transported to the exposing machine, to transport the substrate from the buffer unit to the exposing machine.
19. The apparatus according to claim 14 wherein the controller is arranged to stop loading the substrates from the indexer section into the treating section when the substrates placed in the buffer unit exceeds a predetermined number.
20. The apparatus according to claim 12 wherein the controller is arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of substrate identifying information with the order in which the substrates are loaded from the indexer section into the treating section.
21. The apparatus according to claim 12 wherein the controller is arranged to adjust an order of the substrates to be transported to the exposing machine based on a relationship of the stories of the first treating block transporting the substrates with the order in which the substrates are loaded from the indexer section into the treating section.
22. The apparatus according to claim 12 wherein the indexer section is arranged to distribute the substrate loaded into the treating section regularly and alternately to the stories of the first treating block.
23. The apparatus according to claim 12 wherein
the treating section includes coating blocks and developing blocks as the treating blocks, and
each of the coating blocks has resist film coating units as the treating units for applying a resist film material to the substrates, and
each of the developing blocks has developing units as the treating units for supplying a developer to the substrates.
US12/343,302 2007-12-28 2008-12-23 Substrate treating apparatus with substrate reordering Abandoned US20090165711A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/447,409 US9368383B2 (en) 2007-12-28 2014-07-30 Substrate treating apparatus with substrate reordering

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007-340427 2007-12-28
JP2007340427A JP5001828B2 (en) 2007-12-28 2007-12-28 Substrate processing equipment

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US14/447,409 Continuation US9368383B2 (en) 2007-12-28 2014-07-30 Substrate treating apparatus with substrate reordering

Publications (1)

Publication Number Publication Date
US20090165711A1 true US20090165711A1 (en) 2009-07-02

Family

ID=40796578

Family Applications (2)

Application Number Title Priority Date Filing Date
US12/343,302 Abandoned US20090165711A1 (en) 2007-12-28 2008-12-23 Substrate treating apparatus with substrate reordering
US14/447,409 Active 2029-05-04 US9368383B2 (en) 2007-12-28 2014-07-30 Substrate treating apparatus with substrate reordering

Family Applications After (1)

Application Number Title Priority Date Filing Date
US14/447,409 Active 2029-05-04 US9368383B2 (en) 2007-12-28 2014-07-30 Substrate treating apparatus with substrate reordering

Country Status (4)

Country Link
US (2) US20090165711A1 (en)
JP (1) JP5001828B2 (en)
KR (1) KR101047799B1 (en)
TW (3) TWI470724B (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090139450A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms
US20090142162A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US20090165712A1 (en) * 2007-12-28 2009-07-02 Sokudo Co., Ltd. substrate treating apparatus with parallel substrate treatment lines
US20120086142A1 (en) * 2009-06-24 2012-04-12 Tokyo Electron Limited Imprint system, imprint method, and non-transitory computer storage medium
US9165807B2 (en) 2007-06-29 2015-10-20 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with vertical treatment arrangement including vertical blowout and exhaust units
US9368383B2 (en) 2007-12-28 2016-06-14 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with substrate reordering
US9494877B2 (en) 2011-03-29 2016-11-15 Screen Semiconductor Solutions Co., Ltd. Substrate processing apparatus
US9741594B2 (en) 2011-12-05 2017-08-22 Screen Semiconductor Solutions Co., Ltd. Substrate processing apparatus and substrate processing method for performing heat treatment on substrate
US20180056327A1 (en) * 2016-08-29 2018-03-01 The Aerospace Corporation Fabrication assembly and methods for fabricating composite mirror objects

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5565422B2 (en) * 2012-02-08 2014-08-06 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
JP5758509B2 (en) * 2014-01-17 2015-08-05 株式会社Screenセミコンダクターソリューションズ Substrate processing method and substrate processing apparatus
JP6123740B2 (en) * 2014-06-17 2017-05-10 トヨタ自動車株式会社 Semiconductor device manufacturing line and semiconductor device manufacturing method
JP5925869B2 (en) * 2014-12-10 2016-05-25 株式会社Screenセミコンダクターソリューションズ Substrate processing equipment
JP6891006B2 (en) * 2017-03-08 2021-06-18 株式会社Screenホールディングス Substrate processing system and carry-in control method for substrate processing system
JP7115966B2 (en) * 2018-11-30 2022-08-09 株式会社Screenホールディングス Substrate processing equipment

Citations (107)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5100516A (en) * 1989-01-25 1992-03-31 Yamaha Hatsudoki Kabushiki Kaisha High volume workpiece handling and chemical treating system
US5177514A (en) * 1988-02-12 1993-01-05 Tokyo Electron Limited Apparatus for coating a photo-resist film and/or developing it after being exposed
US5202716A (en) * 1988-02-12 1993-04-13 Tokyo Electron Limited Resist process system
US5275709A (en) * 1991-11-07 1994-01-04 Leybold Aktiengesellschaft Apparatus for coating substrates, preferably flat, more or less plate-like substrates
US5571325A (en) * 1992-12-21 1996-11-05 Dainippon Screen Mfg. Co., Ltd. Subtrate processing apparatus and device for and method of exchanging substrate in substrate processing apparatus
US5664254A (en) * 1995-02-02 1997-09-02 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US5725664A (en) * 1993-10-29 1998-03-10 Tokyo Electron Limited Semiconductor wafer processing apparatus including localized humidification between coating and heat treatment sections
US5788868A (en) * 1995-09-04 1998-08-04 Dainippon Screen Mfg. Co., Ltd. Substrate transfer method and interface apparatus
JPH10209241A (en) * 1997-01-16 1998-08-07 Dainippon Screen Mfg Co Ltd Substrate transfer device and substrate treatment device provided with it
US5826129A (en) * 1994-06-30 1998-10-20 Tokyo Electron Limited Substrate processing system
US5858863A (en) * 1993-07-15 1999-01-12 Hitachi, Ltd. Fabrication system and method having inter-apparatus transporter
US5876280A (en) * 1996-05-30 1999-03-02 Tokyo Electron Limited Substrate treating system and substrate treating method
US5937223A (en) * 1996-11-08 1999-08-10 Tokyo Electron Limited Processing apparatus
US5963753A (en) * 1997-01-24 1999-10-05 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US6027262A (en) * 1996-09-03 2000-02-22 Tokyo Electron Limited Resist process method and system
US6062798A (en) * 1996-06-13 2000-05-16 Brooks Automation, Inc. Multi-level substrate processing apparatus
US6063439A (en) * 1997-06-11 2000-05-16 Tokyo Electron Limited Processing apparatus and method using solution
US6176667B1 (en) * 1996-04-30 2001-01-23 Applied Materials, Inc. Multideck wafer processing system
US6338582B1 (en) * 1999-06-30 2002-01-15 Tokyo Electron Limited Substrate delivery apparatus and coating and developing processing system
US20020011207A1 (en) * 2000-05-31 2002-01-31 Shigeyuki Uzawa Exposure apparatus, coating/developing system, device manufacturing system, device manufacturing method, semiconductor manufacturing factory, and exposure apparatus maintenance method
US6377329B1 (en) * 1999-05-24 2002-04-23 Tokyo Electron Limited Substrate processing apparatus
US6382895B1 (en) * 1998-12-28 2002-05-07 Anelva Corporation Substrate processing apparatus
US20020053319A1 (en) * 2000-11-07 2002-05-09 Shuichi Nagamine Solution treatment method and solution treatment unit
US6402401B1 (en) * 1999-10-19 2002-06-11 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US6454472B1 (en) * 1999-12-06 2002-09-24 Dns Korea Co., Ltd. Semiconductor manufacturing apparatus for photolithographic process
US6466300B1 (en) * 1999-03-18 2002-10-15 Tokyo Electron Limited Substrate processing apparatus
US6537835B2 (en) * 2000-10-25 2003-03-25 Sony Corporation Method of manufacturing semiconductor device and apparatus of automatically adjusting semiconductor pattern
US6558053B2 (en) * 2001-04-19 2003-05-06 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US20040005149A1 (en) * 2002-06-11 2004-01-08 Dainippon Screen Mfg. Co.,Ltd. Substrate treating apparatus and method
US20040007176A1 (en) * 2002-07-15 2004-01-15 Applied Materials, Inc. Gas flow control in a wafer processing system having multiple chambers for performing same process
US6680775B1 (en) * 1998-04-02 2004-01-20 Nikon Corporation Substrate treating device and method, and exposure device and method
US6698944B2 (en) * 2000-06-15 2004-03-02 Nikon Corporation Exposure apparatus, substrate processing unit and lithographic system, and device manufacturing method
US20040050321A1 (en) * 2000-02-01 2004-03-18 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US20040061065A1 (en) * 2002-09-27 2004-04-01 Advantest Corporation Electron beam exposure apparatus, electron beam exposure apparatus calibration method, and semiconductor element manufacturing method
US6750155B2 (en) * 2001-08-08 2004-06-15 Lam Research Corporation Methods to minimize moisture condensation over a substrate in a rapid cycle chamber
US6752872B2 (en) * 2000-10-10 2004-06-22 Tokyo, Electron Limited Coating unit and coating method
US6752543B2 (en) * 2002-05-23 2004-06-22 Dainippon Screen Mfg. Co. Ltd. Substrate processing apparatus
US20040122545A1 (en) * 2002-12-19 2004-06-24 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus, operation method thereof and program
US20040229441A1 (en) * 2003-05-13 2004-11-18 Dainippon Screen Mfg. Co., Ltd Substrate processing apparatus
US20050030511A1 (en) * 2003-08-07 2005-02-10 Asml Netherlands B.V. Interface unit, lithographic projection apparatus comprising such an interface unit and a device manufacturing method
US20050042555A1 (en) * 2000-12-08 2005-02-24 Tokyo Electron Limited Coating and developing apparatus and pattern forming method
US6879866B2 (en) * 2003-08-04 2005-04-12 Asml Netherlands B.V. Method, computer program product and apparatus for scheduling maintenance actions in a substrate processing system
US6889014B2 (en) * 2001-07-10 2005-05-03 Canon Kabushiki Kaisha Exposure system, device production method, semiconductor production factory, and exposure apparatus maintenance method
US6893171B2 (en) * 2002-05-01 2005-05-17 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US20050135905A1 (en) * 2003-12-04 2005-06-23 Daifuku Co., Ltd. Glass substrate transporting facility
US20050266323A1 (en) * 2004-05-26 2005-12-01 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method
US20060011296A1 (en) * 2004-07-16 2006-01-19 Tokyo Electron Limited Substrate processing apparatus, substrate processing method, and computer program
US20060024446A1 (en) * 2004-07-06 2006-02-02 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US20060028630A1 (en) * 2004-08-05 2006-02-09 Canon Kabushiki Kaisha Liquid immersion exposure apparatus, method of controlling the same, and device manufacturing method
US7001674B2 (en) * 2002-05-08 2006-02-21 Nikon Corporation Exposure method, exposure apparatus, and method of production of device
US7008124B2 (en) * 2002-05-01 2006-03-07 Tokyo Electron Limited Method and device for processing substrate
US20060062282A1 (en) * 2004-09-20 2006-03-23 David Wright Method for providing packet framing in a DSSS radio system
US7017658B2 (en) * 2002-01-31 2006-03-28 Dainippon Screen Mfg. Co., Ltd. Heat processing device
KR20060033423A (en) * 2004-10-15 2006-04-19 세메스 주식회사 Photolithography apparatus used in manufacturing semiconductor substrates
US20060098978A1 (en) * 2004-11-10 2006-05-11 Schuichi Yasuda Substrate processing apparatus and substrate processing method
US20060104635A1 (en) * 2004-11-11 2006-05-18 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US7053990B2 (en) * 2003-05-29 2006-05-30 Asml Holding N.V. System to increase throughput in a dual substrate stage double exposure lithography system
US7069099B2 (en) * 2003-02-03 2006-06-27 Dainippon Screen Mfg. Co., Ltd. Method of transporting and processing substrates in substrate processing apparatus
US20060137726A1 (en) * 2004-12-24 2006-06-29 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US20060286300A1 (en) * 2004-12-22 2006-12-21 Tetsuya Ishikawa Cluster tool architecture for processing a substrate
US20070048979A1 (en) * 2005-08-31 2007-03-01 Tokyo Electron Limited Heating apparatus, and coating and developing apparatus
US20070056514A1 (en) * 2005-02-01 2007-03-15 Tokyo Electron Limited Coating and developing apparatus
US20070058147A1 (en) * 2005-09-14 2007-03-15 Tetsuya Hamada Apparatus for and method of processing substrate subjected to exposure process
US7262829B2 (en) * 2005-02-14 2007-08-28 Tokyo Electron Limited Coating and developing apparatus and coating and developing method
US20070219660A1 (en) * 2005-11-24 2007-09-20 Tomohiro Kaneko Substrate transporting and processing apparatus, fault management method for substrate transport and processing apparatus, and storage medium storing fault management program
US20080014333A1 (en) * 2006-04-14 2008-01-17 Tokyo Electron Limited Coating and developing apparatus, substrate processing method, and storage medium
US7322756B2 (en) * 2005-01-21 2008-01-29 Tokyo Electron Limited Coating and developing apparatus and coating and developing method
US7323060B2 (en) * 2003-12-11 2008-01-29 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US20080026153A1 (en) * 2006-07-31 2008-01-31 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US20080070164A1 (en) * 2006-09-15 2008-03-20 Tokyo Electron Limited Wet-processing apparatus, wet-processing method and storage medium
US20080079925A1 (en) * 2006-09-29 2008-04-03 Canon Kabushiki Kaisha Processing apparatus
US7379785B2 (en) * 2002-11-28 2008-05-27 Tokyo Electron Limited Substrate processing system, coating/developing apparatus, and substrate processing apparatus
US20080129968A1 (en) * 2006-12-05 2008-06-05 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US20090000543A1 (en) * 2007-06-29 2009-01-01 Sokudo Co., Ltd. Substrate treating apparatus
US20090001071A1 (en) * 2007-06-28 2009-01-01 Sokudo Co., Ltd Method and System for Cooling a Bake Plate in a Track Lithography Tool
US7497633B2 (en) * 2004-11-10 2009-03-03 Sokudo Co., Ltd. Substrate processing apparatus and substrate processing method
US20090070946A1 (en) * 2007-09-18 2009-03-19 Sokudo Co., Ltd. Apparatus for and method of processing substrate
US20090098298A1 (en) * 2007-10-12 2009-04-16 Tokyo Electron Limited Coater/developer, method of coating and developing resist film, and computer readable storing medium
US7522823B2 (en) * 2003-09-17 2009-04-21 Sokudo Co., Ltd. Thermal processing apparatus, thermal processing method, and substrate processing apparatus
US7525650B2 (en) * 2003-09-19 2009-04-28 Dainippon Screen Mfg., Co., Ltd. Substrate processing apparatus for performing photolithography
US7537401B2 (en) * 2006-06-05 2009-05-26 Lg Display Co., Ltd. Photo apparatus and method
US20090139450A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms
US20090142162A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US20090139833A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-line substrate treating apparatus
US7641405B2 (en) * 2007-02-15 2010-01-05 Sokudo Co., Ltd. Substrate processing apparatus with integrated top and edge cleaning unit
US7645081B2 (en) * 2007-08-28 2010-01-12 Tokyo Electron Limited Coating and developing apparatus, coating and developing method, and storage medium
US7651306B2 (en) * 2004-12-22 2010-01-26 Applied Materials, Inc. Cartesian robot cluster tool architecture
US7652276B2 (en) * 2006-02-08 2010-01-26 Tokyo Electron Limited Defect inspection method, defect inspection apparatus having a mounting table with a substrate thereon and an image pickup device are relatively moved for capturing the image of the substrate, and computer readable storage medium storing a program for performing the method
US20100050940A1 (en) * 2008-08-28 2010-03-04 Tokyo Ohka Kogyo Co., Ltd. Substrate processing system, carrying device and coating device
US7686559B2 (en) * 2005-05-31 2010-03-30 Daifuku Co., Ltd. Article transport facility and a method of operating the facility
US7692764B2 (en) * 2004-08-30 2010-04-06 Nikon Corporation Exposure apparatus, operation decision method, substrate processing system, maintenance management method, and device manufacturing method
US7694688B2 (en) * 2007-01-05 2010-04-13 Applied Materials, Inc. Wet clean system design
US7729798B2 (en) * 2003-04-02 2010-06-01 Tokyo Electron Limited Substrate processing system, and method of control therefor, control program, and storage medium
US7798764B2 (en) * 2005-12-22 2010-09-21 Applied Materials, Inc. Substrate processing sequence in a cartesian robot cluster tool
US7871211B2 (en) * 2007-03-30 2011-01-18 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US20110043773A1 (en) * 2009-08-24 2011-02-24 Tokyo Electron Limited Coating/developing apparatus and coating/developing method
US20110063588A1 (en) * 2009-09-15 2011-03-17 Kashiyama Masahito Substrate processing apparatus, substrate processing system and inspection/periphery exposure apparatus
US20110078898A1 (en) * 2009-10-06 2011-04-07 Tokyo Electron Limited Substrate processing apparatus
US20120013730A1 (en) * 2010-07-16 2012-01-19 Tokyo Electron Limited Substrate processing apparatus, substrate processing method and non-transitory computer storage medium
US20120021611A1 (en) * 2010-07-23 2012-01-26 Tokyo Electron Limited Coating treatment method, non-transitory computer storage medium and coating treatment apparatus
US20120073461A1 (en) * 2009-06-19 2012-03-29 Shoichi Terada Imprint system, imprint method, and non-transitory computer storage medium
US8154106B2 (en) * 2005-11-29 2012-04-10 Tokyo Electron Limited Coating and developing system and coating and developing method
US20120086142A1 (en) * 2009-06-24 2012-04-12 Tokyo Electron Limited Imprint system, imprint method, and non-transitory computer storage medium
US20120097336A1 (en) * 2009-06-24 2012-04-26 Tokyo Electron Limited Template treatment apparatus and imprint system
US8353986B2 (en) * 2005-03-31 2013-01-15 Tokyo Electron Limited Substrate processing apparatus
US8419341B2 (en) * 2006-09-19 2013-04-16 Brooks Automation, Inc. Linear vacuum robot with Z motion and articulated arm
US20140003891A1 (en) * 2011-03-26 2014-01-02 Tokyo Electron Limited Substrate processing apparatus

Family Cites Families (191)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3249765B2 (en) 1997-05-07 2002-01-21 東京エレクトロン株式会社 Substrate processing equipment
US4409889A (en) 1981-11-02 1983-10-18 Burleson Maurice L Modular clean room
DE3347438A1 (en) 1983-12-29 1985-07-18 Ulrich 2814 Bruchhausen-Vilsen Grigat MULTIVALENT RADIATOR FOR INDOOR AIR HEATING
JPH065689Y2 (en) 1986-12-26 1994-02-16 小橋工業株式会社 Forward / backward rotary work machine front cover
KR970003907B1 (en) 1988-02-12 1997-03-22 도오교오 에레구토론 가부시끼 가이샤 Resist process system and resist processing method
JP2559617B2 (en) 1988-03-24 1996-12-04 キヤノン株式会社 Substrate processing equipment
US5536128A (en) 1988-10-21 1996-07-16 Hitachi, Ltd. Method and apparatus for carrying a variety of products
JP2683675B2 (en) 1989-01-26 1997-12-03 東京エレクトロン株式会社 Transfer device
JPH085812Y2 (en) 1989-12-05 1996-02-21 沖電気工業株式会社 Print head drive circuit
JPH081921B2 (en) 1990-01-13 1996-01-10 東京エレクトロン株式会社 Semiconductor manufacturing equipment
ES2020758A6 (en) 1990-02-08 1991-09-16 Balzola Elorza Martin Automatic positioner for stores.
JP2704309B2 (en) 1990-06-12 1998-01-26 大日本スクリーン製造株式会社 Substrate processing apparatus and substrate heat treatment method
JP2919925B2 (en) * 1990-07-26 1999-07-19 東京エレクトロン株式会社 Processing equipment
US5668056A (en) 1990-12-17 1997-09-16 United Microelectronics Corporation Single semiconductor wafer transfer method and manufacturing system
US5297910A (en) 1991-02-15 1994-03-29 Tokyo Electron Limited Transportation-transfer device for an object of treatment
JP3338343B2 (en) 1992-12-21 2002-10-28 大日本スクリーン製造株式会社 Substrate processing equipment
DE634699T1 (en) 1993-07-16 1996-02-15 Semiconductor Systems Inc Grouped photolithographic system.
US5518542A (en) 1993-11-05 1996-05-21 Tokyo Electron Limited Double-sided substrate cleaning apparatus
JP2994553B2 (en) 1994-04-08 1999-12-27 大日本スクリーン製造株式会社 Substrate processing equipment
JPH07297258A (en) * 1994-04-26 1995-11-10 Tokyo Electron Ltd Carrying equipment of plate body
JP3122868B2 (en) 1994-09-29 2001-01-09 東京エレクトロン株式会社 Coating device
JP3592771B2 (en) 1994-12-07 2004-11-24 大日本スクリーン製造株式会社 Substrate processing equipment
US5677758A (en) 1995-02-09 1997-10-14 Mrs Technology, Inc. Lithography System using dual substrate stages
JP3069945B2 (en) 1995-07-28 2000-07-24 東京エレクトロン株式会社 Processing equipment
KR100244041B1 (en) 1995-08-05 2000-02-01 엔도 마코토 Substrate processing apparatus
JPH09148240A (en) 1995-11-24 1997-06-06 Dainippon Screen Mfg Co Ltd Substrate processor
JP3575717B2 (en) 1995-12-28 2004-10-13 大日本スクリーン製造株式会社 Substrate processing equipment
US5842917A (en) 1996-01-11 1998-12-01 United Microelectronics Corproration Automated manufacturing plant for semiconductor devices
JPH09251953A (en) 1996-01-12 1997-09-22 Sony Corp Resist development
JP3938409B2 (en) * 1996-01-22 2007-06-27 大日本スクリーン製造株式会社 Substrate processing equipment
JPH09199568A (en) 1996-01-22 1997-07-31 Dainippon Screen Mfg Co Ltd Substrate processing equipment
TW317644B (en) 1996-01-26 1997-10-11 Tokyo Electron Co Ltd
JP3859800B2 (en) 1996-03-19 2006-12-20 大日本スクリーン製造株式会社 Substrate processing apparatus flow management method and flow management apparatus
JPH1050794A (en) 1996-08-01 1998-02-20 Dainippon Screen Mfg Co Ltd Apparatus and method for processing substrate
KR100269097B1 (en) 1996-08-05 2000-12-01 엔도 마코토 Wafer process apparatus
JP3278714B2 (en) 1996-08-30 2002-04-30 東京エレクトロン株式会社 Coating film forming equipment
JP3779393B2 (en) 1996-09-06 2006-05-24 東京エレクトロン株式会社 Processing system
JP3619346B2 (en) 1996-09-19 2005-02-09 大日本スクリーン製造株式会社 Substrate processing apparatus and method
JP3082688B2 (en) 1996-11-05 2000-08-28 ヤマハ株式会社 Wiring formation method
DE69738910D1 (en) 1996-11-28 2008-09-25 Nikon Corp ALIGNMENT DEVICE AND EXPOSURE METHOD
US6099643A (en) 1996-12-26 2000-08-08 Dainippon Screen Mfg. Co., Ltd. Apparatus for processing a substrate providing an efficient arrangement and atmospheric isolation of chemical treatment section
JP3429964B2 (en) 1996-12-26 2003-07-28 大日本スクリーン製造株式会社 Substrate processing equipment
JP4080021B2 (en) 1997-03-19 2008-04-23 大日本スクリーン製造株式会社 Substrate processing equipment
JPH10294351A (en) 1997-04-21 1998-11-04 Sharp Corp Clean box used for manufacturing semiconductor device, system for manufacturing semiconductor device, and manufacture of the same
TW420829B (en) 1997-05-22 2001-02-01 Tokyo Electron Ltd Treatment device and method, impurity removing apparatus
JPH10335415A (en) 1997-05-30 1998-12-18 Dainippon Screen Mfg Co Ltd Method for setting treating time
JP3600711B2 (en) 1997-05-30 2004-12-15 大日本スクリーン製造株式会社 Substrate processing equipment
JPH1116978A (en) 1997-06-19 1999-01-22 Dainippon Screen Mfg Co Ltd Substrate treatment equipment
JPH1126550A (en) 1997-07-04 1999-01-29 Tokyo Electron Ltd Substrate conveyer and apparatus for treating substrate, using the same
US6151981A (en) 1997-07-24 2000-11-28 Costa; Larry J. Two-axis cartesian robot
JPH1154588A (en) 1997-07-30 1999-02-26 Tokyo Electron Ltd Substrate transfer device and substrate processing device using the same
TW385488B (en) 1997-08-15 2000-03-21 Tokyo Electron Ltd substrate processing device
SG76561A1 (en) 1997-09-22 2000-11-21 Tokyo Electron Ltd Processing apparatus and method
US6235634B1 (en) 1997-10-08 2001-05-22 Applied Komatsu Technology, Inc. Modular substrate processing system
US6270306B1 (en) 1998-01-14 2001-08-07 Applied Materials, Inc. Wafer aligner in center of front end frame of vacuum system
KR100265287B1 (en) 1998-04-21 2000-10-02 윤종용 Multi-chamber system for etching equipment for manufacturing semiconductor device
JP3381776B2 (en) 1998-05-19 2003-03-04 東京エレクトロン株式会社 Processing device and processing method
US6266125B1 (en) 1998-05-25 2001-07-24 Tokyo Electron Limited Resist processing method and apparatus
JP3481499B2 (en) 1998-05-25 2003-12-22 東京エレクトロン株式会社 Resist processing method and resist processing apparatus
JP3884570B2 (en) 1998-05-29 2007-02-21 大日本スクリーン製造株式会社 Substrate processing equipment
JP3445937B2 (en) 1998-06-24 2003-09-16 東京エレクトロン株式会社 Multi-stage spin type substrate processing system
JP3745167B2 (en) 1998-07-29 2006-02-15 キヤノン株式会社 Stage apparatus, exposure apparatus, device manufacturing method, and stage driving method
TW428216B (en) 1998-07-29 2001-04-01 Tokyo Electron Ltd Substrate process method and substrate process apparatus
KR100515740B1 (en) 1998-08-14 2005-09-20 동경 엘렉트론 주식회사 Substrate processing apparatus
JP3441681B2 (en) 1998-08-14 2003-09-02 東京エレクトロン株式会社 Processing equipment
JP3442669B2 (en) 1998-10-20 2003-09-02 東京エレクトロン株式会社 Substrate processing equipment
JP3662150B2 (en) 1998-10-30 2005-06-22 東京エレクトロン株式会社 Processing system
JP3273031B2 (en) 1999-01-08 2002-04-08 東京エレクトロン株式会社 Substrate processing equipment
JP2000269297A (en) 1999-03-16 2000-09-29 Tokyo Ohka Kogyo Co Ltd Process unit structure
JP3442686B2 (en) 1999-06-01 2003-09-02 東京エレクトロン株式会社 Substrate processing equipment
TW451274B (en) 1999-06-11 2001-08-21 Tokyo Electron Ltd Substrate processing apparatus
JP4294837B2 (en) 1999-07-16 2009-07-15 東京エレクトロン株式会社 Processing system
US6426303B1 (en) 1999-07-16 2002-07-30 Tokyo Electron Limited Processing system
US6461438B1 (en) 1999-11-18 2002-10-08 Tokyo Electron Limited Heat treatment unit, cooling unit and cooling treatment method
US6402508B2 (en) 1999-12-09 2002-06-11 Tokyo Electron Limited Heat and cooling treatment apparatus and substrate processing system
US6485203B2 (en) 1999-12-20 2002-11-26 Tokyo Electron Limited Substrate processing method and substrate processing apparatus
EP1255294A4 (en) 2000-01-17 2009-01-21 Ebara Corp Wafer transfer control apparatus and method for transferring wafer
US6432842B2 (en) 2000-03-30 2002-08-13 Tokyo Electron Limited Coating method and coating apparatus
US6919001B2 (en) 2000-05-01 2005-07-19 Intevac, Inc. Disk coating system
KR100741186B1 (en) 2000-08-23 2007-07-19 동경 엘렉트론 주식회사 A processing system for an object to be processed
US6491451B1 (en) 2000-11-03 2002-12-10 Motorola, Inc. Wafer processing equipment and method for processing wafers
JP4124400B2 (en) 2001-01-19 2008-07-23 大日本スクリーン製造株式会社 Substrate processing equipment
KR100387418B1 (en) 2001-05-23 2003-06-18 한국디엔에스 주식회사 A spinner system in use the process of fabricating semiconductor device
JP2003059810A (en) 2001-08-20 2003-02-28 Nec Kansai Ltd Chemical treatment device
JP2003142547A (en) 2001-08-24 2003-05-16 Hirata Corp Work-carrying apparatus
JP2003188229A (en) 2001-12-18 2003-07-04 Hitachi Kasado Eng Co Ltd System and method for manufacturing wafer
US20030131458A1 (en) 2002-01-15 2003-07-17 Applied Materials, Inc. Apparatus and method for improving throughput in a cluster tool for semiconductor wafer processing
JP3916473B2 (en) 2002-01-31 2007-05-16 東京エレクトロン株式会社 Substrate processing apparatus and substrate processing method
JP4195227B2 (en) 2002-02-22 2008-12-10 東京エレクトロン株式会社 Introducing port structure of workpiece
JP4162420B2 (en) 2002-04-16 2008-10-08 大日本スクリーン製造株式会社 Substrate processing equipment
FR2839331B1 (en) 2002-05-02 2004-07-16 Cit Alcatel INSTALLATION FOR MANUFACTURING VENTILATED FLOOR SEMICONDUCTOR COMPONENTS
KR20030087418A (en) 2002-05-09 2003-11-14 엘지전자 주식회사 Method for upgrading firmware using modem
JP4073251B2 (en) 2002-05-21 2008-04-09 東京エレクトロン株式会社 Substrate processing equipment
JP2004015021A (en) 2002-06-11 2004-01-15 Dainippon Screen Mfg Co Ltd Substrate handling device
JP2004015023A (en) 2002-06-11 2004-01-15 Dainippon Screen Mfg Co Ltd Substrate handling device and handling method
US6807455B2 (en) 2002-06-26 2004-10-19 Dainippon Screen Mfg. Co. Ltd. System for and method of processing substrate
JP2004046450A (en) 2002-07-10 2004-02-12 Fujitsu Ten Ltd Emergency transport system
JP2004087675A (en) * 2002-08-26 2004-03-18 Dainippon Screen Mfg Co Ltd Substrate treating device
JP4133208B2 (en) * 2002-10-22 2008-08-13 東京エレクトロン株式会社 Substrate processing equipment
JP4018965B2 (en) 2002-10-28 2007-12-05 東京エレクトロン株式会社 Substrate processing equipment
JP4087328B2 (en) 2002-11-28 2008-05-21 東京エレクトロン株式会社 Coating and developing apparatus and operating method of coating and developing apparatus
JP2004207279A (en) 2002-12-20 2004-07-22 Rorze Corp Sheet-shaped object manufacturing facility
JP2004241319A (en) 2003-02-07 2004-08-26 Sony Corp Film forming device
JP2004304003A (en) 2003-03-31 2004-10-28 Tokyo Electron Ltd Processing system
JP4357861B2 (en) 2003-04-07 2009-11-04 大日本スクリーン製造株式会社 Substrate processing equipment
JP4307132B2 (en) 2003-04-16 2009-08-05 大日本スクリーン製造株式会社 Substrate processing equipment
US20090143902A1 (en) 2004-06-11 2009-06-04 Donald Blust Automated business system and method of vending and returning a consumer product
KR100524875B1 (en) 2003-06-28 2005-10-31 엘지.필립스 엘시디 주식회사 Clean room system
JP4079861B2 (en) 2003-09-22 2008-04-23 大日本スクリーン製造株式会社 Substrate processing equipment
JP4108027B2 (en) 2003-09-22 2008-06-25 大日本スクリーン製造株式会社 Substrate processing equipment
US7387485B2 (en) 2003-09-29 2008-06-17 Quantum Corporation Cartridge transport assembly
KR100521401B1 (en) 2003-11-24 2005-10-12 세메스 주식회사 System for wafer cleaning
JP4322086B2 (en) 2003-10-14 2009-08-26 大日本スクリーン製造株式会社 Substrate processing apparatus and method
KR100546503B1 (en) 2003-11-27 2006-01-26 다이닛뽕스크린 세이조오 가부시키가이샤 Substrate treating apparatus and method
JP4369325B2 (en) 2003-12-26 2009-11-18 東京エレクトロン株式会社 Development device and development processing method
JP4376072B2 (en) 2004-01-16 2009-12-02 東京エレクトロン株式会社 Substrate processing apparatus and substrate processing method
JP2005243690A (en) 2004-02-24 2005-09-08 Dainippon Screen Mfg Co Ltd Substrate processing apparatus
KR101037087B1 (en) 2004-06-29 2011-05-26 엘지디스플레이 주식회사 A substrate product apparatus for mmg
KR20060058188A (en) 2004-11-24 2006-05-29 박미경 Method for selling a product in internet website
JP4926433B2 (en) 2004-12-06 2012-05-09 株式会社Sokudo Substrate processing apparatus and substrate processing method
JP5154007B2 (en) 2004-12-06 2013-02-27 株式会社Sokudo Substrate processing equipment
US7699021B2 (en) 2004-12-22 2010-04-20 Sokudo Co., Ltd. Cluster tool substrate throughput optimization
US7819079B2 (en) 2004-12-22 2010-10-26 Applied Materials, Inc. Cartesian cluster tool configuration for lithography type processes
JP4955977B2 (en) 2005-01-21 2012-06-20 東京エレクトロン株式会社 Coating and developing apparatus and method thereof
JP4955976B2 (en) 2005-01-21 2012-06-20 東京エレクトロン株式会社 Coating and developing apparatus and method thereof
US7245348B2 (en) 2005-01-21 2007-07-17 Tokyo Electron Limited Coating and developing system and coating and developing method with antireflection film and an auxiliary block for inspection and cleaning
JP4414910B2 (en) 2005-02-17 2010-02-17 東京エレクトロン株式会社 Semiconductor manufacturing apparatus and semiconductor manufacturing method
JP4541931B2 (en) 2005-03-03 2010-09-08 株式会社日立国際電気 Semiconductor device manufacturing method and semiconductor manufacturing apparatus
JP4685584B2 (en) 2005-03-11 2011-05-18 東京エレクトロン株式会社 Coating and developing equipment
JP4566035B2 (en) 2005-03-11 2010-10-20 東京エレクトロン株式会社 Coating and developing apparatus and method thereof
US7403260B2 (en) 2005-03-11 2008-07-22 Tokyo Electron Limited Coating and developing system
JP4414921B2 (en) 2005-03-23 2010-02-17 東京エレクトロン株式会社 Coating and developing apparatus and coating and developing method
JP4273423B2 (en) 2005-05-31 2009-06-03 株式会社ダイフク Transport device
JP4522329B2 (en) 2005-06-24 2010-08-11 株式会社Sokudo Substrate processing equipment
KR100666355B1 (en) 2005-07-01 2007-01-11 세메스 주식회사 Semiconductor manufacturing equipment of multi-layer structure and method for processing of the same
JP4616731B2 (en) 2005-09-01 2011-01-19 東京エレクトロン株式会社 Coating and developing equipment
JP4450784B2 (en) 2005-10-19 2010-04-14 東京エレクトロン株式会社 Coating and developing apparatus and method thereof
JP2007184537A (en) 2005-12-07 2007-07-19 Canon Inc Exposure method and apparatus, device for applying resist to plural substrates, and device manufacturing method
JP4654120B2 (en) 2005-12-08 2011-03-16 東京エレクトロン株式会社 Coating, developing apparatus, coating, developing method, and computer program
JP4704221B2 (en) 2006-01-26 2011-06-15 株式会社Sokudo Substrate processing apparatus and substrate processing method
JP4781832B2 (en) 2006-02-01 2011-09-28 大日本スクリーン製造株式会社 Substrate processing system, substrate processing apparatus, program, and recording medium
JP2007208064A (en) 2006-02-02 2007-08-16 Dainippon Screen Mfg Co Ltd Substrate-treating device and substrate treatment method
JP5132108B2 (en) 2006-02-02 2013-01-30 株式会社Sokudo Substrate processing equipment
JP2007234882A (en) 2006-03-01 2007-09-13 Dainippon Screen Mfg Co Ltd Substrate processing apparatus, and substrate handling method
JP4614455B2 (en) 2006-04-19 2011-01-19 東京エレクトロン株式会社 Substrate transfer processing equipment
JP2007317987A (en) 2006-05-29 2007-12-06 Sokudo:Kk Substrate processing apparatus, and substrate processing method
KR100784389B1 (en) 2006-06-22 2007-12-11 삼성전자주식회사 Photo lithography system and method
US8220354B2 (en) 2006-06-28 2012-07-17 Genmark Automation, Inc. Belt-driven robot having extended Z-axis motion
JP4772620B2 (en) 2006-08-11 2011-09-14 東京エレクトロン株式会社 Processing condition determining method and processing condition determining apparatus for coating film for immersion exposure
JP4999415B2 (en) 2006-09-29 2012-08-15 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, power supply apparatus for substrate processing apparatus, and power supply method for substrate processing apparatus
US20080158531A1 (en) 2006-11-15 2008-07-03 Nikon Corporation Exposure apparatus, exposure method, and method for producing device
JP2008198879A (en) 2007-02-15 2008-08-28 Sokudo:Kk Substrate processing apparatus
US7675048B2 (en) 2007-03-06 2010-03-09 Varian Semiconductor Equipment Associates, Inc. Wafer holding robot end effecter vertical position determination in ion implanter system
US20080224817A1 (en) 2007-03-15 2008-09-18 Sokudo Co., Ltd. Interlaced rtd sensor for zone/average temperature sensing
JP4908304B2 (en) 2007-04-27 2012-04-04 東京エレクトロン株式会社 Substrate processing method, substrate processing system, and computer-readable storage medium
US8636458B2 (en) 2007-06-06 2014-01-28 Asml Netherlands B.V. Integrated post-exposure bake track
JP2007227984A (en) 2007-06-14 2007-09-06 Dainippon Screen Mfg Co Ltd Substrate processing apparatus
KR100897850B1 (en) 2007-06-18 2009-05-15 세메스 주식회사 Apparatus for processing a substrate
KR100904392B1 (en) 2007-06-18 2009-06-26 세메스 주식회사 Apparatus for processing a substrate
JP2009021275A (en) 2007-07-10 2009-01-29 Sokudo:Kk Substrate treating equipment
US7801633B2 (en) 2007-07-10 2010-09-21 Dainippon Screen Mfg. Co., Ltd. Scheduling method and program for a substrate treating apparatus
US7641406B2 (en) 2007-07-26 2010-01-05 Sokudo Co., Ltd. Bevel inspection apparatus for substrate processing
JP5148944B2 (en) 2007-08-14 2013-02-20 大日本スクリーン製造株式会社 Substrate processing system
US7831135B2 (en) 2007-09-04 2010-11-09 Sokudo Co., Ltd. Method and system for controlling bake plate temperature in a semiconductor processing chamber
JP5065167B2 (en) 2007-09-20 2012-10-31 東京エレクトロン株式会社 Substrate processing method and substrate processing system
JP2009135169A (en) 2007-11-29 2009-06-18 Tokyo Electron Ltd Substrate processing system, and substrate processing method
KR100892756B1 (en) 2007-12-27 2009-04-15 세메스 주식회사 Apparatus for treating substrate and method for transferring substrate using the same
JP5344734B2 (en) 2007-12-28 2013-11-20 株式会社Sokudo Substrate processing equipment
JP5001828B2 (en) 2007-12-28 2012-08-15 株式会社Sokudo Substrate processing equipment
JP5179170B2 (en) 2007-12-28 2013-04-10 株式会社Sokudo Substrate processing equipment
JP5056582B2 (en) 2008-05-22 2012-10-24 東京エレクトロン株式会社 Coating, developing device, coating, developing method and storage medium
JP5225815B2 (en) 2008-11-19 2013-07-03 東京エレクトロン株式会社 Interface device, method for transporting substrate, and computer-readable storage medium
EP2389459B1 (en) 2009-01-21 2014-03-26 George Atanasoff Methods and systems for control of a surface modification process
JP4760919B2 (en) 2009-01-23 2011-08-31 東京エレクトロン株式会社 Coating and developing equipment
JP5181306B2 (en) 2009-01-30 2013-04-10 セメス株式会社 Substrate processing system, pre- and post-exposure processing unit, and substrate processing method
JP2010177673A (en) 2009-01-30 2010-08-12 Semes Co Ltd Apparatus and method for treating substrate
JP5462506B2 (en) 2009-03-18 2014-04-02 株式会社Sokudo Substrate processing equipment
JP5187274B2 (en) 2009-05-28 2013-04-24 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
JP5445006B2 (en) 2009-10-05 2014-03-19 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
JP5246184B2 (en) 2010-02-24 2013-07-24 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
JP5168300B2 (en) 2010-02-24 2013-03-21 東京エレクトロン株式会社 Substrate processing apparatus and substrate processing method
JP5575507B2 (en) 2010-03-02 2014-08-20 株式会社日立国際電気 Substrate processing apparatus, substrate transport method, semiconductor device manufacturing method, and substrate processing apparatus maintenance method
JP5408059B2 (en) 2010-07-09 2014-02-05 東京エレクトロン株式会社 Coating, developing device, coating, developing method and storage medium
JP5348083B2 (en) 2010-07-16 2013-11-20 東京エレクトロン株式会社 Coating, developing device, coating, developing method and storage medium
WO2012016031A1 (en) 2010-07-28 2012-02-02 Par Systems, Inc. Robotic storage and retrieval systems
JP5223897B2 (en) 2010-09-02 2013-06-26 東京エレクトロン株式会社 Coating, developing device, coating, developing method and storage medium
JP5293719B2 (en) 2010-10-01 2013-09-18 東京エレクトロン株式会社 Data acquisition method for substrate processing apparatus and sensor substrate
JP5616205B2 (en) 2010-11-29 2014-10-29 東京エレクトロン株式会社 Substrate processing system, substrate processing method, program, and computer storage medium
US8612807B2 (en) 2011-01-12 2013-12-17 Ncr Corporation Entertainment kiosk error handling and troubleshooting method
JP5821689B2 (en) 2011-04-20 2015-11-24 東京エレクトロン株式会社 Substrate processing apparatus, substrate processing method, and storage medium
US9405194B2 (en) 2012-11-30 2016-08-02 Semes Co., Ltd. Facility and method for treating substrate

Patent Citations (118)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5177514A (en) * 1988-02-12 1993-01-05 Tokyo Electron Limited Apparatus for coating a photo-resist film and/or developing it after being exposed
US5202716A (en) * 1988-02-12 1993-04-13 Tokyo Electron Limited Resist process system
US5100516A (en) * 1989-01-25 1992-03-31 Yamaha Hatsudoki Kabushiki Kaisha High volume workpiece handling and chemical treating system
US5275709A (en) * 1991-11-07 1994-01-04 Leybold Aktiengesellschaft Apparatus for coating substrates, preferably flat, more or less plate-like substrates
US5571325A (en) * 1992-12-21 1996-11-05 Dainippon Screen Mfg. Co., Ltd. Subtrate processing apparatus and device for and method of exchanging substrate in substrate processing apparatus
US5858863A (en) * 1993-07-15 1999-01-12 Hitachi, Ltd. Fabrication system and method having inter-apparatus transporter
US5725664A (en) * 1993-10-29 1998-03-10 Tokyo Electron Limited Semiconductor wafer processing apparatus including localized humidification between coating and heat treatment sections
US5826129A (en) * 1994-06-30 1998-10-20 Tokyo Electron Limited Substrate processing system
US5664254A (en) * 1995-02-02 1997-09-02 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US5788868A (en) * 1995-09-04 1998-08-04 Dainippon Screen Mfg. Co., Ltd. Substrate transfer method and interface apparatus
US6176667B1 (en) * 1996-04-30 2001-01-23 Applied Materials, Inc. Multideck wafer processing system
US5876280A (en) * 1996-05-30 1999-03-02 Tokyo Electron Limited Substrate treating system and substrate treating method
US6062798A (en) * 1996-06-13 2000-05-16 Brooks Automation, Inc. Multi-level substrate processing apparatus
US6027262A (en) * 1996-09-03 2000-02-22 Tokyo Electron Limited Resist process method and system
US5937223A (en) * 1996-11-08 1999-08-10 Tokyo Electron Limited Processing apparatus
JPH10209241A (en) * 1997-01-16 1998-08-07 Dainippon Screen Mfg Co Ltd Substrate transfer device and substrate treatment device provided with it
US5963753A (en) * 1997-01-24 1999-10-05 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US6063439A (en) * 1997-06-11 2000-05-16 Tokyo Electron Limited Processing apparatus and method using solution
US6680775B1 (en) * 1998-04-02 2004-01-20 Nikon Corporation Substrate treating device and method, and exposure device and method
US6382895B1 (en) * 1998-12-28 2002-05-07 Anelva Corporation Substrate processing apparatus
US6466300B1 (en) * 1999-03-18 2002-10-15 Tokyo Electron Limited Substrate processing apparatus
US6377329B1 (en) * 1999-05-24 2002-04-23 Tokyo Electron Limited Substrate processing apparatus
US6338582B1 (en) * 1999-06-30 2002-01-15 Tokyo Electron Limited Substrate delivery apparatus and coating and developing processing system
US6402401B1 (en) * 1999-10-19 2002-06-11 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US6454472B1 (en) * 1999-12-06 2002-09-24 Dns Korea Co., Ltd. Semiconductor manufacturing apparatus for photolithographic process
US20040050321A1 (en) * 2000-02-01 2004-03-18 Tokyo Electron Limited Substrate processing apparatus and substrate processing method
US20020011207A1 (en) * 2000-05-31 2002-01-31 Shigeyuki Uzawa Exposure apparatus, coating/developing system, device manufacturing system, device manufacturing method, semiconductor manufacturing factory, and exposure apparatus maintenance method
US6698944B2 (en) * 2000-06-15 2004-03-02 Nikon Corporation Exposure apparatus, substrate processing unit and lithographic system, and device manufacturing method
US6752872B2 (en) * 2000-10-10 2004-06-22 Tokyo, Electron Limited Coating unit and coating method
US6982102B2 (en) * 2000-10-10 2006-01-03 Tokyo Electron Limited Coating unit and coating method
US6537835B2 (en) * 2000-10-25 2003-03-25 Sony Corporation Method of manufacturing semiconductor device and apparatus of automatically adjusting semiconductor pattern
US20020053319A1 (en) * 2000-11-07 2002-05-09 Shuichi Nagamine Solution treatment method and solution treatment unit
US20050042555A1 (en) * 2000-12-08 2005-02-24 Tokyo Electron Limited Coating and developing apparatus and pattern forming method
US6558053B2 (en) * 2001-04-19 2003-05-06 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US6889014B2 (en) * 2001-07-10 2005-05-03 Canon Kabushiki Kaisha Exposure system, device production method, semiconductor production factory, and exposure apparatus maintenance method
US6750155B2 (en) * 2001-08-08 2004-06-15 Lam Research Corporation Methods to minimize moisture condensation over a substrate in a rapid cycle chamber
US7017658B2 (en) * 2002-01-31 2006-03-28 Dainippon Screen Mfg. Co., Ltd. Heat processing device
US7008124B2 (en) * 2002-05-01 2006-03-07 Tokyo Electron Limited Method and device for processing substrate
US6893171B2 (en) * 2002-05-01 2005-05-17 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US7001674B2 (en) * 2002-05-08 2006-02-21 Nikon Corporation Exposure method, exposure apparatus, and method of production of device
US6752543B2 (en) * 2002-05-23 2004-06-22 Dainippon Screen Mfg. Co. Ltd. Substrate processing apparatus
US20040005149A1 (en) * 2002-06-11 2004-01-08 Dainippon Screen Mfg. Co.,Ltd. Substrate treating apparatus and method
US20040007176A1 (en) * 2002-07-15 2004-01-15 Applied Materials, Inc. Gas flow control in a wafer processing system having multiple chambers for performing same process
US20040061065A1 (en) * 2002-09-27 2004-04-01 Advantest Corporation Electron beam exposure apparatus, electron beam exposure apparatus calibration method, and semiconductor element manufacturing method
US7379785B2 (en) * 2002-11-28 2008-05-27 Tokyo Electron Limited Substrate processing system, coating/developing apparatus, and substrate processing apparatus
US20040122545A1 (en) * 2002-12-19 2004-06-24 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus, operation method thereof and program
US7317961B2 (en) * 2003-02-03 2008-01-08 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and method of transporting substrates and method of processing substrates in substrate processing apparatus
US7069099B2 (en) * 2003-02-03 2006-06-27 Dainippon Screen Mfg. Co., Ltd. Method of transporting and processing substrates in substrate processing apparatus
US7729798B2 (en) * 2003-04-02 2010-06-01 Tokyo Electron Limited Substrate processing system, and method of control therefor, control program, and storage medium
US20040229441A1 (en) * 2003-05-13 2004-11-18 Dainippon Screen Mfg. Co., Ltd Substrate processing apparatus
US7053990B2 (en) * 2003-05-29 2006-05-30 Asml Holding N.V. System to increase throughput in a dual substrate stage double exposure lithography system
US6879866B2 (en) * 2003-08-04 2005-04-12 Asml Netherlands B.V. Method, computer program product and apparatus for scheduling maintenance actions in a substrate processing system
US20050030511A1 (en) * 2003-08-07 2005-02-10 Asml Netherlands B.V. Interface unit, lithographic projection apparatus comprising such an interface unit and a device manufacturing method
US7522823B2 (en) * 2003-09-17 2009-04-21 Sokudo Co., Ltd. Thermal processing apparatus, thermal processing method, and substrate processing apparatus
US7525650B2 (en) * 2003-09-19 2009-04-28 Dainippon Screen Mfg., Co., Ltd. Substrate processing apparatus for performing photolithography
US20050135905A1 (en) * 2003-12-04 2005-06-23 Daifuku Co., Ltd. Glass substrate transporting facility
US7323060B2 (en) * 2003-12-11 2008-01-29 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US20050266323A1 (en) * 2004-05-26 2005-12-01 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method
US20060024446A1 (en) * 2004-07-06 2006-02-02 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US20060011296A1 (en) * 2004-07-16 2006-01-19 Tokyo Electron Limited Substrate processing apparatus, substrate processing method, and computer program
US20060028630A1 (en) * 2004-08-05 2006-02-09 Canon Kabushiki Kaisha Liquid immersion exposure apparatus, method of controlling the same, and device manufacturing method
US7692764B2 (en) * 2004-08-30 2010-04-06 Nikon Corporation Exposure apparatus, operation decision method, substrate processing system, maintenance management method, and device manufacturing method
US20060062282A1 (en) * 2004-09-20 2006-03-23 David Wright Method for providing packet framing in a DSSS radio system
KR20060033423A (en) * 2004-10-15 2006-04-19 세메스 주식회사 Photolithography apparatus used in manufacturing semiconductor substrates
US20060098978A1 (en) * 2004-11-10 2006-05-11 Schuichi Yasuda Substrate processing apparatus and substrate processing method
US7497633B2 (en) * 2004-11-10 2009-03-03 Sokudo Co., Ltd. Substrate processing apparatus and substrate processing method
US20060104635A1 (en) * 2004-11-11 2006-05-18 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US7651306B2 (en) * 2004-12-22 2010-01-26 Applied Materials, Inc. Cartesian robot cluster tool architecture
US7925377B2 (en) * 2004-12-22 2011-04-12 Applied Materials, Inc. Cluster tool architecture for processing a substrate
US20060286300A1 (en) * 2004-12-22 2006-12-21 Tetsuya Ishikawa Cluster tool architecture for processing a substrate
US20060137726A1 (en) * 2004-12-24 2006-06-29 Dainippon Screen Mfg. Co., Ltd. Substrate treating apparatus
US7322756B2 (en) * 2005-01-21 2008-01-29 Tokyo Electron Limited Coating and developing apparatus and coating and developing method
US20070056514A1 (en) * 2005-02-01 2007-03-15 Tokyo Electron Limited Coating and developing apparatus
US7262829B2 (en) * 2005-02-14 2007-08-28 Tokyo Electron Limited Coating and developing apparatus and coating and developing method
US8353986B2 (en) * 2005-03-31 2013-01-15 Tokyo Electron Limited Substrate processing apparatus
US7686559B2 (en) * 2005-05-31 2010-03-30 Daifuku Co., Ltd. Article transport facility and a method of operating the facility
US20070048979A1 (en) * 2005-08-31 2007-03-01 Tokyo Electron Limited Heating apparatus, and coating and developing apparatus
US20070058147A1 (en) * 2005-09-14 2007-03-15 Tetsuya Hamada Apparatus for and method of processing substrate subjected to exposure process
US20070219660A1 (en) * 2005-11-24 2007-09-20 Tomohiro Kaneko Substrate transporting and processing apparatus, fault management method for substrate transport and processing apparatus, and storage medium storing fault management program
US8154106B2 (en) * 2005-11-29 2012-04-10 Tokyo Electron Limited Coating and developing system and coating and developing method
US7798764B2 (en) * 2005-12-22 2010-09-21 Applied Materials, Inc. Substrate processing sequence in a cartesian robot cluster tool
US7652276B2 (en) * 2006-02-08 2010-01-26 Tokyo Electron Limited Defect inspection method, defect inspection apparatus having a mounting table with a substrate thereon and an image pickup device are relatively moved for capturing the image of the substrate, and computer readable storage medium storing a program for performing the method
US20080014333A1 (en) * 2006-04-14 2008-01-17 Tokyo Electron Limited Coating and developing apparatus, substrate processing method, and storage medium
US7537401B2 (en) * 2006-06-05 2009-05-26 Lg Display Co., Ltd. Photo apparatus and method
US20080026153A1 (en) * 2006-07-31 2008-01-31 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US20080070164A1 (en) * 2006-09-15 2008-03-20 Tokyo Electron Limited Wet-processing apparatus, wet-processing method and storage medium
US8419341B2 (en) * 2006-09-19 2013-04-16 Brooks Automation, Inc. Linear vacuum robot with Z motion and articulated arm
US20080079925A1 (en) * 2006-09-29 2008-04-03 Canon Kabushiki Kaisha Processing apparatus
US20080129968A1 (en) * 2006-12-05 2008-06-05 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US7597492B2 (en) * 2006-12-05 2009-10-06 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US7694688B2 (en) * 2007-01-05 2010-04-13 Applied Materials, Inc. Wet clean system design
US7641405B2 (en) * 2007-02-15 2010-01-05 Sokudo Co., Ltd. Substrate processing apparatus with integrated top and edge cleaning unit
US7871211B2 (en) * 2007-03-30 2011-01-18 Tokyo Electron Limited Coating and developing system, coating and developing method and storage medium
US20090001071A1 (en) * 2007-06-28 2009-01-01 Sokudo Co., Ltd Method and System for Cooling a Bake Plate in a Track Lithography Tool
US20120156380A1 (en) * 2007-06-29 2012-06-21 Sokudo Co., Ltd. Substrate treating apparatus
US20090000543A1 (en) * 2007-06-29 2009-01-01 Sokudo Co., Ltd. Substrate treating apparatus
US20100061718A1 (en) * 2007-08-28 2010-03-11 Tokyo Electron Limited Coating and developing apparatus, coating and developing method, and storage medium
US7645081B2 (en) * 2007-08-28 2010-01-12 Tokyo Electron Limited Coating and developing apparatus, coating and developing method, and storage medium
US7934880B2 (en) * 2007-08-28 2011-05-03 Tokyo Electron Limited Coating and developing apparatus, coating and developing method, and storage medium
US20090070946A1 (en) * 2007-09-18 2009-03-19 Sokudo Co., Ltd. Apparatus for and method of processing substrate
US20090098298A1 (en) * 2007-10-12 2009-04-16 Tokyo Electron Limited Coater/developer, method of coating and developing resist film, and computer readable storing medium
US20090139450A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms
US8708587B2 (en) * 2007-11-30 2014-04-29 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US20140000514A1 (en) * 2007-11-30 2014-01-02 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US20090142162A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US20090139833A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-line substrate treating apparatus
US20100050940A1 (en) * 2008-08-28 2010-03-04 Tokyo Ohka Kogyo Co., Ltd. Substrate processing system, carrying device and coating device
US20120073461A1 (en) * 2009-06-19 2012-03-29 Shoichi Terada Imprint system, imprint method, and non-transitory computer storage medium
US20120086142A1 (en) * 2009-06-24 2012-04-12 Tokyo Electron Limited Imprint system, imprint method, and non-transitory computer storage medium
US20120097336A1 (en) * 2009-06-24 2012-04-26 Tokyo Electron Limited Template treatment apparatus and imprint system
US20110043773A1 (en) * 2009-08-24 2011-02-24 Tokyo Electron Limited Coating/developing apparatus and coating/developing method
US8342761B2 (en) * 2009-08-24 2013-01-01 Tokyo Electron Limited Coating/developing apparatus and coating/developing method
US20110063588A1 (en) * 2009-09-15 2011-03-17 Kashiyama Masahito Substrate processing apparatus, substrate processing system and inspection/periphery exposure apparatus
US20110078898A1 (en) * 2009-10-06 2011-04-07 Tokyo Electron Limited Substrate processing apparatus
US8443513B2 (en) * 2009-10-06 2013-05-21 Tokyo Electron Limited Substrate processing apparatus
US20120013730A1 (en) * 2010-07-16 2012-01-19 Tokyo Electron Limited Substrate processing apparatus, substrate processing method and non-transitory computer storage medium
US20120021611A1 (en) * 2010-07-23 2012-01-26 Tokyo Electron Limited Coating treatment method, non-transitory computer storage medium and coating treatment apparatus
US20140003891A1 (en) * 2011-03-26 2014-01-02 Tokyo Electron Limited Substrate processing apparatus

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10290521B2 (en) 2007-06-29 2019-05-14 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with parallel gas supply pipes and a gas exhaust pipe
US9165807B2 (en) 2007-06-29 2015-10-20 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with vertical treatment arrangement including vertical blowout and exhaust units
US9174235B2 (en) 2007-06-29 2015-11-03 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus using horizontal treatment cell arrangements with parallel treatment lines
US9230834B2 (en) 2007-06-29 2016-01-05 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus
US20090139450A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms
US20090142162A1 (en) * 2007-11-30 2009-06-04 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US9687874B2 (en) 2007-11-30 2017-06-27 Screen Semiconductor Solutions Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms and vertically divided treating units
US8545118B2 (en) 2007-11-30 2013-10-01 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US8708587B2 (en) 2007-11-30 2014-04-29 Sokudo Co., Ltd. Substrate treating apparatus with inter-unit buffers
US9184071B2 (en) * 2007-11-30 2015-11-10 Screen Semiconductor Solutions Co., Ltd. Multi-story substrate treating apparatus with flexible transport mechanisms and vertically divided treating units
US9299596B2 (en) * 2007-12-28 2016-03-29 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with parallel substrate treatment lines simultaneously treating a plurality of substrates
US9368383B2 (en) 2007-12-28 2016-06-14 Screen Semiconductor Solutions Co., Ltd. Substrate treating apparatus with substrate reordering
US20090165712A1 (en) * 2007-12-28 2009-07-02 Sokudo Co., Ltd. substrate treating apparatus with parallel substrate treatment lines
US20120086142A1 (en) * 2009-06-24 2012-04-12 Tokyo Electron Limited Imprint system, imprint method, and non-transitory computer storage medium
US9494877B2 (en) 2011-03-29 2016-11-15 Screen Semiconductor Solutions Co., Ltd. Substrate processing apparatus
US10216099B2 (en) 2011-03-29 2019-02-26 Screen Semiconductor Solutions Co., Ltd. Substrate processing apparatus
US9741594B2 (en) 2011-12-05 2017-08-22 Screen Semiconductor Solutions Co., Ltd. Substrate processing apparatus and substrate processing method for performing heat treatment on substrate
US20180056327A1 (en) * 2016-08-29 2018-03-01 The Aerospace Corporation Fabrication assembly and methods for fabricating composite mirror objects
US20180099310A1 (en) * 2016-08-29 2018-04-12 The Aerospace Corporation Fabrication assembly and methods for fabricating composite mirror objects
US9956587B2 (en) * 2016-08-29 2018-05-01 The Aerospace Corporation Fabrication assembly and methods for fabricating composite mirror objects
US10022747B2 (en) * 2016-08-29 2018-07-17 The Aerospace Corporation Fabrication assembly and methods for fabricating composite mirror objects

Also Published As

Publication number Publication date
US9368383B2 (en) 2016-06-14
TW200935552A (en) 2009-08-16
TW201338086A (en) 2013-09-16
TWI470724B (en) 2015-01-21
KR101047799B1 (en) 2011-07-07
TWI498994B (en) 2015-09-01
TW201403740A (en) 2014-01-16
US20140342558A1 (en) 2014-11-20
TWI538090B (en) 2016-06-11
JP5001828B2 (en) 2012-08-15
KR20090072994A (en) 2009-07-02
JP2009164253A (en) 2009-07-23

Similar Documents

Publication Publication Date Title
US9368383B2 (en) Substrate treating apparatus with substrate reordering
US20230042033A1 (en) Substrate treating apparatus
US9687874B2 (en) Multi-story substrate treating apparatus with flexible transport mechanisms and vertically divided treating units
US20210134626A1 (en) Substrate treating apparatus with parallel substrate treatment lines on multiple stories for simultaneously treating a plurality of substrates
US8545118B2 (en) Substrate treating apparatus with inter-unit buffers
US20090139833A1 (en) Multi-line substrate treating apparatus
JP6656305B2 (en) Substrate processing equipment
JP5442890B2 (en) Substrate processing equipment
JP5629675B2 (en) Substrate processing equipment
JP5893705B2 (en) Substrate processing equipment
JP5442889B2 (en) Substrate processing equipment

Legal Events

Date Code Title Description
AS Assignment

Owner name: SOKUDO CO., LTD., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OGURA, HIROYUKI;MITSUHASHI, TSUYOSHI;FUKUTOMI, YOSHITERU;AND OTHERS;REEL/FRAME:022030/0044;SIGNING DATES FROM 20081212 TO 20081215

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION