US20100013067A9 - Stress Mitigation in Packaged Microchips - Google Patents
Stress Mitigation in Packaged Microchips Download PDFInfo
- Publication number
- US20100013067A9 US20100013067A9 US11/770,369 US77036907A US2010013067A9 US 20100013067 A9 US20100013067 A9 US 20100013067A9 US 77036907 A US77036907 A US 77036907A US 2010013067 A9 US2010013067 A9 US 2010013067A9
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- base
- leadframe
- package
- lid
- exterior surface
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- H—ELECTRICITY
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
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Definitions
- the invention generally relates to electronic device packaging and, more particularly, the invention relates to mounting orientations of electronic packages.
- Leadframe based packages commonly are formed to be surface mounted in a horizontal orientation.
- the exterior package surface having the largest surface area i.e., often referred to as the “bottom side” of the package
- the bottom side typically is surface mounted to a printed circuit board or other similar interconnection apparatus.
- this mounting orientation is not optimal.
- an accelerometer often is oriented along a specific axis. As such, it generally requires a specific mounting orientation.
- the circuit board supporting the accelerometer therefore must be mounted within the underlying device in the correct orientation. Requiring that a circuit board be mounted in a specific orientation can be cumbersome and inefficient.
- a package apparatus has a base coupled with a lid to form a leadframe package.
- the package has first and second exterior surfaces with respective first and second contact patterns.
- the first exterior surface is in a plane that intersects the plane of the second exterior surface (e.g., the two planes are not parallel).
- the first and second contact patterns are substantially electrically identical to permit the package to be either vertically or horizontally mounted to an underlying apparatus.
- the base and lid illustratively form a premolded leadframe package with a chamber for receiving an integrated circuit.
- the package apparatus also may have an integrated circuit (e.g., a MEMS device, such as an accelerometer or a gyroscope) secured within the chamber.
- the integrated circuit may be substantially identically electrically connected with the first contact pattern and the second contact pattern.
- the lid and base include a moldable material.
- the first contact pattern may have a first plurality of contacts substantially embedded within the moldable material of at least one of the lid and base.
- the contacts are exposed for mounting to an exterior apparatus. Accordingly, the moldable material does not completely encapsulate the contacts of this embodiment.
- the second contact pattern may have a second plurality of contacts substantially embedded within the moldable material of at least one of the lid and base.
- the first exterior surface is orthogonal to the second exterior surface.
- the base has a base leadframe that is in electrical contact with a leadframe embedded by moldable material of the lid.
- the base may have a plurality of walls that form a chamber for receiving an integrated circuit.
- a method of forming a packaged integrated circuit forms at least one leadframe to have a first plurality of contacts and a second plurality of contacts.
- the method encapsulates a portion of the at least one leadframe within a moldable material to form a base and a lid.
- the method secures an integrated circuit to the base, and electrically connects the integrated circuit with the a least one leadframe.
- the integrated circuit substantially identically electrically connects with the first plurality of contacts and the second plurality of contacts.
- the method connects the base to the lid to form a premolded package having first and second orthogonal, exterior surfaces. After the package is formed, the first plurality of contacts are on the first exterior surface, while the second plurality of contacts are on the second exterior surface.
- FIG. 1 schematically shows a bottom perspective view of a package configured in accordance with illustrative embodiments of the invention.
- FIG. 2 schematically shows a bottom perspective view of another package configured in accordance with illustrative embodiments of the invention.
- FIG. 3 schematically shows a cross-sectional, partially exploded view of the package shown in FIG. 1 along line 3 - 3 .
- FIG. 4 schematically shows the package of FIG. 1 coupled with a printed circuit board.
- FIG. 5 shows a process of forming the packaged microchip shown in FIG. 1 in accordance with illustrative embodiments of the invention.
- a premolded leadframe package has at least two, non-parallel exterior sides with substantially electrically identical contact patterns. Accordingly, such a package is capable of being mounted in at least two different orientations (e.g., on its side surface or on its bottom surface). Designers thus can orient the package to the requirements of a particular application—they no longer are limited to orienting the printed circuit board only. Details of various embodiments are discussed below.
- FIG. 1 schematically shows a bottom, perspective view of a packaged electronic device 10 (also referred to as a “packaged microchip 10 ”) configured in accordance with illustrative embodiments of the invention.
- the packaged electronic device 10 can contain an integrated circuit chip, such as an ASIC or a MEMS device (see FIG. 3 , discussed below).
- the packaged electronic device 10 can function as an inertial sensor, such as an accelerometer or gyroscope, or as a transducer, such as a microphone or microspeaker.
- the packaged electronic device 10 shown in FIG. 1 has a base 12 that, together with a corresponding lid 14 , forms a premolded leadframe package 13 for containing circuitry, such as the above noted integrated circuit chips and/or other circuitry.
- the leadframe package 13 of this embodiment has a generally rectangular cross-sectional shape with six sides; namely, a top surface 22 A, a bottom surface 22 B and four side surfaces 20 .
- the top and bottom surfaces 22 A and 22 B have larger surface areas than those of the side surfaces 20 .
- some of the surfaces 20 , 22 A, and 22 B of the embodiment shown are generally orthogonal to each of their adjacent surfaces.
- at least two generally nonparallel (e.g., orthogonal) surfaces 20 , 22 A, and 22 B of the package 13 have separate but substantially electrically equivalent contact patterns (generally identified by reference number “ 18 ”).
- one side surface 20 may have a first contact pattern 18
- the bottom surface 22 B may have a second contact pattern 18
- the first contact pattern 18 on the side surface 20 may be substantially electrically equivalent to the second contact pattern 18 on the bottom surface 22 B.
- each contact (also identified by reference number “ 18 ”) of the first contact pattern 18 may have a corresponding, electrically equivalent contact 18 on the second contact pattern 18 .
- one contact 18 (or more contacts 18 ) on the first contact pattern 18 may have multiple corresponding, electrically equivalent contacts 18 on the second contact pattern 18 .
- the package 13 may mount to an underlying interconnect apparatus 24 (see FIG. 4 , discussed below) either on its side surface 20 , or on its bottom surface 22 B.
- a set of one or more contacts 18 may be considered to be substantially electrically identical or equivalent with another set of one or more contacts 18 on another surface when either set may be used to make the same electrical connection with the internal circuitry of the package 13 .
- the internal chip may be a gyroscope having an output for forwarding an output signal identifying rotational movement. If this gyroscope output is electrically connected to a first set of contacts 18 on one side surface 20 of the package 13 , and also to a second set of contacts 18 on the bottom surface 22 B, then the first and second sets of contacts 18 each receive substantially identical electrical signals. As such, the first and second sets of contacts 18 are considered to be substantially electrically identical. Accordingly, either the bottom surface 22 B or the side surface 20 may be mounted to an interconnect apparatus 24 , thus providing flexibility in the mounting orientation of the package 13 .
- electrical equivalence does not necessarily require a one-to-one relationship between the contacts 18 of two different sides.
- one side of the package 13 may have a single contact 18 for forwarding a specific signal to, or receiving a specific signal from, internal package components.
- the package 13 may have two or more contacts 18 on another side for providing the same electrical connection (i.e., for forwarding or receiving the same specific signal). These two or more contacts 18 on the other side may be required to receive the entire signal (e.g., each provides a portion of the signal), or both may receive the same signal.
- the package 13 shown in FIG. 1 may be surface mounted to a printed circuit board 24 or related apparatus on one of its side surfaces 20 (see FIG. 4 , discussed below), on its bottom surface 22 B, or on its top surface 22 A (if it has contacts 18 ).
- the application therefore can dictate the ultimate orientation. It should be noted that the number and positioning of contacts 18 can vary depending upon application.
- Illustrative embodiments use conventional surface mounting techniques to secure the package 13 to an underlying interconnect apparatus 24 , such as a printed circuit board 24 .
- an underlying interconnect apparatus 24 such as a printed circuit board 24
- other embodiments may use other techniques for securing the package 13 , such as with solder balls.
- the contacts 18 illustratively are formed as far apart as possible on a given surface.
- the two side surfaces 20 may each have contacts 18 at or near its far corners. In some embodiments, however, the contacts 18 are not at the corners. If the contacts 18 are embedded (discussed below) and flush with the molding material, the side or surface 20 , 22 A or 22 B may provide much of the support.
- FIG. 3 schematically shows a cross-sectional, partially exploded view of the packaged electronic device 10 shown in FIG. 1 along line 3 - 3 .
- This view shows an internal chamber 32 formed by coupling the lid 14 to the base 12 , and the chip 16 mounted therein. Moreover, this view also shows a part of the interior leadframe(s) 26 , its/their extension to the bottom and side surfaces 22 B and 20 , and its/their coupling to the chip 16 via wirebonds 28 .
- this figure shows the interior chamber 32 containing circuitry, such as a chip 16 and/or analog circuitry.
- circuitry such as a chip 16 and/or analog circuitry.
- the chip 16 is discussed. It nevertheless should be recognized that different circuitry (other than, or in addition to the chip 16 ) may be within the chamber 32 .
- the base 12 in this embodiment is a premolded, leadframe cavity-type base, which has four walls 30 extending generally orthogonally from a bottom, interior face to form a cavity.
- the lid 14 also effectively is a premolded, leadframe lid.
- the lid 14 comprises a leadframe 26 encapsulated by molding material.
- the lid 14 also has exposed metal forming contacts 18 and electrically connecting with the leadframe 26 of the base 12 .
- this type of leadframe package 13 shown in FIG. 3 is formed from at least two leadframes 26 . In alternative embodiments, however, the lid 14 does not have a leadframe.
- the lid 14 secures to the top face of the walls 30 to form the interior chamber 32 .
- one or more details 34 in the base 12 may mate with corresponding details 34 formed in the lid 14 .
- the details 34 of the base 12 may be upwardly extending protrusions, while the details 34 of the lid 14 may be corresponding orifices.
- physical connection of the lid 14 and base 12 mechanically and electrically connects the leadframes 26 of the lid 14 and the base 12 .
- the lid 14 and base 12 thus form a premolded, leadframe-type package 13 (also referred to as a “premolded package 13 ”).
- a premolded package has a moldable material (e.g., polymeric material, such as plastic) molded directly to a leadframe.
- a moldable material e.g., polymeric material, such as plastic
- Such package type generally is formed before the chip 16 is secured to it. This package type thus typically is ready to accept the chip 16 without requiring any additional molding operations.
- a premolded, leadframe-type package is ready made to package the electronic chip 16 .
- This is in contrast to certain types of other plastic packages, such as “overmolded” or “post-molded” packages, which apply molten plastic to the chip 16 after it is coupled with leads of its leadframe.
- some embodiments can apply to post-molded and other technologies. For example, among others, some embodiments may apply to ceramic packages or stacked laminated packages using leadframes, vias, or other conductive paths to make appropriate connections.
- FIG. 4 schematically shows the packaged microchip 10 mounted on one of its side surfaces 20 to a printed circuit board 24 .
- the package 13 is coupled to the printed circuit board 24 at or near its corners. It should be noted, however, that some embodiments may mount the package 13 inwardly from its corners.
- the contacts 18 may be any of a plurality of different types of contacts. Among other things, the embodiment shown in FIGS. 1-4 has pads, which are substantially embedded within the molding material of the package 13 . It should be noted that the molding material does not completely encapsulate this type of contact 18 —it must be partially exposed to electrically connect with an interconnect apparatus 24 . For example, the contact 18 may be flush with the mold material. Alternatively, the contact 18 may be somewhat recessed within, or somewhat protruding from, the mold material. In other embodiments, however, the contacts 18 may be pins extending from the package 13 .
- FIG. 5 shows a process of forming the packaged microchip 10 shown in FIG. 1 in accordance with illustrative embodiments of the invention. This process shows various primary steps of a much larger process. Accordingly, those in the art should understand that further steps may be added, or some of the steps shown may be modified or omitted depending upon the application.
- the process begins at step 500 , which processes a pair of leadframes 26 .
- the process stamps, etches, and/or bends, etc . . . a first leadframe 26 for use as the base 12 , and a second leadframe 26 for use as the lid 14 .
- Conventional techniques thus may form the leadframes 26 so that they have the configuration shown in FIG. 3 . More particularly, as shown in FIG. 3 , the leadframes 26 are formed to ensure that the ultimately package 13 has contacts 18 on at least two adjacent surfaces. In addition, the leadframes 26 also are formed to ensure proper electrical communication between the lid 14 and the base 12 .
- the process preferably uses batch processing techniques, which process two-dimensional arrays of leadframes 26 that ultimately are diced. For simplicity, however, the process of FIG. 5 is discussed without application of batch processing techniques.
- step 502 encapsulates the leadframes 26 in a molding material, such as a conventional plastic. Accordingly, after completing this step, the process has formed the primary components of the leadframe package 13 , which includes the lid 14 and base 12 shown in the figures.
- the process may secure the die 16 and circuitry within the base 12 (step 504 ).
- the die 16 may be secured with a conventional adhesive or other apparatus to a die attach pad or similar surface within the cavity of the base 12 .
- Additional circuitry may be added, such as an application-specific integrated circuit (i.e., an ASIC) or a discrete circuit element (e.g., a capacitor).
- the process electrically connects the electrical interfaces of the die 16 with the leadframe 26 of the base 12 (step 506 ).
- the process may connect the wirebonds 28 to specified portions of the leadframe 26 in the base 12 .
- one wirebond 28 connects with a first lead to the left of the die 16 (from the perspective of the drawing), while another wirebond 28 connects with a second lead to the right of the die 16 .
- the lead to the left of the die 16 effectively forms two contacts 18 ; namely, one contact 18 on the bottom surface 22 B and another, electrically equivalent/identical contact 18 on the side surface 20 .
- the lead to the right of the die 16 connects to another contact 18 on the bottom surface 22 B and an exposed metal lead at the top of the base 12 .
- step 508 secures the lid 14 to the base 12 .
- Any conventional means may be used to secure the two together, such as by using an adhesive or an ultrasonic weld.
- the bottom portion of the lid leadframe 26 mechanically contacts the exposed metal at the top of the base 12 . This mechanical contact electrically connects the lead positioned to the right of the die 16 to a second contact 18 on the side surface 20 of the lid 14 .
- discussion of only two contacts 18 is for simplicity only. Actual applications often can have many more contacts 18 .
- the premolded package 13 shown in FIG. 3 thus has substantially electrically identical contact patterns 18 on the bottom surface 22 B and side surface 20 .
- the package 13 may be horizontally mounted (i.e., mounted on its bottom surface 22 B) or vertically mounted (i.e., mounted on its side surface 20 , as shown in FIG. 4 ) to an underlying interconnect apparatus 24 .
- various embodiments of this invention enable a single packaged microchip 10 to perform both functions.
- illustrative embodiments are intended to provide a lower cost, flexible mounting solution in a number of applications.
- test handling equipment and fixturing may be configured to test horizontal parts, which are designed for horizontal mounting.
- test equipment for vertical mounted (packaged) microchips, however, such a test device may not suffice.
- packaged microchips that are to be vertically mounted to be tested in a horizontal orientation.
- the lid 14 can form a cavity rather than, or in addition to the base 12 .
- the package 13 can have adjacent sides/surfaces that are not substantially orthogonal (e.g., see FIG. 1 ), or packages having more or fewer than six sides.
- the package 13 can have angled or curved surfaces between the top surface 22 A and side surface 20 .
- discussion of leadframes as providing the conductive paths and contacts 18 is illustrative.
- leadframes and other conductive members may provide appropriate connections and contacts 18 . Accordingly, those in the art can modify various aspects and still achieve the various advantages of illustrative embodiments.
Abstract
Description
- This patent application claims priority from provisional U.S. patent application No. 60/832,742, filed Jul. 21, 2006, entitled, “PACKAGE HAVING A PLURALITY OF MOUNTING ORIENTATIONS,” and naming Timothy R. Spooner and Nelson Kuan as inventors, the disclosure of which is incorporated herein, in its entirety, by reference.
- The invention generally relates to electronic device packaging and, more particularly, the invention relates to mounting orientations of electronic packages.
- Leadframe based packages commonly are formed to be surface mounted in a horizontal orientation. Specifically, during use, the exterior package surface having the largest surface area (i.e., often referred to as the “bottom side” of the package) typically is surface mounted to a printed circuit board or other similar interconnection apparatus. There are times, however, when this mounting orientation is not optimal. For example, as known by those skilled in the art, an accelerometer often is oriented along a specific axis. As such, it generally requires a specific mounting orientation. The circuit board supporting the accelerometer therefore must be mounted within the underlying device in the correct orientation. Requiring that a circuit board be mounted in a specific orientation can be cumbersome and inefficient.
- In accordance with one embodiment of the invention, a package apparatus has a base coupled with a lid to form a leadframe package. The package has first and second exterior surfaces with respective first and second contact patterns. In illustrative embodiments, the first exterior surface is in a plane that intersects the plane of the second exterior surface (e.g., the two planes are not parallel). The first and second contact patterns are substantially electrically identical to permit the package to be either vertically or horizontally mounted to an underlying apparatus.
- The base and lid illustratively form a premolded leadframe package with a chamber for receiving an integrated circuit. The package apparatus also may have an integrated circuit (e.g., a MEMS device, such as an accelerometer or a gyroscope) secured within the chamber. The integrated circuit may be substantially identically electrically connected with the first contact pattern and the second contact pattern.
- As premolded components, the lid and base include a moldable material. The first contact pattern may have a first plurality of contacts substantially embedded within the moldable material of at least one of the lid and base. Of course, although embedded, the contacts are exposed for mounting to an exterior apparatus. Accordingly, the moldable material does not completely encapsulate the contacts of this embodiment. In a similar manner, the second contact pattern may have a second plurality of contacts substantially embedded within the moldable material of at least one of the lid and base. In some embodiments, the first exterior surface is orthogonal to the second exterior surface.
- In some embodiments, the base has a base leadframe that is in electrical contact with a leadframe embedded by moldable material of the lid. Moreover, the base may have a plurality of walls that form a chamber for receiving an integrated circuit.
- In accordance with another embodiment of the invention, a method of forming a packaged integrated circuit forms at least one leadframe to have a first plurality of contacts and a second plurality of contacts. Next, the method encapsulates a portion of the at least one leadframe within a moldable material to form a base and a lid. After encapsulating, the method secures an integrated circuit to the base, and electrically connects the integrated circuit with the a least one leadframe. Specifically, the integrated circuit substantially identically electrically connects with the first plurality of contacts and the second plurality of contacts. Finally, the method connects the base to the lid to form a premolded package having first and second orthogonal, exterior surfaces. After the package is formed, the first plurality of contacts are on the first exterior surface, while the second plurality of contacts are on the second exterior surface.
- The foregoing advantages of the invention will be appreciated more fully from the following further description thereof with reference to the accompanying drawings wherein:
-
FIG. 1 schematically shows a bottom perspective view of a package configured in accordance with illustrative embodiments of the invention. -
FIG. 2 schematically shows a bottom perspective view of another package configured in accordance with illustrative embodiments of the invention. -
FIG. 3 schematically shows a cross-sectional, partially exploded view of the package shown inFIG. 1 along line 3-3. -
FIG. 4 schematically shows the package ofFIG. 1 coupled with a printed circuit board. -
FIG. 5 shows a process of forming the packaged microchip shown inFIG. 1 in accordance with illustrative embodiments of the invention. - In illustrative embodiments of the invention, a premolded leadframe package has at least two, non-parallel exterior sides with substantially electrically identical contact patterns. Accordingly, such a package is capable of being mounted in at least two different orientations (e.g., on its side surface or on its bottom surface). Designers thus can orient the package to the requirements of a particular application—they no longer are limited to orienting the printed circuit board only. Details of various embodiments are discussed below.
-
FIG. 1 schematically shows a bottom, perspective view of a packaged electronic device 10 (also referred to as a “packagedmicrochip 10”) configured in accordance with illustrative embodiments of the invention. Among other things, the packagedelectronic device 10 can contain an integrated circuit chip, such as an ASIC or a MEMS device (seeFIG. 3 , discussed below). For example, if a MEMS device, the packagedelectronic device 10 can function as an inertial sensor, such as an accelerometer or gyroscope, or as a transducer, such as a microphone or microspeaker. - The packaged
electronic device 10 shown inFIG. 1 has a base 12 that, together with acorresponding lid 14, forms a premolded leadframe package 13 for containing circuitry, such as the above noted integrated circuit chips and/or other circuitry. In a manner similar to many other types of packages, the leadframe package 13 of this embodiment has a generally rectangular cross-sectional shape with six sides; namely, atop surface 22A, abottom surface 22B and fourside surfaces 20. The top andbottom surfaces side surfaces 20. As shown, some of thesurfaces FIG. 1 , at least two generally nonparallel (e.g., orthogonal)surfaces - For example, one
side surface 20 may have afirst contact pattern 18, while thebottom surface 22B may have asecond contact pattern 18. In accordance with illustrative embodiments of the invention, thefirst contact pattern 18 on theside surface 20 may be substantially electrically equivalent to thesecond contact pattern 18 on thebottom surface 22B. Among other ways, each contact (also identified by reference number “18”) of thefirst contact pattern 18 may have a corresponding, electricallyequivalent contact 18 on thesecond contact pattern 18. Alternatively, one contact 18 (or more contacts 18) on thefirst contact pattern 18 may have multiple corresponding, electricallyequivalent contacts 18 on thesecond contact pattern 18. Accordingly, in this example, the package 13 may mount to an underlying interconnect apparatus 24 (seeFIG. 4 , discussed below) either on itsside surface 20, or on itsbottom surface 22B. - A set of one or
more contacts 18 may be considered to be substantially electrically identical or equivalent with another set of one ormore contacts 18 on another surface when either set may be used to make the same electrical connection with the internal circuitry of the package 13. For example, the internal chip may be a gyroscope having an output for forwarding an output signal identifying rotational movement. If this gyroscope output is electrically connected to a first set ofcontacts 18 on oneside surface 20 of the package 13, and also to a second set ofcontacts 18 on thebottom surface 22B, then the first and second sets ofcontacts 18 each receive substantially identical electrical signals. As such, the first and second sets ofcontacts 18 are considered to be substantially electrically identical. Accordingly, either thebottom surface 22B or theside surface 20 may be mounted to aninterconnect apparatus 24, thus providing flexibility in the mounting orientation of the package 13. - As noted above, electrical equivalence does not necessarily require a one-to-one relationship between the
contacts 18 of two different sides. For example, one side of the package 13 may have asingle contact 18 for forwarding a specific signal to, or receiving a specific signal from, internal package components. The package 13, however, may have two ormore contacts 18 on another side for providing the same electrical connection (i.e., for forwarding or receiving the same specific signal). These two ormore contacts 18 on the other side may be required to receive the entire signal (e.g., each provides a portion of the signal), or both may receive the same signal. - Accordingly, the package 13 shown in
FIG. 1 may be surface mounted to a printedcircuit board 24 or related apparatus on one of its side surfaces 20 (seeFIG. 4 , discussed below), on itsbottom surface 22B, or on itstop surface 22A (if it has contacts 18). The application therefore can dictate the ultimate orientation. It should be noted that the number and positioning ofcontacts 18 can vary depending upon application. - Illustrative embodiments use conventional surface mounting techniques to secure the package 13 to an
underlying interconnect apparatus 24, such as a printedcircuit board 24. Of course, other embodiments may use other techniques for securing the package 13, such as with solder balls. - To improve stability, the
contacts 18 illustratively are formed as far apart as possible on a given surface. For example, the twoside surfaces 20 may each havecontacts 18 at or near its far corners. In some embodiments, however, thecontacts 18 are not at the corners. If thecontacts 18 are embedded (discussed below) and flush with the molding material, the side orsurface - It should be noted that discussion of adjacent sides or orthogonal sides and the relationship of
contact patterns 18 is illustrative of several embodiments only. Such embodiments necessarily fall under the general characterization of being two non-parallel sides. In other words, at least one side having the notedcontact pattern 18 is in a plane that intersects the plane of the other side (having the electrically identical contact pattern 18). Moreover, as shown inFIG. 2 , some of these non-parallel sides are not necessarily on adjacent sides (i.e.,FIG. 2 shows intermediate sides 22C that are between theprimary sides -
FIG. 3 schematically shows a cross-sectional, partially exploded view of the packagedelectronic device 10 shown inFIG. 1 along line 3-3. This view shows an internal chamber 32 formed by coupling thelid 14 to the base 12, and thechip 16 mounted therein. Moreover, this view also shows a part of the interior leadframe(s) 26, its/their extension to the bottom andside surfaces chip 16 via wirebonds 28. - Specifically, this figure shows the interior chamber 32 containing circuitry, such as a
chip 16 and/or analog circuitry. For simplicity, only thechip 16 is discussed. It nevertheless should be recognized that different circuitry (other than, or in addition to the chip 16) may be within the chamber 32. - The base 12 in this embodiment is a premolded, leadframe cavity-type base, which has four walls 30 extending generally orthogonally from a bottom, interior face to form a cavity. In a similar manner, the
lid 14 also effectively is a premolded, leadframe lid. In other words, thelid 14 comprises aleadframe 26 encapsulated by molding material. Like the base 12, thelid 14 also has exposedmetal forming contacts 18 and electrically connecting with theleadframe 26 of the base 12. Accordingly, this type of leadframe package 13 shown inFIG. 3 is formed from at least twoleadframes 26. In alternative embodiments, however, thelid 14 does not have a leadframe. - The
lid 14 secures to the top face of the walls 30 to form the interior chamber 32. To ensure a proper physical connection, one or more details 34 in the base 12 may mate with corresponding details 34 formed in thelid 14. For example, the details 34 of the base 12 may be upwardly extending protrusions, while the details 34 of thelid 14 may be corresponding orifices. As noted above, physical connection of thelid 14 and base 12 mechanically and electrically connects theleadframes 26 of thelid 14 and the base 12. Thelid 14 and base 12 thus form a premolded, leadframe-type package 13 (also referred to as a “premolded package 13”). - As known by those in the art, a premolded package has a moldable material (e.g., polymeric material, such as plastic) molded directly to a leadframe. Such package type generally is formed before the
chip 16 is secured to it. This package type thus typically is ready to accept thechip 16 without requiring any additional molding operations. In other words, a premolded, leadframe-type package is ready made to package theelectronic chip 16. This is in contrast to certain types of other plastic packages, such as “overmolded” or “post-molded” packages, which apply molten plastic to thechip 16 after it is coupled with leads of its leadframe. It nevertheless is anticipated that some embodiments can apply to post-molded and other technologies. For example, among others, some embodiments may apply to ceramic packages or stacked laminated packages using leadframes, vias, or other conductive paths to make appropriate connections. -
FIG. 4 schematically shows the packagedmicrochip 10 mounted on one of its side surfaces 20 to a printedcircuit board 24. As shown, to improve mechanical stability, the package 13 is coupled to the printedcircuit board 24 at or near its corners. It should be noted, however, that some embodiments may mount the package 13 inwardly from its corners. - The
contacts 18 may be any of a plurality of different types of contacts. Among other things, the embodiment shown inFIGS. 1-4 has pads, which are substantially embedded within the molding material of the package 13. It should be noted that the molding material does not completely encapsulate this type ofcontact 18—it must be partially exposed to electrically connect with aninterconnect apparatus 24. For example, thecontact 18 may be flush with the mold material. Alternatively, thecontact 18 may be somewhat recessed within, or somewhat protruding from, the mold material. In other embodiments, however, thecontacts 18 may be pins extending from the package 13. -
FIG. 5 shows a process of forming the packagedmicrochip 10 shown inFIG. 1 in accordance with illustrative embodiments of the invention. This process shows various primary steps of a much larger process. Accordingly, those in the art should understand that further steps may be added, or some of the steps shown may be modified or omitted depending upon the application. - The process begins at step 500, which processes a pair of
leadframes 26. Specifically, the process stamps, etches, and/or bends, etc . . . afirst leadframe 26 for use as the base 12, and asecond leadframe 26 for use as thelid 14. Conventional techniques thus may form theleadframes 26 so that they have the configuration shown inFIG. 3 . More particularly, as shown inFIG. 3 , theleadframes 26 are formed to ensure that the ultimately package 13 hascontacts 18 on at least two adjacent surfaces. In addition, theleadframes 26 also are formed to ensure proper electrical communication between thelid 14 and the base 12. - To improve fabrication efficiency, the process preferably uses batch processing techniques, which process two-dimensional arrays of
leadframes 26 that ultimately are diced. For simplicity, however, the process ofFIG. 5 is discussed without application of batch processing techniques. - The process continues to step 502, which encapsulates the
leadframes 26 in a molding material, such as a conventional plastic. Accordingly, after completing this step, the process has formed the primary components of the leadframe package 13, which includes thelid 14 and base 12 shown in the figures. - At this point, the process may secure the
die 16 and circuitry within the base 12 (step 504). For example, thedie 16 may be secured with a conventional adhesive or other apparatus to a die attach pad or similar surface within the cavity of the base 12. Additional circuitry may be added, such as an application-specific integrated circuit (i.e., an ASIC) or a discrete circuit element (e.g., a capacitor). - After securing the
die 16, the process electrically connects the electrical interfaces of the die 16 with theleadframe 26 of the base 12 (step 506). To that end, the process may connect the wirebonds 28 to specified portions of theleadframe 26 in the base 12. For example, in thesimplified device 10 shown inFIG. 3 , one wirebond 28 connects with a first lead to the left of the die 16 (from the perspective of the drawing), while another wirebond 28 connects with a second lead to the right of thedie 16. The lead to the left of the die 16 effectively forms twocontacts 18; namely, onecontact 18 on thebottom surface 22B and another, electrically equivalent/identical contact 18 on theside surface 20. The lead to the right of the die 16 connects to anothercontact 18 on thebottom surface 22B and an exposed metal lead at the top of the base 12. - The process then concludes at step 508, which secures the
lid 14 to the base 12. Any conventional means may be used to secure the two together, such as by using an adhesive or an ultrasonic weld. For the embodiment shown inFIG. 3 , the bottom portion of thelid leadframe 26 mechanically contacts the exposed metal at the top of the base 12. This mechanical contact electrically connects the lead positioned to the right of the die 16 to asecond contact 18 on theside surface 20 of thelid 14. Of course, discussion of only twocontacts 18 is for simplicity only. Actual applications often can have manymore contacts 18. - The premolded package 13 shown in
FIG. 3 thus has substantially electricallyidentical contact patterns 18 on thebottom surface 22B andside surface 20. In other words, the package 13 may be horizontally mounted (i.e., mounted on itsbottom surface 22B) or vertically mounted (i.e., mounted on itsside surface 20, as shown inFIG. 4 ) to anunderlying interconnect apparatus 24. Accordingly, rather than requiring a chip manufacturer to produce one packaged microchip for vertical mounting, and a second, different packaged microchip with identical functionality for horizontal mounting, various embodiments of this invention enable a single packagedmicrochip 10 to perform both functions. - In addition to providing more flexibility for mounting the packaged
microchip 10, using leadframe package technology as discussed should significantly reduce device cost when compared to many other packaging technologies, such as ceramic package technology. Accordingly, illustrative embodiments are intended to provide a lower cost, flexible mounting solution in a number of applications. - Moreover, various embodiments permit additional uses. For example, some test handling equipment and fixturing may be configured to test horizontal parts, which are designed for horizontal mounting. For vertical mounted (packaged) microchips, however, such a test device may not suffice. Various embodiments, however, permit packaged microchips that are to be vertically mounted to be tested in a horizontal orientation.
- Although the above discussion discloses various exemplary embodiments of the invention, it should be apparent that those skilled in the art can make various modifications that will achieve some of the advantages of the invention without departing from the true scope of the invention. For example, the
lid 14 can form a cavity rather than, or in addition to the base 12. As another example, the package 13 can have adjacent sides/surfaces that are not substantially orthogonal (e.g., seeFIG. 1 ), or packages having more or fewer than six sides. For example, the package 13 can have angled or curved surfaces between thetop surface 22A andside surface 20. Moreover, discussion of leadframes as providing the conductive paths andcontacts 18 is illustrative. For example, leadframes and other conductive members (e.g., vias) may provide appropriate connections andcontacts 18. Accordingly, those in the art can modify various aspects and still achieve the various advantages of illustrative embodiments.
Claims (21)
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8841738B2 (en) | 2012-10-01 | 2014-09-23 | Invensense, Inc. | MEMS microphone system for harsh environments |
US9215519B2 (en) | 2010-07-30 | 2015-12-15 | Invensense, Inc. | Reduced footprint microphone system with spacer member having through-hole |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7838974B2 (en) * | 2007-09-13 | 2010-11-23 | National Semiconductor Corporation | Intergrated circuit packaging with improved die bonding |
US8138027B2 (en) * | 2008-03-07 | 2012-03-20 | Stats Chippac, Ltd. | Optical semiconductor device having pre-molded leadframe with window and method therefor |
US8193620B2 (en) * | 2010-02-17 | 2012-06-05 | Analog Devices, Inc. | Integrated circuit package with enlarged die paddle |
US20120025337A1 (en) * | 2010-07-28 | 2012-02-02 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd | Mems transducer device having stress mitigation structure and method of fabricating the same |
US8749036B2 (en) | 2012-11-09 | 2014-06-10 | Analog Devices, Inc. | Microchip with blocking apparatus and method of fabricating microchip |
US9676614B2 (en) | 2013-02-01 | 2017-06-13 | Analog Devices, Inc. | MEMS device with stress relief structures |
EP2947692B1 (en) | 2013-12-20 | 2020-09-23 | Analog Devices, Inc. | Integrated device die and package with stress reduction features |
US10167189B2 (en) | 2014-09-30 | 2019-01-01 | Analog Devices, Inc. | Stress isolation platform for MEMS devices |
DE102014119396A1 (en) * | 2014-12-22 | 2016-06-23 | Endress + Hauser Gmbh + Co. Kg | Pressure measuring device |
US20160181180A1 (en) * | 2014-12-23 | 2016-06-23 | Texas Instruments Incorporated | Packaged semiconductor device having attached chips overhanging the assembly pad |
US10287161B2 (en) | 2015-07-23 | 2019-05-14 | Analog Devices, Inc. | Stress isolation features for stacked dies |
US10131538B2 (en) | 2015-09-14 | 2018-11-20 | Analog Devices, Inc. | Mechanically isolated MEMS device |
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US10446414B2 (en) | 2017-12-22 | 2019-10-15 | Texas Instruments Incorporated | Semiconductor package with filler particles in a mold compound |
US11127716B2 (en) | 2018-04-12 | 2021-09-21 | Analog Devices International Unlimited Company | Mounting structures for integrated device packages |
KR20210058165A (en) * | 2019-11-13 | 2021-05-24 | 삼성전자주식회사 | Semiconductor package |
US11417611B2 (en) | 2020-02-25 | 2022-08-16 | Analog Devices International Unlimited Company | Devices and methods for reducing stress on circuit components |
EP3929540A1 (en) * | 2020-06-26 | 2021-12-29 | TE Connectivity Norge AS | Attachment system for attaching a sensor to a substrate, method of attaching a sensor to a substrate |
US11664340B2 (en) | 2020-07-13 | 2023-05-30 | Analog Devices, Inc. | Negative fillet for mounting an integrated device die to a carrier |
Citations (95)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3839660A (en) * | 1973-02-05 | 1974-10-01 | Gen Motors Corp | Power semiconductor device package |
US4492825A (en) * | 1982-07-28 | 1985-01-08 | At&T Bell Laboratories | Electroacoustic transducer |
US4524247A (en) * | 1983-07-07 | 1985-06-18 | At&T Bell Laboratories | Integrated electroacoustic transducer with built-in bias |
US4533795A (en) * | 1983-07-07 | 1985-08-06 | American Telephone And Telegraph | Integrated electroacoustic transducer |
US4558184A (en) * | 1983-02-24 | 1985-12-10 | At&T Bell Laboratories | Integrated capacitive transducer |
US4710744A (en) * | 1985-04-08 | 1987-12-01 | Honeywell Inc. | Pressure transducer package |
US4740410A (en) * | 1987-05-28 | 1988-04-26 | The Regents Of The University Of California | Micromechanical elements and methods for their fabrication |
US4744863A (en) * | 1985-04-26 | 1988-05-17 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US4776019A (en) * | 1986-05-31 | 1988-10-04 | Horiba, Ltd. | Diaphragm for use in condenser microphone type detector |
US4800758A (en) * | 1986-06-23 | 1989-01-31 | Rosemount Inc. | Pressure transducer with stress isolation for hard mounting |
US4825335A (en) * | 1988-03-14 | 1989-04-25 | Endevco Corporation | Differential capacitive transducer and method of making |
US4853669A (en) * | 1985-04-26 | 1989-08-01 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US4872047A (en) * | 1986-11-07 | 1989-10-03 | Olin Corporation | Semiconductor die attach system |
US4918032A (en) * | 1988-04-13 | 1990-04-17 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US4948757A (en) * | 1987-04-13 | 1990-08-14 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US4996082A (en) * | 1985-04-26 | 1991-02-26 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US5067007A (en) * | 1988-06-13 | 1991-11-19 | Hitachi, Ltd. | Semiconductor device having leads for mounting to a surface of a printed circuit board |
US5090254A (en) * | 1990-04-11 | 1992-02-25 | Wisconsin Alumni Research Foundation | Polysilicon resonating beam transducers |
US5105258A (en) * | 1990-11-21 | 1992-04-14 | Motorola, Inc. | Metal system for semiconductor die attach |
US5113466A (en) * | 1991-04-25 | 1992-05-12 | At&T Bell Laboratories | Molded optical packaging arrangement |
US5146435A (en) * | 1989-12-04 | 1992-09-08 | The Charles Stark Draper Laboratory, Inc. | Acoustic transducer |
US5172213A (en) * | 1991-05-23 | 1992-12-15 | At&T Bell Laboratories | Molded circuit package having heat dissipating post |
US5178015A (en) * | 1991-07-22 | 1993-01-12 | Monolithic Sensors Inc. | Silicon-on-silicon differential input sensors |
US5188983A (en) * | 1990-04-11 | 1993-02-23 | Wisconsin Alumni Research Foundation | Polysilicon resonating beam transducers and method of producing the same |
US5207102A (en) * | 1991-02-12 | 1993-05-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor pressure sensor |
US5241133A (en) * | 1990-12-21 | 1993-08-31 | Motorola, Inc. | Leadless pad array chip carrier |
US5303210A (en) * | 1992-10-29 | 1994-04-12 | The Charles Stark Draper Laboratory, Inc. | Integrated resonant cavity acoustic transducer |
US5314572A (en) * | 1990-08-17 | 1994-05-24 | Analog Devices, Inc. | Method for fabricating microstructures |
US5315155A (en) * | 1992-07-13 | 1994-05-24 | Olin Corporation | Electronic package with stress relief channel |
US5317107A (en) * | 1992-09-24 | 1994-05-31 | Motorola, Inc. | Shielded stripline configuration semiconductor device and method for making the same |
US5336928A (en) * | 1992-09-18 | 1994-08-09 | General Electric Company | Hermetically sealed packaged electronic system |
US5452268A (en) * | 1994-08-12 | 1995-09-19 | The Charles Stark Draper Laboratory, Inc. | Acoustic transducer with improved low frequency response |
US5468999A (en) * | 1994-05-26 | 1995-11-21 | Motorola, Inc. | Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding |
US5490220A (en) * | 1992-03-18 | 1996-02-06 | Knowles Electronics, Inc. | Solid state condenser and microphone devices |
US5515732A (en) * | 1992-09-01 | 1996-05-14 | Rosemount Inc. | Capacitive pressure sensor and reference with stress isolating pedestal |
US5593926A (en) * | 1993-10-12 | 1997-01-14 | Sumitomo Electric Industries, Ltd. | Method of manufacturing semiconductor device |
US5596222A (en) * | 1994-08-12 | 1997-01-21 | The Charles Stark Draper Laboratory, Inc. | Wafer of transducer chips |
US5608265A (en) * | 1993-03-17 | 1997-03-04 | Hitachi, Ltd. | Encapsulated semiconductor device package having holes for electrically conductive material |
US5629566A (en) * | 1994-08-15 | 1997-05-13 | Kabushiki Kaisha Toshiba | Flip-chip semiconductor devices having two encapsulants |
US5633552A (en) * | 1993-06-04 | 1997-05-27 | The Regents Of The University Of California | Cantilever pressure transducer |
US5658710A (en) * | 1993-07-16 | 1997-08-19 | Adagio Associates, Inc. | Method of making superhard mechanical microstructures |
US5692060A (en) * | 1995-05-01 | 1997-11-25 | Knowles Electronics, Inc. | Unidirectional microphone |
US5740261A (en) * | 1996-11-21 | 1998-04-14 | Knowles Electronics, Inc. | Miniature silicon condenser microphone |
US5828127A (en) * | 1994-11-15 | 1998-10-27 | Sumitomo Electric Industries, Ltd. | Semiconductor substate with improved thermal conductivity |
US5870482A (en) * | 1997-02-25 | 1999-02-09 | Knowles Electronics, Inc. | Miniature silicon condenser microphone |
US5901046A (en) * | 1996-12-10 | 1999-05-04 | Denso Corporation | Surface mount type package unit and method for manufacturing the same |
US5923995A (en) * | 1997-04-18 | 1999-07-13 | National Semiconductor Corporation | Methods and apparatuses for singulation of microelectromechanical systems |
US5939633A (en) * | 1997-06-18 | 1999-08-17 | Analog Devices, Inc. | Apparatus and method for multi-axis capacitive sensing |
US5945605A (en) * | 1997-11-19 | 1999-08-31 | Sensym, Inc. | Sensor assembly with sensor boss mounted on substrate |
US5956292A (en) * | 1995-04-13 | 1999-09-21 | The Charles Stark Draper Laboratory, Inc. | Monolithic micromachined piezoelectric acoustic transducer and transducer array and method of making same |
US5960093A (en) * | 1998-03-30 | 1999-09-28 | Knowles Electronics, Inc. | Miniature transducer |
US5994161A (en) * | 1997-09-03 | 1999-11-30 | Motorola, Inc. | Temperature coefficient of offset adjusted semiconductor device and method thereof |
US6084292A (en) * | 1997-08-19 | 2000-07-04 | Mitsubishi Denki Kabushiki Kaisha | Lead frame and semiconductor device using the lead frame |
US6128961A (en) * | 1995-12-24 | 2000-10-10 | Haronian; Dan | Micro-electro-mechanics systems (MEMS) |
US6169328B1 (en) * | 1994-09-20 | 2001-01-02 | Tessera, Inc | Semiconductor chip assembly |
US6243474B1 (en) * | 1996-04-18 | 2001-06-05 | California Institute Of Technology | Thin film electret microphone |
US6249075B1 (en) * | 1999-11-18 | 2001-06-19 | Lucent Technologies Inc. | Surface micro-machined acoustic transducers |
US6309915B1 (en) * | 1998-02-05 | 2001-10-30 | Tessera, Inc. | Semiconductor chip package with expander ring and method of making same |
US6384472B1 (en) * | 2000-03-24 | 2002-05-07 | Siliconware Precision Industries Co., Ltd | Leadless image sensor package structure and method for making the same |
US6384473B1 (en) * | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
US6401545B1 (en) * | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
US20020102004A1 (en) * | 2000-11-28 | 2002-08-01 | Minervini Anthony D. | Miniature silicon condenser microphone and method for producing same |
US20020125559A1 (en) * | 2001-03-06 | 2002-09-12 | Mclellan Neil | Enhanced leadless chip carrier |
US6505511B1 (en) * | 1997-09-02 | 2003-01-14 | Analog Devices, Inc. | Micromachined gyros |
US20030016839A1 (en) * | 2001-07-20 | 2003-01-23 | Loeppert Peter V. | Raised microstructure of silicon based device |
US6522762B1 (en) * | 1999-09-07 | 2003-02-18 | Microtronic A/S | Silicon-based sensor system |
US6535460B2 (en) * | 2000-08-11 | 2003-03-18 | Knowles Electronics, Llc | Miniature broadband acoustic transducer |
US6548895B1 (en) * | 2001-02-21 | 2003-04-15 | Sandia Corporation | Packaging of electro-microfluidic devices |
US6552469B1 (en) * | 1998-06-05 | 2003-04-22 | Knowles Electronics, Llc | Solid state transducer for converting between an electrical signal and sound |
US20030133588A1 (en) * | 2001-11-27 | 2003-07-17 | Michael Pedersen | Miniature condenser microphone and fabrication method therefor |
US6617683B2 (en) * | 2001-09-28 | 2003-09-09 | Intel Corporation | Thermal performance in flip chip/integral heat spreader packages using low modulus thermal interface material |
US20030189222A1 (en) * | 2002-04-01 | 2003-10-09 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
US6677176B2 (en) * | 2002-01-18 | 2004-01-13 | The Hong Kong University Of Science And Technology | Method of manufacturing an integrated electronic microphone having a floating gate electrode |
US20040041254A1 (en) * | 2002-09-04 | 2004-03-04 | Lewis Long | Packaged microchip |
US6704427B2 (en) * | 2000-02-24 | 2004-03-09 | Knowles Electronics, Llc | Acoustic transducer with improved acoustic damper |
US20040056337A1 (en) * | 2000-12-28 | 2004-03-25 | Hitachi, Ltd. And Hitachi Hokkai Semiconductor, Ltd. | Semiconductor device |
US6732588B1 (en) * | 1999-09-07 | 2004-05-11 | Sonionmems A/S | Pressure transducer |
US6741709B2 (en) * | 2000-12-20 | 2004-05-25 | Shure Incorporated | Condenser microphone assembly |
US6753583B2 (en) * | 2000-08-24 | 2004-06-22 | Fachhochschule | Electrostatic electroacoustical transducer |
US6768196B2 (en) * | 2002-09-04 | 2004-07-27 | Analog Devices, Inc. | Packaged microchip with isolation |
US6781231B2 (en) * | 2002-09-10 | 2004-08-24 | Knowles Electronics Llc | Microelectromechanical system package with environmental and interference shield |
US20040179705A1 (en) * | 2002-09-13 | 2004-09-16 | Zhe Wang | High performance silicon condenser microphone with perforated single crystal silicon backplate |
US20040184632A1 (en) * | 2003-02-28 | 2004-09-23 | Minervini Anthony D. | Acoustic transducer module |
US6812620B2 (en) * | 2000-12-22 | 2004-11-02 | Bruel & Kjaer Sound & Vibration Measurement A/S | Micromachined capacitive electrical component |
US6816301B1 (en) * | 1999-06-29 | 2004-11-09 | Regents Of The University Of Minnesota | Micro-electromechanical devices and methods of manufacture |
US6847090B2 (en) * | 2001-01-24 | 2005-01-25 | Knowles Electronics, Llc | Silicon capacitive microphone |
US20050018864A1 (en) * | 2000-11-28 | 2005-01-27 | Knowles Electronics, Llc | Silicon condenser microphone and manufacturing method |
US6859542B2 (en) * | 2001-05-31 | 2005-02-22 | Sonion Lyngby A/S | Method of providing a hydrophobic layer and a condenser microphone having such a layer |
US6857312B2 (en) * | 2001-06-15 | 2005-02-22 | Textron Systems Corporation | Systems and methods for sensing an acoustic signal using microelectromechanical systems technology |
US20050089188A1 (en) * | 2003-10-24 | 2005-04-28 | Feng Jen N. | High performance capacitor microphone and manufacturing method thereof |
US20050093117A1 (en) * | 2003-04-11 | 2005-05-05 | Dai Nippon Printing Co., Ltd. | Plastic package and method of fabricating the same |
US6914992B1 (en) * | 1998-07-02 | 2005-07-05 | Sonion Nederland B.V. | System consisting of a microphone and a preamplifier |
US6984886B2 (en) * | 2000-03-02 | 2006-01-10 | Micron Technology, Inc. | System-on-a-chip with multi-layered metallized through-hole interconnection |
US7166911B2 (en) * | 2002-09-04 | 2007-01-23 | Analog Devices, Inc. | Packaged microchip with premolded-type package |
US20070040231A1 (en) * | 2005-08-16 | 2007-02-22 | Harney Kieran P | Partially etched leadframe packages having different top and bottom topologies |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6077434A (en) | 1983-10-04 | 1985-05-02 | Mitsubishi Electric Corp | Semiconductor device |
US4668338A (en) | 1985-12-30 | 1987-05-26 | Applied Materials, Inc. | Magnetron-enhanced plasma etching process |
DE4107658A1 (en) | 1991-03-09 | 1992-09-17 | Bosch Gmbh Robert | ASSEMBLY METHOD FOR MICROMECHANICAL SENSORS |
JPH05226501A (en) | 1992-02-08 | 1993-09-03 | Nissan Motor Co Ltd | Semiconductor chip mounting substrate structure |
JPH07142518A (en) | 1993-11-17 | 1995-06-02 | Hitachi Ltd | Lead frame, semiconductor chip, and semiconductor device |
JPH08116007A (en) | 1994-10-13 | 1996-05-07 | Nec Corp | Semiconductor device |
JP2842355B2 (en) * | 1996-02-01 | 1999-01-06 | 日本電気株式会社 | package |
KR100335480B1 (en) | 1999-08-24 | 2002-05-04 | 김덕중 | Leadframe using chip pad as heat spreading path and semiconductor package thereof |
US6829131B1 (en) | 1999-09-13 | 2004-12-07 | Carnegie Mellon University | MEMS digital-to-acoustic transducer with error cancellation |
JP2002005951A (en) | 2000-06-26 | 2002-01-09 | Denso Corp | Semiconductor dynamical quantity sensor and its manufacturing method |
US6570259B2 (en) | 2001-03-22 | 2003-05-27 | International Business Machines Corporation | Apparatus to reduce thermal fatigue stress on flip chip solder connections |
US20040262781A1 (en) * | 2003-06-27 | 2004-12-30 | Semiconductor Components Industries, Llc | Method for forming an encapsulated device and structure |
US7262491B2 (en) * | 2005-09-06 | 2007-08-28 | Advanced Interconnect Technologies Limited | Die pad for semiconductor packages and methods of making and using same |
-
2007
- 2007-06-28 US US11/770,369 patent/US8344487B2/en active Active
- 2007-06-28 WO PCT/US2007/072381 patent/WO2008003051A2/en active Application Filing
Patent Citations (99)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3839660A (en) * | 1973-02-05 | 1974-10-01 | Gen Motors Corp | Power semiconductor device package |
US4492825A (en) * | 1982-07-28 | 1985-01-08 | At&T Bell Laboratories | Electroacoustic transducer |
US4558184A (en) * | 1983-02-24 | 1985-12-10 | At&T Bell Laboratories | Integrated capacitive transducer |
US4524247A (en) * | 1983-07-07 | 1985-06-18 | At&T Bell Laboratories | Integrated electroacoustic transducer with built-in bias |
US4533795A (en) * | 1983-07-07 | 1985-08-06 | American Telephone And Telegraph | Integrated electroacoustic transducer |
US4710744A (en) * | 1985-04-08 | 1987-12-01 | Honeywell Inc. | Pressure transducer package |
US4996082A (en) * | 1985-04-26 | 1991-02-26 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US4853669A (en) * | 1985-04-26 | 1989-08-01 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US4744863A (en) * | 1985-04-26 | 1988-05-17 | Wisconsin Alumni Research Foundation | Sealed cavity semiconductor pressure transducers and method of producing the same |
US4776019A (en) * | 1986-05-31 | 1988-10-04 | Horiba, Ltd. | Diaphragm for use in condenser microphone type detector |
US4800758A (en) * | 1986-06-23 | 1989-01-31 | Rosemount Inc. | Pressure transducer with stress isolation for hard mounting |
US4872047A (en) * | 1986-11-07 | 1989-10-03 | Olin Corporation | Semiconductor die attach system |
US4948757A (en) * | 1987-04-13 | 1990-08-14 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US4740410A (en) * | 1987-05-28 | 1988-04-26 | The Regents Of The University Of California | Micromechanical elements and methods for their fabrication |
US4825335A (en) * | 1988-03-14 | 1989-04-25 | Endevco Corporation | Differential capacitive transducer and method of making |
US4918032A (en) * | 1988-04-13 | 1990-04-17 | General Motors Corporation | Method for fabricating three-dimensional microstructures and a high-sensitivity integrated vibration sensor using such microstructures |
US5067007A (en) * | 1988-06-13 | 1991-11-19 | Hitachi, Ltd. | Semiconductor device having leads for mounting to a surface of a printed circuit board |
US5146435A (en) * | 1989-12-04 | 1992-09-08 | The Charles Stark Draper Laboratory, Inc. | Acoustic transducer |
US5090254A (en) * | 1990-04-11 | 1992-02-25 | Wisconsin Alumni Research Foundation | Polysilicon resonating beam transducers |
US5188983A (en) * | 1990-04-11 | 1993-02-23 | Wisconsin Alumni Research Foundation | Polysilicon resonating beam transducers and method of producing the same |
US5314572A (en) * | 1990-08-17 | 1994-05-24 | Analog Devices, Inc. | Method for fabricating microstructures |
US5105258A (en) * | 1990-11-21 | 1992-04-14 | Motorola, Inc. | Metal system for semiconductor die attach |
US5241133A (en) * | 1990-12-21 | 1993-08-31 | Motorola, Inc. | Leadless pad array chip carrier |
US5207102A (en) * | 1991-02-12 | 1993-05-04 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor pressure sensor |
US5113466A (en) * | 1991-04-25 | 1992-05-12 | At&T Bell Laboratories | Molded optical packaging arrangement |
US5172213A (en) * | 1991-05-23 | 1992-12-15 | At&T Bell Laboratories | Molded circuit package having heat dissipating post |
US5178015A (en) * | 1991-07-22 | 1993-01-12 | Monolithic Sensors Inc. | Silicon-on-silicon differential input sensors |
US5490220A (en) * | 1992-03-18 | 1996-02-06 | Knowles Electronics, Inc. | Solid state condenser and microphone devices |
US5315155A (en) * | 1992-07-13 | 1994-05-24 | Olin Corporation | Electronic package with stress relief channel |
US5515732A (en) * | 1992-09-01 | 1996-05-14 | Rosemount Inc. | Capacitive pressure sensor and reference with stress isolating pedestal |
US5336928A (en) * | 1992-09-18 | 1994-08-09 | General Electric Company | Hermetically sealed packaged electronic system |
US5317107A (en) * | 1992-09-24 | 1994-05-31 | Motorola, Inc. | Shielded stripline configuration semiconductor device and method for making the same |
US5303210A (en) * | 1992-10-29 | 1994-04-12 | The Charles Stark Draper Laboratory, Inc. | Integrated resonant cavity acoustic transducer |
US5608265A (en) * | 1993-03-17 | 1997-03-04 | Hitachi, Ltd. | Encapsulated semiconductor device package having holes for electrically conductive material |
US5633552A (en) * | 1993-06-04 | 1997-05-27 | The Regents Of The University Of California | Cantilever pressure transducer |
US5658710A (en) * | 1993-07-16 | 1997-08-19 | Adagio Associates, Inc. | Method of making superhard mechanical microstructures |
US5593926A (en) * | 1993-10-12 | 1997-01-14 | Sumitomo Electric Industries, Ltd. | Method of manufacturing semiconductor device |
US5468999A (en) * | 1994-05-26 | 1995-11-21 | Motorola, Inc. | Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding |
US5596222A (en) * | 1994-08-12 | 1997-01-21 | The Charles Stark Draper Laboratory, Inc. | Wafer of transducer chips |
US5452268A (en) * | 1994-08-12 | 1995-09-19 | The Charles Stark Draper Laboratory, Inc. | Acoustic transducer with improved low frequency response |
US5684324A (en) * | 1994-08-12 | 1997-11-04 | The Charles Draper Laboratory, Inc. | Acoustic transducer chip |
US5629566A (en) * | 1994-08-15 | 1997-05-13 | Kabushiki Kaisha Toshiba | Flip-chip semiconductor devices having two encapsulants |
US6169328B1 (en) * | 1994-09-20 | 2001-01-02 | Tessera, Inc | Semiconductor chip assembly |
US5828127A (en) * | 1994-11-15 | 1998-10-27 | Sumitomo Electric Industries, Ltd. | Semiconductor substate with improved thermal conductivity |
US5956292A (en) * | 1995-04-13 | 1999-09-21 | The Charles Stark Draper Laboratory, Inc. | Monolithic micromachined piezoelectric acoustic transducer and transducer array and method of making same |
US5692060A (en) * | 1995-05-01 | 1997-11-25 | Knowles Electronics, Inc. | Unidirectional microphone |
US6128961A (en) * | 1995-12-24 | 2000-10-10 | Haronian; Dan | Micro-electro-mechanics systems (MEMS) |
US6243474B1 (en) * | 1996-04-18 | 2001-06-05 | California Institute Of Technology | Thin film electret microphone |
US5740261A (en) * | 1996-11-21 | 1998-04-14 | Knowles Electronics, Inc. | Miniature silicon condenser microphone |
US5901046A (en) * | 1996-12-10 | 1999-05-04 | Denso Corporation | Surface mount type package unit and method for manufacturing the same |
US5870482A (en) * | 1997-02-25 | 1999-02-09 | Knowles Electronics, Inc. | Miniature silicon condenser microphone |
US5923995A (en) * | 1997-04-18 | 1999-07-13 | National Semiconductor Corporation | Methods and apparatuses for singulation of microelectromechanical systems |
US5939633A (en) * | 1997-06-18 | 1999-08-17 | Analog Devices, Inc. | Apparatus and method for multi-axis capacitive sensing |
US6084292A (en) * | 1997-08-19 | 2000-07-04 | Mitsubishi Denki Kabushiki Kaisha | Lead frame and semiconductor device using the lead frame |
US6505511B1 (en) * | 1997-09-02 | 2003-01-14 | Analog Devices, Inc. | Micromachined gyros |
US5994161A (en) * | 1997-09-03 | 1999-11-30 | Motorola, Inc. | Temperature coefficient of offset adjusted semiconductor device and method thereof |
US5945605A (en) * | 1997-11-19 | 1999-08-31 | Sensym, Inc. | Sensor assembly with sensor boss mounted on substrate |
US6309915B1 (en) * | 1998-02-05 | 2001-10-30 | Tessera, Inc. | Semiconductor chip package with expander ring and method of making same |
US5960093A (en) * | 1998-03-30 | 1999-09-28 | Knowles Electronics, Inc. | Miniature transducer |
US6552469B1 (en) * | 1998-06-05 | 2003-04-22 | Knowles Electronics, Llc | Solid state transducer for converting between an electrical signal and sound |
US6914992B1 (en) * | 1998-07-02 | 2005-07-05 | Sonion Nederland B.V. | System consisting of a microphone and a preamplifier |
US6816301B1 (en) * | 1999-06-29 | 2004-11-09 | Regents Of The University Of Minnesota | Micro-electromechanical devices and methods of manufacture |
US6522762B1 (en) * | 1999-09-07 | 2003-02-18 | Microtronic A/S | Silicon-based sensor system |
US6732588B1 (en) * | 1999-09-07 | 2004-05-11 | Sonionmems A/S | Pressure transducer |
US6249075B1 (en) * | 1999-11-18 | 2001-06-19 | Lucent Technologies Inc. | Surface micro-machined acoustic transducers |
US6401545B1 (en) * | 2000-01-25 | 2002-06-11 | Motorola, Inc. | Micro electro-mechanical system sensor with selective encapsulation and method therefor |
US6704427B2 (en) * | 2000-02-24 | 2004-03-09 | Knowles Electronics, Llc | Acoustic transducer with improved acoustic damper |
US6984886B2 (en) * | 2000-03-02 | 2006-01-10 | Micron Technology, Inc. | System-on-a-chip with multi-layered metallized through-hole interconnection |
US6384472B1 (en) * | 2000-03-24 | 2002-05-07 | Siliconware Precision Industries Co., Ltd | Leadless image sensor package structure and method for making the same |
US6384473B1 (en) * | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
US6535460B2 (en) * | 2000-08-11 | 2003-03-18 | Knowles Electronics, Llc | Miniature broadband acoustic transducer |
US6753583B2 (en) * | 2000-08-24 | 2004-06-22 | Fachhochschule | Electrostatic electroacoustical transducer |
US20020102004A1 (en) * | 2000-11-28 | 2002-08-01 | Minervini Anthony D. | Miniature silicon condenser microphone and method for producing same |
US20050018864A1 (en) * | 2000-11-28 | 2005-01-27 | Knowles Electronics, Llc | Silicon condenser microphone and manufacturing method |
US6741709B2 (en) * | 2000-12-20 | 2004-05-25 | Shure Incorporated | Condenser microphone assembly |
US20040184633A1 (en) * | 2000-12-20 | 2004-09-23 | Shure Incorporated | Condenser microphone assembly |
US6812620B2 (en) * | 2000-12-22 | 2004-11-02 | Bruel & Kjaer Sound & Vibration Measurement A/S | Micromachined capacitive electrical component |
US20040056337A1 (en) * | 2000-12-28 | 2004-03-25 | Hitachi, Ltd. And Hitachi Hokkai Semiconductor, Ltd. | Semiconductor device |
US6847090B2 (en) * | 2001-01-24 | 2005-01-25 | Knowles Electronics, Llc | Silicon capacitive microphone |
US6821819B1 (en) * | 2001-02-21 | 2004-11-23 | Sandia Corporation | Method of packaging and assembling micro-fluidic device |
US6548895B1 (en) * | 2001-02-21 | 2003-04-15 | Sandia Corporation | Packaging of electro-microfluidic devices |
US20020125559A1 (en) * | 2001-03-06 | 2002-09-12 | Mclellan Neil | Enhanced leadless chip carrier |
US6859542B2 (en) * | 2001-05-31 | 2005-02-22 | Sonion Lyngby A/S | Method of providing a hydrophobic layer and a condenser microphone having such a layer |
US6857312B2 (en) * | 2001-06-15 | 2005-02-22 | Textron Systems Corporation | Systems and methods for sensing an acoustic signal using microelectromechanical systems technology |
US20030016839A1 (en) * | 2001-07-20 | 2003-01-23 | Loeppert Peter V. | Raised microstructure of silicon based device |
US6617683B2 (en) * | 2001-09-28 | 2003-09-09 | Intel Corporation | Thermal performance in flip chip/integral heat spreader packages using low modulus thermal interface material |
US20030133588A1 (en) * | 2001-11-27 | 2003-07-17 | Michael Pedersen | Miniature condenser microphone and fabrication method therefor |
US6677176B2 (en) * | 2002-01-18 | 2004-01-13 | The Hong Kong University Of Science And Technology | Method of manufacturing an integrated electronic microphone having a floating gate electrode |
US20030189222A1 (en) * | 2002-04-01 | 2003-10-09 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
US6768196B2 (en) * | 2002-09-04 | 2004-07-27 | Analog Devices, Inc. | Packaged microchip with isolation |
US20040041254A1 (en) * | 2002-09-04 | 2004-03-04 | Lewis Long | Packaged microchip |
US7166911B2 (en) * | 2002-09-04 | 2007-01-23 | Analog Devices, Inc. | Packaged microchip with premolded-type package |
US6781231B2 (en) * | 2002-09-10 | 2004-08-24 | Knowles Electronics Llc | Microelectromechanical system package with environmental and interference shield |
US20050005421A1 (en) * | 2002-09-13 | 2005-01-13 | Knowles Electronics, Llc | High performance silicon condenser microphone with perforated single crystal silicon backplate |
US20040179705A1 (en) * | 2002-09-13 | 2004-09-16 | Zhe Wang | High performance silicon condenser microphone with perforated single crystal silicon backplate |
US20040184632A1 (en) * | 2003-02-28 | 2004-09-23 | Minervini Anthony D. | Acoustic transducer module |
US20050093117A1 (en) * | 2003-04-11 | 2005-05-05 | Dai Nippon Printing Co., Ltd. | Plastic package and method of fabricating the same |
US20050089188A1 (en) * | 2003-10-24 | 2005-04-28 | Feng Jen N. | High performance capacitor microphone and manufacturing method thereof |
US20070040231A1 (en) * | 2005-08-16 | 2007-02-22 | Harney Kieran P | Partially etched leadframe packages having different top and bottom topologies |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9215519B2 (en) | 2010-07-30 | 2015-12-15 | Invensense, Inc. | Reduced footprint microphone system with spacer member having through-hole |
US8841738B2 (en) | 2012-10-01 | 2014-09-23 | Invensense, Inc. | MEMS microphone system for harsh environments |
Also Published As
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US20090230521A2 (en) | 2009-09-17 |
US8344487B2 (en) | 2013-01-01 |
WO2008003051B1 (en) | 2008-06-19 |
US20080157298A1 (en) | 2008-07-03 |
WO2008003051A2 (en) | 2008-01-03 |
WO2008003051A3 (en) | 2008-04-17 |
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