US20110084991A1 - Back-light control circuit of multi-lamps liquid crystal display - Google Patents
Back-light control circuit of multi-lamps liquid crystal display Download PDFInfo
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- US20110084991A1 US20110084991A1 US12/969,595 US96959510A US2011084991A1 US 20110084991 A1 US20110084991 A1 US 20110084991A1 US 96959510 A US96959510 A US 96959510A US 2011084991 A1 US2011084991 A1 US 2011084991A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/36—Controlling
- H05B41/38—Controlling the intensity of light
- H05B41/39—Controlling the intensity of light continuously
- H05B41/392—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor
- H05B41/3921—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations
- H05B41/3927—Controlling the intensity of light continuously using semiconductor devices, e.g. thyristor with possibility of light intensity variations by pulse width modulation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B41/00—Circuit arrangements or apparatus for igniting or operating discharge lamps
- H05B41/14—Circuit arrangements
- H05B41/26—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc
- H05B41/28—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters
- H05B41/282—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices
- H05B41/2825—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage
- H05B41/2828—Circuit arrangements in which the lamp is fed by power derived from dc by means of a converter, e.g. by high-voltage dc using static converters with semiconductor devices by means of a bridge converter in the final stage using control circuits for the switching elements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
Definitions
- the invention relates to a multi-lamps LCD back-light control circuit. More particularly, the invention provides a control circuit that can simplify the circuitry of dimensionally larger LCD devices.
- CCFL cold cathode fluorescent lamps
- LCD liquid crystal display
- CCFL Traditional 14′′, 15′′ LCD screens incorporate CCFL that require a turn-on voltage of about 1400 Vrms, and an operating voltage of about 650 Vrms at the highest normal current of 7 mA.
- an electrical stabilizer such as a typical fixed frequency operation full bridge phase shift converter that can convert direct current to alternating current.
- a typical fixed frequency operation full bridge phase shift converter comprises a resonance inductor 105 , a capacitor 106 circuit, a lamp 107 , NMOS switches 101 , 102 , 103 , 104 , and DC current 108 .
- the turn-on or turn-off of NMOS switches 101 , 102 , 103 , 104 are respectively controlled via the gate voltages VG 1 , VG 2 , VG 3 , and VG 4 .
- Typical control signals are four similar constant frequencies with a same duty cycle slightly smaller than 50% and different square waves.
- a typical fixed frequency operation full bridge phase shift converter moves the phase of the control voltage so as to use different sizes of phase retardations to generate different output powers.
- FIG. 2B schematically illustrate the operation time/sequence of a typical fixed frequency operation full bridge phase shift converter.
- the control signals VG 1 , VG 2 (and VG 3 , VG 4 ) must maintain a phase retardation of 180.degree.
- the phase retardation of VG 1 , VG 3 in FIG. 2A is smaller than that of FIG. 2B , which generates a higher duty cycle VAB and more power outputs.
- the present use of traditional fixed frequency operation full bridge phase shift converter in LCD screens presents several problems.
- the DC voltage provided by the circuit is only about 10 to 20 volts.
- the electrical stabilizer of the CCFL of FIG. 1 needs a direct voltage of hundreds of volts to operate.
- this stabilizer uses an NMOS as power switch.
- the voltage VG 1 (respectively VG 2 ) at the point A (respectively B) must be cautiously increased. Additional step-up circuits thus must be included within the driving circuits of the NMOSFET power switches 101 and 104 .
- a sixth object of the invention to provide a CCFL control circuit in which stabilization of the lamp current is achieved via pulse width modulation (PWM) feedback control.
- PWM pulse width modulation
- a seventh object of the invention to provide a CCFL control circuit in which constant frequency and frequency synchronization are implemented to reduce frequency retardation interference within the multi-lamp circuit, caused by the use of different driving circuits.
- a ninth object of the invention to provide a CCFL control circuit in which the principal control elements can be fabricated on a same integrated circuit.
- FIG. 1 is a schematic view illustrating a traditional fixed frequency operation full bridge phase shift converter circuit
- FIG. 2A and FIG. 2B are time/sequence charts of the operation of the fixed frequency operation full bridge phase shift converter
- FIG. 3 is a schematic view illustrating a CCFL control integrated circuit according to an embodiment of the invention.
- FIG. 4 is a schematic view of a resonance network circuit according to an embodiment of the invention.
- FIG. 5 is a schematic view illustrating a multi-lamp applying circuit according to an embodiment of the invention.
- FIG. 6 is a schematic view illustrating the relationship between the control signals of the control circuits according to an embodiment of the invention.
- FIG. 7A and FIG. 7B are two schematic view illustrating two lamp current phase configurations under similar frequency operation of multi-lamps according to an embodiment of the invention.
- FIG. 8A is a schematic view illustrating a triangular wave generator circuit according to an embodiment of the invention.
- FIG. 8B is a wave time/sequence chart corresponding to the circuit of FIG. 8A ;
- FIG. 9 is a schematic view of a phase synchronization 1 ⁇ 2 frequency divider circuit according another embodiment of the invention.
- FIG. 3 , FIG. 4 , and FIG. 5 are schematic views respectively illustrating a cold cathode fluorescent lamp (CCFL) control circuit, a resonance network circuit, and a multi-lamps applying circuit according to an embodiment of the invention.
- the multi-lamp LCD back-light control circuit of the invention uses a constant operating frequency and PWM (pulse width modulation) feedback to control the CCFL current.
- the multi-lamp LCD back-light control circuit comprises full bridge switches 317 , 318 , 319 , 320 .
- the resonance network circuit 321 comprised of a step-up transformer 324 , inductor 322 , and capacitors 323 , 326 , converts a direct current (DC) from a power source 335 to an alternating current (AC) needed by the CCFL circuit 325 .
- the inductor 322 and capacitors 323 , 326 of the resonance network circuit 321 can be disposed on a primary side of the transformer as shown in FIG. 3 , or on secondary sides 403 , 404 of the transformer as shown in the resonance network circuit 405 of FIG. 4 .
- the inductors 322 , 403 of the resonance network circuits 321 , 405 as described above may be either independent elements separate from the transformer, or leakage inductors generated by the transformer.
- the secondary side capacitor of the resonance network circuits 321 , 405 can be either independent electric element or parasitic capacitor generated between the CCFL and the LCD.
- the switches 317 , 320 connected to the power source 335 are PMOSFET switches
- the switches 318 , 319 connected to the ground are NMOSFET switches.
- the change and output of the duty cycle of the switches 317 , 320 are controlled via a PWM controller 302 .
- the duty cycle of the switches 318 , 319 is constant and further must be controllable above 50%.
- the phase relationship between the control signal of the NMOSFET ground switches 318 , 319 and the control signal of the PMOSFET power switches 317 , 320 is invariant.
- a triangular wave generator 336 is further connected to an input of the PWM controller 302 .
- the operating frequency of the triangular wave generator 336 can be controlled through an external synchronous signal delivered through a control terminal FSYN.
- a 1 ⁇ 2 divider circuit 306 is further used to generate a time sequence as driving input of the ground switches 318 , 319 .
- the phase of the 1 ⁇ 2 divider circuit 306 can be synchronized via an external synchronous signal delivered through the control terminal PSYN.
- the multi-lamps applying circuit is formed via coupling between one another a plurality of integrated circuits (IC) 501 , 502 , 503 , each of which is respectively formed by assembly of the control unit 301 as shown in FIG. 3 .
- the ICs 501 , 502 , 503 usually have their respective frequency synchronous signal control terminal 504 , 505 , 506 connected together so that all the ICs are operated with a same frequency.
- respective phase synchronous signal control terminals 507 , 508 , 509 of the ICs may be connected together to operate all the ICs with a same phase.
- the CCFL control circuit of the invention is therefore provided with traditional full bridge switch structures and traditional elements of a PWM controller to control the switch of the CCFL and the lamp currents in a feedback control manner.
- NMOSFET and PMOSFET are used as switch elements to achieve a more effective switching operation, which favorably increases the efficiency of the whole circuit.
- the CCFL control circuit of the invention includes different ICs that are connected to one another in such a manner that their respective operating frequency and phase can be synchronously controlled, thereby the perturbations due to frequency and phase differences are prevented during the operation of the lamps.
- the control unit 301 comprises a PWM controller 302 , a triangular wave/clock generator 336 , a 1 ⁇ 2 frequency divider 306 , and a logic circuit.
- the PWM feedback control circuit typically measures the AC output 346 of the lamp 325 . After AC from the lamp 325 is commutated and filtered through the feedback network 347 , the resulting DC is delivered to the inverter input INN of the error amplifier 303 within the PWM controller 302 to be compared with a reference voltage VREF inputted to the not-inverter input INP.
- the triangular generator 336 generates a triangular wave output 344 which configuration is shown in FIG. 6 as reference numeral 601 .
- the voltage level (reference numeral 602 in FIG. 6 ) of the output 345 of the error amplifier 303 is compared with the triangular wave output 344 by means of a comparator 304 to obtain a PWM output wave (reference numeral 603 in FIG. 6 ) at the output terminal 341 .
- the PWM feedback control circuit can typically modify the voltage level 602 at the output 345 of the error amplifier 303 along which the duty cycle of the output wave 603 from the comparator 304 is also changed. The output of the lamp 325 is thereby automatically regulated.
- the full bridge circuit of the invention hence is driven via driving signals, formed from a set of constant duty cycles greater than 50%, that are further accompanied with the output of the PWM controller generating an appropriate change of the duty cycle.
- the control signals of constant cycles drive the NMOSFET 318 , 319 as described below.
- the clock triangular signal 601 from the triangular wave generator is transformed to a clock signal 604 (also called “half clock signal”) having a frequency equal to half the frequency of the triangular signal 601 .
- the inverter 334 then inverts the half clock signal 604 to an inverted half clock signal 605 .
- Both clock signals 604 , 605 are delivered through outputs 339 , 340 to delays 312 , 311 and OR logic 316 , 315 to generate signals 606 , 608 of duty cycle greater than 50%, delivered through the outputs NOUT 1 , NOUT 2 .
- the signals 606 , 608 have a duty cycle that is delayed a delay time 610 behind the half clock signals 604 , 605 . If needed, this delay time can be adjusted by means of a time delay controller element 333 .
- the changed duty cycle from the PWM controller is combined with the driving signals of constant cycle in the manner described hereafter.
- a Boolean AND is applied to the half clock signals 340 , 339 and the output 341 of the PWM controller 302 by means of the AND logic 307 , 308 , so that the PWM output 341 is in outputting configuration only when the half clock signals are in the logic state “1”.
- the time delays of the delays 309 , 310 can be controlled via the controller elements 333 .
- AND logic 348 , 349 enable the PWM output 341 to be turned on only after a delay time 611 behind the turn on of the NMOSFET.
- inverters 313 , 314 therefore invert the PWM output to infer the PMOSFET.
- the control signal 607 driving the PMOSFET 320 at the output POUT 2 is in turn-on state (logic “0”) only if the control signal 606 driving the NMOSFET 318 at the output NOUT 1 is in turn-on state (logic “1”).
- the control signal 609 driving the PMOSFET 317 at the output POUT 1 is in turn-on state (logic “0”) only if the control signal 608 driving the NMOSFET 319 at the output NOUT 2 is in turn-on state (logic “1”).
- another characteristic of the invention is a synchronous operation of the frequency and phase.
- the oscillating frequency of the triangular wave generator 336 can be synchronized by means of externally added signals. Processing of the phase synchronous signals is included in the frequency divider circuit 306 .
- FIG. 5 while operating a plurality of lamps, all the non-inverter input terminals 510 , 511 , 512 of the error amplifier are connected to a same reference voltage 515 so that the current of the lamps are balanced. Meanwhile, by coupling all the frequency inputs 504 , 505 , 506 of the controller ICs to one another in a synchronizing configuration, the lamps can be operated with a same frequency.
- the lamps can be operated with a same phase.
- the requisite condition of operation with a same phase is that the circuitry must be operated with a same frequency.
- the operating frequency of the controller ICs can be chosen higher than the resonance frequency of the resonance network.
- FIG. 7A and FIG. 7B schematically illustrate two possible phase variations of the lamp current in an operation of multiple lamps with a same frequency. More particularly, FIG. 7A illustrates a lamp current phase in inversion configuration within an operation of multiple lamps with a same frequency. FIG. 7B illustrates a lamp current phase in similar configuration within an operation of multiple lamps with a same frequency.
- the phases When the phases are inverted, the flow of AC currents through the strayed capacitors between the lamps may generate current leakage.
- the invention favorably eliminates the occurrence of current leakage and increases the performance of the entire circuit.
- FIG. 8A is a schematic view of the triangular wave generator circuit
- FIG. 8B is a corresponding time/sequence chart.
- the triangular generator circuit 801 includes a raising edge detector circuit 802 .
- the traditional triangular wave generator without synchronous function has the output 811 of the comparator 810 short-circuited with the input 813 of the NAND gate 814 .
- an NMOSFET 804 with open drain is added to synchronize the triangular generator with the external signal FSYN. If the connection scheme of the NMOSFET 804 and the external pull-up capacitor 805 is as shown in FIG. 5 , a wired NOR logic then is formed from NMOSFET 804 , 815 of different ICs, the inverter 803 then can change this NOR logic into an OR logic.
- the raising edge detector circuit 802 further includes an AND gate 812 which inputs are connected to the output 811 of the comparator 810 and the output 815 of the raising edge detector circuit 802 .
- the output 813 of the AND gate 812 is inputted to the NAND gate 814 to control the operation of the triangular generator.
- FIG. 8B is a time/sequence of the entire circuit according to an embodiment of the invention.
- reference numeral 807 is the external synchronous control triangular signal taken at the point A of FIG. 8A .
- Reference numeral 808 is the external synchronous control signal.
- Reference numeral 809 is the external synchronous control signal received by the triangular wave generator clock.
- FIG. 9 schematically illustrates a phase synchronous 1 ⁇ 2 frequency divider circuit according to an embodiment of the invention.
- a common 1 ⁇ 2 divider circuit 902 is further provided with a D-type inverser 902 that has an output QN directly connected to the input D.
- a wired NOR is formed from NMOSFET 906 , 908 of different ICs with a Pull up capacitor 907 .
- the inverter 904 thus inverts the result of the NOR to an OR.
- the phase of the output CLK/2 is therefore decided by the first IC switching to a logic state “1” (high level).
Abstract
A multi-lamps LCD panel back-light control circuit is provided, and which includes a control unit, a full bridge switch, a resonance network circuit, a voltage transformer, and a feedback network. The control unit operates in coordinating with the full bridge switch, the resonance network circuit, the voltage transformer and the feedback network so as to use a constant operating frequency and a PWM feedback to control a current of CCFLs. The back-light control circuit is characterized in that different integrated-circuits (ICs) are respectively formed from the control unit including a PWM controller, a triangular wave/clock generator, a ½ frequency divider, and a logic circuit. The different ICs have either a plurality of respective frequency synchronous signal control terminals or a plurality of phase synchronous signal control terminals that are connected to one another so that the different ICs operate respectively either with a same operating frequency or a same phase.
Description
- This application is a continuation application of Reissue application Ser. No. 11/174,421, filed on Jul. 1, 2005, now allowed. The prior reissue application is based on U.S. application Ser. No. 10/128,240, filed on Apr. 24, 2002, now U.S. Pat. No. 6,750,842. The entirety of each of the above-mentioned patents is hereby incorporated by reference herein and made a part of this specification.
- 1. Field of the Invention
- The invention relates to a multi-lamps LCD back-light control circuit. More particularly, the invention provides a control circuit that can simplify the circuitry of dimensionally larger LCD devices.
- 2. Description of the Related Art
- Compared to traditional white thermal lamps, cold cathode fluorescent lamps (CCFL) have many advantages such as higher efficiency and longer service life. Therefore, an important number of liquid crystal display (LCD) presently uses CCFL as light source. To achieve a stable operation of the CCFL, the power frequency needed is about 30 KHz through 80 KHz without the stringed wave from the DC current part while the operating voltage is approximately constant. The illumination of the lamp is determined according to the tube current there through. The voltage needed to turn on the lamp is higher than the normal
stable operating voltage 2 to 2.5 times. The turn on voltage and operating voltage of the CCFL are determined from the size of the CCFL. Traditional 14″, 15″ LCD screens incorporate CCFL that require a turn-on voltage of about 1400 Vrms, and an operating voltage of about 650 Vrms at the highest normal current of 7 mA. To regulate the CCFL, a common control method is the use of an electrical stabilizer such as a typical fixed frequency operation full bridge phase shift converter that can convert direct current to alternating current. - As shown in
FIG. 1 , a typical fixed frequency operation full bridge phase shift converter comprises aresonance inductor 105, acapacitor 106 circuit, alamp 107,NMOS switches DC current 108. The turn-on or turn-off ofNMOS switches FIG. 2A andFIG. 2B schematically illustrate the operation time/sequence of a typical fixed frequency operation full bridge phase shift converter. To prevent theNMOS switches 101, 102 (and 103, 104), directly connected to each other, to be simultaneously turned off, which causes a power loss, the control signals VG1, VG2 (and VG3, VG4) must maintain a phase retardation of 180.degree. The phase retardation of VG1, VG3 inFIG. 2A is smaller than that ofFIG. 2B , which generates a higher duty cycle VAB and more power outputs. - However, the present use of traditional fixed frequency operation full bridge phase shift converter in LCD screens presents several problems. Within present LCD devices, the DC voltage provided by the circuit is only about 10 to 20 volts. The electrical stabilizer of the CCFL of
FIG. 1 needs a direct voltage of hundreds of volts to operate. Moreover, this stabilizer uses an NMOS as power switch. As a result, when it is driven, the voltage VG1 (respectively VG2) at the point A (respectively B) must be cautiously increased. Additional step-up circuits thus must be included within the driving circuits of theNMOSFET power switches - It is therefore a first object of the invention to provide a CCFL control circuit that is adapted to a dimensional increase of the LCD devices.
- It is a second object of the invention to provide a CCFL control circuit that incorporates a step-up voltage transformer so that the number of high-voltage resistant elements can be reduced within the control circuit.
- Furthermore, it is third object of the invention to provide a CCFL control circuit that incorporates PMOSFET as power switches so that additional step-up circuits are not needed to directly drive the switches.
- Still, it is a fourth object of the invention to provide a CCFL control circuit in which the cycle of ground switches is fixed so as to change the cycle of the power switches, thereby the voltage conversion is more efficient.
- Furthermore, it is a fifth object of the invention to provide a CCFL control circuit in which the cycle of ground switches is fixed so as to change the cycle of the power switches, thereby most of the circuit current flows through the ground switches. Loss increase due to higher resistivity of PMOSFET power switches is therefore favorably reduced.
- Still, it is a sixth object of the invention to provide a CCFL control circuit in which stabilization of the lamp current is achieved via pulse width modulation (PWM) feedback control.
- Yet, it is a seventh object of the invention to provide a CCFL control circuit in which constant frequency and frequency synchronization are implemented to reduce frequency retardation interference within the multi-lamp circuit, caused by the use of different driving circuits.
- Furthermore, it is an eighth object of the invention to provide a CCFL control circuit in which constant frequency and phase synchronization are implemented to reduce phase retardation interference within the multi-lamp circuit, caused by the use of different driving circuits.
- Still, it is a ninth object of the invention to provide a CCFL control circuit in which the principal control elements can be fabricated on a same integrated circuit.
- To provide a further understanding of the invention, the following detailed description illustrates embodiments and examples of the invention, this detailed description being provided only for illustration of the invention.
- The drawings included herein provide a further understanding of the invention. A brief introduction of the drawings is as follows:
-
FIG. 1 is a schematic view illustrating a traditional fixed frequency operation full bridge phase shift converter circuit; -
FIG. 2A andFIG. 2B are time/sequence charts of the operation of the fixed frequency operation full bridge phase shift converter; -
FIG. 3 is a schematic view illustrating a CCFL control integrated circuit according to an embodiment of the invention; -
FIG. 4 is a schematic view of a resonance network circuit according to an embodiment of the invention; -
FIG. 5 is a schematic view illustrating a multi-lamp applying circuit according to an embodiment of the invention; -
FIG. 6 is a schematic view illustrating the relationship between the control signals of the control circuits according to an embodiment of the invention; -
FIG. 7A andFIG. 7B are two schematic view illustrating two lamp current phase configurations under similar frequency operation of multi-lamps according to an embodiment of the invention; -
FIG. 8A is a schematic view illustrating a triangular wave generator circuit according to an embodiment of the invention; -
FIG. 8B is a wave time/sequence chart corresponding to the circuit ofFIG. 8A ; and -
FIG. 9 is a schematic view of a phase synchronization ½ frequency divider circuit according another embodiment of the invention. - Wherever possible in the following description, like reference numerals will refer to like elements and parts unless otherwise illustrated.
-
FIG. 3 ,FIG. 4 , andFIG. 5 are schematic views respectively illustrating a cold cathode fluorescent lamp (CCFL) control circuit, a resonance network circuit, and a multi-lamps applying circuit according to an embodiment of the invention. The multi-lamp LCD back-light control circuit of the invention uses a constant operating frequency and PWM (pulse width modulation) feedback to control the CCFL current. - As shown in
FIG. 3 , the multi-lamp LCD back-light control circuit comprises full bridge switches 317, 318, 319, 320. Theresonance network circuit 321, comprised of a step-uptransformer 324,inductor 322, andcapacitors power source 335 to an alternating current (AC) needed by theCCFL circuit 325. Theinductor 322 andcapacitors resonance network circuit 321 can be disposed on a primary side of the transformer as shown inFIG. 3 , or onsecondary sides resonance network circuit 405 ofFIG. 4 . Theinductors resonance network circuits resonance network circuits - Among the full bridge switches, the
switches switches switches PWM controller 302. In turn, the duty cycle of theswitches - A
triangular wave generator 336 is further connected to an input of thePWM controller 302. The operating frequency of thetriangular wave generator 336 can be controlled through an external synchronous signal delivered through a control terminal FSYN. A ½divider circuit 306 is further used to generate a time sequence as driving input of the ground switches 318, 319. The phase of the ½divider circuit 306 can be synchronized via an external synchronous signal delivered through the control terminal PSYN. - Referring to
FIG. 5 , the multi-lamps applying circuit is formed via coupling between one another a plurality of integrated circuits (IC) 501, 502, 503, each of which is respectively formed by assembly of thecontrol unit 301 as shown inFIG. 3 . TheICs signal control terminal signal control terminals - With reference to
FIG. 3 in conjunction withFIG. 6 , now is described the relationship of the control signals between the CCFL control circuit and each control circuit. As illustrated, the CCFL control circuit of the invention is therefore provided with traditional full bridge switch structures and traditional elements of a PWM controller to control the switch of the CCFL and the lamp currents in a feedback control manner. In addition, NMOSFET and PMOSFET are used as switch elements to achieve a more effective switching operation, which favorably increases the efficiency of the whole circuit. Furthermore, the CCFL control circuit of the invention includes different ICs that are connected to one another in such a manner that their respective operating frequency and phase can be synchronously controlled, thereby the perturbations due to frequency and phase differences are prevented during the operation of the lamps. - Within the CCFL control circuit as shown in
FIG. 3 , thecontrol unit 301 comprises aPWM controller 302, a triangular wave/clock generator 336, a ½frequency divider 306, and a logic circuit. The PWM feedback control circuit typically measures theAC output 346 of thelamp 325. After AC from thelamp 325 is commutated and filtered through thefeedback network 347, the resulting DC is delivered to the inverter input INN of theerror amplifier 303 within thePWM controller 302 to be compared with a reference voltage VREF inputted to the not-inverter input INP. - The
triangular generator 336 generates atriangular wave output 344 which configuration is shown inFIG. 6 asreference numeral 601. The voltage level (reference numeral 602 inFIG. 6 ) of theoutput 345 of theerror amplifier 303 is compared with thetriangular wave output 344 by means of a comparator 304 to obtain a PWM output wave (reference numeral 603 inFIG. 6 ) at theoutput terminal 341. According to the current intensity of thelamp 325, the PWM feedback control circuit can typically modify thevoltage level 602 at theoutput 345 of theerror amplifier 303 along which the duty cycle of theoutput wave 603 from the comparator 304 is also changed. The output of thelamp 325 is thereby automatically regulated. - The full bridge circuit of the invention hence is driven via driving signals, formed from a set of constant duty cycles greater than 50%, that are further accompanied with the output of the PWM controller generating an appropriate change of the duty cycle. In the invention, the control signals of constant cycles drive the
NMOSFET - By means of the ½
frequency divider 306, the clocktriangular signal 601 from the triangular wave generator is transformed to a clock signal 604 (also called “half clock signal”) having a frequency equal to half the frequency of thetriangular signal 601. Theinverter 334 then inverts thehalf clock signal 604 to an invertedhalf clock signal 605. Both clock signals 604, 605 are delivered throughoutputs 339, 340 todelays logic signals signals delay time 610 behind the half clock signals 604, 605. If needed, this delay time can be adjusted by means of a timedelay controller element 333. - To drive the full bridge switches, the changed duty cycle from the PWM controller is combined with the driving signals of constant cycle in the manner described hereafter. A Boolean AND is applied to the half clock signals 340, 339 and the
output 341 of thePWM controller 302 by means of the ANDlogic PWM output 341 is in outputting configuration only when the half clock signals are in the logic state “1”. The time delays of thedelays controller elements 333. ANDlogic PWM output 341 to be turned on only after adelay time 611 behind the turn on of the NMOSFET. Because the PMOSFET and NMOSFET respectively are driven via low and high voltages,inverters control signal 607 driving thePMOSFET 320 at the output POUT2 is in turn-on state (logic “0”) only if thecontrol signal 606 driving theNMOSFET 318 at the output NOUT1 is in turn-on state (logic “1”). Similarly, thecontrol signal 609 driving thePMOSFET 317 at the output POUT1 is in turn-on state (logic “0”) only if thecontrol signal 608 driving theNMOSFET 319 at the output NOUT2 is in turn-on state (logic “1”). - As described above, another characteristic of the invention is a synchronous operation of the frequency and phase. As shown in
FIG. 3 , the oscillating frequency of thetriangular wave generator 336 can be synchronized by means of externally added signals. Processing of the phase synchronous signals is included in thefrequency divider circuit 306. As shown inFIG. 5 , while operating a plurality of lamps, all thenon-inverter input terminals same reference voltage 515 so that the current of the lamps are balanced. Meanwhile, by coupling all thefrequency inputs phase inputs -
FIG. 7A andFIG. 7B schematically illustrate two possible phase variations of the lamp current in an operation of multiple lamps with a same frequency. More particularly,FIG. 7A illustrates a lamp current phase in inversion configuration within an operation of multiple lamps with a same frequency.FIG. 7B illustrates a lamp current phase in similar configuration within an operation of multiple lamps with a same frequency. When the phases are inverted, the flow of AC currents through the strayed capacitors between the lamps may generate current leakage. Via synchronous regulation, the invention favorably eliminates the occurrence of current leakage and increases the performance of the entire circuit. -
FIG. 8A is a schematic view of the triangular wave generator circuit, andFIG. 8B is a corresponding time/sequence chart. As shown inFIG. 8A , thetriangular generator circuit 801 includes a raisingedge detector circuit 802. It should be noted that the traditional triangular wave generator without synchronous function has theoutput 811 of thecomparator 810 short-circuited with theinput 813 of theNAND gate 814. However, in the embodiment of the invention, anNMOSFET 804 with open drain is added to synchronize the triangular generator with the external signal FSYN. If the connection scheme of theNMOSFET 804 and the external pull-upcapacitor 805 is as shown inFIG. 5 , a wired NOR logic then is formed fromNMOSFET inverter 803 then can change this NOR logic into an OR logic. - The raising
edge detector circuit 802 further includes an ANDgate 812 which inputs are connected to theoutput 811 of thecomparator 810 and theoutput 815 of the raisingedge detector circuit 802. Theoutput 813 of the ANDgate 812 is inputted to theNAND gate 814 to control the operation of the triangular generator.FIG. 8B is a time/sequence of the entire circuit according to an embodiment of the invention. InFIG. 8B ,reference numeral 807 is the external synchronous control triangular signal taken at the point A ofFIG. 8A .Reference numeral 808 is the external synchronous control signal.Reference numeral 809 is the external synchronous control signal received by the triangular wave generator clock. -
FIG. 9 schematically illustrates a phase synchronous ½ frequency divider circuit according to an embodiment of the invention. As illustrated, to achieve a phase synchronous ½ frequency divider circuit, a common ½divider circuit 902 is further provided with a D-type inverser 902 that has an output QN directly connected to the input D. Hence, if the phase synchronous terminal PSYN of different IC are connected to one another and further to the Pull up capacitor 907, as traditionally achieved and illustrated inFIG. 5 , a wired NOR is formed fromNMOSFET inverter 904 thus inverts the result of the NOR to an OR. When the entire circuit is operated with a same operating frequency, the phase of the output CLK/2 is therefore decided by the first IC switching to a logic state “1” (high level). - It should be apparent to those skilled in the art that the above description is only illustrative of specific embodiments and examples of the invention. The invention should therefore cover various modifications and variations made to the herein-described structure and operations of the invention, provided they fall within the scope of the invention as defined in the following appended claims.
Claims (14)
1. A multi-lamps liquid crystal display (LCD) panel back-light control circuit, comprising a control unit, a full bridge switch, a resonance network circuit, a voltage transformer, and a feedback network, wherein the control unit operates in coordinating with the full bridge switch, the resonance network circuit, the voltage transformer and the feedback network so as to use a constant operating frequency and a pulse width modulation (PWM) feedback to control a current of cold cathode fluorescent lamps (CCFLs), the back-light control circuit being characterized in that different integrated circuits (ICs) are respectively formed from the control unit comprising a PWM controller, a triangular wave/clock generator, a ½ frequency divider, and a logic circuit, the different ICs having either a plurality of respective frequency synchronous signal control terminals or a plurality of phase synchronous signal control terminals that are connected to one another so that the different ICs operate respectively either with a same operating frequency or a same phase.
2. The multi-lamps LCD panel back-light control circuit of claim 1 , wherein a power switch of the full bridge switch outputs a duty cycle that is controlled and changed via the PWM controller of the control unit, while a ground switch of the full bridge switch outputs a constant duty cycle controllable above 50%;
wherein a phase relationship between a signal that controls the ground switch and a signal that controls the power switch is constant, the ground switch being formed from at least an NMOSFET and the power switch being formed at least from a PMOSFET; and
wherein with a common drain connection of the ground switch and the power switch, the power switch is turned off when the ground switch is turned on, and without a common drain connection, the power switch is turned on only after a preset delay from a turn on of the ground switch.
3. The multi-lamps LCD panel back-light control circuit of claim 2 , wherein the power switch of the full bridge is formed from two PMOSFETs and the ground switch is formed from two NMOSFETs.
4. The multi-lamps LCD panel back-light control circuit of claim 2 , wherein the PWM controller includes an error amplifier which has an output with a voltage level that is compared to an outputted triangular wave via a comparator before obtaining a PWM output wave.
5. The multi-lamps LCD panel back-light control circuit of claim 2 , wherein the ½ frequency divider transforms the clock of the triangular wave/clock generator to a half frequency clock signal with a frequency equal to a half of the triangular wave, an inverter inverting the half frequency clock signal to an inverted half frequency clock signal; the half clock signal and the inverted half clock signal being outputted through a delay and an OR logic to generate an output signal having a duty cycle greater than 50% and delayed from the half clock signal, wherein the delay time is adjustable by means of a delay time controller element.
6. The multi-lamps LCD panel back-light control circuit of claim 2 , wherein a changed duty cycle output generated from the PWM controller is calculated as the result of an AND logic from the half clock signal and the output of the PWM controller, thereby the output of the PWM controller is in an outputting state only when the half clock signal is in a “1” logic state, the delay being adjustable by means of controller elements, and the AND logic enables the output of the PWM controller to be turned on only after a delay from the turn on of the NMOSFET; wherein the PMOSFET being of low driving voltage and the NMOSFET being of high driving voltage, the inverter and the logic transform the PWM output to push the PMOSFET.
7. The multi-lamps LCD panel back-light control circuit of claim 2 , wherein the operating frequency and the synchronization of the operating phase of the triangular wave generator and the ½ frequency divider are controlled via a plurality of external synchronous signals delivered through terminals thereof.
8. The multi-lamps LCD panel back-light control circuit of claim 1 , wherein a phase of the current of respective CCFLs is in similar configuration within an operation of the CCFLs with a same frequency.
9. The multi-lamps LCD panel back-light control circuit of claim 1 , wherein the triangular wave/clock generator comprises:
a raising edge detector circuit comprising a first inverter and a first NAND gate, wherein an input terminal of the first inverter is coupled to a first input terminal of the first NAND gate, and an output terminal of the first inverter is coupled to a second input terminal of the first NAND gate;
a first comparator having a first input terminal receiving a relative high threshold voltage;
a second comparator having a first input terminal receiving a relative low threshold voltage, a second input terminal coupled to a second input terminal of the first comparator;
an AND gate having a first input terminal coupled to an output terminal of the first comparator, a second input terminal coupled to an output terminal of the first NAND gate;
a second NAND gate having a first input terminal coupled to an output terminal of the AND gate and an output terminal outputting a CLK signal;
a third NAND gate having a first input terminal coupled to an output terminal of the second comparator, a second input terminal coupled to the output terminal of the second NAND gate and an output terminal coupled to a second input terminal of the second NAND gate;
a second inverter having an input terminal coupled to the corresponding frequency synchronous signal control terminal and an output terminal coupled to the input terminal of the first inverter;
a first NMOSFET having a gate coupled to the output terminal of the second NAND gate, a source coupled to a ground and a drain coupled to the input terminal of the second inverter;
a capacitor having a first terminal coupled to the second input terminal of the second comparator and a second terminal coupled to the ground;
a PMOSFET having a gate coupled to the output terminal of the second NAND gate and a drain coupled to the first terminal of the capacitor;
a first current source coupled between a system voltage and a source of the PMOSFET;
a second NMOSFET having a gate coupled to the output terminal of the second NAND gate and a drain coupled to the first terminal of the capacitor; and
a second current source coupled between a source of the second NMOSFET and the ground.
10. The multi-lamps LCD panel back-light control circuit of claim 9 , wherein the ½ frequency divider comprising:
a D flip-flop having a clock terminal receiving the CLK signal and a first output terminal outputting a ½ CLK signal;
a third inverter having an input terminal coupled to the corresponding phase synchronous signal control terminal and an output terminal coupled to a data input terminal of the D flip-flop; and
a third NMOSFET having a gate coupled to a second output terminal of the D flip-flop, a drain coupled to the input terminal of the third inverter and a source coupled to the ground.
11. The multi-lamps LCD panel back-light control circuit of claim 1 , further comprising:
a first pull-up resistor coupled between a system voltage and the frequency synchronous signal control terminals when all of the frequency synchronous signal control terminals are coupled each other; and
a second pull-up resistor coupled between the system voltage and the phase synchronous signal control terminals when all of the phase synchronous signal control terminals are coupled each other.
12. The multi-lamps LCD panel back-light control circuit of claim 1 , wherein the resonance network circuit comprises an inductor and a capacitor that are placed in the voltage transformer either in a primary side or a secondary side.
13. The multi-lamps LCD panel back-light control circuit of claim 12 , wherein the inductor of the resonance network circuit is either a separate and independent element from the voltage transformer or a leakage inductor generated by the voltage transformer.
14. The multi-lamps LCD panel back-light control circuit of claim 12 , wherein a secondary capacitor of the resonance network circuit is either an independent element or a parasitic capacitor generated between CCFLs and the LCD panel.
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US12/969,595 US20110084991A1 (en) | 2002-04-24 | 2010-12-16 | Back-light control circuit of multi-lamps liquid crystal display |
Applications Claiming Priority (3)
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US10/128,240 US6750842B2 (en) | 2002-04-24 | 2002-04-24 | Back-light control circuit of multi-lamps liquid crystal display |
US11/174,421 USRE42182E1 (en) | 2002-04-24 | 2005-07-01 | Back-light control circuit of multi-lamps liquid crystal display |
US12/969,595 US20110084991A1 (en) | 2002-04-24 | 2010-12-16 | Back-light control circuit of multi-lamps liquid crystal display |
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US11/174,421 Continuation USRE42182E1 (en) | 2002-04-24 | 2005-07-01 | Back-light control circuit of multi-lamps liquid crystal display |
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US20110084991A1 true US20110084991A1 (en) | 2011-04-14 |
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US10/128,240 Ceased US6750842B2 (en) | 2002-04-24 | 2002-04-24 | Back-light control circuit of multi-lamps liquid crystal display |
US11/174,421 Expired - Lifetime USRE42182E1 (en) | 2002-04-24 | 2005-07-01 | Back-light control circuit of multi-lamps liquid crystal display |
US12/969,595 Abandoned US20110084991A1 (en) | 2002-04-24 | 2010-12-16 | Back-light control circuit of multi-lamps liquid crystal display |
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US11/174,421 Expired - Lifetime USRE42182E1 (en) | 2002-04-24 | 2005-07-01 | Back-light control circuit of multi-lamps liquid crystal display |
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Also Published As
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USRE42182E1 (en) | 2011-03-01 |
US20030201967A1 (en) | 2003-10-30 |
US6750842B2 (en) | 2004-06-15 |
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