US20150340508A1 - Semiconductor device and method for manufacturing the same - Google Patents
Semiconductor device and method for manufacturing the same Download PDFInfo
- Publication number
- US20150340508A1 US20150340508A1 US14/816,112 US201514816112A US2015340508A1 US 20150340508 A1 US20150340508 A1 US 20150340508A1 US 201514816112 A US201514816112 A US 201514816112A US 2015340508 A1 US2015340508 A1 US 2015340508A1
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- United States
- Prior art keywords
- film
- oxide semiconductor
- insulating film
- gate electrode
- oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 392
- 238000000034 method Methods 0.000 title abstract description 73
- 238000004519 manufacturing process Methods 0.000 title abstract description 33
- 239000000956 alloy Substances 0.000 claims abstract description 84
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 82
- 239000001257 hydrogen Substances 0.000 claims abstract description 67
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 67
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 42
- 230000001681 protective effect Effects 0.000 claims description 16
- 229910002335 LaNi5 Inorganic materials 0.000 claims description 5
- 229910019758 Mg2Ni Inorganic materials 0.000 claims description 5
- 229910009972 Ti2Ni Inorganic materials 0.000 claims description 5
- 239000010408 film Substances 0.000 abstract description 647
- 238000010438 heat treatment Methods 0.000 abstract description 133
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 76
- 239000001301 oxygen Substances 0.000 abstract description 76
- 229910052760 oxygen Inorganic materials 0.000 abstract description 76
- 239000010409 thin film Substances 0.000 abstract description 55
- 230000015572 biosynthetic process Effects 0.000 abstract description 48
- 125000002887 hydroxy group Chemical group [H]O* 0.000 abstract description 34
- 229910052751 metal Inorganic materials 0.000 abstract description 34
- 239000002184 metal Substances 0.000 abstract description 33
- 230000004913 activation Effects 0.000 abstract description 27
- 150000002431 hydrogen Chemical class 0.000 abstract description 24
- 150000002736 metal compounds Chemical class 0.000 abstract description 5
- 239000012298 atmosphere Substances 0.000 description 114
- 239000010410 layer Substances 0.000 description 85
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 64
- 238000004544 sputter deposition Methods 0.000 description 63
- 239000000758 substrate Substances 0.000 description 63
- 239000007789 gas Substances 0.000 description 60
- 239000000463 material Substances 0.000 description 59
- 239000012535 impurity Substances 0.000 description 55
- 239000004973 liquid crystal related substance Substances 0.000 description 38
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 35
- 229910052786 argon Inorganic materials 0.000 description 32
- 238000005530 etching Methods 0.000 description 32
- GQPLMRYTRLFLPF-UHFFFAOYSA-N Nitrous Oxide Chemical compound [O-][N+]#N GQPLMRYTRLFLPF-UHFFFAOYSA-N 0.000 description 30
- -1 indium (In) Chemical class 0.000 description 27
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 26
- 229910052814 silicon oxide Inorganic materials 0.000 description 26
- 229910007541 Zn O Inorganic materials 0.000 description 21
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 19
- 239000010936 titanium Substances 0.000 description 19
- 229910052719 titanium Inorganic materials 0.000 description 19
- 150000002739 metals Chemical class 0.000 description 18
- 239000011261 inert gas Substances 0.000 description 17
- 239000011787 zinc oxide Substances 0.000 description 17
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 16
- 238000002347 injection Methods 0.000 description 16
- 239000007924 injection Substances 0.000 description 16
- 229910052782 aluminium Inorganic materials 0.000 description 15
- 230000006866 deterioration Effects 0.000 description 15
- 239000011777 magnesium Substances 0.000 description 15
- 229910052761 rare earth metal Inorganic materials 0.000 description 15
- 150000002910 rare earth metals Chemical class 0.000 description 15
- 229910052581 Si3N4 Inorganic materials 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 239000011651 chromium Substances 0.000 description 14
- 229910052710 silicon Inorganic materials 0.000 description 14
- 239000010703 silicon Substances 0.000 description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 14
- 239000000203 mixture Substances 0.000 description 13
- 229910052757 nitrogen Inorganic materials 0.000 description 13
- 239000012299 nitrogen atmosphere Substances 0.000 description 13
- 238000000206 photolithography Methods 0.000 description 13
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 12
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 12
- 229910052804 chromium Inorganic materials 0.000 description 12
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 12
- 229910003437 indium oxide Inorganic materials 0.000 description 11
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 11
- 230000008569 process Effects 0.000 description 11
- 229910052721 tungsten Inorganic materials 0.000 description 11
- 239000010937 tungsten Substances 0.000 description 11
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 10
- 238000000180 cavity ring-down spectroscopy Methods 0.000 description 10
- 239000001307 helium Substances 0.000 description 10
- 229910052734 helium Inorganic materials 0.000 description 10
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 10
- 239000007769 metal material Substances 0.000 description 10
- 229910044991 metal oxide Inorganic materials 0.000 description 10
- 150000004706 metal oxides Chemical class 0.000 description 10
- 229910052750 molybdenum Inorganic materials 0.000 description 10
- 239000011733 molybdenum Substances 0.000 description 10
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 10
- 239000002356 single layer Substances 0.000 description 10
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 9
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 9
- 239000013078 crystal Substances 0.000 description 9
- 229910052749 magnesium Inorganic materials 0.000 description 9
- 239000011159 matrix material Substances 0.000 description 9
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 9
- 238000001039 wet etching Methods 0.000 description 9
- 229910052726 zirconium Inorganic materials 0.000 description 9
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 8
- 239000000460 chlorine Substances 0.000 description 8
- 229910052801 chlorine Inorganic materials 0.000 description 8
- 150000001875 compounds Chemical class 0.000 description 8
- 239000004020 conductor Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 8
- 229910052759 nickel Inorganic materials 0.000 description 8
- 229960001730 nitrous oxide Drugs 0.000 description 8
- 229910000077 silane Inorganic materials 0.000 description 8
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 7
- 229910052779 Neodymium Inorganic materials 0.000 description 7
- 229910052733 gallium Inorganic materials 0.000 description 7
- 230000005525 hole transport Effects 0.000 description 7
- 229910052738 indium Inorganic materials 0.000 description 7
- 239000011572 manganese Substances 0.000 description 7
- QEFYFXOXNSNQGX-UHFFFAOYSA-N neodymium atom Chemical compound [Nd] QEFYFXOXNSNQGX-UHFFFAOYSA-N 0.000 description 7
- 229910052754 neon Inorganic materials 0.000 description 7
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 7
- 235000013842 nitrous oxide Nutrition 0.000 description 7
- 229910000521 B alloy Inorganic materials 0.000 description 6
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 6
- 230000003213 activating effect Effects 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 239000007788 liquid Substances 0.000 description 6
- 239000011368 organic material Substances 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 6
- 229910001122 Mischmetal Inorganic materials 0.000 description 5
- 239000012300 argon atmosphere Substances 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 239000000428 dust Substances 0.000 description 5
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 description 5
- 239000011521 glass Substances 0.000 description 5
- 229910052735 hafnium Inorganic materials 0.000 description 5
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 5
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 5
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 5
- 238000005259 measurement Methods 0.000 description 5
- 239000010955 niobium Substances 0.000 description 5
- 229910052758 niobium Inorganic materials 0.000 description 5
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 5
- 150000004767 nitrides Chemical class 0.000 description 5
- 229910052697 platinum Inorganic materials 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 229920005989 resin Polymers 0.000 description 5
- 229910052720 vanadium Inorganic materials 0.000 description 5
- GPPXJZIENCGNKB-UHFFFAOYSA-N vanadium Chemical compound [V]#[V] GPPXJZIENCGNKB-UHFFFAOYSA-N 0.000 description 5
- 239000011701 zinc Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 4
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 4
- 239000004696 Poly ether ether ketone Substances 0.000 description 4
- 239000004697 Polyetherimide Substances 0.000 description 4
- 229910052791 calcium Inorganic materials 0.000 description 4
- 239000011575 calcium Substances 0.000 description 4
- 238000004140 cleaning Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 229910001882 dioxygen Inorganic materials 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 229910001068 laves phase Inorganic materials 0.000 description 4
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 4
- 229920003023 plastic Polymers 0.000 description 4
- 239000004033 plastic Substances 0.000 description 4
- 229920002492 poly(sulfone) Polymers 0.000 description 4
- 229920001230 polyarylate Polymers 0.000 description 4
- 229920001707 polybutylene terephthalate Polymers 0.000 description 4
- 229920002530 polyetherether ketone Polymers 0.000 description 4
- 229920001601 polyetherimide Polymers 0.000 description 4
- 229920000139 polyethylene terephthalate Polymers 0.000 description 4
- 239000005020 polyethylene terephthalate Substances 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 229910052706 scandium Inorganic materials 0.000 description 4
- SIXSYDAISGFNSX-UHFFFAOYSA-N scandium atom Chemical compound [Sc] SIXSYDAISGFNSX-UHFFFAOYSA-N 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 229910052715 tantalum Inorganic materials 0.000 description 4
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 4
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 4
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 description 4
- 229910052723 transition metal Inorganic materials 0.000 description 4
- 150000003624 transition metals Chemical class 0.000 description 4
- 235000014692 zinc oxide Nutrition 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- 229910052684 Cerium Inorganic materials 0.000 description 3
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 3
- 229910019092 Mg-O Inorganic materials 0.000 description 3
- 229910019395 Mg—O Inorganic materials 0.000 description 3
- 229910052777 Praseodymium Inorganic materials 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 230000003197 catalytic effect Effects 0.000 description 3
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 229910052746 lanthanum Inorganic materials 0.000 description 3
- FZLIPJUXYLNCLC-UHFFFAOYSA-N lanthanum atom Chemical compound [La] FZLIPJUXYLNCLC-UHFFFAOYSA-N 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- PUDIUYLPXJFUGB-UHFFFAOYSA-N praseodymium atom Chemical compound [Pr] PUDIUYLPXJFUGB-UHFFFAOYSA-N 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 239000007787 solid Substances 0.000 description 3
- 239000000126 substance Substances 0.000 description 3
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 description 3
- 229910052718 tin Inorganic materials 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- 239000002699 waste material Substances 0.000 description 3
- 229910052727 yttrium Inorganic materials 0.000 description 3
- VWQVUPCCIRVNHF-UHFFFAOYSA-N yttrium atom Chemical compound [Y] VWQVUPCCIRVNHF-UHFFFAOYSA-N 0.000 description 3
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 3
- ZSLUVFAKFWKJRC-IGMARMGPSA-N 232Th Chemical compound [232Th] ZSLUVFAKFWKJRC-IGMARMGPSA-N 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229910052691 Erbium Inorganic materials 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- CPELXLSAUQHCOX-UHFFFAOYSA-N Hydrogen bromide Chemical compound Br CPELXLSAUQHCOX-UHFFFAOYSA-N 0.000 description 2
- 229920012266 Poly(ether sulfone) PES Polymers 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- 239000004743 Polypropylene Substances 0.000 description 2
- 229910000676 Si alloy Inorganic materials 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052776 Thorium Inorganic materials 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 2
- 229910010382 TiMn2 Inorganic materials 0.000 description 2
- 229910011212 Ti—Fe Inorganic materials 0.000 description 2
- 229910052769 Ytterbium Inorganic materials 0.000 description 2
- XECAHXYUAAWDEL-UHFFFAOYSA-N acrylonitrile butadiene styrene Chemical compound C=CC=C.C=CC#N.C=CC1=CC=CC=C1 XECAHXYUAAWDEL-UHFFFAOYSA-N 0.000 description 2
- 239000004676 acrylonitrile butadiene styrene Substances 0.000 description 2
- 229920000122 acrylonitrile butadiene styrene Polymers 0.000 description 2
- 229910052784 alkaline earth metal Inorganic materials 0.000 description 2
- 150000001342 alkaline earth metals Chemical class 0.000 description 2
- UQZIWOQVLUASCR-UHFFFAOYSA-N alumane;titanium Chemical compound [AlH3].[Ti] UQZIWOQVLUASCR-UHFFFAOYSA-N 0.000 description 2
- CSDREXVUYHZDNP-UHFFFAOYSA-N alumanylidynesilicon Chemical compound [Al].[Si] CSDREXVUYHZDNP-UHFFFAOYSA-N 0.000 description 2
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052790 beryllium Inorganic materials 0.000 description 2
- ATBAMAFKBVZNFJ-UHFFFAOYSA-N beryllium atom Chemical compound [Be] ATBAMAFKBVZNFJ-UHFFFAOYSA-N 0.000 description 2
- WUKWITHWXAAZEY-UHFFFAOYSA-L calcium difluoride Chemical compound [F-].[F-].[Ca+2] WUKWITHWXAAZEY-UHFFFAOYSA-L 0.000 description 2
- 229910001634 calcium fluoride Inorganic materials 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 229910010272 inorganic material Inorganic materials 0.000 description 2
- 239000011147 inorganic material Substances 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 239000004417 polycarbonate Substances 0.000 description 2
- 229920000515 polycarbonate Polymers 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920000728 polyester Polymers 0.000 description 2
- 239000011112 polyethylene naphthalate Substances 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229920001155 polypropylene Polymers 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229920002689 polyvinyl acetate Polymers 0.000 description 2
- 239000011118 polyvinyl acetate Substances 0.000 description 2
- 229920000915 polyvinyl chloride Polymers 0.000 description 2
- 239000004800 polyvinyl chloride Substances 0.000 description 2
- 238000001552 radio frequency sputter deposition Methods 0.000 description 2
- 230000003252 repetitive effect Effects 0.000 description 2
- 239000000565 sealant Substances 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 229920003002 synthetic resin Polymers 0.000 description 2
- 239000000057 synthetic resin Substances 0.000 description 2
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 2
- 238000001771 vacuum deposition Methods 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- ZVWKZXLXHLZXLS-UHFFFAOYSA-N zirconium nitride Chemical compound [Zr]#N ZVWKZXLXHLZXLS-UHFFFAOYSA-N 0.000 description 2
- 239000004215 Carbon black (E152) Substances 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 229910020923 Sn-O Inorganic materials 0.000 description 1
- YHMKWOWVAIPFMP-UHFFFAOYSA-N [O-2].[Fe+2].[In+3].[Zn+2] Chemical class [O-2].[Fe+2].[In+3].[Zn+2] YHMKWOWVAIPFMP-UHFFFAOYSA-N 0.000 description 1
- AZWHFTKIBIQKCA-UHFFFAOYSA-N [Sn+2]=O.[O-2].[In+3] Chemical compound [Sn+2]=O.[O-2].[In+3] AZWHFTKIBIQKCA-UHFFFAOYSA-N 0.000 description 1
- 239000005407 aluminoborosilicate glass Substances 0.000 description 1
- 239000005354 aluminosilicate glass Substances 0.000 description 1
- 229910052788 barium Inorganic materials 0.000 description 1
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000005388 borosilicate glass Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229930195733 hydrocarbon Natural products 0.000 description 1
- 150000002430 hydrocarbons Chemical class 0.000 description 1
- 229910000042 hydrogen bromide Inorganic materials 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 229910052748 manganese Inorganic materials 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- GVGCUCJTUSOZKP-UHFFFAOYSA-N nitrogen trifluoride Chemical compound FN(F)F GVGCUCJTUSOZKP-UHFFFAOYSA-N 0.000 description 1
- 239000001272 nitrous oxide Substances 0.000 description 1
- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229910001936 tantalum oxide Inorganic materials 0.000 description 1
- 239000013076 target substance Substances 0.000 description 1
- 238000002230 thermal chemical vapour deposition Methods 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000013519 translation Methods 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- 229910001930 tungsten oxide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- OYQCBJZGELKKPM-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O-2].[Zn+2].[O-2].[In+3] OYQCBJZGELKKPM-UHFFFAOYSA-N 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
Definitions
- the present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.
- a thin film transistor in which a semiconductor film is formed on an insulating surface is a semiconductor element that is essential to a flat panel display such as a liquid crystal display device or a light-emitting device and a semiconductor device such as an IC. Since there is limitation on manufacture of a thin film transistor in terms of allowable temperature limit of a substrate, a thin film transistor in which amorphous silicon that can be deposited at relatively low temperature, polysilicon that can be obtained by crystallization with use of laser light or a catalytic element, or the like is included in an active layer is mainly used for a semiconductor display device.
- a metal oxide having semiconductor characteristics which is called an oxide semiconductor has attracted attention.
- a metal oxide is used for various applications.
- indium oxide is a well-known metal oxide and used as a transparent electrode material included in a liquid crystal display device or the like.
- metal oxides having semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, and zinc oxide.
- Thin film transistors including such metal oxide having semiconductor characteristics in its channel formation region have been proposed (Patent Documents 1 to 4 and Non-Patent Document 1).
- multi-component oxides as well as single-component oxides are known.
- InGaO 3 (ZnO) m (m: natural number) having a homologous series is known as a multi-component oxide semiconductor including In, Ga, and Zn (Non-Patent Documents 2 to 4).
- an oxide semiconductor including such an In—Ga—Zn-based oxide is applicable to a channel layer of a thin film transistor (Patent Document 5, Non-Patent Documents 5 and 6).
- a conductive film including a metal, a metal compound, or an alloy that can absorb or adsorb moisture, a hydroxy group, or hydrogen is formed to overlap with the oxide semiconductor film with an insulating film provided therebetween. Then, heat treatment under a reduced-pressure atmosphere or an inert gas atmosphere is performed in the state where the conductive film is exposed; in such a manner, activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the conductive film is performed. The heat treatment is performed at 350° C. to 650° C.
- impurities such as moisture, a hydroxy group, or hydrogen which are present in the oxide semiconductor film, in a gate insulating film, or at the interface between the oxide semiconductor film and another insulating film and its vicinity are absorbed or adsorbed by the conductive film which has been activated; therefore, deterioration in characteristics of the transistor due to the impurities can be prevented.
- an insulating film is formed so as to cover the conductive film, whereby moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the conductive film; therefore, the conductive film can be kept to be activated, and reliability of the transistor can be increased.
- the conductive film can be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen.
- a metal having the above characteristics titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given.
- the rare earth metal an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used.
- the conductive film may be a mixture, a metal compound, or an alloy which includes one or more of the above metals.
- the conductive film may be used as a gate electrode of the thin film transistor, or may be used as a source electrode or a drain electrode of the thin film transistor. Alternatively, the conductive film may be used as a back gate electrode which is formed to overlap with a gate electrode with the oxide semiconductor film provided therebetween.
- heat treatment is performed under an inert gas atmosphere such as a nitrogen atmosphere or a rare gas (e.g., argon or helium) atmosphere in the state where the oxide semiconductor film is exposed.
- the heat treatment is preferably performed at 400° C. or higher and lower than the temperature at which an oxide semiconductor is almost crystallized (i.e., lower than 700° C.). Note that this heat treatment is performed at a temperature not exceeding the allowable temperature limit of the substrate to be used.
- a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor, a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor, a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxide semiconductor, or an In—Ga—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor,
- an In—Sn—Ga—Zn—O-based oxide semiconductor means a metal oxide including indium (In), tin (Sn), gallium (Ga), and zinc (Zn).
- In indium
- Sn tin
- Ga gallium
- Zn zinc
- the above oxide semiconductor may include silicon.
- oxide semiconductors can be represented by the chemical formula, InMO 3 (ZnO) m (m>0).
- M represents one or more metal elements selected from Ga, Al, Mn, or Co.
- the resistance of the oxide semiconductor film is reduced by the heat treatment.
- an oxide insulating film is formed in contact with the low-resistance oxide semiconductor film, whereby the carrier concentration of at least a region in the low-resistance oxide semiconductor film in contact with the oxide insulating film is reduced (preferably to lower than 1 ⁇ 10 18 /cm 3 , more preferably to 1 ⁇ 10 14 /cm 3 or lower), so that the resistance of at least the region is increased.
- the carrier concentration and resistance of the oxide semiconductor film can be controlled by formation of the oxide insulating film or the like, so that a semiconductor device which includes a thin film transistor with favorable electric characteristics and high reliability can be manufactured and provided.
- an inorganic insulating film which blocks impurities such as moisture, hydrogen ions, and OH ⁇ is used as the oxide insulating film formed to be in contact with the low-resistance oxide semiconductor film.
- an inorganic insulating film which blocks impurities such as moisture, hydrogen ions, and OH ⁇ is used as the oxide insulating film formed to be in contact with the low-resistance oxide semiconductor film.
- a silicon oxide film or a silicon nitride oxide film is used as a silicon nitride oxide film.
- the transistor may be a bottom-gate transistor, a top-gate transistor, or a bottom-contact transistor.
- the bottom-gate transistor includes, for example, a gate electrode over an insulating surface; a gate insulating film over the gate electrode; an oxide semiconductor film overlapping with the gate electrode with the gate insulating film provided therebetween; a source electrode and a drain electrode over the oxide semiconductor film; an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode; and a back gate electrode overlapping with the oxide semiconductor film with the oxide insulating film provided therebetween.
- the top-gate transistor includes, for example, an oxide semiconductor film over an insulating surface; a gate insulating film which is an oxide insulating film over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween and functioning as a conductive film.
- the bottom-contact transistor includes, for example, a gate electrode over an insulating surface; a gate insulating film over the gate electrode; a source electrode and a drain electrode over the gate insulating film; an oxide semiconductor film which is over the source electrode and the drain electrode and overlaps with the gate electrode with the gate insulating film provided therebetween; an oxide insulating film over the oxide semiconductor film; and a back gate electrode overlapping with the oxide semiconductor film with the oxide insulating film provided therebetween.
- Heat treatment in a furnace or a rapid thermal annealing method is used for the heat treatment.
- RTA method a method using a lamp light source or a method in which a substrate is moved in a heated gas and heat treatment is performed for a short time can be employed. With the use of the RTA method, it is also possible to make the time necessary for heat treatment shorter than 0.1 hour. Note that in the case where a glass substrate is used as a substrate, heat treatment is performed at higher than or equal to 300° C. and lower than or equal to the strain point of the glass substrate.
- a thin film transistor having stable electric characteristics can be manufactured and provided.
- a semiconductor device which includes a highly reliable thin film transistor having favorable electric characteristics can be provided.
- FIGS. 1A to 1E illustrate a method for manufacturing a semiconductor device.
- FIGS. 2A and 2B are top views of a manufactured thin film transistor.
- FIGS. 3A to 3D illustrate a method for manufacturing a semiconductor device.
- FIGS. 4A and 4B are top views of a manufactured thin film transistor.
- FIGS. 5A to 5E illustrate a method for manufacturing a semiconductor device.
- FIGS. 6A and 6B are top views of a manufactured thin film transistor.
- FIGS. 7A to 7C illustrate a method for manufacturing a semiconductor device.
- FIGS. 8A to 8C illustrate a method for manufacturing a semiconductor device.
- FIGS. 9A to 9C illustrate a method for a manufacturing a semiconductor device.
- FIG. 10 illustrates a method for manufacturing a semiconductor device.
- FIG. 11 illustrates a method for manufacturing a semiconductor device.
- FIG. 12 illustrates a method for manufacturing a semiconductor device.
- FIG. 13 illustrates a method for manufacturing a semiconductor device.
- FIG. 14 is a cross-sectional view of a liquid crystal display device.
- FIGS. 15A to 15C are cross-sectional views of light-emitting devices.
- FIG. 16 illustrates a structure of a liquid crystal display device module.
- FIGS. 17A to 17E illustrate electronic devices using semiconductor devices.
- the present invention can be applied to manufacture of any kind of semiconductor devices including microprocessors, integrated circuits such as image processing circuits, RF tags, semiconductor display devices, and the like.
- a semiconductor device means any device which can function by utilizing semiconductor characteristics, and a semiconductor display device, a semiconductor circuit, and an electronic device are all included in the category of the semiconductor device.
- the semiconductor display devices include the following in its category: liquid crystal display devices, light-emitting devices in which a light-emitting element typified by an organic light-emitting element (OLED) is provided for each pixel, electronic papers, digital micromirror devices (DMDs), plasma display panels (PDPs), field emission displays (FEDs), and other semiconductor display devices in which a circuit element using a semiconductor film is included in a driver circuit.
- liquid crystal display devices light-emitting devices in which a light-emitting element typified by an organic light-emitting element (OLED) is provided for each pixel
- electronic papers digital micromirror devices (DMDs), plasma display panels (PDPs), field emission displays (FEDs), and other semiconductor display devices in which a circuit element using a semiconductor film is included in a driver circuit.
- DMDs digital micromirror devices
- PDPs plasma display panels
- FEDs field emission displays
- FIGS. 1A to 1E and FIGS. 2A and 2B A method for manufacturing a semiconductor device will be described with reference to FIGS. 1A to 1E and FIGS. 2A and 2B with use of a bottom-gate thin film transistor as an example.
- a gate electrode 101 is formed over a substrate 100 having an insulating surface.
- An insulating film serving as a base film may be provided between the substrate 100 and the gate electrode 101 .
- the base film can be formed to have a single-layer structure or a stacked-layer structure using one or more insulating films which prevent diffusion of impurity elements from the substrate 100 , specifically, a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or a silicon oxynitride film.
- the gate electrode 101 can be formed to have a single-layer structure or a stacked-layer structure using one or more conductive films using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium; an alloy material which contains any of these metal materials as its main component; or a nitride which contains any of these metals.
- a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium
- an alloy material which contains any of these metal materials as its main component
- a nitride which contains any of these metals.
- aluminum or copper can also be used as the above metal material as long as it can withstand the temperature of heat treatment performed later.
- a two-layer structure of the gate electrode 101 a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferable.
- a three-layer structure of the gate electrode 101 a three-layer structure in which a tungsten film or a tungsten nitride film, an aluminum-silicon alloy film or an aluminum-titanium alloy film, and a titanium nitride film or a titanium film are stacked is preferable.
- an oxynitride is a substance that contains more oxygen than nitrogen
- a nitride oxide is a substance that contains more nitrogen than oxygen
- the gate electrode 101 is formed to a thickness of 10 nm to 400 nm, preferably 100 nm to 200 nm.
- a conductive film for the gate electrode is formed to a thickness of 150 nm by a sputtering method using a tungsten target, and then, the conductive film is processed (patterned) into a desired shape by etching; in such a manner, the gate electrode 101 is formed.
- a gate insulating film 102 is formed over the gate electrode 101 .
- the gate insulating film 102 can be formed to have a single-layer structure or a stacked-layer structure of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and/or a silicon nitride oxide film by a plasma CVD method, a sputtering method, or the like.
- a silicon oxynitride film may be formed using a deposition gas including silane (for example, monosilane), oxygen, and nitrogen by a plasma CVD method.
- the gate insulating film 102 is formed to a thickness of 200 nm by a plasma CVD method.
- the gate insulating film 102 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- an oxide semiconductor film is formed over the gate insulating film 102 .
- the oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target.
- the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- dust attached to a surface of the gate insulating film 102 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated.
- the reverse sputtering refers to a method in which, without application of voltage to a target side, an RF power source is used for application of voltage to a substrate side in an argon atmosphere to generate plasma in the vicinity of the substrate to modify a surface.
- an argon atmosphere a nitrogen atmosphere, a helium atmosphere, or the like may be used.
- an argon atmosphere to which oxygen, nitrous oxide, or the like is added may be used.
- an argon atmosphere to which chlorine, carbon tetrafluoride, or the like is added may be used.
- the oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described above.
- the thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm.
- a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- the gate insulating film 102 and the oxide semiconductor film may be formed successively without exposure to air. Successive film formation without exposure to air makes it possible to obtain each interface of stacked layers, which is not contaminated by atmospheric components or impurity elements floating in air, such as water, hydrocarbon, or the like. Therefore, variation in characteristics of the thin film transistor can be reduced.
- the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shaped oxide semiconductor film 103 is formed over the gate insulating film 102 so as to overlap with the gate electrode 101 with the gate insulating film 102 provided therebetween.
- the island-shaped oxide semiconductor film 103 is subjected to heat treatment at higher than or equal to 400° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 650° C. under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere.
- a CRDS cavity-ring-down spectroscopy
- the island-shaped oxide semiconductor film 103 is slowly cooled to a temperature which is higher than or equal to room temperature and lower than 100° C. under an inert atmosphere.
- a temperature which is higher than or equal to room temperature and lower than 100° C. under an inert atmosphere By heat treatment performed on the oxide semiconductor film 103 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in the oxide semiconductor film 103 are eliminated; in such a manner, an island-shaped oxide semiconductor film 104 is formed as illustrated in FIG. 1B . Therefore, deterioration in characteristics of a thin film transistor in which the oxide semiconductor film 104 serves as a channel formation region due to the above impurities can be prevented.
- heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C.
- a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used.
- GRTA gas rapid thermal anneal
- LRTA lamp rapid thermal anneal
- the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min
- nitrogen or a rare gas such as helium, neon, or argon it is preferable that moisture, hydrogen, and the like be not contained in nitrogen or a rare gas such as helium, neon, or argon.
- nitrogen or a rare gas such as helium, neon, or argon introduced into an apparatus for heat treatment have a purity of 6N (99.9999%) or more, preferably, 7N (99.99999%) or more (that is, the impurity concentration is 1 ppm or lower, preferably, 0.1 ppm or lower).
- the heat treatment may be performed under air where the dew point under an atmospheric pressure is ⁇ 60° C. or lower and the moisture content is small, instead of an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere.
- the island-shaped oxide semiconductor film 104 which is formed through the heat treatment under an inert gas atmosphere or a reduced-pressure atmosphere may be partially crystallized.
- heat treatment is performed on the oxide semiconductor film 104 under an oxygen atmosphere, whereby impurities such as moisture included in the oxide semiconductor film 104 can be removed.
- the heat treatment is performed under an oxygen atmosphere in order that the oxide semiconductor film 104 may include excessive oxygen, whereby resistance thereof can be increased.
- the heat treatment is performed at a temperature where a metal having a low melting point such as Zn included in the oxide semiconductor is less likely to be evaporated, for example, higher than or equal to 100° C. and lower than 350° C., preferably higher than or equal to 150° C. and lower than 250° C. It is preferable that an oxygen gas used for the heat treatment under an oxygen atmosphere do not include moisture, hydrogen, or the like.
- an oxygen gas which is introduced into the heat treatment apparatus preferably has a purity of 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the impurity concentration in oxygen is 1 ppm or lower, preferably 0.1 ppm or lower).
- a conductive film for a source electrode and a drain electrode is formed over the island-shaped oxide semiconductor film 104 , and then, the conductive film is patterned by etching or the like to form a source electrode 105 and a drain electrode 106 .
- the patterning for forming the source electrode 105 and the drain electrode 106 an exposed portion of the island-shaped oxide semiconductor film 104 is partly etched, whereby an island-shaped oxide semiconductor film 107 having a groove (a recessed portion) is formed.
- the conductive film is preferably formed using a material that can withstand heat treatment in a later step.
- a material of the conductive film for the source electrode and the drain electrode an element selected from chromium, tantalum, titanium, molybdenum, tungsten, zirconium, beryllium, thorium, manganese, or magnesium, an alloy containing one or more of these elements as its component, or the like can be given.
- the conductive film for the source electrode and the drain electrode may be formed in combination of the above material with a heat resistant conductive material such as neodymium, scandium, or a nitride of these elements.
- the source electrode 105 and the drain electrode 106 are formed to a thickness of 10 nm to 400 nm, preferably 100 nm to 300 nm.
- a conductive film for the source electrode and the drain electrode is formed to a thickness of 200 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching, whereby the source electrode 105 and the drain electrode 106 are formed.
- FIG. 2A is a top view of a semiconductor device illustrated in FIG. 1C .
- FIG. 1C corresponds to a cross-sectional view taken along dashed line A 1 -A 2 in FIG. 2A .
- an oxide insulating film 108 is formed in contact with the island-shaped oxide semiconductor film 107 , the source electrode 105 , and the drain electrode 106 by a sputtering method.
- the oxide insulating film 108 is formed in contact with the low-resistance island-shaped oxide semiconductor film 107 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like.
- a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 108 .
- the substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment.
- Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- a silicon oxide target or a silicon target may be used as a target.
- a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen.
- the oxide insulating film 108 When the oxide insulating film 108 is formed in contact with the low-resistance oxide semiconductor film 107 by a sputtering method, a PCVD method, or the like, the carrier concentration of at least a region in the low-resistance oxide semiconductor film 107 in contact with the oxide insulating film 108 is reduced, preferably to lower than 1 ⁇ 10 18 /cm 3 , so that the resistance of at least the region is increased. Thus, a high-resistance oxide semiconductor region can be formed.
- the oxide semiconductor film 107 has a high-resistance oxide semiconductor region in the vicinity of the interface between the oxide insulating film 108 and the oxide semiconductor film 107 .
- the oxide semiconductor film 107 may be again subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C.
- the heat treatment after the source electrode 105 and the drain electrode 106 are formed is preferably performed at a temperature lower than the temperature of the heat treatment before the source electrode 105 and the drain electrode 106 are formed.
- the heat treatment after the source electrode 105 and the drain electrode 106 are formed may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C.
- a conductive film is formed over the oxide insulating film 108 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby a back gate electrode 109 is formed to overlap with the oxide semiconductor film 107 .
- the metal having such characteristics titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given.
- the rare earth metal an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used.
- the back gate electrode 109 may be a mixture, a metal compound, or an alloy which includes one or more of the above metals.
- an alloy called a hydrogen absorbing alloy can also be given.
- the hydrogen absorbing alloy for example, an AB 5 alloy, an AB 2 (Laves phase) alloy, an A 2 B alloy, or the like can be given.
- the AB 5 alloy one or more of a rare earth metal, niobium, and zirconium are included in A site, and one or more transition metals having a catalytic effect such as nickel, cobalt, aluminum, and tin are included in B site.
- a misch metal can also be used.
- the AB 5 alloy for example, LaNi 5 or the like can be used for the back gate electrode 109 .
- the AB 2 (Laves phase) alloy one or more of titanium, zirconium, and hafnium are included in A site, and one or more transition metals such as manganese, nickel, chromium, and vanadium are included in B site; for example, a Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, or the like can be given.
- the AB 2 alloy for example, TiCr 2 , TiMn 2 , or the like can be used for the back gate electrode 109 .
- the A 2 B alloy one or more of magnesium and titanium are included in A site, and one or more of nickel and copper are included in B site.
- the A 2 B alloy for example, Mg 2 Ni, Mg 2 Cu, Ti 2 Ni, or the like can be used for the back gate electrode 109 .
- the hydrogen absorbing alloy in addition to the above type alloys, a Ti—Fe alloy, a V-type alloy, a Pd-type alloy, a Ca-type alloy, a BCC alloy, or the like can be used for the back gate electrode 109 .
- the thickness of the back gate electrode 109 is set to 10 nm to 400 nm, preferably 100 nm to 200 nm.
- a conductive film of 200 nm thick is formed using TiCr 2 by a sputtering method under the following conditions: an alloy that is a target ( ⁇ :6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the back gate electrode 109 is formed.
- heat treatment is performed under a reduced-pressure atmosphere or an inert gas (such as nitrogen, helium, neon, or argon) atmosphere in the state where the back gate electrode 109 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the back gate electrode 109 is performed.
- the heat treatment is preferably performed at a temperature lower than the temperature of the heat treatment before the source electrode 105 and the drain electrode 106 are formed.
- the heat treatment is performed at higher than or equal to 300° C. and lower than or equal to 650° C., preferably higher than or equal to 350° C. and lower than or equal to 600° C.
- impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the oxide semiconductor film 107 , in the gate insulating film 102 , at the interface between the oxide semiconductor film 107 and the gate insulating film 102 and its vicinity, or at the interface between the oxide semiconductor film 107 and the oxide insulating film 108 and its vicinity are absorbed or adsorbed by the back gate electrode 109 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture or hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 107 .
- heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5 ⁇ 10 ⁇ 3 Pa or less, preferably 10 ⁇ 5 Pa or less by an evacuation unit such as a turbo molecular pump.
- a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used.
- GRTA gas rapid thermal anneal
- LRTA lamp rapid thermal anneal
- the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- heat treatment for activation is performed in the state where the oxide semiconductor film 107 is in contact with the oxide insulating film 108 . Therefore, a region of the oxide semiconductor film 107 in contact with the oxide insulating film 108 uniformly has higher resistance; thus, variation in electric characteristics of a thin film transistor 111 can be reduced.
- an insulating film 110 is formed so as to cover the back gate electrode 109 as illustrated in FIG. 1E .
- the insulating film 110 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in the back gate electrode 109 .
- the insulating film 110 can be formed to have a single-layer structure or a stacked-layer structure of a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, an aluminum nitride oxide film, or the like, as an insulating film having a high barrier property, by a plasma CVD method, a sputtering method, or the like.
- the insulating film 110 is preferably formed to a thickness of 15 nm to 400 nm, for example.
- an insulating film is formed to a thickness of 300 nm by a plasma CVD method.
- the insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- the back gate electrode 109 By the formation of the insulating film 110 , moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 109 ; therefore, the back gate electrode 109 can be kept to be activated, and reliability of the transistor can be increased.
- FIG. 2B is a top view of the semiconductor device in FIG. 1E .
- FIG 1 E corresponds to a cross-sectional view taken along dashed line A 1 -A 2 in FIG. 2B .
- the thin film transistor 111 includes the gate electrode 101 ; the gate insulating film 102 over the gate electrode 101 ; the oxide semiconductor film 107 over the gate insulating film 102 ; the source electrode 105 and the drain electrode 106 over the oxide semiconductor film 107 ; the oxide insulating film 108 over the source electrode 105 and the drain electrode 106 ; and the back gate electrode 109 over the oxide insulating film 108 .
- the back gate electrode 109 is formed to overlap with the oxide semiconductor film 107 , whereby impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the oxide semiconductor film 107 , in the gate insulating film 102 , at the interface between the oxide semiconductor film 107 and the gate insulating film 102 and its vicinity, or at the interface between the oxide semiconductor film 107 and the oxide insulating film 108 and its vicinity are absorbed or adsorbed by the back gate electrode 109 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture or hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 107 .
- the back gate electrode 109 covers the whole oxide semiconductor film 107 ; however, the present invention is not limited to this structure. Since the back gate electrode 109 covers the whole oxide semiconductor film 107 , an effect of reducing the impurities in the oxide semiconductor film 107 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in the oxide semiconductor film 107 or part of the portion overlaps with the back gate electrode 109 .
- the back gate electrode 109 may be electrically insulated and in a floating state, or may be in a state where the back gate electrode 109 is supplied with a potential. In the case of the latter, the back gate electrode 109 may be supplied with the same potential as the gate electrode 101 , or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to the back gate electrode 109 is controlled, whereby the threshold voltage of the thin film transistor 111 can be controlled.
- the back gate electrode 109 is formed using a metal material having low electrical conductivity such as TiCr 2 , a conductive film having low resistance is fanned in contact with the back gate electrode 109 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented.
- the step of performing heat treatment for activating the back gate electrode 109 and the step of forming the insulating film 110 in contact with the back gate electrode 109 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture and oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 109 .
- the back gate electrode 109 can be kept to be activated, and the reliability of the thin film transistor 111 can be more increased.
- a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the back gate electrode 109 and the step of forming the insulating film 110 in contact with the back gate electrode 109 .
- Such a process is also within the scope of the successive treatment in this specification.
- the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps.
- the gate electrode 101 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after the gate electrode 101 is formed, the gate electrode 101 may be subjected to heat treatment for activation under the same condition as the back gate electrode 109 .
- the gate electrode 101 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 107 , in the gate insulating film 102 , at the interface between the oxide semiconductor film 107 and the gate insulating film 102 and its vicinity, or at the interface between the oxide semiconductor film 107 and the oxide insulating film 108 and its vicinity are absorbed or adsorbed by the gate electrode 101 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 107 , in the gate insulating film 102 , at the interface between the oxide semiconductor film 107 and the gate insulating film 102 and its vicinity, or at the interface between the oxide semiconductor film 107 and the oxide insulating film 108 and its vicinity are absorbed or adsorbed by the gate electrode 101 which has been activated; therefore
- a method for manufacturing a semiconductor device including a bottom-contact thin film transistor having a structure which is different from the structure of the thin film transistor 111 described in Embodiment 1 will be described._The same portion as or a portion having a function similar to those described in Embodiment 1 can be formed in a manner similar to that described in Embodiment 1, and also the steps similar to those of Embodiment 1 can be performed in a manner similar to those described in Embodiment 1; therefore, repetitive description is omitted.
- FIGS. 3A to 3D and FIGS. 4A and 4B A method for manufacturing a semiconductor device will be described with reference to FIGS. 3A to 3D and FIGS. 4A and 4B .
- a gate electrode 201 is formed over a substrate 200 having an insulating surface.
- An insulating film serving as a base film may be provided between the substrate 200 and the gate electrode 201 .
- the material and the structure of the gate electrode 101 described in Embodiment 1 may be referred to for the material and the structure of the gate electrode 201 .
- the material and the structure of the base film described in Embodiment 1 may be referred to for the material and the structure of the base film.
- a gate insulating film 202 is formed over the gate electrode 201 .
- the material, the structure, and the formation method of the gate insulating film 102 described in Embodiment 1 may be referred to for the material, the structure, and the formation method of the gate insulating film 202 .
- the gate insulating film 202 is formed to a thickness of 200 nm by a plasma CVD method.
- the gate insulating film 202 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- a conductive film for a source electrode and a drain electrode is formed over the gate insulating film 202 . Then, the conductive film is processed (patterned) into a desired shape by etching or the like, whereby a source electrode 203 and a drain electrode 204 are formed.
- the material and the structure of the conductive film which is patterned for forming the source electrode 105 and the drain electrode 106 in Embodiment 1 may be referred to for the material and the structure of the conductive film.
- the source electrode 203 and the drain electrode 204 are formed to have a smaller thickness than the source electrode and the drain electrode in Embodiment 1, and are formed to a thickness of 10 nm to 300 nm, preferably 100 mn to 200 nm.
- a conductive film for the source electrode and the drain electrode is formed to a thickness of 150 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching, whereby the source electrode 203 and the drain electrode 204 are formed.
- an oxide semiconductor film is formed over the source electrode 203 , the drain electrode 204 , and the gate insulating film 202 .
- An oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described in Embodiment 1.
- the oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target.
- the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- dust attached to a surface of the gate insulating film 202 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated.
- the thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm.
- a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shaped oxide semiconductor film 205 is formed over the gate insulating film 202 so as to overlap with the gate electrode 201 with the gate insulating film 202 provided therebetween.
- the island-shaped oxide semiconductor film 205 is subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere.
- the heat treatment for the oxide semiconductor film 103 described in Embodiment 1 may be referred to for the heat treatment for the oxide semiconductor film 205 .
- the heat treatment may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C. in consideration of the heat resistance of the source electrode 203 and the drain electrode 204 .
- the oxide semiconductor film 205 By heat treatment performed on the oxide semiconductor film 205 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in the oxide semiconductor film 205 are eliminated; in such a manner, an island-shaped oxide semiconductor film 206 is formed as illustrated in FIG. 3B . Therefore, deterioration in characteristics of a thin film transistor in which the oxide semiconductor film 206 serves as a channel formation region due to the above impurities can be prevented.
- heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C.
- heat treatment is performed on the oxide semiconductor film 205 to form the oxide semiconductor film 206 .
- heat treatment is performed on the oxide semiconductor film 206 under an oxygen atmosphere, whereby impurities such as moisture included in the oxide semiconductor film 206 can be removed.
- the heat treatment is performed under an oxygen atmosphere in order that the oxide semiconductor film 206 may include excessive oxygen, whereby resistance thereof can be increased.
- the heat treatment under an oxygen atmosphere for the oxide semiconductor film 104 described in Embodiment 1 may be referred to for the heat treatment under an oxygen atmosphere for the oxide semiconductor film 206 .
- FIG. 4A is a top view of the semiconductor device in FIG. 3B .
- FIG. 3B corresponds to a cross-sectional view taken along dashed line B 1 -B 2 in FIG. 4A .
- an oxide insulating film 207 is formed in contact with the island-shaped oxide semiconductor film 206 , the source electrode 203 , and the drain electrode 204 by a sputtering method.
- the oxide insulating film 207 is formed in contact with the low-resistance island-shaped oxide semiconductor film 206 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like.
- a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 207 .
- the substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment.
- Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- a silicon oxide target or a silicon target may be used as a target.
- a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen.
- the oxide insulating film 207 When the oxide insulating film 207 is formed in contact with the low-resistance oxide semiconductor film 206 by a sputtering method, a PCVD method, or the like, the carrier concentration of at least a region in the low-resistance oxide semiconductor film 206 in contact with the oxide insulating film 207 is reduced, preferably to lower than 1 ⁇ 10 18 /cm 3 , so that the resistance of at least the region is increased. Thus, a high-resistance oxide semiconductor region can be formed.
- the oxide semiconductor film 206 has a high-resistance oxide semiconductor region in the vicinity of the interface between the oxide insulating film 207 and the oxide semiconductor film 206 .
- a conductive film is formed over the oxide insulating film 207 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby a back gate electrode 208 is formed to overlap with the oxide semiconductor film 206 .
- the material and the structure of the back gate electrode 109 described in Embodiment 1 may be referred to for the material and the structure of the back gate electrode 208 .
- a conductive film of 200 nm thick is formed using TiCr 2 by a sputtering method under the following conditions: an alloy that is a target ( ⁇ :6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the back gate electrode 208 is formed.
- impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 206 , in the gate insulating film 202 , at the interface between the oxide semiconductor film 206 and the gate insulating film 202 and its vicinity, or at the interface between the oxide semiconductor film 206 and the oxide insulating film 207 and its vicinity are absorbed or adsorbed by the back gate electrode 208 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture and hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 206 .
- heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5 ⁇ 10 ⁇ 3 Pa or less, preferably 10 ⁇ 5 Pa or less by an evacuation unit such as a turbo molecular pump.
- heat treatment for activation is performed in the state where the oxide semiconductor film 206 is in contact with the oxide insulating film 207 . Therefore, a region of the oxide semiconductor film 206 in contact with the oxide insulating film 207 uniformly has higher resistance; thus, variation in electric characteristics of a thin film transistor 211 can be reduced.
- an insulating film 210 is formed so as to cover the back gate electrode 208 as illustrated in FIG. 3D .
- the insulating film 210 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in the back gate electrode 208 .
- the material and the structure of the insulating film 110 described in Embodiment 1 may be referred to for the material and the structure of the insulating film 210 .
- an insulating film is formed to a thickness of 300 nm by a plasma CVD method.
- the insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- the back gate electrode 208 By the formation of the insulating film 210 , moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 208 ; therefore, the back gate electrode 208 can be kept to be activated, and reliability of the transistor can be increased.
- FIG. 4B is a top view of the semiconductor device in FIG. 3D .
- FIG. 3D corresponds to a cross-sectional view taken along dashed line B 1 -B 2 in FIG. 4B .
- the thin film transistor 211 includes the gate electrode 201 ; the gate insulating film 202 over the gate electrode 201 ; the source electrode 203 and the drain electrode 204 over the gate insulating film 202 ; the oxide semiconductor film 206 over the gate electrode 201 , the source electrode 203 , and the drain electrode 204 ; the oxide insulating film 207 over the oxide semiconductor film 206 ; and the back gate electrode 208 over the oxide insulating film 207 .
- the back gate electrode 208 is formed to overlap with the oxide semiconductor film 206 , whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 206 , in the gate insulating film 202 , at the interface between the oxide semiconductor film 206 and the gate insulating film 202 and its vicinity, or at the interface between the oxide semiconductor film 206 and the oxide insulating film 207 and its vicinity are absorbed or adsorbed by the back gate electrode 208 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture and hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 206 .
- the back gate electrode 208 covers the whole oxide semiconductor film 206 ; however, the present invention is not limited to this structure. Since the back gate electrode 208 covers the whole oxide semiconductor film 206 , an effect of reducing the impurities in the oxide semiconductor film 206 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in the oxide semiconductor film 206 or part of the portion overlaps with the back gate electrode 208 .
- the back gate electrode 208 may be electrically insulated and in a floating state, or may be in a state where the back gate electrode 208 is supplied with a potential. In the case of the latter, the back gate electrode 208 may be supplied with the same potential as the gate electrode 201 , or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to the back gate electrode 208 is controlled, whereby the threshold voltage of the thin film transistor 211 can be controlled.
- the back gate electrode 208 is formed using a metal material having low electrical conductivity such as TiCr 2 , a conductive film having low resistance is formed in contact with the back gate electrode 208 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented.
- the step of performing heat treatment for activating the back gate electrode 208 and the step of forming the insulating film 210 in contact with the back gate electrode 208 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture and oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 208 .
- the back gate electrode 208 can be kept to be activated, and the reliability of the thin film transistor 211 can be more increased.
- a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the back gate electrode 208 and the step of forming the insulating film 210 in contact with the back gate electrode 208 .
- Such a process is also within the scope of the successive treatment in this specification.
- the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps.
- the gate electrode 201 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after the gate electrode 201 is formed, the gate electrode 201 may be subjected to heat treatment for activation under the same condition as the back gate electrode 208 .
- the gate electrode 201 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 206 , in the gate insulating film 202 , at the interface between the oxide semiconductor film 206 and the gate insulating film 202 and its vicinity, or at the interface between the oxide semiconductor film 206 and the oxide insulating film 207 and its vicinity are absorbed or adsorbed by the gate electrode 201 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 206 , in the gate insulating film 202 , at the interface between the oxide semiconductor film 206 and the gate insulating film 202 and its vicinity, or at the interface between the oxide semiconductor film 206 and the oxide insulating film 207 and its vicinity are absorbed or adsorbed by the gate electrode 201 which has been activate
- This embodiment can be implemented in combination with another embodiment as appropriate.
- a method for manufacturing a semiconductor device including a bottom-gate thin film transistor having a structure which is different from the structure of the thin film transistor 111 described in Embodiment 1 and the structure of the thin film transistor 211 described in Embodiment 2 will be described.
- the same portion as or a portion having a function similar to those described in Embodiment 1 can be formed in a manner similar to that described in Embodiment 1, and also the steps similar to those of Embodiment 1 can be performed in a manner similar to those described in Embodiment 1; therefore, repetitive description is omitted.
- FIGS. 5A to 5E and FIGS. 6A and 6B A method for manufacturing a semiconductor device will be described with reference to FIGS. 5A to 5E and FIGS. 6A and 6B .
- a gate electrode 301 is formed over a substrate 300 having an insulating surface.
- An insulating film serving as a base film may be provided between the substrate 300 and the gate electrode 301 .
- the material and the structure of the gate electrode 101 described in Embodiment 1 may be referred to for the material and the structure of the gate electrode 301 .
- the material and the structure of the base film described in Embodiment 1 may be referred to for the material and the structure of the base film.
- a gate insulating film 302 is formed over the gate electrode 301 .
- the material, the structure, and the formation method of the gate insulating film 102 described in Embodiment 1 may be referred to for the material, the structure, and the formation method of the gate insulating film 302 .
- the gate insulating film 302 is formed to a thickness of 200 nm by a plasma CVD method.
- the gate insulating film 302 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- An oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described in Embodiment 1.
- the oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target.
- the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- dust attached to a surface of the gate insulating film 302 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated.
- the thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm.
- a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shaped oxide semiconductor film 303 is formed over the gate insulating film 302 so as to overlap with the gate electrode 301 with the gate insulating film 302 provided therebetween.
- the island-shaped oxide semiconductor film 303 is subjected to heat treatment under an inert gas (such as nitrogen, helium, neon, or argon) atmosphere.
- the heat treatment for the oxide semiconductor film 103 described in Embodiment 1 may be referred to for the heat treatment for the oxide semiconductor film 303 .
- an island-shaped oxide semiconductor film 304 is formed as illustrated in FIG. 5B . Therefore, deterioration in characteristics of a thin film transistor in which the oxide semiconductor film 304 serves as a channel formation region due to the above impurities can be prevented.
- heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C.
- heat treatment is performed on the oxide semiconductor film 303 to form the oxide semiconductor film 304 .
- heat treatment is performed on the oxide semiconductor film 304 under an oxygen atmosphere, whereby impurities such as moisture included in the oxide semiconductor film 304 can be removed.
- the heat treatment is performed under an oxygen atmosphere in order that the oxide semiconductor film 304 may include excessive oxygen, whereby resistance thereof can be increased.
- the heat treatment under an oxygen atmosphere for the oxide semiconductor film 104 described in Embodiment 1 may be referred to for the heat treatment under an oxygen atmosphere for the oxide semiconductor film 304 .
- a channel protective film 305 is formed over the oxide semiconductor film 304 so as to overlap with a portion of the oxide semiconductor film 304 , which serves as a channel formation region later.
- the channel protective film 305 can prevent the portion of the oxide semiconductor film 304 , which serves as a channel formation region later, from being damaged in a later step (for example, reduction in thickness due to plasma or an etchant in etching). Therefore, reliability of the thin film transistor can be improved.
- the channel protective film 305 can be formed using an inorganic material including oxygen (such as silicon oxide, silicon oxynitride, or silicon nitride oxide).
- the channel protective film 305 can be formed by a vapor deposition method such as a plasma CVD method or a thermal CVD method, or a sputtering method. After the formation of the channel protective film 305 , the shape thereof is processed by etching.
- the channel protective film 305 is formed in such a manner that a silicon oxide film is formed by a sputtering method and processed by etching using a mask formed by photolithography.
- the channel protective film 305 which is an oxide insulating film is formed in contact with the island-shaped oxide semiconductor film 304 by a sputtering method, a PCVD method, or the like
- the carrier concentration of at least a region in the island-shaped oxide semiconductor film 304 in contact with the channel protective film 305 is reduced, preferably to lower than 1 ⁇ 10 18 /cm 3 , more preferably to 1 ⁇ 10 14 /cm 3 or lower, so that the resistance of at least the region is increased.
- a high-resistance oxide semiconductor region can be formed.
- the oxide semiconductor film 304 has a high-resistance oxide semiconductor region in the vicinity of the interface between the oxide semiconductor film 304 and the channel protective film 305 .
- a conductive film for a source electrode and a drain electrode is formed over the island-shaped oxide semiconductor film 304 .
- the conductive film is processed (patterned) into a desired shape by etching or the like, whereby a source electrode 306 and a drain electrode 307 are formed in contact with the island-shaped oxide semiconductor film 304 as illustrated in FIG. 5C .
- the material and the structure of the conductive film which is patterned for forming the source electrode 105 and the drain electrode 106 described in Embodiment 1 may be referred to for the material and the structure of the conductive film.
- a conductive film for the source electrode and the drain electrode is formed to a thickness of 200 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching; in such a manner, the source electrode 306 and the drain electrode 307 are formed.
- FIG. 6A is a top view of the semiconductor device in FIG. 5C .
- FIG. 5C corresponds to a cross-sectional view taken along dashed line C 1 -C 2 in FIG. 6A .
- an oxide insulating film 308 is formed over the island-shaped oxide semiconductor film 304 , the source electrode 306 , and the drain electrode 307 by a sputtering method.
- the oxide insulating film 308 is formed over the low-resistance island-shaped oxide semiconductor film 304 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like.
- a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 308 .
- the substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment.
- Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen.
- a silicon oxide target or a silicon target may be used as a target.
- a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen.
- a conductive film is formed over the oxide insulating film 308 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby a back gate electrode 309 is formed to overlap with the oxide semiconductor film 304 .
- the material and the structure of the back gate electrode 109 described in Embodiment 1 may be referred to for the material and the structure of the back gate electrode 309 .
- a conductive film of 200 nm thick is formed using TiCr 2 by a sputtering method under the following conditions: an alloy that is a target ( ⁇ :6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 scan; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the back gate electrode 309 is formed.
- impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 304 , in the gate insulating film 302 , at the interface between the oxide semiconductor film 304 and the gate insulating film 302 and its vicinity, or at the interface between the oxide semiconductor film 304 and the oxide insulating film 308 and its vicinity are absorbed or adsorbed by the back gate electrode 309 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture and hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 304 .
- heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5 ⁇ 10 ⁇ 3 Pa or less, preferably 10 ⁇ 5 Pa or less by an evacuation unit such as a turbo molecular pump.
- heat treatment for activation is performed in the state where the oxide semiconductor film 304 is in contact with the channel protective film 305 . Therefore, a region of the oxide semiconductor film 304 in contact with the channel protective film 305 uniformly has higher resistance; thus, variation in electric characteristics of a thin film transistor 311 can be reduced.
- an insulating film 310 is formed so as to cover the back gate electrode 309 as illustrated in FIG. 5E .
- the insulating film 310 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in the back gate electrode 309 .
- the material and the structure of the insulating film 110 described in Embodiment 1 may be referred to for the material and the structure of the insulating film 310 .
- an insulating film is formed to a thickness of 300 nm by a plasma CVD method.
- the insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- the back gate electrode 309 By the formation of the insulating film 310 , moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 309 ; therefore, the back gate electrode 309 can be kept to be activated, and reliability of the transistor can be increased.
- FIG. 6B is a top view of the semiconductor device in FIG. 5E .
- FIG. 5E corresponds to a cross-sectional view taken along dashed line C 1 -C 2 in FIG. 6B .
- the thin film transistor 311 includes the gate electrode 301 ; the gate insulating film 302 over the gate electrode 301 ; the oxide semiconductor film 304 over the gate insulating film 302 ; the channel protective film 305 , the source electrode 306 , and the drain electrode 307 over the oxide semiconductor film 304 ; the oxide insulating film 308 over the channel protective film 305 , the source electrode 306 , and the drain electrode 307 ; and the back gate electrode 309 over the oxide insulating film 308 .
- the back gate electrode 309 is formed to overlap with the oxide semiconductor film 304 , whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the oxide semiconductor film 304 , in the gate insulating film 302 , at the interface between the oxide semiconductor film 304 and the gate insulating film 302 and its vicinity, or at the interface between the oxide semiconductor film 304 and the oxide insulating film 308 and its vicinity are absorbed or adsorbed by the back gate electrode 309 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture and hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 304 .
- the back gate electrode 309 covers the whole oxide semiconductor film 304 ; however, the present invention is not limited to this structure. Since the back gate electrode 309 covers the whole oxide semiconductor film 304 , an effect of reducing the impurities in the oxide semiconductor film 304 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in the oxide semiconductor film 304 or part of the portion overlaps with the back gate electrode 309 .
- the back gate electrode 309 may be electrically insulated and in a floating state, or may be in a state where the back gate electrode 309 is supplied with a potential. In the case of the latter, the back gate electrode 309 may be supplied with the same potential as the gate electrode 301 , or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to the back gate electrode 309 is controlled, whereby the threshold voltage of the thin film transistor 311 can be controlled.
- the back gate electrode 309 is formed using a metal material having low electrical conductivity such as TiCr 2 , a conductive film having low resistance is formed in contact with the back gate electrode 309 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented.
- the step of performing heat treatment for activating the back gate electrode 309 and the step of forming the insulating film 310 in contact with the back gate electrode 309 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture or oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 309 .
- the back gate electrode 309 can be kept to be activated, and the reliability of the thin film transistor 311 can be more increased.
- a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the back gate electrode 309 and the step of forming the insulating film 310 in contact with the back gate electrode 309 .
- Such a process is also within the scope of the successive treatment in this specification.
- the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps.
- the gate electrode 301 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after the gate electrode 301 is formed, the gate electrode 301 may be subjected to heat treatment for activation under the same condition as the back gate electrode 309 .
- the gate electrode 301 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the oxide semiconductor film 304 , in the gate insulating film 302 , at the interface between the oxide semiconductor film 304 and the gate insulating film 302 and its vicinity, or at the interface between the oxide semiconductor film 304 and the oxide insulating film 308 and its vicinity are absorbed or adsorbed by the gate electrode 301 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the oxide semiconductor film 304 , in the gate insulating film 302 , at the interface between the oxide semiconductor film 304 and the gate insulating film 302 and its vicinity, or at the interface between the oxide semiconductor film 304 and the oxide insulating film 308 and its vicinity are absorbed or adsorbed by the gate electrode 301 which has been activate
- This embodiment can be implemented in combination with another embodiment as appropriate.
- FIGS. 7A to 7C a method for manufacturing a semiconductor display device according to one embodiment of the present invention will be described with reference to FIGS. 7A to 7C , FIGS. 8A to 8C , FIGS. 9A to 9C , FIG. 10 , FIG. 11 , FIG. 12 , and FIG. 13 .
- any of a variety of glass substrates that are used in the electronics industry such as aluminosilicate glass, barium borosilicate glass, and aluminoborosilicate glass can be used.
- a substrate formed from a flexible synthetic resin, such as plastic generally tends to have a low upper temperature limit, but can be used as the substrate 400 as long as the substrate can withstand processing temperatures in the manufacturing process performed later.
- plastic substrate examples include polyester typified by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile-butadiene-styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, and the like.
- PET polyethylene terephthalate
- PES polyethersulfone
- PEN polyethylene naphthalate
- PC polycarbonate
- PEEK polyetheretherketone
- PSF polysulfone
- PEI polyetherimide
- PAR polyarylate
- PBT polybutylene terephthalate
- polyimide acrylonitrile-butadiene-styrene resin
- a conductive film is formed over an entire surface of the substrate 400 , and then a first photolithography step is performed.
- a resist mask is formed, and then an unnecessary portion is removed by etching, so that wirings and electrodes (a gate wiring including a gate electrode 401 , a capacitor wiring 408 , and a first terminal 421 ) are formed.
- the etching is performed so that at least an end portion of the gate electrode 401 has a tapered shape.
- the conductive film can be formed to have a single-layer structure or a stacked-layer structure using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium; an alloy material which contains any of these metal materials as its main component; or a nitride which contains any of these metals.
- a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium
- an alloy material which contains any of these metal materials as its main component or a nitride which contains any of these metals.
- aluminum or copper can also be used as the above metal material as long as it can withstand the temperature of heat treatment performed later.
- a two-layer structure of the conductive film a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferable.
- a three-layer structure of the conductive film a three-layer structure in which a tungsten film or a tungsten nitride film, an aluminum-silicon alloy film or an aluminum-titanium alloy film, and a titanium nitride film or a titanium film are stacked is preferable.
- a gate insulating film 402 is formed over the gate electrode 401 , the capacitor wiring 408 , and the first terminal 421 .
- the gate insulating film 402 is formed to a thickness of 50 nm to 250 nm by a sputtering method, a PCVD method, or the like.
- a silicon oxide film is formed to a thickness of 100 nm by a sputtering method.
- the gate insulating film 402 is not necessarily formed using such a silicon oxide film and may be formed to have a single-layer structure or a stacked-layer structure using another insulating film such as a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, a tantalum oxide film, or the like.
- an island-shaped oxide semiconductor film (an In—Ga—Zn—O-based non-single-crystal film) 403 is formed over the gate insulating film 402 . It is effective to form the In—Ga—Zn—O-based non-single-crystal film without exposure to air after the plasma treatment because dust and moisture do not adhere to the interface between the gate insulating film 402 and the oxide semiconductor film 403 .
- DC direct current
- the In—Ga—Zn—O-based non-single-crystal film is formed to have a thickness of 5 nm to 200 nm.
- the oxide semiconductor film 403 for example, a 50-nm-thick In—Ga—Zn—O-based non-single-crystal film is fainted by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target.
- the oxide semiconductor film 403 for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described above.
- Examples of the sputtering method include an RF sputtering method in which a high-frequency power source is used as a sputtering power source, a DC sputtering method, and a pulsed DC sputtering method in which a bias is applied in a pulsed manner.
- An RF sputtering method is mainly used in the case where an insulating film is formed, and a DC sputtering method is mainly used in the case where a metal film is formed.
- multi-source sputtering apparatus in which a plurality of targets of different materials can be set.
- films of different materials can be formed to be stacked in the same chamber, or a film of plural kinds of materials can be deposited by electric discharge at the same time in the same chamber.
- a sputtering apparatus provided with a magnet system inside the chamber and used for a magnetron sputtering, and a sputtering apparatus used for an ECR sputtering in which plasma generated with the use of microwaves is used without using glow discharge.
- a deposition method using sputtering there are also a reactive sputtering method in which a target substance and a sputtering gas component are chemically reacted with each other during deposition to form a thin compound film thereof, and a bias sputtering in which a voltage is also applied to a substrate during deposition.
- a second photolithography step is performed.
- a resist mask is formed, and then the oxide semiconductor film is etched so that the shape of the island-shaped oxide semiconductor film 403 can be processed.
- an unnecessary portion is removed by wet etching using a mixed solution of phosphoric acid, acetic acid, and nitric acid, so that the island-shaped oxide semiconductor film 403 is formed to overlap with the gate electrode 401 .
- etching here is not limited to wet etching, and dry etching may also be performed.
- etching gas for dry etching a gas containing chlorine (chlorine-based gas such as chlorine (Cl 2 ), boron chloride (BCl 3 ), silicon chloride (SiCl 4 ), or carbon tetrachloride (CCl 4 )) is preferably used.
- a gas containing fluorine fluorine-based gas such as carbon tetrafluoride (CF 4 ), sulfur fluoride (SF 6 ), nitrogen fluoride (NF 3 ), or trifluoromethane (CHF 3 )); hydrogen bromide (HBO; oxygen (O 2 ); any of these gases to which a rare gas such as helium (He) or argon (Ar) is added; or the like can be used.
- fluorine-based gas such as carbon tetrafluoride (CF 4 ), sulfur fluoride (SF 6 ), nitrogen fluoride (NF 3 ), or trifluoromethane (CHF 3 )
- hydrogen bromide HBO
- oxygen (O 2 ) any of these gases to which a rare gas such as helium (He) or argon (Ar) is added; or the like can be used.
- the dry etching method a parallel plate RIE (reactive ion etching) method, an ICP (inductively coupled plasma) etching method, or the like can be used.
- the etching condition the amount of electric power applied to a coil-shaped electrode, the amount of electric power applied to an electrode on a substrate side, the temperature of the electrode on the substrate side, or the like is adjusted as appropriate.
- ITO-07N produced by KANTO CHEMICAL CO., INC.
- KANTO CHEMICAL CO., INC. may be used as an etchant used for wet etching.
- the etchant used in the wet etching is removed by cleaning together with the material which is etched off. Waste liquid of the etchant containing the removed material may be purified and the material contained in the waste liquid may be reused. When a material such as indium included in the oxide semiconductor film is collected from the waste liquid after the etching and reused, the resources can be efficiently used and the cost can be reduced.
- the etching conditions (such as an etchant, etching time, and temperature) are appropriately adjusted depending on the material so that the material can be etched into a desired shape.
- the oxide semiconductor film 403 is subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere, whereby an oxide semiconductor film 404 is formed.
- the island-shaped oxide semiconductor film 403 is subjected to heat treatment at higher than or equal to 400° C.
- the heated island-shaped oxide semiconductor film is slowly cooled to a temperature which is higher than or equal to room temperature and less than 100° C. under an inert atmosphere.
- a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light
- GRTA gas rapid thermal anneal
- LRTA lamp rapid thermal anneal
- the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- nitrogen or a rare gas such as helium, neon, or argon it is preferable that moisture, hydrogen, and the like be not contained in nitrogen or a rare gas such as helium, neon, or argon.
- nitrogen or a rare gas such as helium, neon, or argon introduced into an apparatus for heat treatment have a purity of 6N (99.9999%) or more, preferably, 7N (99.99999%) or more (that is, the impurity concentration is set to 1 ppm or lower, preferably, 0.1 ppm or lower).
- the heat treatment may be performed under air where the dew point under an atmospheric pressure is ⁇ 60° C. or lower and the moisture content is small, instead of an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere.
- the island-shaped oxide semiconductor film 404 which is formed through the heat treatment under an inert gas atmosphere may be partially crystallized.
- heat treatment is performed on the oxide semiconductor film 404 under an oxygen atmosphere, whereby impurities such as moisture included in the oxide semiconductor film 404 can be removed.
- the heat treatment is performed under an oxygen atmosphere in order that the oxide semiconductor film 404 may include excessive oxygen, whereby resistance thereof can be increased.
- the heat treatment is performed at a temperature where a metal having a low melting point such as Zn included in the oxide semiconductor is less likely to be evaporated, for example, higher than or equal to 100° C. and lower than 350° C., preferably higher than or equal to 150° C. and lower than 250° C. It is preferable that an oxygen gas used for the heat treatment under an oxygen atmosphere do not include moisture, hydrogen, or the like.
- an oxygen gas which is introduced into the heat treatment apparatus preferably has a purity of 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the impurity concentration in oxygen is 1 ppm or lower, preferably 0.1 ppm or lower).
- Cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in FIG. 7C correspond to cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in a plan view illustrated in FIG. 10 , respectively.
- a conductive film 406 is formed using a metal material over the oxide semiconductor film 404 by a sputtering method or a vacuum evaporation method.
- a material of the conductive film 406 an element selected from chromium, tantalum, titanium, molybdenum, tungsten, zirconium, beryllium, thorium, manganese, or magnesium, an alloy containing one or more of these elements as its component, or the like can be given.
- the conductive film 406 may be formed in combination of the above material with a heat resistant conductive material such as neodymium, scandium, or a nitride of these elements.
- a third photolithography step is performed.
- a resist mask is formed, and unnecessary portions are removed by etching, so that the source electrode 407 a, the drain electrode 407 b, and a second terminal 420 are formed as illustrated in FIG. 8B .
- Wet etching or dry etching is employed as an etching method at this time. For example, when a molybdenum film is used as the conductive film 406 , wet etching using a solution including phosphoric acid as an etchant can be carried out.
- an exposed region of the oxide semiconductor film 404 is also partly etched in some cases.
- an oxide semiconductor film 409 has a region whose thickness is small between the source electrode 407 a and the drain electrode 407 b.
- the second terminal 420 which is formed using the same material as the source electrode 407 a or the drain electrode 407 b is left in a terminal portion. Note that the second terminal 420 is electrically connected to a source wiring (a source wiring including the source electrode 407 a or the drain electrode 407 b ).
- a resist mask having regions with plural thicknesses e.g., two different thicknesses which is formed using a multi-tone mask
- the number of resist masks can be reduced, resulting in simplified process and lower costs.
- the oxide semiconductor film 409 may be again subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere in order to eliminate moisture, hydrogen, and a hydroxy group included in the oxide semiconductor film 409 .
- an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm ( ⁇ 55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is
- the heat treatment after the source electrode 407 a and the drain electrode 407 b are formed is preferably performed at a temperature lower than the temperature of the heat treatment before the source electrode 407 a and the drain electrode 407 b are formed.
- the heat treatment after the source electrode 407 a and the drain electrode 407 b are formed may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C.
- Cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in FIG. 8B correspond to cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in a plan view illustrated in FIG. 11 , respectively.
- an oxide insulating film 411 which covers the gate insulating film 402 , the oxide semiconductor film 409 , the source electrode 407 a, and the drain electrode 407 b is formed.
- the oxide insulating film 411 is formed using a silicon oxynitride film by a PCVD method.
- the oxide insulating film 411 which is a silicon oxynitride film and an exposed region of the oxide semiconductor film 409 which is provided between the source electrode 407 a and the drain electrode 407 b are in contact with each other, whereby the resistance of a region of the oxide semiconductor film 409 in contact with the oxide insulating film 411 is increased (i.e., the carrier concentration is reduced, preferably to lower than 1 ⁇ 10 18 /cm 3 ).
- the carrier concentration is reduced, preferably to lower than 1 ⁇ 10 18 /cm 3 .
- Heat treatment may be performed after formation of the oxide insulating film 411 .
- the treatment may be performed in an air atmosphere or a nitrogen atmosphere at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C.
- the oxide semiconductor film 409 in the state of being in contact with the oxide insulating film 411 is heated, which leads to increase in resistance of the oxide semiconductor film 409 ; thus, electric characteristics of the transistor can be improved and variation in electric characteristics can be reduced.
- There is no particular limitation on the timing of the heat treatment as long as it is performed after the oxide insulating film 411 is formed.
- this heat treatment also serves as heat treatment in another step, e.g., heat treatment in formation of a resin film or heat treatment for reducing resistance of a transparent conductive film, the number of steps can be prevented from increasing.
- a conductive film is formed over the oxide insulating film 411 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby a back gate electrode 412 is formed to overlap with the oxide semiconductor film 409 .
- the metal having such characteristics titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given.
- the rare earth metal an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used.
- the back gate electrode 412 may be a mixture, a metal compound, or an alloy which includes one or more of the above metals.
- an alloy called a hydrogen absorbing alloy can also be given.
- the hydrogen absorbing alloy for example, an AB 5 alloy, an AB 2 (Laves phase) alloy, an A 2 B alloy, or the like can be given.
- the AB 5 alloy one or more of a rare earth metal, niobium, and zirconium are included in A site, and one or more transition metals having a catalytic effect such as nickel, cobalt, aluminum, and tin are included in B site.
- a misch metal can also be used.
- the AB 5 alloy for example, LaNi 5 or the like can be used for the back gate electrode 412 .
- the AB 2 (Laves phase) alloy one or more of titanium, zirconium, and hafnium are included in A site, and one or more transition metals such as manganese, nickel, chromium, and vanadium are included in B site; for example, a Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, or the like can be given.
- the AB 2 alloy for example, TiCr 2 , TiMn 2 , or the like can be used for the back gate electrode 412 .
- the A 2 B alloy one or more of magnesium and titanium are included in A site, and one or more of nickel and copper are included in B site.
- a 2 B alloy for example, Mg 2 Ni, Mg 2 Cu, Ti 2 Ni, or the like can be used for the back gate electrode 412 .
- the hydrogen absorbing alloy in addition to the above type alloys, a Ti—Fe alloy, a V-type alloy, a Pd-type alloy, a Ca-type alloy, a BCC alloy, or the like can be used for the back gate electrode 412 .
- the thickness of the back gate electrode 412 is set to 10 nm to 400 nm, preferably 100 nm to 200 nm.
- a conductive film of 200 nm thick is formed using TiCr 2 by a sputtering method under the following conditions: an alloy that is a target ( ⁇ :6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the back gate electrode 412 is formed.
- the heat treatment is performed under a reduced-pressure atmosphere or an inert gas atmosphere in the state where the back gate electrode 412 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the back gate electrode 412 is performed.
- the heat treatment is preferably performed at a temperature lower than the temperature of the heat treatment before the source electrode 407 a and the drain electrode 407 b are formed.
- the heat treatment is performed at higher than or equal to 300° C. and lower than or equal to 650° C., preferably higher than or equal to 350° C. and lower than or equal to 600° C.
- impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the oxide semiconductor film 409 , in the gate insulating film 402 , at the interface between the oxide semiconductor film 409 and the gate insulating film 402 and its vicinity, or at the interface between the oxide semiconductor film 409 and the oxide insulating film 411 and its vicinity are absorbed or adsorbed by the back gate electrode 412 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented.
- impurities such as moisture or hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the oxide semiconductor film 409 .
- heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5 ⁇ 10 ⁇ 3 Pa or less, preferably 10 ⁇ 5 Pa or less by an evacuation unit such as a turbo molecular pump.
- a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used.
- GRTA gas rapid thermal anneal
- LRTA lamp rapid thermal anneal
- the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- heat treatment for activation is performed in the state where the oxide semiconductor film 409 is in contact with the oxide insulating film 411 . Therefore, a region of the oxide semiconductor film 409 in contact with the oxide insulating film 411 uniformly has higher resistance; thus, variation in electric characteristics of a thin film transistor 414 can be reduced.
- an insulating film 413 is formed so as to cover the back gate electrode 412 as illustrated in FIG. 9B .
- the insulating film 413 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in the back gate electrode 412 .
- the insulating film 413 can be formed to have a single-layer structure or a stacked-layer structure of a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film, or the like, as an insulating film having a high barrier property, by a plasma CVD method, a sputtering method, or the like.
- the insulating film 413 is preferably formed to a thickness of 15 nm to 400 nm, for example.
- the insulating film 413 is formed to a thickness of 300 nm by a plasma CVD method.
- the insulating film 413 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N 2 O) is 800 sccm; and the substrate temperature is 400° C.
- the back gate electrode 412 By the formation of the insulating film 413 , moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the back gate electrode 412 ; therefore, the back gate electrode 412 can be kept to be activated, and reliability of the transistor can be increased.
- Cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in FIG. 9B correspond to cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in a plan view illustrated in FIG. 12 , respectively.
- the thin film transistor 414 can be manufactured.
- a fourth photolithography step is performed.
- a resist mask is formed, and the gate insulating film 402 , the oxide insulating film 411 , and the insulating film 413 are etched, so that contact holes are formed to expose part of the drain electrode 407 b, part of the first terminal 421 , part of the second terminal 420 , and part of the back gate electrode 412 .
- the resist mask is removed, and then a transparent conductive film is formed.
- the transparent conductive film is formed of indium oxide (In 2 O 3 ), indium oxide-tin oxide alloy (In 2 O 3 —SnO 2 , abbreviated to ITO), or the like by a sputtering method, a vacuum evaporation method, or the like.
- Such a material is etched with a hydrochloric acid-based solution.
- indium oxide-zinc oxide alloy In 2 O 3 —ZnO
- the heat treatment can also serve as heat treatment for increasing resistance of the oxide semiconductor film 409 , which results in improvement of electric characteristics of the transistor and reduction of variation in the electric characteristics thereof.
- a fifth photolithography step is performed.
- a resist mask is formed and an unnecessary portion is removed by etching, so that a pixel electrode 415 which is connected to the drain electrode 407 b, a transparent conductive film 416 which is connected to the first terminal 421 , a transparent conductive film 417 which is connected to the second terminal 420 , and a transparent conductive film 418 which is connected to the back gate electrode 412 are formed.
- the transparent conductive films 416 and 417 function as electrodes or wirings connected to an FPC.
- the transparent conductive film 416 formed over the first terminal 421 is a connection terminal electrode which functions as an input terminal of the gate wiring.
- the transparent conductive film 417 formed over the second terminal 420 is a connection terminal electrode which functions as an input terminal of the source wiring.
- the transparent conductive film 418 is a wiring for supplying the back gate electrode 412 with a power supply potential.
- a storage capacitor 419 is formed with the capacitor wiring 408 and the pixel electrode 415 , in which the gate insulating film 402 , the oxide insulating film 411 , and the insulating film 413 are used as dielectrics.
- FIG. 9C Cross-sectional views after the resist mask is removed are illustrated in FIG. 9C .
- Cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in FIG. 9C correspond to cross-sectional views taken along dashed lines D 1 -D 2 and E 1 -E 2 in a plan view illustrated in FIG. 13 , respectively.
- the storage capacitor 419 and the thin film transistor 414 which is a bottom-gate staggered thin film transistor can be completed using the five photomasks.
- the thin film transistor and the storage capacitor By disposing the thin film transistor and the storage capacitor in each pixel in a pixel portion in which pixels are arranged in a matrix form, one of substrates for manufacturing an active matrix display device can be obtained. In this specification, such a substrate is referred to as an active matrix substrate for convenience.
- an active matrix substrate and a counter substrate provided with a counter electrode are bonded to each other with a liquid crystal layer interposed therebetween.
- the pixel electrode may be overlapped with a gate wiring of an adjacent pixel with the oxide insulating film and the gate insulating film interposed therebetween, to form a storage capacitor.
- pixel electrodes arranged in a matrix form are driven, so that a display pattern is formed on a screen. Specifically, voltage is applied between a selected pixel electrode and a counter electrode corresponding to the pixel electrode, so that a liquid crystal layer provided between the pixel electrode and the counter electrode is optically modulated and this optical modulation is recognized as a display pattern by an observer.
- a partition formed using an organic resin film may be provided between organic light-emitting elements in some cases.
- the organic resin film is subjected to heat treatment, and the heat treatment can also serve as heat treatment for increasing resistance of the oxide semiconductor film 409 , which results in improvement of electric characteristics of the transistor and reduction of variation in the electric characteristics thereof.
- an oxide semiconductor for a thin film transistor leads to reduction in manufacturing cost.
- impurities such as moisture, hydrogen, and OH can be reduced for increasing purity of the oxide semiconductor film by the heat treatment, it is not necessary to use an ultrapure oxide semiconductor target and a special sputtering apparatus provided with a deposition chamber whose dew point is lowered.
- a semiconductor display device including a highly reliable thin film transistor with excellent electric characteristics can be manufactured.
- the channel formation region in the semiconductor film is a high-resistance region; thus, electric characteristics of the thin film transistor are stabilized and increase in off current can be prevented. Therefore, a semiconductor display device including a thin film transistor having high electric characteristics and high reliability can be provided.
- This embodiment can be implemented in combination with any of the above embodiments.
- FIG. 14 illustrates a cross-sectional view of a liquid crystal display device according to one embodiment of the present invention, as an example.
- a thin film transistor 1401 illustrated in FIG. 14 includes a gate electrode 1402 formed on an insulating surface; a gate insulating film 1403 formed so as to cover the gate electrode 1402 ; an oxide semiconductor film 1404 formed so as to overlap with the gate electrode 1402 with the gate insulating film 1403 interposed therebetween; a pair of semiconductor films 1405 functioning as a source region and a drain region, which are formed over the oxide semiconductor film 1404 ; a pair of conductive films 1406 functioning as a source electrode and a drain electrode, which are formed over the pair of semiconductor films 1405 ; an oxide insulating film 1407 ; and a back gate electrode 1408 formed over the oxide insulating film 1407 .
- the back gate electrode 1408 is covered with an insulating film 1409 .
- the oxide insulating film 1407 is in contact with at least the oxide semiconductor film 1404 and formed so as to cover the gate electrode 1402 , the gate insulating film 1403 , the oxide semiconductor film 1404 , the pair of semiconductor films 1405 , and the pair of conductive films 1406 .
- An opening is provided in part of the oxide insulating film 1407 and the insulating film 1409 , and a pixel electrode 1410 is formed so as to be in contact with one of the conductive films 1406 in the opening.
- a spacer 1417 for controlling a cell gap of a liquid crystal element is formed over the pixel electrode 1410 .
- An insulating film is etched to have a desired shape, so that the spacer 1417 can be formed.
- a cell gap may also be controlled by dispersing a filler on the insulating film 1409 .
- An alignment film 1411 is formed over the pixel electrode 1410 .
- the alignment film 1411 can be formed by subjecting an insulating film to rubbing treatment, for example.
- a counter electrode 1413 is provided in a position opposed to the pixel electrode 1410 , and an alignment film 1414 is formed on the side of the counter electrode 1413 , which is close to the pixel electrode 1410 .
- a liquid crystal 1415 is provided in a region which is surrounded by a sealant 1416 between the pixel electrode 1410 and the counter electrode 1413 . Note that a filler may be mixed in the sealant 1416 .
- the pixel electrode 1410 and the counter electrode 1413 can be formed using a transparent conductive material such as indium tin oxide including silicon oxide (ITSO), indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO), for example.
- ITSO silicon oxide
- ITO indium tin oxide
- ZnO zinc oxide
- IZO indium zinc oxide
- GZO gallium-doped zinc oxide
- this embodiment describes an example of manufacturing a transmissive type liquid crystal element by using a light-transmitting conductive film for the pixel electrode 1410 and the counter electrode 1413 .
- the present invention is not limited to this structure.
- the liquid crystal display device according to one embodiment of the present invention may be a semi-transmissive type liquid crystal display device or a reflective type liquid crystal display device.
- the liquid crystal display device illustrated in FIG. 14 may be provided with a color filter, a shielding film (a black matrix) for preventing disclination (a black matrix), or the like.
- liquid crystal display device of a TN (twisted nematic) mode is described in this embodiment, the thin film transistor of the present invention can be used for other liquid crystal display devices of a VA (vertical alignment) mode, an OCB (optically compensated birefringence) mode, an IPS (in-plane-switching) mode, and the like.
- VA vertical alignment
- OCB optical compensated birefringence
- IPS in-plane-switching
- the liquid crystal display device according to one embodiment of the present invention has high reliability.
- This embodiment can be implemented in combination with another embodiment as appropriate.
- FIGS. 15A to 15C illustrate the case where a first electrode is a cathode and a second electrode is an anode; however, the first electrode may be an anode and the second electrode may be a cathode.
- FIG. 15A A cross-sectional view of a pixel in the case where a transistor 6031 is an n-channel transistor, and light emitted from a light-emitting element 6033 is extracted from a first electrode 6034 side is illustrated in FIG. 15A .
- the transistor 6031 is covered with an insulating film 6037 , and over the insulating film 6037 , a bank 6038 having an opening is formed.
- the first electrode 6034 is partially exposed, and the first electrode 6034 , an electroluminescent layer 6035 , and a second electrode 6036 are sequentially stacked in the opening.
- the first electrode 6034 is formed using such a material or to such a thickness as to transmit light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function.
- a metal such as Li or Cs
- an alkaline earth metal such as Mg, Ca, or Sr
- an alloy containing such metals e.g., Mg:Ag, Al:Li, or Mg:In
- a compound of such materials e.g., calcium fluoride or calcium nitride
- a rare-earth metal such as Yb or Er
- another conductive layer such as an aluminum layer may be used as well.
- the first electrode 6034 is formed to such a thickness as to transmit light (preferably, about 5 nm to 30 nm). Furthermore, the sheet resistance of the first electrode 6034 may be suppressed by formation of a light-transmitting conductive layer of a light-transmitting oxide conductive material so as to be in contact with and over or under the above-described conductive layer having such a thickness that it can transmit light. Alternatively, the first electrode 6034 may be formed of only a conductive layer of another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO).
- ITO indium tin oxide
- ZnO zinc oxide
- IZO indium zinc oxide
- GZO gallium-doped zinc oxide
- zinc oxide (ZnO) is mixed at 2% to 20% in ITO, indium tin oxide including silicon oxide (hereinafter referred to as ITSO), or indium oxide including silicon oxide may be used as well.
- ITSO indium tin oxide including silicon oxide
- the second electrode 6036 is formed using such a material and to such a thickness as to reflect or shield light, and formed using a material suitable for being used as an anode.
- the electroluminescent layer 6035 is formed with a single layer or a plurality of layers.
- these layers can be classified into a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, an electron-injection layer, and the like in view of the carrier-transport property.
- the electroluminescent layer 6035 has any of a hole-injection layer, a hole-transport layer, an electron-transport layer, and an electron-injection layer in addition to the light-emitting layer, the electron-injection layer, the electron-transport layer, the light-emitting layer, the hole-transport layer, and the hole-injection layer are sequentially stacked from the first electrode 6034 .
- the boundary between the layers is not necessarily clear, and there may be the case where the boundary is unclear since materials for forming the layers are partially mixed with each other.
- Each layer may be formed with an organic material or an inorganic material.
- any of a high molecular weight organic material, a medium molecular weight organic material, and a low molecular weight organic material may be used.
- a medium molecular weight organic material corresponds to a low polymer in which the number of repetitions of a structural unit (the degree of polymerization) is about 2 to 20.
- a hole-injection layer and a hole-transport layer and the hole-injection layer and the hole-transport layer are the same in a sense that a hole-transport property (hole mobility) is an especially important characteristic.
- a layer being in contact with the anode is referred to as a hole-injection layer and a layer being in contact with the hole-injection layer is referred to as a hole-transport layer for convenience.
- the light-emitting layer also functions as the electron-transport layer, and it is therefore referred to as a light-emitting electron-transport layer, too.
- light emitted from the light-emitting element 6033 can be extracted from the first electrode 6034 side as shown by a hollow arrow.
- FIG. 15B a cross-sectional view of a pixel in the case where a transistor 6041 is an n-channel transistor, and light emitted from a light-emitting element 6043 is extracted from a second electrode 6046 side is illustrated in FIG. 15B .
- the transistor 6041 is covered with an insulating film 6047 , and over the insulating film 6047 , a bank 6048 having an opening is formed.
- a first electrode 6044 is partially exposed, and the first electrode 6044 , an electroluminescent layer 6045 , and the second electrode 6046 are sequentially stacked in the opening.
- the first electrode 6044 is formed using such a material or to such a thickness as to reflect or shield light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function.
- a metal such as Li or Cs
- an alkaline earth metal such as Mg, Ca, or Sr
- an alloy containing such metals e.g., Mg:Ag, Al:Li, or Mg:In
- a compound of such materials e.g., calcium fluoride or calcium nitride
- a rare-earth metal such as Yb or Er
- another conductive layer such as an aluminum layer may be used as well.
- the second electrode 6046 is formed using such a material or to such a thickness as to transmit light, and formed using a material suitable for being used as an anode.
- a material suitable for being used as an anode for example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO) can be used for the second electrode 6046 .
- ITO indium tin oxide
- ZnO zinc oxide
- IZO indium zinc oxide
- GZO gallium-doped zinc oxide
- a mixture in which zinc oxide (ZnO) is mixed at 2% to 20% in ITO, ITSO, or indium oxide including silicon oxide may be used as well for the second electrode 6046 .
- a single-layer film including one or more of titanium nitride, zirconium nitride, titanium, tungsten, nickel, platinum, chromium, silver, aluminum, and the like, a stacked layer of a titanium nitride film and a film including aluminum as a main component, a three-layer structure of a titanium nitride film, a film including aluminum as a main component, and a titanium nitride film, or the like can be used for the second electrode 6046 .
- the second electrode 6046 is formed to such a thickness as to transmit light (preferably, about 5 nm to 30 nm).
- the electroluminescent layer 6045 can be formed in a manner similar to that of the electroluminescent layer 6035 of FIG. 15A .
- light emitted from the light-emitting element 6043 can be extracted from the second electrode 6046 side as shown by a hollow arrow.
- FIG. 15C a cross-sectional view of a pixel in the case where a transistor 6051 is an re-channel transistor, and light emitted from a light-emitting element 6053 is extracted from a first electrode 6054 side and a second electrode 6056 side is illustrated in FIG. 15C .
- the transistor 6051 is covered with an insulating film 6057 , and over the insulating film 6057 , a bank 6058 having an opening is formed.
- the first electrode 6054 is partially exposed, and the first electrode 6054 , an electroluminescent layer 6055 , and the second electrode 6056 are sequentially stacked in the opening.
- the first electrode 6054 can be formed in a manner similar to that of the first electrode 6034 of FIG. 15A .
- the second electrode 6056 can be formed in a manner similar to that of the second electrode 6046 of FIG. 15B .
- the electroluminescent layer 6055 can be formed in a manner similar to that of the electroluminescent layer 6035 of FIG. 15A .
- light emitted from the light-emitting element 6053 can be extracted from the first electrode 6054 side and the second electrode 6056 side as shown by hollow arrows.
- This embodiment can be implemented in combination with another embodiment as appropriate.
- FIG. 16 illustrates an example of a perspective view showing a structure of a liquid crystal display device of the present invention.
- the liquid crystal display device shown in FIG. 16 is provided with a liquid crystal panel 1601 in which a liquid crystal element is formed between a pair of substrates, a first diffusing plate 1602 , a prism sheet 1603 , a second diffusing plate 1604 , a light guide plate 1605 , a reflection plate 1606 , a light source 1607 , and a circuit substrate 1608 .
- the liquid crystal panel 1601 , the first diffusing plate 1602 , the prism sheet 1603 , the second diffusing plate 1604 , the light guide plate 1605 , and the reflection plate 1606 are sequentially stacked.
- the light source 1607 is provided at an end portion of the light guide plate 1605 .
- the liquid crystal panel 1601 is uniformly irradiated with light from the light source 1607 which is diffused inside the light guide plate 1605 due to the first diffusing plate 1602 , the prism sheet 1603 , and the second diffusing plate 1604 .
- the number of diffusing plates is not limited to two.
- the number of diffusing plates may be one, or may be three or more. It is acceptable as long as the diffusing plate is provided between the light guide plate 1605 and the liquid crystal panel 1601 . Therefore, a diffusing plate may be provided only on the side closer to the liquid crystal panel 1601 than the prism sheet 1603 , or may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603 .
- the cross section of the prism sheet 1603 is not limited to a sawtooth shape shown in FIG. 16 .
- the prism sheet 1603 is acceptable as long as it has a shape with which light from the light guide plate 1605 can be concentrated on the liquid crystal panel 1601 side.
- the circuit substrate 1608 is provided with a circuit which generates various kinds of signals input to the liquid crystal panel 1601 , a circuit which processes the signals, or the like.
- the circuit substrate 1608 and the liquid crystal panel 1601 are connected to each other through an FPC (flexible printed circuit) 1609 .
- the circuit may be connected to the liquid crystal panel 1601 by using a chip on glass (COG) method, or part of the circuit may be connected to the FPC 1609 by using a chip on film (COF) method.
- COG chip on glass
- COF chip on film
- FIG. 16 illustrates an example in which the circuit substrate 1608 is provided with a controlling circuit which controls driving of the light source 1607 and the controlling circuit and the light source 1607 are connected to each other through an FPC 1610 .
- the above-described controlling circuit may be formed over the liquid crystal panel 1601 . In that case, the liquid crystal panel 1601 and the light source 1607 are connected to each other through an FPC or the like.
- FIG. 16 illustrates an edge-light type light source where the light source 1607 is provided on the edge of the liquid crystal panel 1601
- a direct type light source where the light source 1607 are provided directly below the liquid crystal panel 1601 may be used.
- This embodiment can be implemented in combination with any of the above embodiments as appropriate.
- a highly reliable electronic device can be provided.
- the heat treatment temperature in manufacturing steps can be suppressed; therefore, a highly reliable thin film transistor with excellent characteristics can be formed even when the thin film transistor is formed over a substrate formed using a flexible synthetic resin which has lower heat resistance than glass, such as plastic. Accordingly, with the use of the manufacturing method according to one embodiment of the present invention, a highly reliable, lightweight, and flexible semiconductor display device with low power consumption can be provided.
- plastic substrate examples include polyester typified by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile-butadiene-styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, and the like.
- PET polyethylene terephthalate
- PES polyethersulfone
- PEN polyethylene naphthalate
- PC polycarbonate
- PEEK polyetheretherketone
- PSF polysulfone
- PEI polyetherimide
- PAR polyarylate
- PBT polybutylene terephthalate
- polyimide acrylonitrile-butadiene-styrene resin
- the semiconductor display device can be used for display devices, laptops, or image reproducing devices provided with recording media (typically, devices which reproduce the content of recording media such as digital versatile discs (DVDs) and have displays for displaying the reproduced images).
- recording media typically, devices which reproduce the content of recording media such as digital versatile discs (DVDs) and have displays for displaying the reproduced images.
- examples of the electronic device that can use a semiconductor display device according to one embodiment of the present invention include mobile phones, portable game machines, portable information terminals, e-book readers, cameras such as video cameras or digital still cameras, display goggles (head-mounted displays), navigation systems, audio reproducing devices (car audio systems, digital audio players, or the like), copying machines, facsimiles, printers, versatile printers, automated teller machines (ATMs), vending machines, and the like. Specific examples of these electronic devices are illustrated in FIGS. 17A to 17E .
- FIG. 17A illustrates an e-book reader including a housing 7001 , a display portion 7002 , and the like.
- the semiconductor display device according to one embodiment of the present invention can be used for the display portion 7002 .
- the use of the semiconductor display device according to one embodiment of the present invention for the display portion 7002 can provide a highly reliable e-book reader.
- the semiconductor display device used for the display portion 7002 can have flexibility. Thus, a highly reliable, flexible, lightweight, and useful display device can be provided.
- FIG. 17B illustrates a display device including a housing 7011 , a display portion 7012 , a supporting base 7013 , and the like.
- the semiconductor display device according to one embodiment of the present invention can be used for the display portion 7012 .
- the use of the semiconductor display device according to one embodiment of the present invention for the display portion 7012 can provide a highly reliable display device.
- the display device includes all of information display devices for personal computers, TV receivers, advertisement displays, and the like.
- FIG. 17C illustrates a display device including a housing 7021 , a display portion 7022 , and the like.
- the semiconductor display device according to one embodiment of the present invention can be used for the display portion 7022 .
- the use of the semiconductor display device according to one embodiment of the present invention for the display portion 7022 can provide a highly reliable display device.
- the semiconductor display device, the signal processing circuit, or the like included in the display portion 7022 can have flexibility.
- a highly reliable, flexible, and lightweight display device can be provided. Accordingly, as illustrated in FIG. 17C , the display device can be used while being fixed to fabric or the like, and an application range of the semiconductor display device is dramatically widened.
- FIG. 17D illustrates a portable game machine including a housing 7031 , a housing 7032 , a display portion 7033 , a display portion 7034 , a microphone 7035 , speakers 7036 , an operation key 7037 , a stylus 7038 , and the like.
- the semiconductor display device according to one embodiment of the present invention can be used for the display portion 7033 and the display portion 7034 .
- the use of the semiconductor display device according to one embodiment of the present invention for the display portion 7033 and the display portion 7034 can provide a highly reliable portable game machine. Note that although the portable game machine illustrated in FIG. 17D includes two display portions 7033 and 7034 , the number of display portions included in the portable game machine is not limited to two.
- FIG. 17E illustrates a mobile phone including a housing 7041 , a display portion 7042 , an audio-input portion 7043 , an audio-output portion 7044 , operation keys 7045 , a light-receiving portion 7046 , and the like.
- Light received in the light-receiving portion 7046 is converted into electrical signals, whereby external images can be loaded.
- the semiconductor device according to one embodiment of the present invention can be used for the display portion 7042 .
- the use of the semiconductor display device according to one embodiment of the present invention for the display portion 7042 can provide a highly reliable mobile phone.
Abstract
An object is to provide a method for manufacturing a highly reliable semiconductor device which includes a thin film transistor using an oxide semiconductor and having stable electric characteristics. In manufacture of a semiconductor device in which an oxide semiconductor is used for a channel formation region, after an oxide semiconductor film is formed, a conductive film including a metal, a metal compound, or an alloy that can absorb or adsorb moisture, a hydroxy group, or hydrogen is formed to overlap with the oxide semiconductor film with an insulating film provided therebetween. Then, heat treatment is performed in the state where the conductive film is exposed; in such a manner, activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the conductive film is performed.
Description
- This application is a divisional of U.S. application Ser. No. 12/893,513, filed Sep. 29, 2010, now allowed, which claims the benefit of a foreign priority application filed in Japan as Serial No. 2009-229323 on Oct. 1, 2009, both of which are incorporated by reference.
- The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.
- A thin film transistor in which a semiconductor film is formed on an insulating surface is a semiconductor element that is essential to a flat panel display such as a liquid crystal display device or a light-emitting device and a semiconductor device such as an IC. Since there is limitation on manufacture of a thin film transistor in terms of allowable temperature limit of a substrate, a thin film transistor in which amorphous silicon that can be deposited at relatively low temperature, polysilicon that can be obtained by crystallization with use of laser light or a catalytic element, or the like is included in an active layer is mainly used for a semiconductor display device.
- In recent years, as a novel semiconductor material which has a mobility as high as polysilicon and realizes such uniform element characteristics as are obtained with the use of amorphous silicon, a metal oxide having semiconductor characteristics which is called an oxide semiconductor has attracted attention. A metal oxide is used for various applications. For example, indium oxide is a well-known metal oxide and used as a transparent electrode material included in a liquid crystal display device or the like. Examples of such metal oxides having semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Thin film transistors including such metal oxide having semiconductor characteristics in its channel formation region have been proposed (
Patent Documents 1 to 4 and Non-Patent Document 1). - As metal oxides, multi-component oxides as well as single-component oxides are known. For example, InGaO3(ZnO)m (m: natural number) having a homologous series is known as a multi-component oxide semiconductor including In, Ga, and Zn (
Non-Patent Documents 2 to 4). Furthermore, it is confirmed that an oxide semiconductor including such an In—Ga—Zn-based oxide is applicable to a channel layer of a thin film transistor (Patent Document 5, Non-Patent Documents 5 and 6). -
- [Patent Document 1] Japanese Published Patent Application No. S60-198861
- [Patent Document 2] Japanese Published Patent Application No. H8-264794
- [Patent Document 3] Japanese Translation of PCT International Application No. H11-505377
- [Patent Document 4] Japanese Published Patent Application No. 2000-150900
- [Patent Document 5] Japanese Published Patent Application No. 2004-103957
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- [Non-Patent Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, “Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor”, SCIENCE, 2003, Vol. 300, pp. 1269-1272
- [Non-Patent Document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, “Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors”, NATURE, 2004, Vol. 432, pp. 488-492
- Variation in the threshold voltage due to time degradation is required to be small for a transistor included in a driver circuit of a flat panel display or a transistor used as a switching element of a pixel. An object of the present invention is to provide a method for manufacturing a highly reliable semiconductor device which includes a thin film transistor using an oxide semiconductor and having stable electric characteristics. Another object of the present invention is to provide a highly reliable semiconductor device which includes a thin film transistor using an oxide semiconductor and having stable electric characteristics.
- In manufacture of a semiconductor device including a transistor in which an oxide semiconductor is used for a channel formation region, after an oxide semiconductor film is formed, a conductive film including a metal, a metal compound, or an alloy that can absorb or adsorb moisture, a hydroxy group, or hydrogen is formed to overlap with the oxide semiconductor film with an insulating film provided therebetween. Then, heat treatment under a reduced-pressure atmosphere or an inert gas atmosphere is performed in the state where the conductive film is exposed; in such a manner, activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in the conductive film is performed. The heat treatment is performed at 350° C. to 650° C. By the above activation treatment, impurities such as moisture, a hydroxy group, or hydrogen which are present in the oxide semiconductor film, in a gate insulating film, or at the interface between the oxide semiconductor film and another insulating film and its vicinity are absorbed or adsorbed by the conductive film which has been activated; therefore, deterioration in characteristics of the transistor due to the impurities can be prevented.
- After the activation treatment, an insulating film is formed so as to cover the conductive film, whereby moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in the conductive film; therefore, the conductive film can be kept to be activated, and reliability of the transistor can be increased.
- The conductive film can be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. Specifically, as a metal having the above characteristics, titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given. As the rare earth metal, an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used. The conductive film may be a mixture, a metal compound, or an alloy which includes one or more of the above metals.
- The conductive film may be used as a gate electrode of the thin film transistor, or may be used as a source electrode or a drain electrode of the thin film transistor. Alternatively, the conductive film may be used as a back gate electrode which is formed to overlap with a gate electrode with the oxide semiconductor film provided therebetween.
- In order to reduce impurities such as moisture, a hydroxy group, and hydrogen in the oxide semiconductor film, after the oxide semiconductor film is formed, heat treatment is performed under an inert gas atmosphere such as a nitrogen atmosphere or a rare gas (e.g., argon or helium) atmosphere in the state where the oxide semiconductor film is exposed. The heat treatment is preferably performed at 400° C. or higher and lower than the temperature at which an oxide semiconductor is almost crystallized (i.e., lower than 700° C.). Note that this heat treatment is performed at a temperature not exceeding the allowable temperature limit of the substrate to be used.
- As the oxide semiconductor, a four-component metal oxide such as an In—Sn—Ga—Zn—O-based oxide semiconductor, a three-component metal oxide such as an In—Ga—Zn—O-based oxide semiconductor, an In—Sn—Zn—O-based oxide semiconductor, an In—Al—Zn—O-based oxide semiconductor, a Sn—Ga—Zn—O-based oxide semiconductor, an Al—Ga—Zn—O-based oxide semiconductor, or a Sn—Al—Zn—O-based oxide semiconductor, a two-component metal oxide such as an In—Zn—O-based oxide semiconductor, a Sn—Zn—O-based oxide semiconductor, an Al—Zn—O-based oxide semiconductor, a Zn—Mg—O-based oxide semiconductor, a Sn—Mg—O-based oxide semiconductor, an In—Mg—O-based oxide semiconductor, or an In—Ga—O-based oxide semiconductor, an In—O-based oxide semiconductor, a Sn—O-based oxide semiconductor, a Zn—O-based oxide semiconductor, or the like can be used. Note that in this specification, for example, an In—Sn—Ga—Zn—O-based oxide semiconductor means a metal oxide including indium (In), tin (Sn), gallium (Ga), and zinc (Zn). There is no particular limitation on the stoichiometric proportion. The above oxide semiconductor may include silicon.
- Moreover, oxide semiconductors can be represented by the chemical formula, InMO3(ZnO)m (m>0). Here, M represents one or more metal elements selected from Ga, Al, Mn, or Co.
- Note that the resistance of the oxide semiconductor film is reduced by the heat treatment. After that, an oxide insulating film is formed in contact with the low-resistance oxide semiconductor film, whereby the carrier concentration of at least a region in the low-resistance oxide semiconductor film in contact with the oxide insulating film is reduced (preferably to lower than 1×1018/cm3, more preferably to 1×1014/cm3 or lower), so that the resistance of at least the region is increased. As described above, in a manufacturing process of a semiconductor device, the carrier concentration and resistance of the oxide semiconductor film can be controlled by formation of the oxide insulating film or the like, so that a semiconductor device which includes a thin film transistor with favorable electric characteristics and high reliability can be manufactured and provided.
- Note that as the oxide insulating film formed to be in contact with the low-resistance oxide semiconductor film, an inorganic insulating film which blocks impurities such as moisture, hydrogen ions, and OH− is used. Specifically, a silicon oxide film or a silicon nitride oxide film is used.
- The transistor may be a bottom-gate transistor, a top-gate transistor, or a bottom-contact transistor. The bottom-gate transistor includes, for example, a gate electrode over an insulating surface; a gate insulating film over the gate electrode; an oxide semiconductor film overlapping with the gate electrode with the gate insulating film provided therebetween; a source electrode and a drain electrode over the oxide semiconductor film; an oxide insulating film over the oxide semiconductor film, the source electrode, and the drain electrode; and a back gate electrode overlapping with the oxide semiconductor film with the oxide insulating film provided therebetween. The top-gate transistor includes, for example, an oxide semiconductor film over an insulating surface; a gate insulating film which is an oxide insulating film over the oxide semiconductor film; and a gate electrode overlapping with the oxide semiconductor film with the gate insulating film provided therebetween and functioning as a conductive film. The bottom-contact transistor includes, for example, a gate electrode over an insulating surface; a gate insulating film over the gate electrode; a source electrode and a drain electrode over the gate insulating film; an oxide semiconductor film which is over the source electrode and the drain electrode and overlaps with the gate electrode with the gate insulating film provided therebetween; an oxide insulating film over the oxide semiconductor film; and a back gate electrode overlapping with the oxide semiconductor film with the oxide insulating film provided therebetween.
- Heat treatment in a furnace or a rapid thermal annealing method (RTA method) is used for the heat treatment. As the RTA method, a method using a lamp light source or a method in which a substrate is moved in a heated gas and heat treatment is performed for a short time can be employed. With the use of the RTA method, it is also possible to make the time necessary for heat treatment shorter than 0.1 hour. Note that in the case where a glass substrate is used as a substrate, heat treatment is performed at higher than or equal to 300° C. and lower than or equal to the strain point of the glass substrate.
- A thin film transistor having stable electric characteristics can be manufactured and provided. In addition, a semiconductor device which includes a highly reliable thin film transistor having favorable electric characteristics can be provided.
-
FIGS. 1A to 1E illustrate a method for manufacturing a semiconductor device. -
FIGS. 2A and 2B are top views of a manufactured thin film transistor. -
FIGS. 3A to 3D illustrate a method for manufacturing a semiconductor device. -
FIGS. 4A and 4B are top views of a manufactured thin film transistor. -
FIGS. 5A to 5E illustrate a method for manufacturing a semiconductor device. -
FIGS. 6A and 6B are top views of a manufactured thin film transistor. -
FIGS. 7A to 7C illustrate a method for manufacturing a semiconductor device. -
FIGS. 8A to 8C illustrate a method for manufacturing a semiconductor device. -
FIGS. 9A to 9C illustrate a method for a manufacturing a semiconductor device. -
FIG. 10 illustrates a method for manufacturing a semiconductor device. -
FIG. 11 illustrates a method for manufacturing a semiconductor device. -
FIG. 12 illustrates a method for manufacturing a semiconductor device. -
FIG. 13 illustrates a method for manufacturing a semiconductor device. -
FIG. 14 is a cross-sectional view of a liquid crystal display device. -
FIGS. 15A to 15C are cross-sectional views of light-emitting devices. -
FIG. 16 illustrates a structure of a liquid crystal display device module. -
FIGS. 17A to 17E illustrate electronic devices using semiconductor devices. - Embodiments and an example of the present invention will be hereinafter described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the description below, and those skilled in the art will appreciate that a variety of modifications can be made to the modes and details without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of embodiments and an example below.
- The present invention can be applied to manufacture of any kind of semiconductor devices including microprocessors, integrated circuits such as image processing circuits, RF tags, semiconductor display devices, and the like. A semiconductor device means any device which can function by utilizing semiconductor characteristics, and a semiconductor display device, a semiconductor circuit, and an electronic device are all included in the category of the semiconductor device. The semiconductor display devices include the following in its category: liquid crystal display devices, light-emitting devices in which a light-emitting element typified by an organic light-emitting element (OLED) is provided for each pixel, electronic papers, digital micromirror devices (DMDs), plasma display panels (PDPs), field emission displays (FEDs), and other semiconductor display devices in which a circuit element using a semiconductor film is included in a driver circuit.
- A method for manufacturing a semiconductor device will be described with reference to
FIGS. 1A to 1E andFIGS. 2A and 2B with use of a bottom-gate thin film transistor as an example. - As illustrated in
FIG. 1A , agate electrode 101 is formed over asubstrate 100 having an insulating surface. An insulating film serving as a base film may be provided between thesubstrate 100 and thegate electrode 101. The base film can be formed to have a single-layer structure or a stacked-layer structure using one or more insulating films which prevent diffusion of impurity elements from thesubstrate 100, specifically, a silicon nitride film, a silicon oxide film, a silicon nitride oxide film, or a silicon oxynitride film. Thegate electrode 101 can be formed to have a single-layer structure or a stacked-layer structure using one or more conductive films using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium; an alloy material which contains any of these metal materials as its main component; or a nitride which contains any of these metals. Note that aluminum or copper can also be used as the above metal material as long as it can withstand the temperature of heat treatment performed later. - For example, as a two-layer structure of the
gate electrode 101, a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferable. As a three-layer structure of thegate electrode 101, a three-layer structure in which a tungsten film or a tungsten nitride film, an aluminum-silicon alloy film or an aluminum-titanium alloy film, and a titanium nitride film or a titanium film are stacked is preferable. - Note that in this specification, an oxynitride is a substance that contains more oxygen than nitrogen, and a nitride oxide is a substance that contains more nitrogen than oxygen.
- The
gate electrode 101 is formed to a thickness of 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a conductive film for the gate electrode is formed to a thickness of 150 nm by a sputtering method using a tungsten target, and then, the conductive film is processed (patterned) into a desired shape by etching; in such a manner, thegate electrode 101 is formed. - Next, a
gate insulating film 102 is formed over thegate electrode 101. Thegate insulating film 102 can be formed to have a single-layer structure or a stacked-layer structure of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and/or a silicon nitride oxide film by a plasma CVD method, a sputtering method, or the like. For example, a silicon oxynitride film may be formed using a deposition gas including silane (for example, monosilane), oxygen, and nitrogen by a plasma CVD method. - In this embodiment, the
gate insulating film 102 is formed to a thickness of 200 nm by a plasma CVD method. Thegate insulating film 102 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C. - Next, an oxide semiconductor film is formed over the
gate insulating film 102. The oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target. Moreover, the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. - Note that before the oxide semiconductor film is formed by a sputtering method, dust attached to a surface of the
gate insulating film 102 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated. The reverse sputtering refers to a method in which, without application of voltage to a target side, an RF power source is used for application of voltage to a substrate side in an argon atmosphere to generate plasma in the vicinity of the substrate to modify a surface. Note that instead of an argon atmosphere, a nitrogen atmosphere, a helium atmosphere, or the like may be used. Alternatively, an argon atmosphere to which oxygen, nitrous oxide, or the like is added may be used. Alternatively, an argon atmosphere to which chlorine, carbon tetrafluoride, or the like is added may be used. - The oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described above.
- The thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm. In this embodiment, as the oxide semiconductor film, an In—Ga—Zn—O-based non-single-crystal film with a thickness of 50 nm, which is obtained by a sputtering method using an oxide semiconductor target including indium (In), gallium (Ga), and zinc (Zn) (In2O3:Ga2O3:ZnO=1:1:1), is used. In this embodiment, a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- The
gate insulating film 102 and the oxide semiconductor film may be formed successively without exposure to air. Successive film formation without exposure to air makes it possible to obtain each interface of stacked layers, which is not contaminated by atmospheric components or impurity elements floating in air, such as water, hydrocarbon, or the like. Therefore, variation in characteristics of the thin film transistor can be reduced. - Next, as illustrated in
FIG. 1A , the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shapedoxide semiconductor film 103 is formed over thegate insulating film 102 so as to overlap with thegate electrode 101 with thegate insulating film 102 provided therebetween. - Next, the island-shaped
oxide semiconductor film 103 is subjected to heat treatment at higher than or equal to 400° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 650° C. under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm (−55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere. Then, the island-shapedoxide semiconductor film 103 is slowly cooled to a temperature which is higher than or equal to room temperature and lower than 100° C. under an inert atmosphere. By heat treatment performed on theoxide semiconductor film 103 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 103 are eliminated; in such a manner, an island-shapedoxide semiconductor film 104 is formed as illustrated inFIG. 1B . Therefore, deterioration in characteristics of a thin film transistor in which theoxide semiconductor film 104 serves as a channel formation region due to the above impurities can be prevented. - In this embodiment, heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C. For the heat treatment, a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used. For example, in the case of performing heat treatment using an electric furnace, the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min
- Note that in the heat treatment, it is preferable that moisture, hydrogen, and the like be not contained in nitrogen or a rare gas such as helium, neon, or argon. Alternatively, it is preferable that nitrogen or a rare gas such as helium, neon, or argon introduced into an apparatus for heat treatment have a purity of 6N (99.9999%) or more, preferably, 7N (99.99999%) or more (that is, the impurity concentration is 1 ppm or lower, preferably, 0.1 ppm or lower).
- Alternatively, the heat treatment may be performed under air where the dew point under an atmospheric pressure is −60° C. or lower and the moisture content is small, instead of an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere.
- The island-shaped
oxide semiconductor film 104 which is formed through the heat treatment under an inert gas atmosphere or a reduced-pressure atmosphere may be partially crystallized. - Note that after the heat treatment is performed on the
oxide semiconductor film 104, heat treatment is performed on theoxide semiconductor film 104 under an oxygen atmosphere, whereby impurities such as moisture included in theoxide semiconductor film 104 can be removed. In addition, the heat treatment is performed under an oxygen atmosphere in order that theoxide semiconductor film 104 may include excessive oxygen, whereby resistance thereof can be increased. The heat treatment is performed at a temperature where a metal having a low melting point such as Zn included in the oxide semiconductor is less likely to be evaporated, for example, higher than or equal to 100° C. and lower than 350° C., preferably higher than or equal to 150° C. and lower than 250° C. It is preferable that an oxygen gas used for the heat treatment under an oxygen atmosphere do not include moisture, hydrogen, or the like. Alternatively, an oxygen gas which is introduced into the heat treatment apparatus preferably has a purity of 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the impurity concentration in oxygen is 1 ppm or lower, preferably 0.1 ppm or lower). - Next, as illustrated in
FIG. 1C , a conductive film for a source electrode and a drain electrode is formed over the island-shapedoxide semiconductor film 104, and then, the conductive film is patterned by etching or the like to form asource electrode 105 and adrain electrode 106. In the patterning for forming thesource electrode 105 and thedrain electrode 106, an exposed portion of the island-shapedoxide semiconductor film 104 is partly etched, whereby an island-shapedoxide semiconductor film 107 having a groove (a recessed portion) is formed. - The conductive film is preferably formed using a material that can withstand heat treatment in a later step. For example, as a material of the conductive film for the source electrode and the drain electrode, an element selected from chromium, tantalum, titanium, molybdenum, tungsten, zirconium, beryllium, thorium, manganese, or magnesium, an alloy containing one or more of these elements as its component, or the like can be given. In order to further improve heat resistance to heat treatment which is to be performed after the
source electrode 105 and thedrain electrode 106 are formed, the conductive film for the source electrode and the drain electrode may be formed in combination of the above material with a heat resistant conductive material such as neodymium, scandium, or a nitride of these elements. - The
source electrode 105 and thedrain electrode 106 are formed to a thickness of 10 nm to 400 nm, preferably 100 nm to 300 nm. In this embodiment, a conductive film for the source electrode and the drain electrode is formed to a thickness of 200 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching, whereby thesource electrode 105 and thedrain electrode 106 are formed. -
FIG. 2A is a top view of a semiconductor device illustrated inFIG. 1C .FIG. 1C corresponds to a cross-sectional view taken along dashed line A1-A2 inFIG. 2A . - Next, as illustrated in
FIG. 1D , anoxide insulating film 108 is formed in contact with the island-shapedoxide semiconductor film 107, thesource electrode 105, and thedrain electrode 106 by a sputtering method. Theoxide insulating film 108 is formed in contact with the low-resistance island-shapedoxide semiconductor film 107 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like. - In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the
oxide insulating film 108. The substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment. Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. Further, a silicon oxide target or a silicon target may be used as a target. For example, with use of a silicon target, a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen. - When the
oxide insulating film 108 is formed in contact with the low-resistanceoxide semiconductor film 107 by a sputtering method, a PCVD method, or the like, the carrier concentration of at least a region in the low-resistanceoxide semiconductor film 107 in contact with theoxide insulating film 108 is reduced, preferably to lower than 1×1018/cm3, so that the resistance of at least the region is increased. Thus, a high-resistance oxide semiconductor region can be formed. By the formation of theoxide insulating film 108, theoxide semiconductor film 107 has a high-resistance oxide semiconductor region in the vicinity of the interface between theoxide insulating film 108 and theoxide semiconductor film 107. - Note that after the
source electrode 105 and thedrain electrode 106 are formed and before theoxide insulating film 108 is formed, theoxide semiconductor film 107 may be again subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm (−55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere in order to eliminate moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 107. In consideration of heat resistance of thesource electrode 105 and thedrain electrode 106, the heat treatment after thesource electrode 105 and thedrain electrode 106 are formed is preferably performed at a temperature lower than the temperature of the heat treatment before thesource electrode 105 and thedrain electrode 106 are formed. Specifically, the heat treatment after thesource electrode 105 and thedrain electrode 106 are formed may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C. - Next, as illustrated in
FIG. 1D , a conductive film is formed over theoxide insulating film 108 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby aback gate electrode 109 is formed to overlap with theoxide semiconductor film 107. Specifically, as the metal having such characteristics, titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given. As the rare earth metal, an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used. Theback gate electrode 109 may be a mixture, a metal compound, or an alloy which includes one or more of the above metals. - As the alloy used for the
back gate electrode 109, an alloy called a hydrogen absorbing alloy can also be given. As the hydrogen absorbing alloy, for example, an AB5 alloy, an AB2 (Laves phase) alloy, an A2B alloy, or the like can be given. In the AB5 alloy, one or more of a rare earth metal, niobium, and zirconium are included in A site, and one or more transition metals having a catalytic effect such as nickel, cobalt, aluminum, and tin are included in B site. As the rare earth metal, a misch metal can also be used. As the AB5 alloy, for example, LaNi5 or the like can be used for theback gate electrode 109. In the AB2 (Laves phase) alloy, one or more of titanium, zirconium, and hafnium are included in A site, and one or more transition metals such as manganese, nickel, chromium, and vanadium are included in B site; for example, a Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, or the like can be given. As the AB2 alloy, for example, TiCr2, TiMn2, or the like can be used for theback gate electrode 109. In the A2B alloy, one or more of magnesium and titanium are included in A site, and one or more of nickel and copper are included in B site. As the A2B alloy, for example, Mg2Ni, Mg2Cu, Ti2Ni, or the like can be used for theback gate electrode 109. Note that in these hydrogen absorbing alloys, at least part of an element in A site or B site can be replaced with another element, and the actual composition is not necessarily in due faun. As the hydrogen absorbing alloy, in addition to the above type alloys, a Ti—Fe alloy, a V-type alloy, a Pd-type alloy, a Ca-type alloy, a BCC alloy, or the like can be used for theback gate electrode 109. - The thickness of the
back gate electrode 109 is set to 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a conductive film of 200 nm thick is formed using TiCr2 by a sputtering method under the following conditions: an alloy that is a target (φ:6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, theback gate electrode 109 is formed. - Next, after the
back gate electrode 109 is formed, heat treatment is performed under a reduced-pressure atmosphere or an inert gas (such as nitrogen, helium, neon, or argon) atmosphere in the state where theback gate electrode 109 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in theback gate electrode 109 is performed. In consideration of the heat resistance of thesource electrode 105 and thedrain electrode 106, the heat treatment is preferably performed at a temperature lower than the temperature of the heat treatment before thesource electrode 105 and thedrain electrode 106 are formed. Specifically, the heat treatment is performed at higher than or equal to 300° C. and lower than or equal to 650° C., preferably higher than or equal to 350° C. and lower than or equal to 600° C. - By the activation treatment, impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the
oxide semiconductor film 107, in thegate insulating film 102, at the interface between theoxide semiconductor film 107 and thegate insulating film 102 and its vicinity, or at the interface between theoxide semiconductor film 107 and theoxide insulating film 108 and its vicinity are absorbed or adsorbed by theback gate electrode 109 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - In addition, impurities such as moisture or hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the
oxide semiconductor film 107. - In this embodiment, heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5×10−3 Pa or less, preferably 10−5 Pa or less by an evacuation unit such as a turbo molecular pump. For the heat treatment, a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used. For example, in the case of performing heat treatment using an electric furnace, the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- Note that heat treatment for activation is performed in the state where the
oxide semiconductor film 107 is in contact with theoxide insulating film 108. Therefore, a region of theoxide semiconductor film 107 in contact with theoxide insulating film 108 uniformly has higher resistance; thus, variation in electric characteristics of athin film transistor 111 can be reduced. - Next, after the activation treatment is performed, an insulating
film 110 is formed so as to cover theback gate electrode 109 as illustrated inFIG. 1E . The insulatingfilm 110 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in theback gate electrode 109. For example, the insulatingfilm 110 can be formed to have a single-layer structure or a stacked-layer structure of a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, an aluminum nitride oxide film, or the like, as an insulating film having a high barrier property, by a plasma CVD method, a sputtering method, or the like. In order to obtain an effect of a barrier property, the insulatingfilm 110 is preferably formed to a thickness of 15 nm to 400 nm, for example. - In this embodiment, an insulating film is formed to a thickness of 300 nm by a plasma CVD method. The insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C.
- By the formation of the insulating
film 110, moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 109; therefore, theback gate electrode 109 can be kept to be activated, and reliability of the transistor can be increased. -
FIG. 2B is a top view of the semiconductor device inFIG. 1E . FIG 1E corresponds to a cross-sectional view taken along dashed line A1-A2 inFIG. 2B . - The
thin film transistor 111 includes thegate electrode 101; thegate insulating film 102 over thegate electrode 101; theoxide semiconductor film 107 over thegate insulating film 102; thesource electrode 105 and thedrain electrode 106 over theoxide semiconductor film 107; theoxide insulating film 108 over thesource electrode 105 and thedrain electrode 106; and theback gate electrode 109 over theoxide insulating film 108. Theback gate electrode 109 is formed to overlap with theoxide semiconductor film 107, whereby impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in theoxide semiconductor film 107, in thegate insulating film 102, at the interface between theoxide semiconductor film 107 and thegate insulating film 102 and its vicinity, or at the interface between theoxide semiconductor film 107 and theoxide insulating film 108 and its vicinity are absorbed or adsorbed by theback gate electrode 109 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. In addition, impurities such as moisture or hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into theoxide semiconductor film 107. - Note that in
FIG. 2B , an example in which theback gate electrode 109 covers the wholeoxide semiconductor film 107 is shown; however, the present invention is not limited to this structure. Since theback gate electrode 109 covers the wholeoxide semiconductor film 107, an effect of reducing the impurities in theoxide semiconductor film 107 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in theoxide semiconductor film 107 or part of the portion overlaps with theback gate electrode 109. - Further, the
back gate electrode 109 may be electrically insulated and in a floating state, or may be in a state where theback gate electrode 109 is supplied with a potential. In the case of the latter, theback gate electrode 109 may be supplied with the same potential as thegate electrode 101, or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to theback gate electrode 109 is controlled, whereby the threshold voltage of thethin film transistor 111 can be controlled. Note that in the case where theback gate electrode 109 is formed using a metal material having low electrical conductivity such as TiCr2, a conductive film having low resistance is fanned in contact with theback gate electrode 109 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented. - The step of performing heat treatment for activating the
back gate electrode 109 and the step of forming the insulatingfilm 110 in contact with theback gate electrode 109 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture and oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 109. As a result, theback gate electrode 109 can be kept to be activated, and the reliability of thethin film transistor 111 can be more increased. - Note that a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the
back gate electrode 109 and the step of forming the insulatingfilm 110 in contact with theback gate electrode 109. Such a process is also within the scope of the successive treatment in this specification. However, the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps. - Note that in this embodiment, although an example in which the
back gate electrode 109 is formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen is described, thegate electrode 101 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after thegate electrode 101 is formed, thegate electrode 101 may be subjected to heat treatment for activation under the same condition as theback gate electrode 109. Thegate electrode 101 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in theoxide semiconductor film 107, in thegate insulating film 102, at the interface between theoxide semiconductor film 107 and thegate insulating film 102 and its vicinity, or at the interface between theoxide semiconductor film 107 and theoxide insulating film 108 and its vicinity are absorbed or adsorbed by thegate electrode 101 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - In this embodiment, a method for manufacturing a semiconductor device including a bottom-contact thin film transistor having a structure which is different from the structure of the
thin film transistor 111 described inEmbodiment 1 will be described._The same portion as or a portion having a function similar to those described inEmbodiment 1 can be formed in a manner similar to that described inEmbodiment 1, and also the steps similar to those ofEmbodiment 1 can be performed in a manner similar to those described inEmbodiment 1; therefore, repetitive description is omitted. - A method for manufacturing a semiconductor device will be described with reference to
FIGS. 3A to 3D andFIGS. 4A and 4B . - As illustrated in
FIG. 3A , agate electrode 201 is formed over asubstrate 200 having an insulating surface. An insulating film serving as a base film may be provided between thesubstrate 200 and thegate electrode 201. The material and the structure of thegate electrode 101 described inEmbodiment 1 may be referred to for the material and the structure of thegate electrode 201. The material and the structure of the base film described inEmbodiment 1 may be referred to for the material and the structure of the base film. - Next, a
gate insulating film 202 is formed over thegate electrode 201. The material, the structure, and the formation method of thegate insulating film 102 described inEmbodiment 1 may be referred to for the material, the structure, and the formation method of thegate insulating film 202. - In this embodiment, the
gate insulating film 202 is formed to a thickness of 200 nm by a plasma CVD method. Thegate insulating film 202 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C. - Next, a conductive film for a source electrode and a drain electrode is formed over the
gate insulating film 202. Then, the conductive film is processed (patterned) into a desired shape by etching or the like, whereby asource electrode 203 and adrain electrode 204 are formed. The material and the structure of the conductive film which is patterned for forming thesource electrode 105 and thedrain electrode 106 inEmbodiment 1 may be referred to for the material and the structure of the conductive film. In order to prevent defective coverage such as breakage of an oxide semiconductor film to be formed later, thesource electrode 203 and thedrain electrode 204 are formed to have a smaller thickness than the source electrode and the drain electrode inEmbodiment 1, and are formed to a thickness of 10 nm to 300 nm, preferably 100 mn to 200 nm. - In this embodiment, a conductive film for the source electrode and the drain electrode is formed to a thickness of 150 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching, whereby the
source electrode 203 and thedrain electrode 204 are formed. - Next, an oxide semiconductor film is formed over the
source electrode 203, thedrain electrode 204, and thegate insulating film 202. An oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described inEmbodiment 1. The oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target. Moreover, the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. - Note that before the oxide semiconductor film is formed by a sputtering method, dust attached to a surface of the
gate insulating film 202 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated. - The thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm. In this embodiment, as the oxide semiconductor film, an In—Ga—Zn—O-based non-single-crystal film with a thickness of 50 nm, which is obtained by a sputtering method using an oxide semiconductor target including indium (In), gallium (Ga), and zinc (Zn) (In2O3:Ga2O3:ZnO=1:1:1), is used. In this embodiment, a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- Next, as illustrated in
FIG. 3A , the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shapedoxide semiconductor film 205 is formed over thegate insulating film 202 so as to overlap with thegate electrode 201 with thegate insulating film 202 provided therebetween. - Next, the island-shaped
oxide semiconductor film 205 is subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm (−55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere. The heat treatment for theoxide semiconductor film 103 described inEmbodiment 1 may be referred to for the heat treatment for theoxide semiconductor film 205. Note that the heat treatment may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C. in consideration of the heat resistance of thesource electrode 203 and thedrain electrode 204. By heat treatment performed on theoxide semiconductor film 205 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 205 are eliminated; in such a manner, an island-shapedoxide semiconductor film 206 is formed as illustrated inFIG. 3B . Therefore, deterioration in characteristics of a thin film transistor in which theoxide semiconductor film 206 serves as a channel formation region due to the above impurities can be prevented. - In this embodiment, heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C.
- Note that after the heat treatment is performed on the
oxide semiconductor film 205 to form theoxide semiconductor film 206, heat treatment is performed on theoxide semiconductor film 206 under an oxygen atmosphere, whereby impurities such as moisture included in theoxide semiconductor film 206 can be removed. In addition, the heat treatment is performed under an oxygen atmosphere in order that theoxide semiconductor film 206 may include excessive oxygen, whereby resistance thereof can be increased. The heat treatment under an oxygen atmosphere for theoxide semiconductor film 104 described inEmbodiment 1 may be referred to for the heat treatment under an oxygen atmosphere for theoxide semiconductor film 206. -
FIG. 4A is a top view of the semiconductor device inFIG. 3B .FIG. 3B corresponds to a cross-sectional view taken along dashed line B1-B2 inFIG. 4A . - Next, as illustrated in
FIG. 3C , anoxide insulating film 207 is formed in contact with the island-shapedoxide semiconductor film 206, thesource electrode 203, and thedrain electrode 204 by a sputtering method. Theoxide insulating film 207 is formed in contact with the low-resistance island-shapedoxide semiconductor film 206 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like. - In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the
oxide insulating film 207. The substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment. Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. Further, a silicon oxide target or a silicon target may be used as a target. For example, with use of a silicon target, a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen. - When the
oxide insulating film 207 is formed in contact with the low-resistanceoxide semiconductor film 206 by a sputtering method, a PCVD method, or the like, the carrier concentration of at least a region in the low-resistanceoxide semiconductor film 206 in contact with theoxide insulating film 207 is reduced, preferably to lower than 1×1018/cm3, so that the resistance of at least the region is increased. Thus, a high-resistance oxide semiconductor region can be formed. By the formation of theoxide insulating film 207, theoxide semiconductor film 206 has a high-resistance oxide semiconductor region in the vicinity of the interface between theoxide insulating film 207 and theoxide semiconductor film 206. - Next, as illustrated in
FIG. 3C , a conductive film is formed over theoxide insulating film 207 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby aback gate electrode 208 is formed to overlap with theoxide semiconductor film 206. The material and the structure of theback gate electrode 109 described inEmbodiment 1 may be referred to for the material and the structure of theback gate electrode 208. - In this embodiment, a conductive film of 200 nm thick is formed using TiCr2 by a sputtering method under the following conditions: an alloy that is a target (φ:6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the
back gate electrode 208 is formed. - Next, after the
back gate electrode 208 is formed, heat treatment is performed under a reduced-pressure atmosphere or an inert gas atmosphere in the state where theback gate electrode 208 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in theback gate electrode 208 is performed. The condition of the activation treatment for theback gate electrode 109 described inEmbodiment 1 can be referred to for the condition of the activation treatment. - By the above activation treatment, impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the
oxide semiconductor film 206, in thegate insulating film 202, at the interface between theoxide semiconductor film 206 and thegate insulating film 202 and its vicinity, or at the interface between theoxide semiconductor film 206 and theoxide insulating film 207 and its vicinity are absorbed or adsorbed by theback gate electrode 208 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - In addition, impurities such as moisture and hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the
oxide semiconductor film 206. - In this embodiment, heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5×10−3 Pa or less, preferably 10−5 Pa or less by an evacuation unit such as a turbo molecular pump.
- Note that heat treatment for activation is performed in the state where the
oxide semiconductor film 206 is in contact with theoxide insulating film 207. Therefore, a region of theoxide semiconductor film 206 in contact with theoxide insulating film 207 uniformly has higher resistance; thus, variation in electric characteristics of athin film transistor 211 can be reduced. - Next, after the activation treatment is performed, an insulating
film 210 is formed so as to cover theback gate electrode 208 as illustrated inFIG. 3D . The insulatingfilm 210 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in theback gate electrode 208. The material and the structure of the insulatingfilm 110 described inEmbodiment 1 may be referred to for the material and the structure of the insulatingfilm 210. - In this embodiment, an insulating film is formed to a thickness of 300 nm by a plasma CVD method. The insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C.
- By the formation of the insulating
film 210, moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 208; therefore, theback gate electrode 208 can be kept to be activated, and reliability of the transistor can be increased. -
FIG. 4B is a top view of the semiconductor device inFIG. 3D .FIG. 3D corresponds to a cross-sectional view taken along dashed line B1-B2 inFIG. 4B . - The
thin film transistor 211 includes thegate electrode 201; thegate insulating film 202 over thegate electrode 201; thesource electrode 203 and thedrain electrode 204 over thegate insulating film 202; theoxide semiconductor film 206 over thegate electrode 201, thesource electrode 203, and thedrain electrode 204; theoxide insulating film 207 over theoxide semiconductor film 206; and theback gate electrode 208 over theoxide insulating film 207. Theback gate electrode 208 is formed to overlap with theoxide semiconductor film 206, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in theoxide semiconductor film 206, in thegate insulating film 202, at the interface between theoxide semiconductor film 206 and thegate insulating film 202 and its vicinity, or at the interface between theoxide semiconductor film 206 and theoxide insulating film 207 and its vicinity are absorbed or adsorbed by theback gate electrode 208 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. In addition, impurities such as moisture and hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into theoxide semiconductor film 206. - Note that in
FIG. 4B , an example in which theback gate electrode 208 covers the wholeoxide semiconductor film 206 is shown; however, the present invention is not limited to this structure. Since theback gate electrode 208 covers the wholeoxide semiconductor film 206, an effect of reducing the impurities in theoxide semiconductor film 206 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in theoxide semiconductor film 206 or part of the portion overlaps with theback gate electrode 208. - Further, the
back gate electrode 208 may be electrically insulated and in a floating state, or may be in a state where theback gate electrode 208 is supplied with a potential. In the case of the latter, theback gate electrode 208 may be supplied with the same potential as thegate electrode 201, or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to theback gate electrode 208 is controlled, whereby the threshold voltage of thethin film transistor 211 can be controlled. Note that in the case where theback gate electrode 208 is formed using a metal material having low electrical conductivity such as TiCr2, a conductive film having low resistance is formed in contact with theback gate electrode 208 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented. - The step of performing heat treatment for activating the
back gate electrode 208 and the step of forming the insulatingfilm 210 in contact with theback gate electrode 208 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture and oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 208. As a result, theback gate electrode 208 can be kept to be activated, and the reliability of thethin film transistor 211 can be more increased. - Note that a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the
back gate electrode 208 and the step of forming the insulatingfilm 210 in contact with theback gate electrode 208. Such a process is also within the scope of the successive treatment in this specification. However, the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps. - Note that in this embodiment, although an example in which the
back gate electrode 208 is formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen is described, thegate electrode 201 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after thegate electrode 201 is formed, thegate electrode 201 may be subjected to heat treatment for activation under the same condition as theback gate electrode 208. Thegate electrode 201 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in theoxide semiconductor film 206, in thegate insulating film 202, at the interface between theoxide semiconductor film 206 and thegate insulating film 202 and its vicinity, or at the interface between theoxide semiconductor film 206 and theoxide insulating film 207 and its vicinity are absorbed or adsorbed by thegate electrode 201 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - This embodiment can be implemented in combination with another embodiment as appropriate.
- In this embodiment, a method for manufacturing a semiconductor device including a bottom-gate thin film transistor having a structure which is different from the structure of the
thin film transistor 111 described inEmbodiment 1 and the structure of thethin film transistor 211 described inEmbodiment 2 will be described. The same portion as or a portion having a function similar to those described inEmbodiment 1 can be formed in a manner similar to that described inEmbodiment 1, and also the steps similar to those ofEmbodiment 1 can be performed in a manner similar to those described inEmbodiment 1; therefore, repetitive description is omitted. - A method for manufacturing a semiconductor device will be described with reference to
FIGS. 5A to 5E andFIGS. 6A and 6B . - As illustrated in
FIG. 5A , agate electrode 301 is formed over asubstrate 300 having an insulating surface. An insulating film serving as a base film may be provided between thesubstrate 300 and thegate electrode 301. The material and the structure of thegate electrode 101 described inEmbodiment 1 may be referred to for the material and the structure of thegate electrode 301. The material and the structure of the base film described inEmbodiment 1 may be referred to for the material and the structure of the base film. - Next, a
gate insulating film 302 is formed over thegate electrode 301. The material, the structure, and the formation method of thegate insulating film 102 described inEmbodiment 1 may be referred to for the material, the structure, and the formation method of thegate insulating film 302. - In this embodiment, the
gate insulating film 302 is formed to a thickness of 200 nm by a plasma CVD method. Thegate insulating film 302 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C. - Next, an oxide semiconductor film is formed over the
gate insulating film 302. An oxide semiconductor film for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described inEmbodiment 1. The oxide semiconductor film is formed by a sputtering method using an oxide semiconductor target. Moreover, the oxide semiconductor film can be formed by a sputtering method under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. - Note that before the oxide semiconductor film is formed by a sputtering method, dust attached to a surface of the
gate insulating film 302 is preferably removed by reverse sputtering in which an argon gas is introduced and plasma is generated. - The thickness of the oxide semiconductor film is set to 5 nm to 300 nm, preferably 10 nm to 100 nm. In this embodiment, as the oxide semiconductor film, an In—Ga—Zn—O-based non-single-crystal film with a thickness of 50 nm, which is obtained by a sputtering method using an oxide semiconductor target including indium (In), gallium (Ga), and zinc (Zn) (In2O3:Ga2O3:ZnO=1:1:1), is used. In this embodiment, a DC sputtering method is employed, the flow rate of argon is 30 sccm, the flow rate of oxygen is 15 sccm, and the substrate temperature is room temperature.
- Next, as illustrated in
FIG. 5A , the oxide semiconductor film is processed (patterned) into a desired shape by etching or the like, so that an island-shapedoxide semiconductor film 303 is formed over thegate insulating film 302 so as to overlap with thegate electrode 301 with thegate insulating film 302 provided therebetween. - Next, the island-shaped
oxide semiconductor film 303 is subjected to heat treatment under an inert gas (such as nitrogen, helium, neon, or argon) atmosphere. The heat treatment for theoxide semiconductor film 103 described inEmbodiment 1 may be referred to for the heat treatment for theoxide semiconductor film 303. By heat treatment performed on theoxide semiconductor film 303 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 303 are eliminated; in such a manner, an island-shapedoxide semiconductor film 304 is formed as illustrated inFIG. 5B . Therefore, deterioration in characteristics of a thin film transistor in which theoxide semiconductor film 304 serves as a channel formation region due to the above impurities can be prevented. - In this embodiment, heat treatment is performed for 60 minutes under a nitrogen atmosphere in the state where the substrate temperature reaches 450° C.
- Note that after the heat treatment is performed on the
oxide semiconductor film 303 to form theoxide semiconductor film 304, heat treatment is performed on theoxide semiconductor film 304 under an oxygen atmosphere, whereby impurities such as moisture included in theoxide semiconductor film 304 can be removed. In addition, the heat treatment is performed under an oxygen atmosphere in order that theoxide semiconductor film 304 may include excessive oxygen, whereby resistance thereof can be increased. The heat treatment under an oxygen atmosphere for theoxide semiconductor film 104 described inEmbodiment 1 may be referred to for the heat treatment under an oxygen atmosphere for theoxide semiconductor film 304. - Next, as illustrated in
FIG. 5C , a channelprotective film 305 is formed over theoxide semiconductor film 304 so as to overlap with a portion of theoxide semiconductor film 304, which serves as a channel formation region later. The channelprotective film 305 can prevent the portion of theoxide semiconductor film 304, which serves as a channel formation region later, from being damaged in a later step (for example, reduction in thickness due to plasma or an etchant in etching). Therefore, reliability of the thin film transistor can be improved. - The channel
protective film 305 can be formed using an inorganic material including oxygen (such as silicon oxide, silicon oxynitride, or silicon nitride oxide). The channelprotective film 305 can be formed by a vapor deposition method such as a plasma CVD method or a thermal CVD method, or a sputtering method. After the formation of the channelprotective film 305, the shape thereof is processed by etching. Here, the channelprotective film 305 is formed in such a manner that a silicon oxide film is formed by a sputtering method and processed by etching using a mask formed by photolithography. - When the channel
protective film 305 which is an oxide insulating film is formed in contact with the island-shapedoxide semiconductor film 304 by a sputtering method, a PCVD method, or the like, the carrier concentration of at least a region in the island-shapedoxide semiconductor film 304 in contact with the channelprotective film 305 is reduced, preferably to lower than 1×1018/cm3, more preferably to 1×1014/cm3 or lower, so that the resistance of at least the region is increased. Thus, a high-resistance oxide semiconductor region can be formed. By the formation of the channelprotective film 305, theoxide semiconductor film 304 has a high-resistance oxide semiconductor region in the vicinity of the interface between theoxide semiconductor film 304 and the channelprotective film 305. - Next, a conductive film for a source electrode and a drain electrode is formed over the island-shaped
oxide semiconductor film 304. Then, the conductive film is processed (patterned) into a desired shape by etching or the like, whereby asource electrode 306 and adrain electrode 307 are formed in contact with the island-shapedoxide semiconductor film 304 as illustrated inFIG. 5C . The material and the structure of the conductive film which is patterned for forming thesource electrode 105 and thedrain electrode 106 described inEmbodiment 1 may be referred to for the material and the structure of the conductive film. - In this embodiment, a conductive film for the source electrode and the drain electrode is formed to a thickness of 200 nm by a sputtering method using a molybdenum target, and then, the conductive film is processed (patterned) into a desired shape by etching; in such a manner, the
source electrode 306 and thedrain electrode 307 are formed. -
FIG. 6A is a top view of the semiconductor device inFIG. 5C .FIG. 5C corresponds to a cross-sectional view taken along dashed line C1-C2 inFIG. 6A . - Next, as illustrated in
FIG. 5D , anoxide insulating film 308 is formed over the island-shapedoxide semiconductor film 304, thesource electrode 306, and thedrain electrode 307 by a sputtering method. Theoxide insulating film 308 is formed over the low-resistance island-shapedoxide semiconductor film 304 and formed using an inorganic insulating film which includes impurities such as moisture, hydrogen, oxygen, and a hydroxy group as little as possible and blocks entry of these impurities from the outside, specifically, a silicon oxide film, a silicon nitride oxide film, or the like. - In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the
oxide insulating film 308. The substrate temperature at the time of the film formation may be higher than or equal to room temperature and lower than or equal to 300° C., and is set at 100° C. in this embodiment. Formation of the silicon oxide film by a sputtering method can be performed under a rare gas (for example, argon) atmosphere, an oxygen atmosphere, or an atmosphere including a rare gas (for example, argon) and oxygen. Further, a silicon oxide target or a silicon target may be used as a target. For example, with use of a silicon target, a silicon oxide film can be formed by a sputtering method under an atmosphere including oxygen and nitrogen. - Next, as illustrated in
FIG. 5D , a conductive film is formed over theoxide insulating film 308 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby aback gate electrode 309 is formed to overlap with theoxide semiconductor film 304. The material and the structure of theback gate electrode 109 described inEmbodiment 1 may be referred to for the material and the structure of theback gate electrode 309. - In this embodiment, a conductive film of 200 nm thick is formed using TiCr2 by a sputtering method under the following conditions: an alloy that is a target (φ:6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 scan; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, the
back gate electrode 309 is formed. - Next, after the
back gate electrode 309 is formed, heat treatment is performed under a reduced-pressure atmosphere or an inert gas atmosphere in the state where theback gate electrode 309 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in theback gate electrode 309 is performed. The condition of the activation treatment for theback gate electrode 109 described inEmbodiment 1 can be referred to for the condition of the activation treatment. - By the above activation treatment, impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in the
oxide semiconductor film 304, in thegate insulating film 302, at the interface between theoxide semiconductor film 304 and thegate insulating film 302 and its vicinity, or at the interface between theoxide semiconductor film 304 and theoxide insulating film 308 and its vicinity are absorbed or adsorbed by theback gate electrode 309 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - In addition, impurities such as moisture and hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the
oxide semiconductor film 304. - In this embodiment, heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5×10−3 Pa or less, preferably 10−5 Pa or less by an evacuation unit such as a turbo molecular pump.
- Note that heat treatment for activation is performed in the state where the
oxide semiconductor film 304 is in contact with the channelprotective film 305. Therefore, a region of theoxide semiconductor film 304 in contact with the channelprotective film 305 uniformly has higher resistance; thus, variation in electric characteristics of athin film transistor 311 can be reduced. - Next, after the activation treatment is performed, an insulating
film 310 is formed so as to cover theback gate electrode 309 as illustrated inFIG. 5E . The insulatingfilm 310 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in theback gate electrode 309. The material and the structure of the insulatingfilm 110 described inEmbodiment 1 may be referred to for the material and the structure of the insulatingfilm 310. - In this embodiment, an insulating film is formed to a thickness of 300 nm by a plasma CVD method. The insulating film is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C.
- By the formation of the insulating
film 310, moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 309; therefore, theback gate electrode 309 can be kept to be activated, and reliability of the transistor can be increased. -
FIG. 6B is a top view of the semiconductor device inFIG. 5E .FIG. 5E corresponds to a cross-sectional view taken along dashed line C1-C2 inFIG. 6B . - The
thin film transistor 311 includes thegate electrode 301; thegate insulating film 302 over thegate electrode 301; theoxide semiconductor film 304 over thegate insulating film 302; the channelprotective film 305, thesource electrode 306, and thedrain electrode 307 over theoxide semiconductor film 304; theoxide insulating film 308 over the channelprotective film 305, thesource electrode 306, and thedrain electrode 307; and theback gate electrode 309 over theoxide insulating film 308. Theback gate electrode 309 is formed to overlap with theoxide semiconductor film 304, whereby impurities such as moisture, a hydroxy group, and hydrogen which are present, for example, in theoxide semiconductor film 304, in thegate insulating film 302, at the interface between theoxide semiconductor film 304 and thegate insulating film 302 and its vicinity, or at the interface between theoxide semiconductor film 304 and theoxide insulating film 308 and its vicinity are absorbed or adsorbed by theback gate electrode 309 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. In addition, impurities such as moisture and hydrogen included in the atmosphere in which the semiconductor device is placed can be prevented from being taken into theoxide semiconductor film 304. - Note that in
FIG. 6B , an example in which theback gate electrode 309 covers the wholeoxide semiconductor film 304 is shown; however, the present invention is not limited to this structure. Since theback gate electrode 309 covers the wholeoxide semiconductor film 304, an effect of reducing the impurities in theoxide semiconductor film 304 can be enhanced. However, the above effect can be obtained also in the case where at least the entire portion serving as a channel formation region in theoxide semiconductor film 304 or part of the portion overlaps with theback gate electrode 309. - Further, the
back gate electrode 309 may be electrically insulated and in a floating state, or may be in a state where theback gate electrode 309 is supplied with a potential. In the case of the latter, theback gate electrode 309 may be supplied with the same potential as thegate electrode 301, or may be supplied with a fixed potential such as a ground potential. The level of the potential supplied to theback gate electrode 309 is controlled, whereby the threshold voltage of thethin film transistor 311 can be controlled. Note that in the case where theback gate electrode 309 is formed using a metal material having low electrical conductivity such as TiCr2, a conductive film having low resistance is formed in contact with theback gate electrode 309 and the combined resistance of these conductive films is low; in such a manner, increase in power consumption due to the parasitic resistance may be prevented. - The step of performing heat treatment for activating the
back gate electrode 309 and the step of forming the insulatingfilm 310 in contact with theback gate electrode 309 are successively performed without exposure to air (such a process is also referred to as successive treatment or an insitu process), whereby moisture or oxygen in an atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 309. As a result, theback gate electrode 309 can be kept to be activated, and the reliability of thethin film transistor 311 can be more increased. - Note that a substrate transfer step, an alignment step, a heating or cooling step, or the like may be provided between the step of performing heat treatment for activating the
back gate electrode 309 and the step of forming the insulatingfilm 310 in contact with theback gate electrode 309. Such a process is also within the scope of the successive treatment in this specification. However, the following case is not within the scope of the successive treatment in this specification: there is a step in which liquid is used, such as a cleaning step, a wet etching step, or a resist formation step between the above two steps. - Note that in this embodiment, although an example in which the
back gate electrode 309 is formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen is described, thegate electrode 301 may be formed using one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen. In this case, after thegate electrode 301 is formed, thegate electrode 301 may be subjected to heat treatment for activation under the same condition as theback gate electrode 309. Thegate electrode 301 is formed using a metal having the above characteristics, whereby impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in theoxide semiconductor film 304, in thegate insulating film 302, at the interface between theoxide semiconductor film 304 and thegate insulating film 302 and its vicinity, or at the interface between theoxide semiconductor film 304 and theoxide insulating film 308 and its vicinity are absorbed or adsorbed by thegate electrode 301 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - This embodiment can be implemented in combination with another embodiment as appropriate.
- In this embodiment, a method for manufacturing a semiconductor display device according to one embodiment of the present invention will be described with reference to
FIGS. 7A to 7C ,FIGS. 8A to 8C ,FIGS. 9A to 9C ,FIG. 10 ,FIG. 11 ,FIG. 12 , andFIG. 13 . - In
FIG. 7A , as asubstrate 400 having a light-transmitting property, any of a variety of glass substrates that are used in the electronics industry such as aluminosilicate glass, barium borosilicate glass, and aluminoborosilicate glass can be used. A substrate formed from a flexible synthetic resin, such as plastic, generally tends to have a low upper temperature limit, but can be used as thesubstrate 400 as long as the substrate can withstand processing temperatures in the manufacturing process performed later. Examples of a plastic substrate include polyester typified by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile-butadiene-styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, and the like. - Next, a conductive film is formed over an entire surface of the
substrate 400, and then a first photolithography step is performed. A resist mask is formed, and then an unnecessary portion is removed by etching, so that wirings and electrodes (a gate wiring including agate electrode 401, acapacitor wiring 408, and a first terminal 421) are formed. At this time, the etching is performed so that at least an end portion of thegate electrode 401 has a tapered shape. - The conductive film can be formed to have a single-layer structure or a stacked-layer structure using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, neodymium, or scandium; an alloy material which contains any of these metal materials as its main component; or a nitride which contains any of these metals. Note that for the conductive film, aluminum or copper can also be used as the above metal material as long as it can withstand the temperature of heat treatment performed later.
- For example, as a two-layer structure of the conductive film, a two-layer structure in which a titanium nitride film and a molybdenum film are stacked is preferable. As a three-layer structure of the conductive film, a three-layer structure in which a tungsten film or a tungsten nitride film, an aluminum-silicon alloy film or an aluminum-titanium alloy film, and a titanium nitride film or a titanium film are stacked is preferable.
- Next, as illustrated in
FIG. 7B , agate insulating film 402 is formed over thegate electrode 401, thecapacitor wiring 408, and thefirst terminal 421. Thegate insulating film 402 is formed to a thickness of 50 nm to 250 nm by a sputtering method, a PCVD method, or the like. - For example, as the
gate insulating film 402, a silicon oxide film is formed to a thickness of 100 nm by a sputtering method. Needless to say, thegate insulating film 402 is not necessarily formed using such a silicon oxide film and may be formed to have a single-layer structure or a stacked-layer structure using another insulating film such as a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, a tantalum oxide film, or the like. - Next, an island-shaped oxide semiconductor film (an In—Ga—Zn—O-based non-single-crystal film) 403 is formed over the
gate insulating film 402. It is effective to form the In—Ga—Zn—O-based non-single-crystal film without exposure to air after the plasma treatment because dust and moisture do not adhere to the interface between thegate insulating film 402 and theoxide semiconductor film 403. Here, theoxide semiconductor film 403 is formed in an argon atmosphere, an oxygen atmosphere, or an atmosphere including both argon and oxygen under the conditions where the target is an oxide semiconductor target including In, Ga, and Zn (an In—Ga—Zn—O-based oxide semiconductor target (In2O3:Ga2O3:ZnO=1:1:1)) with a diameter of 8 inches, the distance between thesubstrate 400 and the target is set to 170 mm, the pressure is set at 0.4 Pa, and the direct current (DC) power supply is set at 0.5 kW. Note that a pulse direct current (DC) power supply is preferable because dust can be reduced and the film thickness can be uniform. The In—Ga—Zn—O-based non-single-crystal film is formed to have a thickness of 5 nm to 200 nm. In this embodiment, as theoxide semiconductor film 403, for example, a 50-nm-thick In—Ga—Zn—O-based non-single-crystal film is fainted by a sputtering method using an In—Ga—Zn—O-based oxide semiconductor target. - The
oxide semiconductor film 403 for forming a channel formation region may be formed using an oxide material having semiconductor characteristics described above. - Examples of the sputtering method include an RF sputtering method in which a high-frequency power source is used as a sputtering power source, a DC sputtering method, and a pulsed DC sputtering method in which a bias is applied in a pulsed manner. An RF sputtering method is mainly used in the case where an insulating film is formed, and a DC sputtering method is mainly used in the case where a metal film is formed.
- In addition, there is a multi-source sputtering apparatus in which a plurality of targets of different materials can be set. With the multi-source sputtering apparatus, films of different materials can be formed to be stacked in the same chamber, or a film of plural kinds of materials can be deposited by electric discharge at the same time in the same chamber.
- In addition, there are a sputtering apparatus provided with a magnet system inside the chamber and used for a magnetron sputtering, and a sputtering apparatus used for an ECR sputtering in which plasma generated with the use of microwaves is used without using glow discharge.
- Furthermore, as a deposition method using sputtering, there are also a reactive sputtering method in which a target substance and a sputtering gas component are chemically reacted with each other during deposition to form a thin compound film thereof, and a bias sputtering in which a voltage is also applied to a substrate during deposition.
- Next, a second photolithography step is performed. A resist mask is formed, and then the oxide semiconductor film is etched so that the shape of the island-shaped
oxide semiconductor film 403 can be processed. For example, an unnecessary portion is removed by wet etching using a mixed solution of phosphoric acid, acetic acid, and nitric acid, so that the island-shapedoxide semiconductor film 403 is formed to overlap with thegate electrode 401. Note that etching here is not limited to wet etching, and dry etching may also be performed. - As the etching gas for dry etching, a gas containing chlorine (chlorine-based gas such as chlorine (Cl2), boron chloride (BCl3), silicon chloride (SiCl4), or carbon tetrachloride (CCl4)) is preferably used.
- Alternatively, a gas containing fluorine (fluorine-based gas such as carbon tetrafluoride (CF4), sulfur fluoride (SF6), nitrogen fluoride (NF3), or trifluoromethane (CHF3)); hydrogen bromide (HBO; oxygen (O2); any of these gases to which a rare gas such as helium (He) or argon (Ar) is added; or the like can be used.
- As the dry etching method, a parallel plate RIE (reactive ion etching) method, an ICP (inductively coupled plasma) etching method, or the like can be used. In order to etch the films into desired shapes, the etching condition (the amount of electric power applied to a coil-shaped electrode, the amount of electric power applied to an electrode on a substrate side, the temperature of the electrode on the substrate side, or the like) is adjusted as appropriate.
- As an etchant used for wet etching, ITO-07N (produced by KANTO CHEMICAL CO., INC.) may be used.
- The etchant used in the wet etching is removed by cleaning together with the material which is etched off. Waste liquid of the etchant containing the removed material may be purified and the material contained in the waste liquid may be reused. When a material such as indium included in the oxide semiconductor film is collected from the waste liquid after the etching and reused, the resources can be efficiently used and the cost can be reduced.
- The etching conditions (such as an etchant, etching time, and temperature) are appropriately adjusted depending on the material so that the material can be etched into a desired shape.
- Next, the
oxide semiconductor film 403 is subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm (−55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere, whereby anoxide semiconductor film 404 is formed. Specifically, the island-shapedoxide semiconductor film 403 is subjected to heat treatment at higher than or equal to 400° C. and lower than or equal to 700° C., preferably higher than or equal to 450° C. and lower than or equal to 650° C. under an inert gas (such as nitrogen, helium, neon, or argon) atmosphere. Then, the heated island-shaped oxide semiconductor film is slowly cooled to a temperature which is higher than or equal to room temperature and less than 100° C. under an inert atmosphere. By heat treatment performed on theoxide semiconductor film 403 under the above-described atmosphere, moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 403 are eliminated. Therefore, deterioration in characteristics of a thin film transistor in which theoxide semiconductor film 404 serves as a channel formation region due to the above impurities can be prevented. - For the heat treatment, a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used. For example, in the case of performing heat treatment using an electric furnace, the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- Note that in the heat treatment, it is preferable that moisture, hydrogen, and the like be not contained in nitrogen or a rare gas such as helium, neon, or argon. Alternatively, it is preferable that nitrogen or a rare gas such as helium, neon, or argon introduced into an apparatus for heat treatment have a purity of 6N (99.9999%) or more, preferably, 7N (99.99999%) or more (that is, the impurity concentration is set to 1 ppm or lower, preferably, 0.1 ppm or lower).
- Alternatively, the heat treatment may be performed under air where the dew point under an atmospheric pressure is −60° C. or lower and the moisture content is small, instead of an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere.
- The island-shaped
oxide semiconductor film 404 which is formed through the heat treatment under an inert gas atmosphere may be partially crystallized. - Note that after the heat treatment is performed on the
oxide semiconductor film 404, heat treatment is performed on theoxide semiconductor film 404 under an oxygen atmosphere, whereby impurities such as moisture included in theoxide semiconductor film 404 can be removed. In addition, the heat treatment is performed under an oxygen atmosphere in order that theoxide semiconductor film 404 may include excessive oxygen, whereby resistance thereof can be increased. The heat treatment is performed at a temperature where a metal having a low melting point such as Zn included in the oxide semiconductor is less likely to be evaporated, for example, higher than or equal to 100° C. and lower than 350° C., preferably higher than or equal to 150° C. and lower than 250° C. It is preferable that an oxygen gas used for the heat treatment under an oxygen atmosphere do not include moisture, hydrogen, or the like. Alternatively, an oxygen gas which is introduced into the heat treatment apparatus preferably has a purity of 6N (99.9999%) or more, more preferably 7N (99.99999%) or more (that is, the impurity concentration in oxygen is 1 ppm or lower, preferably 0.1 ppm or lower). - Cross-sectional views taken along dashed lines D1-D2 and E1-E2 in
FIG. 7C correspond to cross-sectional views taken along dashed lines D1-D2 and E1-E2 in a plan view illustrated inFIG. 10 , respectively. - Next, as illustrated in
FIG. 8A , aconductive film 406 is formed using a metal material over theoxide semiconductor film 404 by a sputtering method or a vacuum evaporation method. As a material of theconductive film 406, an element selected from chromium, tantalum, titanium, molybdenum, tungsten, zirconium, beryllium, thorium, manganese, or magnesium, an alloy containing one or more of these elements as its component, or the like can be given. In order to further improve heat resistance to heat treatment which is to be performed after asource electrode 407 a and adrain electrode 407 b are formed, theconductive film 406 may be formed in combination of the above material with a heat resistant conductive material such as neodymium, scandium, or a nitride of these elements. - Next, a third photolithography step is performed. A resist mask is formed, and unnecessary portions are removed by etching, so that the
source electrode 407 a, thedrain electrode 407 b, and asecond terminal 420 are formed as illustrated inFIG. 8B . Wet etching or dry etching is employed as an etching method at this time. For example, when a molybdenum film is used as theconductive film 406, wet etching using a solution including phosphoric acid as an etchant can be carried out. - In this etching step, an exposed region of the
oxide semiconductor film 404 is also partly etched in some cases. In this case, anoxide semiconductor film 409 has a region whose thickness is small between thesource electrode 407 a and thedrain electrode 407 b. - In this third photolithography step, the
second terminal 420 which is formed using the same material as thesource electrode 407 a or thedrain electrode 407 b is left in a terminal portion. Note that thesecond terminal 420 is electrically connected to a source wiring (a source wiring including thesource electrode 407 a or thedrain electrode 407 b). - Further, by use of a resist mask having regions with plural thicknesses (e.g., two different thicknesses) which is formed using a multi-tone mask, the number of resist masks can be reduced, resulting in simplified process and lower costs.
- Next, the resist mask is removed, and then, the
oxide semiconductor film 409 may be again subjected to heat treatment under a reduced-pressure atmosphere, an inert gas atmosphere such as a nitrogen atmosphere or a rare gas atmosphere, an oxygen atmosphere, or an ultra-dry air (i.e., air having a moisture content of 20 ppm (−55° C. by dew-point conversion) or less, preferably 1 ppm or less, more preferably 10 ppb or less in the case where the measurement is performed with use of a CRDS (cavity-ring-down spectroscopy) type dew-point meter) atmosphere in order to eliminate moisture, hydrogen, and a hydroxy group included in theoxide semiconductor film 409. In consideration of heat resistance of thesource electrode 407 a and thedrain electrode 407 b, the heat treatment after thesource electrode 407 a and thedrain electrode 407 b are formed is preferably performed at a temperature lower than the temperature of the heat treatment before thesource electrode 407 a and thedrain electrode 407 b are formed. Specifically, the heat treatment after thesource electrode 407 a and thedrain electrode 407 b are formed may be performed at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C. - Cross-sectional views taken along dashed lines D1-D2 and E1-E2 in
FIG. 8B correspond to cross-sectional views taken along dashed lines D1-D2 and E1-E2 in a plan view illustrated inFIG. 11 , respectively. - Next, as illustrated in
FIG. 8C , anoxide insulating film 411 which covers thegate insulating film 402, theoxide semiconductor film 409, thesource electrode 407 a, and thedrain electrode 407 b is formed. Theoxide insulating film 411 is formed using a silicon oxynitride film by a PCVD method. Theoxide insulating film 411 which is a silicon oxynitride film and an exposed region of theoxide semiconductor film 409 which is provided between thesource electrode 407 a and thedrain electrode 407 b are in contact with each other, whereby the resistance of a region of theoxide semiconductor film 409 in contact with theoxide insulating film 411 is increased (i.e., the carrier concentration is reduced, preferably to lower than 1×1018/cm3). Thus, a high-resistance channel formation region can be formed. - Heat treatment may be performed after formation of the
oxide insulating film 411. The treatment may be performed in an air atmosphere or a nitrogen atmosphere at higher than or equal to 350° C. and lower than or equal to 650° C., preferably higher than or equal to 400° C. and lower than or equal to 600° C. In such heat treatment, theoxide semiconductor film 409 in the state of being in contact with theoxide insulating film 411 is heated, which leads to increase in resistance of theoxide semiconductor film 409; thus, electric characteristics of the transistor can be improved and variation in electric characteristics can be reduced. There is no particular limitation on the timing of the heat treatment as long as it is performed after theoxide insulating film 411 is formed. When this heat treatment also serves as heat treatment in another step, e.g., heat treatment in formation of a resin film or heat treatment for reducing resistance of a transparent conductive film, the number of steps can be prevented from increasing. - Next, as illustrated in
FIG. 9A , a conductive film is formed over theoxide insulating film 411 with use of one or more metals that easily absorb or adsorb moisture, a hydroxy group, or hydrogen, and then, the conductive film is patterned, whereby aback gate electrode 412 is formed to overlap with theoxide semiconductor film 409. Specifically, as the metal having such characteristics, titanium, platinum, vanadium, zirconium, hafnium, palladium, magnesium, niobium, a rare earth metal, or the like can be given. As the rare earth metal, an alloy including cerium (40% to 50%), lanthanum (20% to 40%), and a rare earth metal such as praseodymium, neodymium, or yttrium, which is called a misch metal (Mm), can also be used. Theback gate electrode 412 may be a mixture, a metal compound, or an alloy which includes one or more of the above metals. - As the alloy used for the
back gate electrode 412, an alloy called a hydrogen absorbing alloy can also be given. As the hydrogen absorbing alloy, for example, an AB5 alloy, an AB2 (Laves phase) alloy, an A2B alloy, or the like can be given. In the AB5 alloy, one or more of a rare earth metal, niobium, and zirconium are included in A site, and one or more transition metals having a catalytic effect such as nickel, cobalt, aluminum, and tin are included in B site. As the rare earth metal, a misch metal can also be used. As the AB5 alloy, for example, LaNi5 or the like can be used for theback gate electrode 412. In the AB2 (Laves phase) alloy, one or more of titanium, zirconium, and hafnium are included in A site, and one or more transition metals such as manganese, nickel, chromium, and vanadium are included in B site; for example, a Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, or the like can be given. As the AB2 alloy, for example, TiCr2, TiMn2, or the like can be used for theback gate electrode 412. In the A2B alloy, one or more of magnesium and titanium are included in A site, and one or more of nickel and copper are included in B site. As the A2B alloy, for example, Mg2Ni, Mg2Cu, Ti2Ni, or the like can be used for theback gate electrode 412. Note that in these hydrogen absorbing alloys, at least part of an element in A site or B site can be replaced with another element, and the actual composition is not necessarily in due form. As the hydrogen absorbing alloy, in addition to the above type alloys, a Ti—Fe alloy, a V-type alloy, a Pd-type alloy, a Ca-type alloy, a BCC alloy, or the like can be used for theback gate electrode 412. - The thickness of the
back gate electrode 412 is set to 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, a conductive film of 200 nm thick is formed using TiCr2 by a sputtering method under the following conditions: an alloy that is a target (φ:6 inches) whose composition ratio of titanium to chromium is 1:2 is used; an argon gas is introduced into a chamber with a flow rate of 50 sccm; the pressure is 0.4 Pa; the electric power is 2 kW; and the film formation temperature is room temperature. Then, a photolithography step is performed. A resist mask is formed, and an unnecessary portion is removed by plasma etching with use of chlorine and oxygen as an etching gas so that the conductive film is processed (patterned) into a desired shape; in such a manner, theback gate electrode 412 is formed. - Next, after the
back gate electrode 412 is formed, heat treatment is performed under a reduced-pressure atmosphere or an inert gas atmosphere in the state where theback gate electrode 412 is exposed, whereby activation treatment for removing moisture, oxygen, hydrogen, or the like adsorbed onto a surface of or in theback gate electrode 412 is performed. In consideration of the heat resistance of thesource electrode 407 a and thedrain electrode 407 b, the heat treatment is preferably performed at a temperature lower than the temperature of the heat treatment before thesource electrode 407 a and thedrain electrode 407 b are formed. Specifically, the heat treatment is performed at higher than or equal to 300° C. and lower than or equal to 650° C., preferably higher than or equal to 350° C. and lower than or equal to 600° C. - By the activation treatment, impurities such as moisture, a hydroxy group, or hydrogen which are present, for example, in the
oxide semiconductor film 409, in thegate insulating film 402, at the interface between theoxide semiconductor film 409 and thegate insulating film 402 and its vicinity, or at the interface between theoxide semiconductor film 409 and theoxide insulating film 411 and its vicinity are absorbed or adsorbed by theback gate electrode 412 which has been activated; therefore, deterioration in the characteristics of the transistor due to the impurities can be prevented. - In addition, impurities such as moisture or hydrogen included in an atmosphere in which the semiconductor device is placed can be prevented from being taken into the
oxide semiconductor film 409. - In this embodiment, heat treatment is performed for 10 minutes in the state where the substrate temperature reaches 400° C. and a treatment chamber is kept to a reduced-pressure atmosphere having a degree of vacuum of 5×10−3 Pa or less, preferably 10−5 Pa or less by an evacuation unit such as a turbo molecular pump. For the heat treatment, a heating method using an electric furnace or an instantaneous heating method such as a gas rapid thermal anneal (GRTA) method using a heated gas or a lamp rapid thermal anneal (LRTA) method using lamp light can be used. For example, in the case of performing heat treatment using an electric furnace, the temperature rise characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 20° C./min and the temperature drop characteristics are preferably set at higher than or equal to 0.1° C./min and lower than or equal to 15° C./min.
- Note that heat treatment for activation is performed in the state where the
oxide semiconductor film 409 is in contact with theoxide insulating film 411. Therefore, a region of theoxide semiconductor film 409 in contact with theoxide insulating film 411 uniformly has higher resistance; thus, variation in electric characteristics of athin film transistor 414 can be reduced. - Next, after the activation treatment is performed, an insulating
film 413 is formed so as to cover theback gate electrode 412 as illustrated inFIG. 9B . The insulatingfilm 413 is preferably formed using a material having a high barrier property so that moisture and oxygen in the atmosphere are prevented from being adsorbed onto the surface of or in theback gate electrode 412. For example, the insulatingfilm 413 can be formed to have a single-layer structure or a stacked-layer structure of a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, or an aluminum nitride oxide film, or the like, as an insulating film having a high barrier property, by a plasma CVD method, a sputtering method, or the like. In order to obtain an effect of a barrier property, the insulatingfilm 413 is preferably formed to a thickness of 15 nm to 400 nm, for example. - In this embodiment, the insulating
film 413 is formed to a thickness of 300 nm by a plasma CVD method. The insulatingfilm 413 is formed under the following conditions: the flow rate of a silane gas is 4 sccm; the flow rate of dinitrogen monoxide (N2O) is 800 sccm; and the substrate temperature is 400° C. - By the formation of the insulating
film 413, moisture and oxygen in the atmosphere can be prevented from being adsorbed onto the surface of or in theback gate electrode 412; therefore, theback gate electrode 412 can be kept to be activated, and reliability of the transistor can be increased. - Cross-sectional views taken along dashed lines D1-D2 and E1-E2 in
FIG. 9B correspond to cross-sectional views taken along dashed lines D1-D2 and E1-E2 in a plan view illustrated inFIG. 12 , respectively. - Through the above steps, the
thin film transistor 414 can be manufactured. - Next, a fourth photolithography step is performed. A resist mask is formed, and the
gate insulating film 402, theoxide insulating film 411, and the insulatingfilm 413 are etched, so that contact holes are formed to expose part of thedrain electrode 407 b, part of thefirst terminal 421, part of thesecond terminal 420, and part of theback gate electrode 412. Next, the resist mask is removed, and then a transparent conductive film is formed. The transparent conductive film is formed of indium oxide (In2O3), indium oxide-tin oxide alloy (In2O3—SnO2, abbreviated to ITO), or the like by a sputtering method, a vacuum evaporation method, or the like. Such a material is etched with a hydrochloric acid-based solution. However, since a residue is easily generated particularly in etching ITO, indium oxide-zinc oxide alloy (In2O3—ZnO) may be used to improve etching processability. Further, when heat treatment for reducing resistance of the transparent conductive film is performed, the heat treatment can also serve as heat treatment for increasing resistance of theoxide semiconductor film 409, which results in improvement of electric characteristics of the transistor and reduction of variation in the electric characteristics thereof. - Next, a fifth photolithography step is performed. A resist mask is formed and an unnecessary portion is removed by etching, so that a
pixel electrode 415 which is connected to thedrain electrode 407 b, a transparentconductive film 416 which is connected to thefirst terminal 421, a transparent conductive film 417 which is connected to thesecond terminal 420, and a transparentconductive film 418 which is connected to theback gate electrode 412 are formed. - The transparent
conductive films 416 and 417 function as electrodes or wirings connected to an FPC. The transparentconductive film 416 formed over thefirst terminal 421 is a connection terminal electrode which functions as an input terminal of the gate wiring. The transparent conductive film 417 formed over thesecond terminal 420 is a connection terminal electrode which functions as an input terminal of the source wiring. The transparentconductive film 418 is a wiring for supplying theback gate electrode 412 with a power supply potential. - In this fifth photolithography step, a
storage capacitor 419 is formed with thecapacitor wiring 408 and thepixel electrode 415, in which thegate insulating film 402, theoxide insulating film 411, and the insulatingfilm 413 are used as dielectrics. - Cross-sectional views after the resist mask is removed are illustrated in
FIG. 9C . Cross-sectional views taken along dashed lines D1-D2 and E1-E2 inFIG. 9C correspond to cross-sectional views taken along dashed lines D1-D2 and E1-E2 in a plan view illustrated inFIG. 13 , respectively. - Through these five photolithography steps, the
storage capacitor 419 and thethin film transistor 414 which is a bottom-gate staggered thin film transistor can be completed using the five photomasks. By disposing the thin film transistor and the storage capacitor in each pixel in a pixel portion in which pixels are arranged in a matrix form, one of substrates for manufacturing an active matrix display device can be obtained. In this specification, such a substrate is referred to as an active matrix substrate for convenience. - In the case of manufacturing an active matrix liquid crystal display device, an active matrix substrate and a counter substrate provided with a counter electrode are bonded to each other with a liquid crystal layer interposed therebetween.
- Instead of providing the capacitor wiring, the pixel electrode may be overlapped with a gate wiring of an adjacent pixel with the oxide insulating film and the gate insulating film interposed therebetween, to form a storage capacitor.
- In an active matrix liquid crystal display device, pixel electrodes arranged in a matrix form are driven, so that a display pattern is formed on a screen. Specifically, voltage is applied between a selected pixel electrode and a counter electrode corresponding to the pixel electrode, so that a liquid crystal layer provided between the pixel electrode and the counter electrode is optically modulated and this optical modulation is recognized as a display pattern by an observer.
- When a light-emitting display device is manufactured, a partition formed using an organic resin film may be provided between organic light-emitting elements in some cases. In such a case, the organic resin film is subjected to heat treatment, and the heat treatment can also serve as heat treatment for increasing resistance of the
oxide semiconductor film 409, which results in improvement of electric characteristics of the transistor and reduction of variation in the electric characteristics thereof. - The use of an oxide semiconductor for a thin film transistor leads to reduction in manufacturing cost. In particular, since impurities such as moisture, hydrogen, and OH can be reduced for increasing purity of the oxide semiconductor film by the heat treatment, it is not necessary to use an ultrapure oxide semiconductor target and a special sputtering apparatus provided with a deposition chamber whose dew point is lowered. Further, a semiconductor display device including a highly reliable thin film transistor with excellent electric characteristics can be manufactured.
- The channel formation region in the semiconductor film is a high-resistance region; thus, electric characteristics of the thin film transistor are stabilized and increase in off current can be prevented. Therefore, a semiconductor display device including a thin film transistor having high electric characteristics and high reliability can be provided.
- This embodiment can be implemented in combination with any of the above embodiments.
- In this embodiment, a structure of a liquid crystal display device according to one embodiment of the present invention will be described.
-
FIG. 14 illustrates a cross-sectional view of a liquid crystal display device according to one embodiment of the present invention, as an example. Athin film transistor 1401 illustrated inFIG. 14 includes agate electrode 1402 formed on an insulating surface; agate insulating film 1403 formed so as to cover thegate electrode 1402; anoxide semiconductor film 1404 formed so as to overlap with thegate electrode 1402 with thegate insulating film 1403 interposed therebetween; a pair ofsemiconductor films 1405 functioning as a source region and a drain region, which are formed over theoxide semiconductor film 1404; a pair ofconductive films 1406 functioning as a source electrode and a drain electrode, which are formed over the pair ofsemiconductor films 1405; anoxide insulating film 1407; and aback gate electrode 1408 formed over theoxide insulating film 1407. Theback gate electrode 1408 is covered with an insulatingfilm 1409. Theoxide insulating film 1407 is in contact with at least theoxide semiconductor film 1404 and formed so as to cover thegate electrode 1402, thegate insulating film 1403, theoxide semiconductor film 1404, the pair ofsemiconductor films 1405, and the pair ofconductive films 1406. - An opening is provided in part of the
oxide insulating film 1407 and the insulatingfilm 1409, and apixel electrode 1410 is formed so as to be in contact with one of theconductive films 1406 in the opening. - Further, a
spacer 1417 for controlling a cell gap of a liquid crystal element is formed over thepixel electrode 1410. An insulating film is etched to have a desired shape, so that thespacer 1417 can be formed. A cell gap may also be controlled by dispersing a filler on the insulatingfilm 1409. - An
alignment film 1411 is formed over thepixel electrode 1410. Thealignment film 1411 can be formed by subjecting an insulating film to rubbing treatment, for example. Further, acounter electrode 1413 is provided in a position opposed to thepixel electrode 1410, and analignment film 1414 is formed on the side of thecounter electrode 1413, which is close to thepixel electrode 1410. Furthermore, aliquid crystal 1415 is provided in a region which is surrounded by asealant 1416 between thepixel electrode 1410 and thecounter electrode 1413. Note that a filler may be mixed in thesealant 1416. - The
pixel electrode 1410 and thecounter electrode 1413 can be formed using a transparent conductive material such as indium tin oxide including silicon oxide (ITSO), indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO), for example. Note that this embodiment describes an example of manufacturing a transmissive type liquid crystal element by using a light-transmitting conductive film for thepixel electrode 1410 and thecounter electrode 1413. However, the present invention is not limited to this structure. The liquid crystal display device according to one embodiment of the present invention may be a semi-transmissive type liquid crystal display device or a reflective type liquid crystal display device. - The liquid crystal display device illustrated in
FIG. 14 may be provided with a color filter, a shielding film (a black matrix) for preventing disclination (a black matrix), or the like. - Although a liquid crystal display device of a TN (twisted nematic) mode is described in this embodiment, the thin film transistor of the present invention can be used for other liquid crystal display devices of a VA (vertical alignment) mode, an OCB (optically compensated birefringence) mode, an IPS (in-plane-switching) mode, and the like.
- The liquid crystal display device according to one embodiment of the present invention has high reliability.
- This embodiment can be implemented in combination with another embodiment as appropriate.
- In this embodiment, a structure of a light-emitting device including the thin film transistor according to one embodiment of the present invention for a pixel will be described. In this embodiment, a cross-sectional structure of a pixel in the case where a transistor for driving a light-emitting element is an n-channel transistor is described with reference to
FIGS. 15A to 15C . Note thatFIGS. 15A to 15C illustrate the case where a first electrode is a cathode and a second electrode is an anode; however, the first electrode may be an anode and the second electrode may be a cathode. - A cross-sectional view of a pixel in the case where a
transistor 6031 is an n-channel transistor, and light emitted from a light-emittingelement 6033 is extracted from afirst electrode 6034 side is illustrated inFIG. 15A . Thetransistor 6031 is covered with an insulatingfilm 6037, and over the insulatingfilm 6037, abank 6038 having an opening is formed. In the opening of thebank 6038, thefirst electrode 6034 is partially exposed, and thefirst electrode 6034, anelectroluminescent layer 6035, and asecond electrode 6036 are sequentially stacked in the opening. - The
first electrode 6034 is formed using such a material or to such a thickness as to transmit light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function. Specifically, an alkaline metal such as Li or Cs, an alkaline earth metal such as Mg, Ca, or Sr, an alloy containing such metals (e.g., Mg:Ag, Al:Li, or Mg:In), a compound of such materials (e.g., calcium fluoride or calcium nitride), or a rare-earth metal such as Yb or Er can be used. Further, in the case where an electron-injection layer is provided, another conductive layer such as an aluminum layer may be used as well. Then, thefirst electrode 6034 is formed to such a thickness as to transmit light (preferably, about 5 nm to 30 nm). Furthermore, the sheet resistance of thefirst electrode 6034 may be suppressed by formation of a light-transmitting conductive layer of a light-transmitting oxide conductive material so as to be in contact with and over or under the above-described conductive layer having such a thickness that it can transmit light. Alternatively, thefirst electrode 6034 may be formed of only a conductive layer of another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO). Furthermore, a mixture in which zinc oxide (ZnO) is mixed at 2% to 20% in ITO, indium tin oxide including silicon oxide (hereinafter referred to as ITSO), or indium oxide including silicon oxide may be used as well. In the case of using the light-transmitting oxide conductive material, it is preferable to provide an electron-injection layer in theelectroluminescent layer 6035. - The
second electrode 6036 is formed using such a material and to such a thickness as to reflect or shield light, and formed using a material suitable for being used as an anode. For example, a single-layer film including one or more of titanium nitride, zirconium nitride, titanium, tungsten, nickel, platinum, chromium, silver, aluminum, and the like, a stacked layer of a titanium nitride film and a film including aluminum as a main component, a three-layer structure of a titanium nitride film, a film including aluminum as a main component, and a titanium nitride film, or the like can be used for thesecond electrode 6036. - The
electroluminescent layer 6035 is formed with a single layer or a plurality of layers. When theelectroluminescent layer 6035 is formed with a plurality of layers, these layers can be classified into a hole-injection layer, a hole-transport layer, a light-emitting layer, an electron-transport layer, an electron-injection layer, and the like in view of the carrier-transport property. However, in the case where theelectroluminescent layer 6035 has any of a hole-injection layer, a hole-transport layer, an electron-transport layer, and an electron-injection layer in addition to the light-emitting layer, the electron-injection layer, the electron-transport layer, the light-emitting layer, the hole-transport layer, and the hole-injection layer are sequentially stacked from thefirst electrode 6034. Note that the boundary between the layers is not necessarily clear, and there may be the case where the boundary is unclear since materials for forming the layers are partially mixed with each other. Each layer may be formed with an organic material or an inorganic material. As an organic material, any of a high molecular weight organic material, a medium molecular weight organic material, and a low molecular weight organic material may be used. Note that a medium molecular weight organic material corresponds to a low polymer in which the number of repetitions of a structural unit (the degree of polymerization) is about 2 to 20. There is no clear distinction between a hole-injection layer and a hole-transport layer, and the hole-injection layer and the hole-transport layer are the same in a sense that a hole-transport property (hole mobility) is an especially important characteristic. A layer being in contact with the anode is referred to as a hole-injection layer and a layer being in contact with the hole-injection layer is referred to as a hole-transport layer for convenience. The same is also true for the electron-transport layer and the electron-injection layer; a layer being in contact with the cathode is referred to as an electron-injection layer and a layer being in contact with the electron-injection layer is referred to as an electron transport-layer. In some cases, the light-emitting layer also functions as the electron-transport layer, and it is therefore referred to as a light-emitting electron-transport layer, too. - In the case of the pixel illustrated in
FIG. 15A , light emitted from the light-emittingelement 6033 can be extracted from thefirst electrode 6034 side as shown by a hollow arrow. - Next, a cross-sectional view of a pixel in the case where a
transistor 6041 is an n-channel transistor, and light emitted from a light-emittingelement 6043 is extracted from asecond electrode 6046 side is illustrated inFIG. 15B . Thetransistor 6041 is covered with an insulatingfilm 6047, and over the insulatingfilm 6047, abank 6048 having an opening is formed. In the opening of thebank 6048, afirst electrode 6044 is partially exposed, and thefirst electrode 6044, anelectroluminescent layer 6045, and thesecond electrode 6046 are sequentially stacked in the opening. - The
first electrode 6044 is formed using such a material or to such a thickness as to reflect or shield light, and can be formed using a metal, an alloy, an electrically conductive compound, a mixture thereof, or the like having a low work function. Specifically, an alkaline metal such as Li or Cs, an alkaline earth metal such as Mg, Ca, or Sr, an alloy containing such metals (e.g., Mg:Ag, Al:Li, or Mg:In), a compound of such materials (e.g., calcium fluoride or calcium nitride), or a rare-earth metal such as Yb or Er can be used. Further, in the case where an electron-injection layer is provided, another conductive layer such as an aluminum layer may be used as well. - The
second electrode 6046 is formed using such a material or to such a thickness as to transmit light, and formed using a material suitable for being used as an anode. For example, another light-transmitting oxide conductive material such as indium tin oxide (ITO), zinc oxide (ZnO), indium zinc oxide (IZO), or gallium-doped zinc oxide (GZO) can be used for thesecond electrode 6046. Further, a mixture in which zinc oxide (ZnO) is mixed at 2% to 20% in ITO, ITSO, or indium oxide including silicon oxide may be used as well for thesecond electrode 6046. Furthermore, a single-layer film including one or more of titanium nitride, zirconium nitride, titanium, tungsten, nickel, platinum, chromium, silver, aluminum, and the like, a stacked layer of a titanium nitride film and a film including aluminum as a main component, a three-layer structure of a titanium nitride film, a film including aluminum as a main component, and a titanium nitride film, or the like can be used for thesecond electrode 6046. However, in the case of using a material other than the light-transmitting oxide conductive material, thesecond electrode 6046 is formed to such a thickness as to transmit light (preferably, about 5 nm to 30 nm). - The
electroluminescent layer 6045 can be formed in a manner similar to that of theelectroluminescent layer 6035 ofFIG. 15A . - In the case of the pixel illustrated in
FIG. 15B , light emitted from the light-emittingelement 6043 can be extracted from thesecond electrode 6046 side as shown by a hollow arrow. - Next, a cross-sectional view of a pixel in the case where a
transistor 6051 is an re-channel transistor, and light emitted from a light-emittingelement 6053 is extracted from afirst electrode 6054 side and asecond electrode 6056 side is illustrated inFIG. 15C . Thetransistor 6051 is covered with an insulatingfilm 6057, and over the insulatingfilm 6057, abank 6058 having an opening is formed. In the opening of thebank 6058, thefirst electrode 6054 is partially exposed, and thefirst electrode 6054, anelectroluminescent layer 6055, and thesecond electrode 6056 are sequentially stacked in the opening. - The
first electrode 6054 can be formed in a manner similar to that of thefirst electrode 6034 ofFIG. 15A . Thesecond electrode 6056 can be formed in a manner similar to that of thesecond electrode 6046 ofFIG. 15B . Theelectroluminescent layer 6055 can be formed in a manner similar to that of theelectroluminescent layer 6035 ofFIG. 15A . - In the case of the pixel illustrated in
FIG. 15C , light emitted from the light-emittingelement 6053 can be extracted from thefirst electrode 6054 side and thesecond electrode 6056 side as shown by hollow arrows. - This embodiment can be implemented in combination with another embodiment as appropriate.
- In this embodiment, a structure of a liquid crystal display device according to one embodiment of the present invention will be described.
-
FIG. 16 illustrates an example of a perspective view showing a structure of a liquid crystal display device of the present invention. The liquid crystal display device shown inFIG. 16 is provided with aliquid crystal panel 1601 in which a liquid crystal element is formed between a pair of substrates, afirst diffusing plate 1602, aprism sheet 1603, asecond diffusing plate 1604, alight guide plate 1605, areflection plate 1606, alight source 1607, and acircuit substrate 1608. - The
liquid crystal panel 1601, thefirst diffusing plate 1602, theprism sheet 1603, thesecond diffusing plate 1604, thelight guide plate 1605, and thereflection plate 1606 are sequentially stacked. Thelight source 1607 is provided at an end portion of thelight guide plate 1605. Theliquid crystal panel 1601 is uniformly irradiated with light from thelight source 1607 which is diffused inside thelight guide plate 1605 due to thefirst diffusing plate 1602, theprism sheet 1603, and thesecond diffusing plate 1604. - Although the
first diffusing plate 1602 and thesecond diffusing plate 1604 are used in this embodiment, the number of diffusing plates is not limited to two. The number of diffusing plates may be one, or may be three or more. It is acceptable as long as the diffusing plate is provided between thelight guide plate 1605 and theliquid crystal panel 1601. Therefore, a diffusing plate may be provided only on the side closer to theliquid crystal panel 1601 than theprism sheet 1603, or may be provided only on the side closer to thelight guide plate 1605 than theprism sheet 1603. - Further, the cross section of the
prism sheet 1603 is not limited to a sawtooth shape shown inFIG. 16 . Theprism sheet 1603 is acceptable as long as it has a shape with which light from thelight guide plate 1605 can be concentrated on theliquid crystal panel 1601 side. - The
circuit substrate 1608 is provided with a circuit which generates various kinds of signals input to theliquid crystal panel 1601, a circuit which processes the signals, or the like. InFIG. 16 , thecircuit substrate 1608 and theliquid crystal panel 1601 are connected to each other through an FPC (flexible printed circuit) 1609. Note that the circuit may be connected to theliquid crystal panel 1601 by using a chip on glass (COG) method, or part of the circuit may be connected to theFPC 1609 by using a chip on film (COF) method. -
FIG. 16 illustrates an example in which thecircuit substrate 1608 is provided with a controlling circuit which controls driving of thelight source 1607 and the controlling circuit and thelight source 1607 are connected to each other through anFPC 1610. Note that the above-described controlling circuit may be formed over theliquid crystal panel 1601. In that case, theliquid crystal panel 1601 and thelight source 1607 are connected to each other through an FPC or the like. - Note that although
FIG. 16 illustrates an edge-light type light source where thelight source 1607 is provided on the edge of theliquid crystal panel 1601, a direct type light source where thelight source 1607 are provided directly below theliquid crystal panel 1601 may be used. - This embodiment can be implemented in combination with any of the above embodiments as appropriate.
- By using a semiconductor display device according to one embodiment of the present invention, a highly reliable electronic device can be provided.
- Moreover, by using a semiconductor display device of the present invention, the heat treatment temperature in manufacturing steps can be suppressed; therefore, a highly reliable thin film transistor with excellent characteristics can be formed even when the thin film transistor is formed over a substrate formed using a flexible synthetic resin which has lower heat resistance than glass, such as plastic. Accordingly, with the use of the manufacturing method according to one embodiment of the present invention, a highly reliable, lightweight, and flexible semiconductor display device with low power consumption can be provided. Examples of a plastic substrate include polyester typified by polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (PBT), polyimide, acrylonitrile-butadiene-styrene resin, polyvinyl chloride, polypropylene, polyvinyl acetate, acrylic resin, and the like.
- The semiconductor display device according to one embodiment of the present invention can be used for display devices, laptops, or image reproducing devices provided with recording media (typically, devices which reproduce the content of recording media such as digital versatile discs (DVDs) and have displays for displaying the reproduced images). Besides, examples of the electronic device that can use a semiconductor display device according to one embodiment of the present invention include mobile phones, portable game machines, portable information terminals, e-book readers, cameras such as video cameras or digital still cameras, display goggles (head-mounted displays), navigation systems, audio reproducing devices (car audio systems, digital audio players, or the like), copying machines, facsimiles, printers, versatile printers, automated teller machines (ATMs), vending machines, and the like. Specific examples of these electronic devices are illustrated in
FIGS. 17A to 17E . -
FIG. 17A illustrates an e-book reader including ahousing 7001, adisplay portion 7002, and the like. The semiconductor display device according to one embodiment of the present invention can be used for thedisplay portion 7002. The use of the semiconductor display device according to one embodiment of the present invention for thedisplay portion 7002 can provide a highly reliable e-book reader. Moreover, with the use of a flexible substrate, the semiconductor display device used for thedisplay portion 7002 can have flexibility. Thus, a highly reliable, flexible, lightweight, and useful display device can be provided. -
FIG. 17B illustrates a display device including ahousing 7011, adisplay portion 7012, a supportingbase 7013, and the like. The semiconductor display device according to one embodiment of the present invention can be used for thedisplay portion 7012. The use of the semiconductor display device according to one embodiment of the present invention for thedisplay portion 7012 can provide a highly reliable display device. Note that the display device includes all of information display devices for personal computers, TV receivers, advertisement displays, and the like. -
FIG. 17C illustrates a display device including ahousing 7021, adisplay portion 7022, and the like. The semiconductor display device according to one embodiment of the present invention can be used for thedisplay portion 7022. The use of the semiconductor display device according to one embodiment of the present invention for thedisplay portion 7022 can provide a highly reliable display device. Moreover, with the use of a flexible substrate, the semiconductor display device, the signal processing circuit, or the like included in thedisplay portion 7022 can have flexibility. Thus, a highly reliable, flexible, and lightweight display device can be provided. Accordingly, as illustrated inFIG. 17C , the display device can be used while being fixed to fabric or the like, and an application range of the semiconductor display device is dramatically widened. -
FIG. 17D illustrates a portable game machine including ahousing 7031, ahousing 7032, adisplay portion 7033, adisplay portion 7034, amicrophone 7035,speakers 7036, anoperation key 7037, astylus 7038, and the like. The semiconductor display device according to one embodiment of the present invention can be used for thedisplay portion 7033 and thedisplay portion 7034. The use of the semiconductor display device according to one embodiment of the present invention for thedisplay portion 7033 and thedisplay portion 7034 can provide a highly reliable portable game machine. Note that although the portable game machine illustrated inFIG. 17D includes twodisplay portions -
FIG. 17E illustrates a mobile phone including ahousing 7041, adisplay portion 7042, an audio-input portion 7043, an audio-output portion 7044,operation keys 7045, a light-receivingportion 7046, and the like. Light received in the light-receivingportion 7046 is converted into electrical signals, whereby external images can be loaded. The semiconductor device according to one embodiment of the present invention can be used for thedisplay portion 7042. The use of the semiconductor display device according to one embodiment of the present invention for thedisplay portion 7042 can provide a highly reliable mobile phone. - This example can be implemented in combination with any of the above embodiments as appropriate.
- This application is based on Japanese Patent Application serial no. 2009-229323 filed with Japan Patent Office on Oct. 1, 2009, the entire contents of which are hereby incorporated by reference.
Claims (12)
1. A semiconductor device comprising:
a gate electrode on an insulating surface;
a gate insulating film over the gate electrode;
an oxide semiconductor film over the gate insulating film;
a source electrode and a drain electrode over the oxide semiconductor film;
an insulating film over the oxide semiconductor film, the source electrode, and the drain electrode and in contact with the oxide semiconductor film; and
a back gate electrode over the insulating film and overlapping with the gate electrode and the oxide semiconductor film,
wherein the back gate electrode includes a hydrogen absorbing alloy.
2. The semiconductor device according to claim 1 , wherein the hydrogen absorbing alloy is at least one of LaNi5, Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, Mg2Ni, Mg2Cu, and Ti2Ni.
3. The semiconductor device according to claim 1 , wherein the insulating film is an oxide insulating film.
4. The semiconductor device according to claim 1 , further comprising an insulating film over the back gate electrode.
5. A semiconductor device comprising:
a gate electrode on an insulating surface;
a gate insulating film over the gate electrode;
a source electrode and a drain electrode over the gate insulating film;
an oxide semiconductor film over the source electrode and the drain electrode;
an insulating film over the oxide semiconductor film, the source electrode, and the drain electrode and in contact with the oxide semiconductor film; and
a back gate electrode over the insulating film and overlapping with the gate electrode and the oxide semiconductor film,
wherein the back gate electrode includes a hydrogen absorbing alloy.
6. The semiconductor device according to claim 5 , wherein the hydrogen absorbing alloy is at least one of LaNi5, Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, Mg2Ni, Mg2Cu, and Ti2Ni.
7. The semiconductor device according to claim 5 , wherein the insulating film is an oxide insulating film.
8. The semiconductor device according to claim 5 , further comprising an insulating film over the back gate electrode.
9. A semiconductor device comprising:
a gate electrode on an insulating surface;
a gate insulating film over the gate electrode;
an oxide semiconductor film over the gate insulating film;
a channel protective film over the oxide semiconductor film;
a source electrode and a drain electrode over the oxide semiconductor film;
an insulating film over the channel protective film, the source electrode, and the drain electrode; and
a back gate electrode over the insulating film and overlapping with the gate electrode and the oxide semiconductor film,
wherein the back gate electrode includes a hydrogen absorbing alloy.
10. The semiconductor device according to claim 9 , wherein the hydrogen absorbing alloy is at least one of LaNi5, Ti—Mn-based alloy, a Ti—Cr-based alloy, a Zr—Mn-based alloy, a Ti—V—Mn-based alloy, Mg2Ni, Mg2Cu, and Ti2Ni.
11. The semiconductor device according to claim 9 , wherein the insulating film is an oxide insulating film
12. The semiconductor device according to claim 9 , further comprising an insulating film over the back gate electrode.
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