US2805409A - Magnetic core devices - Google Patents

Magnetic core devices Download PDF

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US2805409A
US2805409A US534371A US53437155A US2805409A US 2805409 A US2805409 A US 2805409A US 534371 A US534371 A US 534371A US 53437155 A US53437155 A US 53437155A US 2805409 A US2805409 A US 2805409A
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stage
winding
saturable
output
data
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Lyle W Mader
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Sperry Corp
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Sperry Rand Corp
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C19/00Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/04Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using cores with one aperture or magnetic loop

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  • This invention relates to magnetic devices which utilize the hysteresis characteristic of magnetic materials as means for switching or gating data and the like in a shifting register.
  • saturable reactors comprised of suitably wound small cores of ferromagnetic material as storage and logical elements in electronic data handling systems is being increasingly recognized, particularly because of their miniature size, low power requirements; dependability and their ability to retain stored information for long periods oftime in spite of power'failure.
  • the cores of such reactor elements are 'able to store binary information in theiform of residual magnetization after the cores are magnetized to saturation in either of two directions. The saturationcan be achieved by 'passing'either a constant direct current or a pulse currentthrough a- Winding on the core.
  • its core materialis preferably one; having vatleast a quasi-rectangular hysteresisrcharacteristic so .that'the residualiflux deusityis arelatively largepercentage of the flux density presentduring the application .of a saturating magnetomotiveforce. 'rA- number.
  • suitable magnetic materials are a available such as" Deltamax, ultrathin 4-79 Permalloy and ferroniagnetic ferrites.
  • metallic -ferro-alloys are preferably used in thin strips whichmay be wrapped around, ceramic spools while ferrite cores may be molded and windings placed directly thereon, inasmuch as ferrites are relatively free from eddyfiurrent effects.
  • the core of a saturablereactor element maybe held in one direction of residualmagnetization bysnbjecting it to a continuous magnetomotive forcein ,the pre-existing fiux direction suchasthat-produced ;by passing a direct current through a windingon the, core.
  • This biasing-cur- Ifilliill'lfifyf b l'Qadj1Y- fldju$ld;SOl that; the magnetomotive. force. created; by;an;information;or; data sigatent Patented Sept. 3, 1957 nal is insufficient to both balance out the biasing magnetomotive force and to switch the element to the opposite polarity.
  • the biasing current will retain'the magnetization of a saturable reactor element in the polarity arbitrarily designated as the binary digit 00.
  • the opposite polarity of the residual magnetization of such a core will be referred to as the "1 state.
  • "Removal of the biasing current for a definite interval then allows the element either to be switched to the state of opposite polarity, designated as the 1 state, or held in the .0 state according to the information applied thereto during that interval. Following this interval the information is read out by reapplying the bias, assuming that such reapplication creates a suificient magnetomotive force to switch the core of the element, if necessary, back to the 0 state.
  • the saturable reactor element may function as a binary gate which blocksthe flow of information until the biasing current is momentarily removed to allow one digit of binary information tobe stored in its core. Reapplication of the bias induces a voltage in an output winding on the core indicative of the digit stored.
  • saturable reactors may be driven by the output of one saturable reactor, and in this manner a multi-functioning stage of a shifting register may be built. That is, one of the driven saturable reactors may be utilized to shift the data presented theretoto a succeedingand like stage of the register, a second saturable reactor may-shift the data to a preceding stage, a third saturable reactor may provide read out of the data in the stage, a fourth saturable reactor may re-store the information within its stage, and a fifth saturable reactor may be provided for each stage to shift the contents of the. register e nd for end.
  • Figure l is a schematic diagram illustrating the basic principles of gating information through a single stage, dual element, saturable reactor shifting register in the practice of this invention.
  • Figure 2 is a schematic diagram of .two of-;N. stages of anov l hifting regis r whi sica abletof shifting data serially in either direction, holding the data in place, inverting it or gating the data out in parallel.
  • the cores of the saturable'reactor elements are shown in the drawings to be toroidal in shape. However, the shape of the cores is not critical so long as adequate coupling is achieved between the core and its windings. Toroidal cores are especially satisfactory in this respect, and incidentally produce a minimum external field.
  • Each reactor which functions as a magnetic gate in the practice of this invention is provided with a data receiving input winding, an output winding, and a control winding.
  • unidirectional impedance devices such as semi-conducting diodes are included in the connectrng leads to serve a dual purpose of preventing sig-1 nals from being transmitted from the input windings of one saturable reactor element to the output winding of anotherelement or from being transmitted from the' output winding of an element when that element is being switched from a given state of remanent magnetization to the opposite polarity.
  • FIG. 1 wherein there is illustrated the basic components of a shifting register according to the invention, there is shown a toroidal-shaped saturable reactor element 10 which is provided with an input. winding 12, an output winding 14, and a control winding 16.
  • the input winding 12 is connected by lines 18 via resistor 21 and diode 32 to a source of data such as saturable reactor element 22.
  • Reactor 22 also has an input winding 24, an output winding 26 and a control winding 28, with the input winding 24 being connected via resistor 30 to a source of data (not shown) represented by the presence or absence of current pulses.
  • a source of data not shown
  • the core of reactor 22 Upon the presentation of a current pulse representing a binary digit 1 to winding 24, the core of reactor 22 will be shifted to its arbitrarily designated state.
  • winding 26 will not provide an output to winding 12 of the saturable reactor Ill since diode 32 is orientated to allow substantial current flow only in a direction opposite that tended to be induced in winding 26 by a change of the core to its 0 magnetization state. Diode 32 will, however, allow current to flow to winding 12 when an advance pulse is applied to control winding 28 to switch the state of the core of reactor 22 to its 1 polarity. In the practice of this invention advance pulses are applied to winding 28 periodically and in an interlaced fashion with the data pulses to winding 24.
  • the control winding 16 of saturable reactor is connected to a source of bias such as tube 34 so that reactor 10 is normally biased to an arbitrarily designated 0 magnetization state.
  • the amplitude on bias winding 16 must be reduced, preferably to zero, since the magnitude of the bias from tube 34 is made sufficient to counteract any input on winding 12.
  • the bias may be completely interrupted by connection of winding 16 in series with the plate circuit of biasing tube 34 which is normally conducting to cause a biasing current 36 to flow.
  • a steady biasing current 36 of milliamperes was found suflicient to prevent signals arriving on lines 18 from switching the state of element 1% assuming that element 10 is initially magnetized to its 0 state.
  • Biasing tube 34 is controlled by the level of potentialon lead 37 which in turn is controlled by the potential on the grid lead 38 of tube 40. If tube 49 is initially conducting, a negative voltage (e. g. pulse 42) on lead 38 will out it off and cause the voltage drop across the resistance of potentiometer 4 a to reduce so that the movable arm 46, regardless of its position on the resistance of potentiometer 44, will assume a negative potential with respect to ground because of the negative bias applied at terminal 48. Therefore, line 37 and the potential of the control grid of tube 34 will become negative and cut oif tube 34 as illustrated in the waveform at 50.
  • a negative voltage e. g. pulse 42
  • tube 40 of the cathode follower circuit 41 By removing the negative pulse on lead 38, tube 40 of the cathode follower circuit 41 again becomes conducting, thereby causing the potential of line 37 to go positive so that a current again flows through control winding 16.
  • a coupling condenser 52 between the cathode of tube 46 and the control grid of tube 34 causes a sharp leading edge to the plate current pulse 54 from tube 34 when tube 34 is brought to conduction.
  • This surge of current 54 may be several times the amplitude of the steady biasing current, and thus it can apply sufiicient magnetornotive force to saturable reactor element 14 to switch its magnetization state after which the steady state biasing current 36 again takes over to hold. element 10 in that same state until its subsequent removal allows data arriving on lines 18 to again change the state of element 10.
  • saturable reactor 22 is a storageelement and saturable reactor 10 is a gating element for the transfer of data from storage element 22 to the output line 56 of element 10 according to the voltage on lead 38.
  • the static residual magnetization of element 10 is initially in that state arbitrarily designated to correspond to the binary digit 0 and that biasing tube'34 is conducting to cause current to 'flow through winding 16 such that the magnetomotive force created thereby is in that same direction as the vector representing the aforementioned residual magnetization.
  • the biasing current through winding 16 is sufiiciently large, data signals on lines 18 cannot cancel the bias, and element 10 remains in the 0 state until a negative potential is applied at lead 38.
  • the circuit of Figure 1 not only possesses gating action but incidentally may act as an amplifier.
  • Information or data signals on lines 18 may be of minimum amplitude, just sufiicient to switch the state of saturable reactor 10, while tube 34 may be driven hard to cause a relatively large pulse to appear on line 56. Accordingly, the output on line 56 may be used directly without further amplification whereas an amplifier is usually required in the output of most electronic gates.
  • a large number of saturable reactor elements may be included in the plate circuit of biasing tube 34 if it is desired to control the gating action of such elements uniformly.
  • Each stage possesses a single saturable reactor 100 for storage of data, plus one gating saturable reactor for each of its functions.
  • the illustrated shifting register is provided with a set of five gating saturable reactors, however, it will be understood that such representation is only for the purposes of example, and that a shifting register may employ more or less gating elements to accomplish the particular functions desired.
  • Saturable reactor 100 of each stage is employed to store and shift the data presented to its input winding 104 via resistor 106 from the output of the preceding stage.
  • the output from winding 108 of the storage elements 100 is presented via diode 109 in series to the input windings 103 of the several gating saturable reactors 102, 110, 112, 120 and 126 each of which has a control winding 138 supplied with bias in the same manner as described for winding 16 of Figure l.
  • Gating reactor 102 shifts data to the right through output diode 105 and presents it to the input winding 104 of the next stage.
  • Diode 107 is a shunting diode which prevents current induced in winding 104 by application of the advance pulses to control Winding 109 from affecting the state of magnetization of the reactor 102 of the preceding stage.
  • Diode 111 does the same as between the input Winding 103 and reactor 100 within each stage.
  • Saturable reactor 110 is provided to allow parallel read out from the storage element 100. Upon reduction and reapplication of the bias to the control windings 138 of all the reactors 110, there will appear on the parallel output lines an indication of the contents of the whole register.
  • Saturable reactor 112 of stage 2 and succeeding stages has its output winding 114 connected via diode 116 to the input winding 104 of storage element 100 of the preceding storage to permit the data stored in a storage element 100 to be shifted to the left to the next lower stage. That is, assuming a 1 to be stored in element 100 of stage 2, an output from element 112 of stage 2 provides a 1 in element 100 of stage 1.
  • Element 112 of stage 1 has an output line 118 which may provide an inverted serial output. That is, upon successive left shiftings the output on line 118 would represent the data stored in the register in a reverse order, with the lower order digits being read first.
  • a saturable reactor 120 with its output Winding 122 may be connected via diodes 124 to the input winding 104 of the saturable reactor 100 in the same stage. In this manner utilization of the data stored in the elements 100 will, in effect, be non-destructive.
  • the output Winding 128 of reactor 126 of the first stage is coupled by diode 130 in line 131 to the input winding 104 of the last or Nth stage (not shown); the output winding 128 of reactor 126 in the second stage is coupled by diode 132 to the next-to-last or (N1)th stage (not shown); the output winding of the Invert reactor of the third stage- (not shown) is coupled to the input storage reactor of the (N--2)th stage, etc.
  • the Invert output of the Nth stage is coupled to the input of storage reactor 100 of the first stage by line 134; the Invert output of the (N1)th stage is coupled to input of the storage reactor of stage 2 by line 136;- the Invert output of the (N-2)th stage is coupled to the storage reactor input of the third stage, etc.
  • the information stored in the first stage may be shifted to the Nth stage and vice versa, while the data stored in the second stage is shifted to the (N1)th stage and vice versa, etc., to inter-change the contents of the register end for end.
  • a shifting register need not contain all of the saturable reactors illustrated and described, since seldom, if ever, will all five functions be required of a shifting register. Normally, two or three of the functions are sufiicient.
  • a shifting register containing three gating elements per stage could be fabricated, and then readily modified to form any three of the functions by merely changing the appropriate connections.
  • the invention readily lends itself to production-line techniques.
  • one biasing tube such as tube 34, may be connected to serve several gating elements.
  • one biasing tube may provide biasing current for all the Shift Right reactors 102 in the register
  • a second biasing tube may provide bias for all the Parallel Readout reactors 110
  • a third biasing tube may provide bias for all the Shift Left reactors 112 in the register, etc.
  • the separate functions may be controlled by a negative pulse (such as pulse 42 at lead 38, Figure 1), applied to the cathode follower circuit preceding each of the biasing tubes.
  • a stage of an N stage data shifting register comprising a plurality of saturable cores each of which has an input winding, a control winding, an output Winding and a unidirectional current conducting device connected with the output winding, magnetic storage means having an input and output for receiving the data to be stored and shifted, means interconnecting said storage means output with each of said plurality of saturable core input windings, one of said plurality of saturable cores being adapted for coupling from its output winding to the succeeding stage, and a plurality of amplitude controllable biasing means connected respectively to the control windings of said saturable cores for gating the output from said storage means, the arrangement being such that during the biasing of the saturable cores no outputs occur therefrom, but upon a decrease in the amplitude of the bias for any one saturable core after an input thereto an output therefrom occurs.
  • Apparatus as in claim 1 wherein a second one of said plurality of saturable cores is coupled at its output winding to the input of said storage means to re-store the data within said stage while the amplitude of the bias on another of said saturable cores is reduced to permit an output therefrom.
  • Apparatus as in claim 1 wherein a second one of said plurality of saturable cores is coupled at its output winding to the input of said storage means, and a third one of said plurality of saturable cores is coupled at its output winding to read out the data stored in said storage means; said'second one saturable corebeing operable to restore the data in saidstorage means 6.
  • Apparatus as in claim l wherein' a second one of said plurality of saturable cores is adapted for coupling at its output winding to'the input of another stage.
  • a data shifting register comprising N stages each including'a like plurality of saturable reactors each of which have an input Winding, a control winding, an output Winding and a unidirectional current conducting device connected ⁇ with the output winding, each stage further including magnetic storage means having an input and an output for receiving the data to be stored, means interconnecting said storage means output with eachcf said'plurality of saturable reactor input windingswvithin said stages respectively, one of said plurality of 'saturable'react'ors in each stage being coupled from its outputwinding to the input of the storage means of the succeeding'stage to shift'the data to the next higher order stage, and a plurality of amplitude controllable biasing means connected respectively to the control windings of said saturaole reactors in each stage for gating the output from,the storage means associated therewith, the arrangement being such that during the biasing of the saturable reactors no outputs occur therefrom but upon a decrease in theamplitude of the bias for any
  • Apparatus as in claim 7 wherein'a second one of said plurality of saturable reactors in each stage is coupled at its output winding to read out the data stored in said storage means of the respective stages.
  • V Apparatus asfin' claim 7:whe'rein' a second one of said plurality of saturable, reactors" in each stage other than the first stage is coupled at its output winding to the input of the storage means of the preceding stage to shift the data to'then'ext lower order stage.
  • Apparatus as in claim 7 wherein a second one of said plurality of saturable reactors in each stagelis' coupled at its output Winding to the input of the storage eans associated respectively therewith to restore the data within each stage, and a third one of said cores' in each stage is coupled at its output winding to read out the data stored in said storage means in parallel With read out from the other stages.
  • Apparatus as in claim '7 whereinla second one of said plurality of saturable reactors ineach stage is coupled at its output winding to the input of a storage means in another stage, the coupling being such that the order of data stored in each stage is inverted.

Description

p 1957 L. w. MADER MAGNETIC CORE DEVICES FROM. STgGE SHIFI' LEFT FROM STAGE N'l M. a LA m E N U l T M 5 HM RT Rs ls AU GA I P0 SR E N G W. N A a z. .w w u A m M 5 t A WIIII I l I I I I I Ill l l I I I I I l I l I l I I I I III s f\ f\ /1 e T 1 W i 1 F n T M 2 O a U al T W 0 2 O m m l H L T I L P E E T 0 T E E R6 FF. MD F6 G L O A H A H A L TT s PE 5 T A 8 S 5 8 9 R S R 3 3 3 O A l. 3 I. l P 0 Z .v. 3 n M D m INVERTED Fl ADVANCE DATA INPUT INVENT OR LYLE W. MADE? km QM/7% 5m MAGNETIC CORE DEVICES Lyle W. Mader, Silver Spring, Md., assignor to Sperry Rand Corporation, a corporation of Delaware Application September 14, 1955, Serial No. 534,371
12 Claims. (Cl. 340174) This invention relates to magnetic devices which utilize the hysteresis characteristic of magnetic materials as means for switching or gating data and the like in a shifting register.
The value of saturable reactors comprised of suitably wound small cores of ferromagnetic material as storage and logical elements in electronic data handling systems is being increasingly recognized, particularly because of their miniature size, low power requirements; dependability and their ability to retain stored information for long periods oftime in spite of power'failure. 'The cores of such reactor elements are 'able to store binary information in theiform of residual magnetization after the cores are magnetized to saturation in either of two directions. The saturationcan be achieved by 'passing'either a constant direct current or a pulse currentthrough a- Winding on the core. When a current is applied to a'winding on the core-to create a-magnetomotive force in the sense opposite to'the pro-existing flux direction,-the core is driven to saturationin Y the opposite polarity provided thatthe magnetomotive forceexceeds a certain criticalvalue. The total change in flux accompanying this shift in flux direction occurs in a relatively-short time, thereby inducing a sizable voltage pulse across anywinding on the core, which pulse may be utilizedto drive other saturable reactor elements -to saturation in a predetermined polarity or-in a variety of-other ways. On the other-hand, magnetizingapulsesapplied to a-saturable reactor element which drive it further-into saturation in the same directionasthat of the residual flux produce a change in fiux which is-small-compared to that created in. reversing the flint polarity-and SOQlHdllCfi correspondingly-small voltage pulses in windingsron the core.
in order toachieve a large ratio between the voltage pulsesinduced-when a saturable magnetic reactor element is driven to the opposite polarity as compared to that obtained whendriving it to saturation in its original polarity, its core :materialis preferably one; having vatleast a quasi-rectangular hysteresisrcharacteristic so .that'the residualiflux deusityis arelatively largepercentage of the flux density presentduring the application .of a saturating magnetomotiveforce. 'rA- number. of suitable magnetic materials are a available such as" Deltamax, ultrathin 4-79 Permalloy and ferroniagnetic ferrites. In order to improve high-frequency response-by reducing eddy current losses, metallic -ferro-alloys are preferably used in thin strips whichmay be wrapped around, ceramic spools while ferrite cores may be molded and windings placed directly thereon, inasmuch as ferrites are relatively free from eddyfiurrent effects. Y
. The core of a saturablereactor element maybe held in one direction of residualmagnetization bysnbjecting it to a continuous magnetomotive forcein ,the pre-existing fiux direction suchasthat-produced ;by passing a direct current through a windingon the, core. This biasing-cur- Ifilliill'lfifyf b l'Qadj1Y- fldju$ld;SOl that; the magnetomotive. force. created; by;an;information;or; data sigatent Patented Sept. 3, 1957 nal is insufficient to both balance out the biasing magnetomotive force and to switch the element to the opposite polarity. Normally, the biasing current will retain'the magnetization of a saturable reactor element in the polarity arbitrarily designated as the binary digit 00. The opposite polarity of the residual magnetization of such a core will be referred to as the "1 state. "Removal of the biasing current for a definite interval then allows the element either to be switched to the state of opposite polarity, designated as the 1 state, or held in the .0 state according to the information applied thereto during that interval. Following this interval the information is read out by reapplying the bias, assuming that such reapplication creates a suificient magnetomotive force to switch the core of the element, if necessary, back to the 0 state. This is conveniently accomplished by reapplying the bias in a manner such that a surge of current results. Consequently, the saturable reactor element may function as a binary gate which blocksthe flow of information until the biasing current is momentarily removed to allow one digit of binary information tobe stored in its core. Reapplication of the bias induces a voltage in an output winding on the core indicative of the digit stored.
Since current required to shift the magnetic core of the saturable reactor-element is comparatively small, several saturable reactors may be driven by the output of one saturable reactor, and in this manner a multi-functioning stage of a shifting register may be built. That is, one of the driven saturable reactors may be utilized to shift the data presented theretoto a succeedingand like stage of the register, a second saturable reactor may-shift the data to a preceding stage, a third saturable reactor may provide read out of the data in the stage, a fourth saturable reactor may re-store the information within its stage, and a fifth saturable reactor may be provided for each stage to shift the contents of the. register e nd for end.
It is accordingly an object of this invention to provide novel mean for gating digital information or data in a shifting register by using saturable reactor elements.
Normally in the use of saturable reactor elements as gates, two separate sources of control are required,. one to allow information to be advanced. into the gate and a second to drive the information out. It is accordingly an object of this invention to provide each stage of a multi-stage shifting register with magnetic gates each of which utilizes a single source of bias bothto controlthe passage of information and to provide means for advancing the information out in a usable form.
Information may be accepted by a magnetic gate .em-
'- bodying the principles of this invention in, the form of a relatively small current compared to the amplitude .of .the current surge. An object of this invention isthento provide each stage of a shifting register with magnetic gates which incidentally may act as amplifiers and as storage devices.
It is another object of this invention to provide a shifting register comprised of saturable reactor elements in which the stored information may be so gated as tobe held in place, inverted, advanced in either direction, 'or read out in parallel.
These and other objects of the invention will be apparent and best understood from the following description and claims when considered in connection with the exemplary drawings, in which:
Figure l is a schematic diagram illustrating the basic principles of gating information through a single stage, dual element, saturable reactor shifting register in the practice of this invention; and
Figure 2 is a schematic diagram of .two of-;N. stages of anov l hifting regis r whi sica abletof shifting data serially in either direction, holding the data in place, inverting it or gating the data out in parallel.
The cores of the saturable'reactor elements are shown in the drawings to be toroidal in shape. However, the shape of the cores is not critical so long as adequate coupling is achieved between the core and its windings. Toroidal cores are especially satisfactory in this respect, and incidentally produce a minimum external field. Each reactor which functions as a magnetic gate in the practice of this invention is provided with a data receiving input winding, an output winding, and a control winding. When these windings are connected to windings on other mag- V netic cores in a circuit, unidirectional impedance devices such as semi-conducting diodes are included in the connectrng leads to serve a dual purpose of preventing sig-1 nals from being transmitted from the input windings of one saturable reactor element to the output winding of anotherelement or from being transmitted from the' output winding of an element when that element is being switched from a given state of remanent magnetization to the opposite polarity.
Referring now to Figure 1, wherein there is illustrated the basic components of a shifting register according to the invention, there is shown a toroidal-shaped saturable reactor element 10 which is provided with an input. winding 12, an output winding 14, and a control winding 16. The input winding 12 is connected by lines 18 via resistor 21 and diode 32 to a source of data such as saturable reactor element 22. Reactor 22 also has an input winding 24, an output winding 26 and a control winding 28, with the input winding 24 being connected via resistor 30 to a source of data (not shown) represented by the presence or absence of current pulses. Upon the presentation of a current pulse representing a binary digit 1 to winding 24, the core of reactor 22 will be shifted to its arbitrarily designated state. However, winding 26 will not provide an output to winding 12 of the saturable reactor Ill since diode 32 is orientated to allow substantial current flow only in a direction opposite that tended to be induced in winding 26 by a change of the core to its 0 magnetization state. Diode 32 will, however, allow current to flow to winding 12 when an advance pulse is applied to control winding 28 to switch the state of the core of reactor 22 to its 1 polarity. In the practice of this invention advance pulses are applied to winding 28 periodically and in an interlaced fashion with the data pulses to winding 24.
The control winding 16 of saturable reactor is connected to a source of bias such as tube 34 so that reactor 10 is normally biased to an arbitrarily designated 0 magnetization state. In order to shift reactor 10 to its opposite 1 state, the amplitude on bias winding 16 must be reduced, preferably to zero, since the magnitude of the bias from tube 34 is made sufficient to counteract any input on winding 12. The bias may be completely interrupted by connection of winding 16 in series with the plate circuit of biasing tube 34 which is normally conducting to cause a biasing current 36 to flow. In an actual embodiment, a steady biasing current 36 of milliamperes was found suflicient to prevent signals arriving on lines 18 from switching the state of element 1% assuming that element 10 is initially magnetized to its 0 state. Biasing tube 34 is controlled by the level of potentialon lead 37 which in turn is controlled by the potential on the grid lead 38 of tube 40. If tube 49 is initially conducting, a negative voltage (e. g. pulse 42) on lead 38 will out it off and cause the voltage drop across the resistance of potentiometer 4 a to reduce so that the movable arm 46, regardless of its position on the resistance of potentiometer 44, will assume a negative potential with respect to ground because of the negative bias applied at terminal 48. Therefore, line 37 and the potential of the control grid of tube 34 will become negative and cut oif tube 34 as illustrated in the waveform at 50. By removing the negative pulse on lead 38, tube 40 of the cathode follower circuit 41 again becomes conducting, thereby causing the potential of line 37 to go positive so that a current again flows through control winding 16. However, a coupling condenser 52 between the cathode of tube 46 and the control grid of tube 34 causes a sharp leading edge to the plate current pulse 54 from tube 34 when tube 34 is brought to conduction. This surge of current 54 may be several times the amplitude of the steady biasing current, and thus it can apply sufiicient magnetornotive force to saturable reactor element 14 to switch its magnetization state after which the steady state biasing current 36 again takes over to hold. element 10 in that same state until its subsequent removal allows data arriving on lines 18 to again change the state of element 10. It will be appreciated by those fmliar with the art that the amplitude and duration of the current surge on line 37, and therefore of pulse 54, is dependent upon the RC time constant of capacitor 52 and potentiometer 44 and so can be varied by adjusting the latter. It has been found that a current surge 5'4 of 75 milliamperes is satisfactory. Diode 6h shunts lines 18 so that any current induced in winding 12 by the current surge 54 in winding .16 is prevented from affecting the state of the core of reactor 22.
It follows that in the circuit of Figure 1, saturable reactor 22 is a storageelement and saturable reactor 10 is a gating element for the transfer of data from storage element 22 to the output line 56 of element 10 according to the voltage on lead 38. Suppose that the static residual magnetization of element 10 is initially in that state arbitrarily designated to correspond to the binary digit 0 and that biasing tube'34 is conducting to cause current to 'flow through winding 16 such that the magnetomotive force created thereby is in that same direction as the vector representing the aforementioned residual magnetization. Assuming that the biasing current through winding 16 is sufiiciently large, data signals on lines 18 cannot cancel the bias, and element 10 remains in the 0 state until a negative potential is applied at lead 38. This cuts off the biasing current 36 and allows a signal of the proper polarity on lines 18 to switch the element 10 to the 1 state. However, no output appears on line 56 since diode 58 is orientated to prevent a substantial output thereto. Removal of the negative potential from lead 38 produces a current surge 54 through winding 16 which drivesthe element 10 back to the 0 state to induce a relatively large voltage across winding 14 for producing a pulse of current through diode 58 to line 56. Of course, if no signal is applied to lines 18, or if the polarity of the signal is such that element 10 is driven further into its 0 state, reapplication of the bias from tube 34 produces a negligible voltage across winding 14, assuming that element 10 is of fabricated material characterized by a generally rectangular hysteresis loop.
The circuit of Figure 1 not only possesses gating action but incidentally may act as an amplifier. Information or data signals on lines 18 may be of minimum amplitude, just sufiicient to switch the state of saturable reactor 10, while tube 34 may be driven hard to cause a relatively large pulse to appear on line 56. Accordingly, the output on line 56 may be used directly without further amplification whereas an amplifier is usually required in the output of most electronic gates. It should be noted that a large number of saturable reactor elements may be included in the plate circuit of biasing tube 34 if it is desired to control the gating action of such elements uniformly.
Reference is now made to Figure 2 in which the serial shifting register illustrated in Figure 1 is improved to form a multi-stage shifting register capable of shifting data serially in either direction, re-storing the data in each of its stages while the data is being otherwise utilized, inverting the data, and/or gating the data out from the different stages in parallel. Only the first and second stages of an N stage shifting register is illustrated in Figure 2,
'5 but it will be apparent that the other of the N stages is similar to those shown and described.
Each stage possesses a single saturable reactor 100 for storage of data, plus one gating saturable reactor for each of its functions. The illustrated shifting register is provided with a set of five gating saturable reactors, however, it will be understood that such representation is only for the purposes of example, and that a shifting register may employ more or less gating elements to accomplish the particular functions desired.
Saturable reactor 100 of each stage is employed to store and shift the data presented to its input winding 104 via resistor 106 from the output of the preceding stage. The output from winding 108 of the storage elements 100 is presented via diode 109 in series to the input windings 103 of the several gating saturable reactors 102, 110, 112, 120 and 126 each of which has a control winding 138 supplied with bias in the same manner as described for winding 16 of Figure l. Gating reactor 102 shifts data to the right through output diode 105 and presents it to the input winding 104 of the next stage. Diode 107 is a shunting diode which prevents current induced in winding 104 by application of the advance pulses to control Winding 109 from affecting the state of magnetization of the reactor 102 of the preceding stage. Diode 111 does the same as between the input Winding 103 and reactor 100 within each stage.
Saturable reactor 110 is provided to allow parallel read out from the storage element 100. Upon reduction and reapplication of the bias to the control windings 138 of all the reactors 110, there will appear on the parallel output lines an indication of the contents of the whole register.
Saturable reactor 112 of stage 2 and succeeding stages has its output winding 114 connected via diode 116 to the input winding 104 of storage element 100 of the preceding storage to permit the data stored in a storage element 100 to be shifted to the left to the next lower stage. That is, assuming a 1 to be stored in element 100 of stage 2, an output from element 112 of stage 2 provides a 1 in element 100 of stage 1. Element 112 of stage 1 has an output line 118 which may provide an inverted serial output. That is, upon successive left shiftings the output on line 118 would represent the data stored in the register in a reverse order, with the lower order digits being read first.
If during the time that parallel read out is being taken from elements 110, or if any other gating function destroys the state of element 100, and it is desired to maintain the pre-existing state in elements 100, a saturable reactor 120 with its output Winding 122 may be connected via diodes 124 to the input winding 104 of the saturable reactor 100 in the same stage. In this manner utilization of the data stored in the elements 100 will, in effect, be non-destructive.
Under certain conditions it is desirable to invert the order of the data in the several stages of the register. For example, teletype information is usually transmitted with its higher order data first, but computers normally require that the data be received with its lower order digits first. With a saturable reactor 126 in each stage, the order of the data may be inverted or reversed, that is, the contents of the register may be shifted end for end. The output Winding 128 of reactor 126 of the first stage is coupled by diode 130 in line 131 to the input winding 104 of the last or Nth stage (not shown); the output winding 128 of reactor 126 in the second stage is coupled by diode 132 to the next-to-last or (N1)th stage (not shown); the output winding of the Invert reactor of the third stage- (not shown) is coupled to the input storage reactor of the (N--2)th stage, etc. Also the Invert output of the Nth stage is coupled to the input of storage reactor 100 of the first stage by line 134; the Invert output of the (N1)th stage is coupled to input of the storage reactor of stage 2 by line 136;- the Invert output of the (N-2)th stage is coupled to the storage reactor input of the third stage, etc. In this manner the information stored in the first stage may be shifted to the Nth stage and vice versa, while the data stored in the second stage is shifted to the (N1)th stage and vice versa, etc., to inter-change the contents of the register end for end.
As mentioned above, it is to be understood that a shifting register need not contain all of the saturable reactors illustrated and described, since seldom, if ever, will all five functions be required of a shifting register. Normally, two or three of the functions are sufiicient. For example, a shifting register containing three gating elements per stage could be fabricated, and then readily modified to form any three of the functions by merely changing the appropriate connections. Thus the invention readily lends itself to production-line techniques.
Since only a comparatively small amount of current is necessary to hold the gating elements 102, 110, 112, and 126 in their 0 state, one biasing tube, such as tube 34, may be connected to serve several gating elements. For example, one biasing tube may provide biasing current for all the Shift Right reactors 102 in the register, a second biasing tube may provide bias for all the Parallel Readout reactors 110, a third biasing tube may provide bias for all the Shift Left reactors 112 in the register, etc. In this way, the separate functions may be controlled by a negative pulse (such as pulse 42 at lead 38, Figure 1), applied to the cathode follower circuit preceding each of the biasing tubes.
Modifications of this invention not described herein will become apparent to those skilled in the art. Therefore, it is intended that the matter contained in the foregoing description and the accompanying drawings be interpreted as illustrative and not limitative, the scope of the invention being defined in the appended claims.
What is claimed is:
l. A stage of an N stage data shifting register, the stage comprising a plurality of saturable cores each of which has an input winding, a control winding, an output Winding and a unidirectional current conducting device connected with the output winding, magnetic storage means having an input and output for receiving the data to be stored and shifted, means interconnecting said storage means output with each of said plurality of saturable core input windings, one of said plurality of saturable cores being adapted for coupling from its output winding to the succeeding stage, and a plurality of amplitude controllable biasing means connected respectively to the control windings of said saturable cores for gating the output from said storage means, the arrangement being such that during the biasing of the saturable cores no outputs occur therefrom, but upon a decrease in the amplitude of the bias for any one saturable core after an input thereto an output therefrom occurs.
2. Apparatus as in claim 1 wherein a second one ,of said plurality of saturable cores is coupled at its output winding to read out the data stored in said storage means.
3. Apparatus as in claim 1 wherein a second one of said plurality of saturable cores is adapted for coupling at its output Winding to the input of the preceding stage.
4. Apparatus as in claim 1 wherein a second one of said plurality of saturable cores is coupled at its output winding to the input of said storage means to re-store the data within said stage while the amplitude of the bias on another of said saturable cores is reduced to permit an output therefrom.
5. Apparatus as in claim 1 wherein a second one of said plurality of saturable cores is coupled at its output winding to the input of said storage means, and a third one of said plurality of saturable cores is coupled at its output winding to read out the data stored in said storage means; said'second one saturable corebeing operable to restore the data in saidstorage means 6. Apparatus as in claim lwherein' a second one of said plurality of saturable cores is adapted for coupling at its output winding to'the input of another stage.
7. *A data shifting register comprising N stages each including'a like plurality of saturable reactors each of which have an input Winding, a control winding, an output Winding and a unidirectional current conducting device connected {with the output winding, each stage further including magnetic storage means having an input and an output for receiving the data to be stored, means interconnecting said storage means output with eachcf said'plurality of saturable reactor input windingswvithin said stages respectively, one of said plurality of 'saturable'react'ors in each stage being coupled from its outputwinding to the input of the storage means of the succeeding'stage to shift'the data to the next higher order stage, and a plurality of amplitude controllable biasing means connected respectively to the control windings of said saturaole reactors in each stage for gating the output from,the storage means associated therewith, the arrangement being such that during the biasing of the saturable reactors no outputs occur therefrom but upon a decrease in theamplitude of the bias for any one saturable reactor after an input thereto an output therefrom occurs. 5
8. Apparatus as in claim 7 wherein'a second one of said plurality of saturable reactors in each stage is coupled at its output winding to read out the data stored in said storage means of the respective stages. V 9. Apparatus asfin' claim 7:whe'rein' a second one of said plurality of saturable, reactors" in each stage other than the first stage is coupled at its output winding to the input of the storage means of the preceding stage to shift the data to'then'ext lower order stage. i a I 10. Apparatus as in claim 7 wherein a second one'of said plurality of saturable reactors in each stage is coupled at its output winding tothe input of "the storage means associated respectively therewith to re-store the data within each stage while the amplitude of the bias on another of said saturable reactors in each stage'is re-' duced to permit an output therefrom. e
11. Apparatus as in claim 7 wherein a second one of said plurality of saturable reactors in each stagelis' coupled at its output Winding to the input of the storage eans associated respectively therewith to restore the data within each stage, and a third one of said cores' in each stage is coupled at its output winding to read out the data stored in said storage means in parallel With read out from the other stages.
12. Apparatus as in claim '7 whereinla second one of said plurality of saturable reactors ineach stage is coupled at its output winding to the input of a storage means in another stage, the coupling being such that the order of data stored in each stage is inverted.
No references cited.
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US2932689A (en) * 1956-12-20 1960-04-12 Rca Corp Television signal separator circuits
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US3191161A (en) * 1958-10-29 1965-06-22 Ncr Co Means for driving magnetic storage elements
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2957087A (en) * 1955-09-16 1960-10-18 Kokusai Denshin Denwa Co Ltd Coupling system for an electric digital computing device
US2910674A (en) * 1956-04-19 1959-10-27 Ibm Magnetic core memory
US3013252A (en) * 1956-05-29 1961-12-12 Bell Telephone Labor Inc Magnetic core shift register circuits
US2942241A (en) * 1956-05-29 1960-06-21 Bell Telephone Labor Inc Magnetic core shift register circuits
US3069660A (en) * 1956-06-14 1962-12-18 Int Standard Electric Corp Storage of electrical information
US3081448A (en) * 1956-07-13 1963-03-12 Int Standard Electric Corp Intelligence storage equipment
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US2992415A (en) * 1956-10-04 1961-07-11 Ibm Magnetic core pulse circuits
US3041582A (en) * 1956-11-19 1962-06-26 Sperry Rand Corp Magnetic core circuits
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US3049695A (en) * 1956-12-31 1962-08-14 Rca Corp Memory systems
US3047228A (en) * 1957-03-30 1962-07-31 Bauer Friedrich Ludwig Automatic computing machines and method of operation
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US2979700A (en) * 1957-11-15 1961-04-11 Information Systems Inc Differential matrix driver
US3040985A (en) * 1957-12-02 1962-06-26 Ncr Co Information number and control system
US2970297A (en) * 1957-12-23 1961-01-31 Ibm Magnetic branching circuit
US3089961A (en) * 1958-01-03 1963-05-14 Sperry Rand Corp Binary logic circuits employing transformer and enhancement diode combination
US3106698A (en) * 1958-04-25 1963-10-08 Bell Telephone Labor Inc Parallel data processing apparatus
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US3191161A (en) * 1958-10-29 1965-06-22 Ncr Co Means for driving magnetic storage elements
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