US3591824A

US3591824A - Driving means for crt{3 s

Info

Publication number: US3591824A
Application number: US804643A
Authority: US
Inventors: Richard B Hanbicki
Original assignee: Madatron Corp
Current assignee: Madatron Corp
Priority date: 1969-03-05
Filing date: 1969-03-05
Publication date: 1971-07-06
Anticipated expiration: 1988-07-06

Abstract

Apparatus for driving character-display tubes and the like, especially of the cathode-ray-tube type, providing circuitry for automatically centering symbols being displayed upon the CRT and for synchronously and accurately generating the desired ramp signals in a simple and quite inexpensive manner and which employs circuitry for controlling the timing of the ramp signals to eliminate the need for high-precision synchronous-signalgenerating means.

Description

United States Patent [72] Inventor Richard B. lhnbicki Princeton Junction, NJ. [2]] Appl. No, 804,643 22] Filed Mar. 5, 1969 [45] Patented July 6, 1971 [73] Assignee Madatron inc.

Rocky H111, NJ.

[54] DRIVING MEANS FOR CRTS Primary Examiner-Rodney D. Bennett, .11. Assistant Examiner-T. H, Tubbesing Attorney-Ostrolenk, Faber, Gerb & Soffen 7 Claims, 14 Drawing Figs.

315/24,178/6.6,l7 8/69- ABSTRACT: Apparatus for driving character-display tubes [51] Int. Cl 1101; 29/52 d h lik wially of the cathode-ray-tube type, provid- 0 circuitry for automatically centering symbols being dis. 695 TV, A played upon the CRT and for synchronously and accurately generating the desired ramp signals in a simple and quite inex- References Cited pensive manner and which employs circuitry for controlling UNFFED STATES PATENTS the timing of the ramp signals to eliminate the need for high- 2,084,700 6/1937 Ogloblinsky .,1.78/69.5 (TV) X precision synchronous-signalgenerating means.

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PATENTEI] JUL 6 IBYI SHEET 3 OF 5 W Q Qww SHEU 5 [1F 5 PATENTED JUL 6 15m DRIVING MEANS FOR CRTS The present invention relates to control circuitry and more particularly to novel control circuitry adapted for accurately generating ramp signals of the type employed to drive cathode-ray tubes and the like wherein highly accurate and synchronized ramp signals are generated through the use of simplified circuitry.

Numerous applications exist wherein it is desired to exercise control over electron tubes. One such application in which the present invention may be used to great advantage is that of controlling electron tubes of the cathode-ray-tube type. Typically, in displaying or writing information upon the face of the CRT the control circuitry operates to synchronize the deflection signals with one another and with the grid control or unblanking signals so as to display the desired information in a reliable and accurate manner. One specific embodiment in which such control circuitry is employed is set forth in detail in copending application Ser. No. 718,553, filed Apr. 3, I968 and assigned to the assignee of the present invention and application Ser. No. 731,467, filed May 23, 1968 now US. N0.No.3,506,873 and likewise assigned to the assignee of the present invention. In the former application, signals for controlling the X deflection plates, signals for controlling the Y" deflection plates and signals (unblanking signals) for controlling the cutoff of the electron beam are derived from separate storage locations within suitable storage means, which readout of information occurs in such a manner that these signals are automatically in synchronism upon readout thereof. In practice, the signals for controlling the deflection plates are synchronizing signals which, in turn, drive X" and Y" ramp generators which ultimately drive the deflection plates.

One of the least expensive forms of storage means and which is described in the former application mentioned hereinabove is a rotating storage means such as a magnetic drum or disc containing either a magnetic pattern for use with magnetic readout means or a coded pattern for use with lightsensitive means. The three types of information are normally stored in three individual tracks of the rotating memory, each requiring individual sensing means (such as magnetic heads, for example) for readout of the information stored therein.

The present invention is characterized by providing a novel circuit arrangement wherein the same capacity of information may be stored in only two tracks of the memory thereby reducing the amount of circuitry and other related components in the system and further increasing reliability of the system. The present invention is further characterized by providing novel ramp generating circuits wherein the ramp signals generated automatically center the information to be displayed upon the cathode-ray tube by generating ramp signals of very accurate time duration and voltage swings in spite of the fact that the synchronizing signals for driving the ramp generators are not accurately regulated.

The present invention is comprised of storage means in which the synchronizing signals for driving the X" and Y" ramp generators are stored in a single track within the memory. The synchronizing signals are read out through common readout means (such as a magnetic head) and applied to circuitry capable of distinguishing a predetermined characteristic of the signals.

The synchronizing signals are then applied to their associated ramp generating circuits which are uniquely designed so as to cause each ramp, which is initiated by a synchronizing signal, to experience a voltage swing between two predetermined voltage levels regardless of rather significant deviations in time duration between succeeding synchronizing pulses, thereby enabling the use of rather unsophisticated (and hence inexpensive) storage means, while at the same time assuring excellent repeatability of the positioning of information to be displayed upon the face of the CRT.

In a first preferred embodiment of the present invention, X synchronizing signals are represented in storage means by single pulses whereas Y" synchronizing signals are represented in memory by double pulses. The circuitry employed to distinguish between the waveforms is comprised of means for integrating each of the pulses and applying the integrated value to a threshold circuit which yields an output when the integrated value surpasses a predetermined threshold level. In a second preferred embodiment of the invention, a gating circuit is employed to distinguish between these X" and Y signals on the basis of their occurrence in a predetermined time sequence, and to condition various output circuitry to respond only to the letter. In a third preferred embodiment of the present invention, the X and Y synchronizing signals are distinguished from one another by signal amplitude and separate threshold circuits are provided for distinguishing between the synchronizing signals by examination of their signal amplitudes.

In still a fourth form of the present invention, the signal stored in memory representing the X and Y" synchronizing information are applied to counter means which, upon counting the generation of a predetermined number of X" pulses, generates a Y" pulse in synchronism therewith. All four techniques reduce the system circuitry and further act to enhance the simplicity of the storage means. by eliminating one storage location (i.e. track) and one readout means (i.e. magnetic head).

It is therefore one object of the present invention to provide novel control circuitry for use with cathode-ray tubes and the like wherein deflection and blanking signals are generated in a simple and yet highly accurate manner.

Another object of the present invention is to provide novel control circuitry for use with cathode-ray tubes and the like wherein the synchronizing signals for generating the ramp waveforms normally applied to the deflection means of a cathode-ray tube are stored in a common storage location within the memory means provided therefor.

Still another object of the present invention is to provide novel control circuitry for use with cathode-ray tubes and the like and which is comprised of rotatable memory means having the synchronizing signals for use in controlling the ramp waveforms applied to the cathode-ray deflection means stored in a single track thereof.

Another object of the present invention is to provide novel control circuitry for use with cathode-ray tubes and the like which is comprised of memory means for storing the synchronizing signals employed to trigger the initiation of ramp waveforms normally applied to the cathode-ray-tube deflection means within a common location in memory and further comprising control circuitry for distinguishing between the two different types of deflection signals stored therein.

Still another object of the present invention is to provide novel ramp generating circuits for use with cathode-ray tubes and the like wherein each ramp generated by the circuit experiences the same voltage swing regardless of rather significant deviation in the synchronizing signals employed to trigger the ramp generator.

These as well as other objects of the present invention will become apparent when reading the accompanying description and drawings in which:

FIG. I is a schematic diagram showing a system for operating a cathode-ray tube.

FIG. la shows a plurality of waveforms useful in describing the operation of the system of FIG. 1.

FIG. 2 is a schematic diagram showing one preferred embodiment of the present invention.

FIG. 2a shows a plurality of waveforms useful in describing the operation of the embodiment of FIG. 2.

FIG. 3 is a block diagram showing still another preferred embodiment of the present invention.

FIG. 3a shows the front face of a cathode-ray-tube display device of the type shown in FIG. 1, for example, and which. is useful in describing the operation of the system of FIG. 3.

FIG. 4a is a schematic diagram showing still another preferred embodiment of the present invention.

FIGS. 4b and 4c are schematic diagrams of ramp generators which may be employed with any of the embodiments of FIGS. 2, 3 or 4a.

FIG. 4d shows a plurality of waveforms useful in describing the operation of FIGS. 4a-4c.

FIG. 4e is a schematic diagram of an amplifier and shaper which may be used with any of the embodiments shown in FIGS. 2, 3 and 40.

FIG. 4f shows a plurality of waveforms useful in describing the operation of the ramp generating means of the circuit of FIG. 4b.

FIG. 5 is a schematic diagram showing an alternative embodiment of the circuit of FIG. 4a.

FIG. 5a shows a waveform diagram useful in describing the operation of the circuit of FIG. 5.

FIG. 1 shows a control system for controlling the operation of a cathode-ray tube 11 which is provided with a pair of horizontal deflection means 12 and vertical deflection means 13 which are used to deflect an electron beam (not shown) emanating from an electron gun, shown schematically at 14, which beam is modulated by a control grid, shown schematically at 15. The electron beam is deflected to any particular location upon the face 110 of the cathode-ray tube by the horizontal and vertical deflection means 12 and 13, respectively.

One typical and rather simplified way of controlling the operation of the cathode-ray tube 11 for generating characters or symbols is comprised of a rotating drum memory 16 which is maintained to be constantly rotated by a motor 17 whose output shaft 18 is preferably directly coupled to the rotating drum 16. The surface of the drum, as shown in FIG. 1, is provided with at least three memory tracks 160-] 6c for storing information relating to the unblanking signals (Z"), X" (horizontal) deflection-synchronizing signals and Y" (vertical) deflection-synchronizing signals, respectively. The information stored in these tracks may be in the form of magnetic saturation patterns picked up by magnetic readout heads 19- 21, respectively. As an alternative, the drum may be provided with contrasting light and dark patterns having light impinging thereon for pickup by suitable photosensitive means to provide substantially the same type of output information as would be generated by the magnetic readout heads I92I. One of the advantages of providing all of the patterns upon a single surface is to guarantee the synchronism between and among these signals.

The magnetic patterns representing the synchronizing and unblanking signals stored in the tracks of memory drum 16 are shown in FIG. la. Waveform 22 indicates the synchronizing signals generated by the information stored in track 160 which are employed for the purpose of triggering the initiation of a ramp signal, shown by waveform 23, which ramp signal is utilized to drive the vertical or Y" deflection plate pair 13 of FIG. 1. The purpose of the synchronizing signals 22 is to terminate a previously generated ramp signal and simultaneously initiate a new ramp signal which is the conventional operation of such synchronizing signals. In the case where the face Ila of the cathode-ray tube is to be swept a plurality of times in the horizontal direction for each single sweep in the vertical direction, the track 16b is provided with a magnetic pattern to generate the signals shown by waveform 24 which are employed to trigger the initiation of ramp signals shown by waveform 25. The number of ramp signals applied to the horizontal deflection plate pair 12 per ramp signal applied to the vertical deflection plate 13 is dependent upon the number of horizontal sweeps which are either desired or required for one single raster of the cathode-ray tube face Ila. In a like manner, the synchronizing signals shown by waveform 24 simultaneously terminate a previously generated ramp signal and initiate a new ramp signal.

The magnetic pattern stored in track 16a generates the waveform 26 of FIG. la for the purpose of generating unblanking signals represented by waveform 27.

The operation of the system of FIG. 1 is as follows:

The signals of tracks l6a-I6c are picked up by readout heads ll92l, respectively, and applied to their associated circuits. The signals picked up by readout head 21 are applied to amplification and ramp-generating circuit 28 which is capable of amplifying the signal picked up by head 21 and generating a sawtooth waveform such as 23, shown in FIG. lla, for application to the vertical deflection plate pair 13.

The signals picked up by readout head 20 are applied to a similar type amplifier and ramp generator circuit 29 for amplification and generation of ramp signals to be applied to the horizontal deflection plate pair 12. These signals are satisfactory for deflecting the electron beam (not shown) to sweep the face Ila of the cathode-ray tube. The electron beam is modulated (in some cases by variation in the degree of beam intensity and in other cases by either being completely ON or OFF) by means of the signals picked up by head 19 which are applied to amplification and control circuit 30. In the application where it is desired to simply cut off the electron beam or allow the electron beam to strike the face of the cathode-ray tube at a constant beam strength, the circuit 30, upon the application of pulse 26', shown by waveform 26, is caused to unblank the electron beam. The application of the next pulse 26" shown by waveform 26 and applied to circuit 30 terminates the unblanking of the electron beam. The control signals are applied to a suitable control grid schematically shown by numeral 15 in FIG. 1. The arrangement shown in FIG. 1 may be employed for cathode-ray tube display systems for the display of numerals, characters and other symbols as is set forth in detail in copending application Ser. No. 718,553, filed Apr. 3i, I968. One of the major purposes of the character display system described in this application is to generate a display which provides good contrast to assure ease of readability, to be highly reliable and to be quite inexpensive relative to conventional techniques. The highly simplified memory-storage system shown in FIG. 1 may be of the type described in detail in copending application Ser. No. 731,421 filed May 23, 1968. In the memory drum described in copending application Ser. No. 731,421 the head assembly is provided with a minimum of three readout heads to enable readout of the synchronizing signals for deflection of the electron beam and for the unblanking synchronizing signals for the purpose of generating the unblanking signals which modulate the intensity of the electron beam. One of the significant advantages of the present invention is to provide a system having the capability of performing all of the functions performed by the system of FIG. 1 while at the same time eliminating the need for one of the three storage locations in the memory and thereby further eliminating the need for one of the readout heads.

FIG. 2 shows one preferred embodiment 35 for simplifying the storage and control circuitry, while FIG. 2a shows a plurality of waveforms useful in describing the operation of the arrangement in FIG. 2. The preferred embodiment 35 of FIG. 2 is comprised of a rotating memory drum 16 having a track which is substantially identical to the storage location 16a of FIG. I which produces signals in head 19 for the ultimate generation of unblanking signals applied to the control grid of the cathode-ray tube by means of circuit 39. The magnetic pattern is arranged in such a way as to generate pulses of the type shown by waveform 26 in FIG. Ia and previously described. As an alternative arrangement, it should be noted that the magnetic pattern may be replaced by a contrasting pattern of light and dark areas (i.e. areas having contrasting reflecting capabilities) for pick up by a light-sensitive device.

The second track 16b provided on the surface of rotating memory drum 16 is provided with a magnetic pattern capable of generating signals in readout head 20 of the type shown by waveform 31 of FIG. 2a. The starting" pulses 32 of waveform 31 can clearly be seen to be of greater amplitude than the remaining pulses in the waveform 31. The

waveforms

23 and 25 are substantially identical to waveforms signal and 25 of FIG. la and represent the ramp signals generated for operating the Y" and "X" deflection plates of the cathode-ray tube in the same manner as was previously described. It can be seen that all pulses (i.e. pulses 32 as well as pulses 33) are capable of terminating a previously initiated ramp signal simultaneous and initiating a new ramp signal as shown by waveform 25. However, the signals 33 are only capable of triggering the X deflection ramp signals, as will become obvious from a consideration of the embodiment of FIG. 2.

FIG. 2 is further comprised of a pair of

threshold amplifiers

36 and 37 which are set at different threshold levels for the purpose of generating signals at their outputs when the threshold levels at which they are set are achieved by pulses applied at their input terminals. Threshold amplifier circuit 36 is set to detect the presence of signals of greater amplitude than threshold amplifier circuit 37. The output of readout head assembly 20 is simultaneously applied to the inputs of

circuits

36 and 37 whose outputs, in turn, are coupled to the Y" ramp generator and X

ramp generator circuits

28 and 29, respectively. The outputs of these circuits are directly applied to the deflection plates of a CRT in the same manner as is shown in FIG. I.

The threshold levels of

circuits

36 and 37 are represented by the phantom lines 36a and 370 shown in conjunction with waveform 31 of FIG. 2a. Although the signals 33 of waveform 31 are simultaneously impressed upon the inputs of

circuits

36 and 37, these signals surpass the threshold level set in circuit 37 but fail to reach the threshold level of circuit 36. This means that only threshold amplifier circuit 37 will apply a pulse to X" ramp generator 29 while circuit 36 will develop no output. Each time a pulse is applied to X" ramp generator 29 a previously generated ramp signal will be terminated and a new ramp signal will be initiated, as shown by waveform 25 Each time a signal 32 is simultaneously applied to

circuits

36 and 37, the signal will surpass the threshold level set by both of the circuits causing both circuits to simultaneously develop a pulse at its output to trigger the termination of a ramp signal and the initiation of a new ramp signal by both the Y" ramp generator 28 and the X ramp generator 29, respectively.

It can thus be seen that the arrangement of FIG. 2 is capable of generating the necessary control signals for both deflecting and modulating the intensity of the electron beam while eliminating the need for one storage location of the memory and likewise eliminating the need for a readout head assembly which would otherwise be provided for that storage location. The location of each of the pulses 32 is dependent only upon the number of lines which the electron beam is to scan. For example, if a complete scan is to consist of 20 horizontal lines, then every 20th pulse of waveform 31 should be a pulse of the type shown by the numerals 32. Obviously, the pulses of the type shown by the numerals 32 may be spaced closer together or further apart, depending only upon the number of lines which the electron beam is to scan.

FIG. 3 shows still another preferred embodiment which may be employed for the purpose of generating "X and Y deflection signals.

The embodiment 40 of FIG. 3 is comprised of a rotating memory 16 substantially similar to that shown in FIGS. 1 and 2 which is driven by motor means 17 through shaft I8. The track 16a contains a magnetic pattern (or a contrasting light and dark pattern) representativeof the unblanking signals which are to be generated and which signals are of the type shown by waveform 26 of FIG. la. Track 16b contains magnetic patterns substantially identical to the track 16b of FIG. 1 and is capable of generating signals of the type shown by waveform 24 of FIG. la. These signals are simultaneously ap plied to the input of a counter 41 and to the input of a rampgenerating circuit 29 for producing ramp signals applied to the X deflection plates. The signals of the type shown by waveform 24 ofFIG. 1a cause counter 41 comprised of five interconnected bistable stages, to develop a cumulative count. In the example given in FIG. 3 wherein the counter is comprised of five stages, the counter would be capable of accumulating a total count of 32, at which time it would automatically reset. A decoding circuit 42 is coupled to selected output terminals of each of the stages of counter 41 for the purpose of generating an output signal after a predetermined .count has, been accumulated within the counter. This output pulse is applied to the ramp generator circuit 28 which, in turn, generates a ramp signal having the waveform 23 shown in FIG. la for the purpose of driving the Y" deflection plates in the same manner as was previously described.

In the case where it is desired to cause the electron beam to scan 20 horizontal lines on the face of the cathode-ray tube, the decoding circuit 42 is arranged in such a manner as to generate an output pulse applied to circuit 28 each time a total of 20 pulses of the type shown by waveform 24 of FIG. 1a.;is applied to the input terminal 41a of counter 41. One decoding circuit capable of performing this functionis shown in FIG. 3 and is comprised of three inverter circuits 43a-43c respectively coupled to the first, second and fourth stages of counter 41. The outputs of these inverters are directly coupled to selected inputs of a five-input AND gate 44. The output terminals of the remaining stages, i.e. the third and fifth stages of counter 41, are directly coupled to the remaining input terminals of AND gate 44. As soon as a count of 20 has been accumulated in counter 41, the stages will be in the binary stages, as shown in FIG. 3, namely lOlOO, which in binary form represents a count of 20. The third and fifth stages apply binary ONE levels to the associated inputs of AND gate 44. The binary ZERO states of the first, second and fourth stages are inverted to binary ONE by the inverter circuits 43a-43c causing all input terminals of AND gate 44 to be at binary ONE at a time when the counter stores a binary count representative of the application of 20 pulses of the type shown by waveform 24 of FIG. 1a. The output of AND gate 44' is simultaneously applied to the input of ramp generator circuit 28 and to the reset input terminal of each of the stages of counter 41 through conductor 45 automatically resetting the. counter in readiness for accumulating a new count of 20.

Since the rotating memory drum, upon being turned ON, may begin rotation at any one of the pulses in waveform 24 which is not in exact alignment with the starting point of the unblanking signals stored in tracks 16a, it becomes necessary to provide means in which the "Y" pulses generated will occur at the beginning of each trace of 20 horizontal lines on the face of the cathode-ray tube. This function is performed by providing AND gate 46 having a first input terminal coupled; to the output of readout head 20 and having a second input terminal coupled to the output of readout head 19. The effectiveness of this circuit will be understood from a consideration of FIG. 3a which shows the front face 11a of a cathode-ray. tube 11. Although it is possible to cause an electron beam to scan the entire surface area of the cathode-ray-tube front face; 110, in most applications it is preferable to confine the electron beam to trace the face of the tube only in the substantially rectangular-shaped region defined by the dotted line 47. Typical images which may be formed upon the face of the tube within the rectangular-shaped region 47 may be alphabetic or numeric characters or other symbols. FIG. 3a shows two possible characters, namely the letter A and the letter B which may be formed within the region 47 From a consideration of either of these two characters or of any other symbol which may be written on the face of the cathode-ray tube, it is quite possible to prohibit any portion of any letter or other symbol from.

being positioned in the upper left-hand corner 48 of therectangular display area 47 without in any way hampering the effectiveness, clarity of readability of such a letter. For example, it can be clearly seen that the characters A and B are easily readable and provide the requisite clarity while at the same time having no portion of either of these letters occupying a position which lies along the left-hand vertical edge of the;

rectangular area 47. For this reason, none of the signals included in waveform 26 will be coincident in time with any of.

the signals of waveform 24 or with any of the signals of waveform 22. It is, therefore, possible to provide a single pulse 26 (see waveform 26 of FIGS. la and 3) which occupies a lstarting position in track 16a and corresponds with point 48'.

The starting" position can best be understood from copending application Ser. No. 718,553 which describes a character display system. The track which is the equivalent of track 160 of the present application contains a magnetic pattern representative of signals for controlling the generation of unblanking signals which, in the example set forth in the abovementioned copending application, contains a magnetic pattern for unblanking signals capable of generating l6 different characters or other symbols. The actual starting" point may be arbitrarily set at the initiation of any character of the group of 16, which point must be coincident at least with the pulse employed to initiate any one of the ramp signals shown by waveform 23 for application to the Y" deflection plates. Each of the ramp signals, shown in waveform 23 can be seen to persist for a time duration which is equal to the time required to form one single trace across the face of the cathode-ray tube and which thereby begins and is terminated simultaneously with the initiation and termination, respectively, of the single trace (of a predetermined number of horizontal lines) upon the face of the cathode-ray tube. Since each of the unblanking signals are initiated after the initiation of any one of the ramp signals shown by waveform 25 and are terminated before the termination of any of the ramp signals shown by waveform 25, there will be no coincidence between any of the signals shown by waveform 26 and the signals shown by

waveforms

22 or 24. However, by deliberately inserting a single signal 26' at the starting" point of track 160, then the

signals

22 and 26 will occur in time synchronism. In the example given in FIG. 3, none of the signals 22 occurs. However, these signals would otherwise occur in synchronism with associated signals shown in waveform 24 at the vertical dotted lines t,, t and t of FIG. 1a. The signals 26' and 24 (see FIG. la) which now occur in time synchronism, are picked up by readout heads 19 and 20 and applied to associated inputs of AND gate 46. Once during each revolution of rotating memory 16, the signals 26' and 24' will occur in time synchronism causing gate 46 to develop an output which is impressed by conductor 45 upon all of the reset input terminals of each stage of counter 41. Diode 49 is coupled between the output of AND gate 46 and circuit 28 to prevent any application of this signal to circuit 28. Thus, each stage of counter 41 will be reset to binary ZERO, thereby automatically initiating a new count in the counter and exactly synchronizing the counter with the occurrence of the unblanking signals and synchronizing signals picked up by readout heads 19 and 20, respectively. Although it is possible, upon initial energization of the system of FIG. 3, to generate an incorrect count in counter 41, this incorrect count will be automatically corrected after a maximum time period equal to one complete revolution of the rotating memory 16 to place the entire system in synchronism. Since the rotating memory in one preferred embodiment rotates at a rate of 1,800 rpm, one revolution of the rotating memory will occur substantially within 33.3 msec. Thus, by delaying operation of the system for this extremely brief interval of time, which is sufficient to reset counter 41 into the desired synchronous operation, the system will operate thereafter without fault. Although the gate 46 will operate to reset counter 41 for each completed revolution of the rotating memory 16, this operation will be quite satisfactory since the counter should be resetting at this mo ment in any case. Thus, the resetting gate may further be said to operate to continuously maintain the synchronous relationship once per revolution of the rotating memory.

After the accumulation of 20 pulses of the type shown in waveform 24, a pulse is applied to circuit 28 for initiation of a new ramp signal for application to the Y" deflection plates. The pulses shown by waveform 24 are also free to operate circuit 29 to generate the requisite X deflection pulses. It can therefore be seen that the apparatus of FIG. 3 provides another alternative arrangement for suitable generation of X and Y" deflection signals and unblanking signals while eliminating the need for one track and one readout head normally associated therewith as is the case with conventional devices.

FIG. 4a shows still another alternative embodiment 50 which may be employed to generate the requisite signals mentioned hereinabove while eliminating the need for one track of the memory device and for further eliminating the need for the readout head normally associated therewith. The waveforms of FIG. 4d are useful in explaining the operation of the circuit 50 of FIG. 4a.

Referring initially to FIG. 4d, waveforms 23 and 25, which are substantially identical to those shown in FIG. 1a, represent the requisite ramp signals for application to the Y" and X" deflection plates of the cathode-ray tube as shown in FIG. 1, for example. Waveform 51, however, which is substantially similar to waveform 24 of FIG. 1a, differs from waveform 24 in the following manner:

Considering FIG. 1a, it can be seen that each pulse of waveform 24 acts to initiate a new ramp signal as indicated by waveform 25. However, in the waveform 51 of FIG. 4d, two closely spaced pulses 51a and 51b are provided at each time interval represented by the lines 52 which are further timecoincident with the initiation of each Y ramp signal. The signals of waveform 51 may be provided in the form of a magnetic pattern in track 16b of the rotating memory for pick up by its associated readout head 20 to generate the signal shown by waveform 51. As an obvious alternative, the magnetic drum approach may be replaced by a coded pattern of alternating light and dark surface areas, which areas are sensed by a suitable light-sensitive means which picks up light reflecting from the surface of the rotating memory as is well-known in such codes or discs. The double" pulses 51a and 51b may be represented in such a photoelectric-type code disc by providing a light area having double the width of any of the light areas representing the remaining pulses of waveform 51 thereby causing the photoelectric cell or any other light-sensitive means to generate a pulse of twice the length or time duration of a pulse representative of any of the remaining signals as shown by waveform 51.

The circuitry 50 of FIG. 4a is provided with an input terminal 53 coupled to the output of readout head 20 (or alternatively coupled to the output of a light-sensitive device). The pulses represented by waveform 51 are then applied to the base electrode of a transistor Q1 which is coupled in such a manner with transistor 02 as to provide current amplification of the signals applied to the base electrode of transistor Q1. The current-amplified pulses appear at the collector electrode terminal 54! of transistor 02 and are applied to the base electrode of transistor Q3 which operates to produce voltage amplification of the signals applied thereto. These amplified signals appear at the collector output terminal 55 of transistor 03 and are inverted in the manner shown by wavefonn 56 in addition to being amplified. The amplified inverted signals are, in turn, coupled to the base electrode of transistor Q4 through capacitor C5 and diode D1. Diode D blocks positive pulses from being applied to the base of Q Transistor Q4 operates to invert and amplify the first half of signal 56 so that it assumes a wave shape 56. This signal appears at the collector terminal 57 of transistor Q4 and is coupled through resistor R16 to the X output terminal 58 which is connected to the ramp-generating circuit for the X" deflection plates of the cathode-ray tube.

The signal 56' is further coupled to the base electrode of transistor Q5 through resistor R14 and diodes D2 and D3. The common terminal 59 between diodes D2 and D3 is coupled to ground bus 66 through the parallel connected circuit elements comprising capacitor C6 and resistor R15. Diode D2 is connected in such a manner that only the positive half-cycle signals 56' appear at terminal 59. These signals are integrated by capacitor C6. The emitter electrode of transistor Q5 is connected to a common terminal 61 between resistors R18 and R19 whose opposite terminals are connected between the positive DC bus 62 and ground bus 60. Thus, emitter terminal 61 is permanently biased at a predetermined positive level at a value sufficient to render transistor Q5 initially conducting. The current flowing in the branch circuit extending from positive DC bus 62, resistor R18, transistor 05 and resistors R20 and R21 to ground bus 60 thereby develops a voltage across resistor R21 of a magnitude and polarity to also render transistor 06 initially conductive.

Each single pulse 56 applied to diode D2 and integrated by capacitor C6 is passed by diode D3 to the base electrode of transistor 05. The positive voltage stored across capacitor C6, while sufficient to cause conduction of diode D3, is of insufficient value to render transistor Q5 nonconductive, it being less than the bias voltage applied to the emitter electrode of transistor Q5. The conduction of diode D3 enables the capacitor C6 to be discharged through resistor R17 to ground bus 60, in addition to the discharge path through resistor R15 to ground. The values of components R15, C6 and R17 are selected to cause discharge of capacitor C6 before receipt of the next pulse of the type 56 applied to terminal 59. This operation is repeated each time a single pulse of the type 56' is applied to the input terminal 53.

The double pulses 51a and 51b, however, which occur at each time interval designated by the vertical dotted lines 52 shown in FIG. 4d are generated within a very brief time interval which is significantly shorter than the time interval between the remaining pulses 51c of waveform 51. This enables capacitor C6 to charge sufficiently to develop a voltage which is greater than the magnitude of the voltage developed across capacitor C6 in the presence of a single pulse. This voltage is passed through diode D3 to the base electrode of transistor 05 and due to the significantly increased positive amplitude developed across capacitor C transistor is driven into cutoff. The base electrode of O is connected to the collector electrode of transistor 0 causing the voltage level developed across R to render transistor 0 nonconductive. A resulting positive going output signal is thus produced at the collector electrode terminal 63 which is passed to the Y output terminal 64 through resistor R23.

Recapitulating the operation described hereinabove, each X" pulse which is of the type shown by the pulses in waveform 24 of FIG. la, is suitably amplified and appears at output terminal 58 for triggering the operation of an X ramp generator, one preferred embodiment of which will be more fully described hereinbelow. These amplified signals are further impressed upon an integrating circuit and a discriminator capable of detecting the presence of a double pulse" for generating a signal at terminal 64 to trigger a "Y" ramp generator. The discharge rate of the integrating circuit is of sufficient magnitude to allow the charge from any single pulse to be bled through resistor R17 (and R) before the application of the next single pulse to capacitor C6.

The additional circuitry of FIG. 4a may be utilized in character display systems of the type described in copending application Ser. No. 718,553, referred to hereinabove. In that application there is described a character display system in which the generation of each pulse causing the triggering of a Y" ramp circuit also operates as a marker" which indicates the beginning of each character or symbol stored in the 2" track of the drum. In the example given in the above-mentioned copending application, l6 characters are stored in one track of memory while the Y" triggering pulses are located in another track in memory in a predetermined physical relationship to the Z" track such that each synchronizing pulse in the Y track locates one of the I6 characters. The character display system of the above-mentioned copending application takes advantage of this fact by applying the triggering pulses for the Y ramp generator to a counter whose count at any given moment is compared against a binary coded number provided in an input facility which, when comparison exists between the binary number in the input facility and the binary count developed in the counter, allows passage of the unblanking signals to a preselected cathode-ray tube in order to display the selected character which is identified by the binary number set into the input facility.

Applying the above-mentioned arrangement to the present invention, the trailing edge of the triggering pulses developed at the collector electrode 63 of transistor 06 are passed through conductor 65 and diode D4 to the input terminal 66a of a counter 66 comprised of the four bistable stages 67-70 which are interconnected in a conventional manner to cause the counter 66 to accumulate a count therein, which count is increased by one each time an output signal appears at the collector electrode terminal 63 of transistor 06.

Each of the stages 67-70 are coupled through resistors R28-R3l, respectively, to the base electrodes of transistors 09-012, respectively, which are connected in emitter follower fashion, each having an emitter resistor R32-R35, respectively. The binary states of each of the stages 67-70 are thus available at the output terminals (is. the emitter electrode terminals) 71-74 of transistors 09-012, respectively. These output terminals may be coupled to logical circuitry (not shown) which is described in detail in the above-mentioned copending application Ser. No. 718,553, which logical circuitry permits passage of the unblanking signals to a selected cathode-ray tube when exact comparison between the binary coded signals appearing at terminals 71-74 and the binary input signals at the input facility (not shown) occurs.

During each revolution of the rotating memory 16, pulses appearing at terminal 63 are applied to input terminal66a of counter 66. In order to provide for reliable reset of the counter 66, a reset circuit 75 is provided. This circuit is comprised of transistor 07 whose base electrode is coupled through resistor R24 and terminal 78 to terminal 108 of the Y ramp generator shown in FIG. 4c, which circuit will be more fully described. The emitter electrode of transistor 07 is coupled to the ground bus 60, while the collector electrode of transistor O7 is coupled through resistor R25 and terminal 79 to terminal 95 of the Z" amplifier and shaper circuit shown in FIG. 42, which circuit will be more fully described. The collector electrode terminal 76 of transistor 07 is coupled to the base electrode of transistor 08 whose emitter electrode is coupled to ground bus 60 and whose collector electrode is coupled through conductor 77 to each reset input terminal 67a- 70a of each of the stages 67-70, respectively, of counter-66.

The Y ramp generator of FIG. 40 and the "Z amplifier and shaper circuit of FIG. 4e operate in a manner to be more fully described so as to apply positive signals relative to ground to the terminals 78 and 79, respectively. These positive signals are applied through resistors R24 and R25 to the base and collector electrodes, respectively, of transistor Q7 which has its collector electrode terminal 76 coupled to the base electrode of transistor Q8. Transistor Q8 has its emitter electrode coupled to the ground bus 60 and its collector electrode coupled to +22 v. DC through resistor R27. In its quiescent state the collector electrode terminal is at a positive level lying between ground and +22 v. DC due to the voltage divider arrangement of resistors R27 and R26. The level is approximately +7 v. when transistor O8 is nonconductive. Counter 66 is designed so that each of its stages 67-70 willbe reset to binary ZERO state when a negative-going pulse is applied to each of their reset input terminals 6712-7011. In normal or quiescent state the level at terminals 79 and 78 are such that transistor 67 conducts causing the collector terminal 76 to be at ground potential. This potential maintains transistor 08 nonconductive establishing a voltage of approximately 7 v. at its collector electrode terminal 80.

The incoming (inverted) "Y pulse and the Z" in pulse are negative and positive, respectively, and occur in time synchronism only once during each revolution of the drum. At this time, the negative pulse applied to the base electrode of transistor Q7 turns OFF transistor O7 in spite of the positive voltage applied to terminal 79. This causes terminal 76 (when transistor 07 is nonconductive) to go positive and thereby turn ON transistor Q8. This causes its collector electrode terminal 80 to go from approximately +7 V. to approximately ground potential, thereby establishing a negative-going voltage in conductor 77 which is applied to each of the reset input terminals 67a- 70a of counter stages 67-70, respectively, to reset all stages to binary ZERO. Thus, the counter will be reset to count the number ofY pulses occurring per revolution of the drum and be reset automatically at an arbitrary starting point.

FIG. 42 shows a Z" amplifier and shaper circuit 90 which amplifies and shapes the pulses generated in the readout head associated with the track 16a of the rotating memory (see FIG. 1, for example). The readout head 19 has its output coupled to the input terminal 91 of circuit 90. This signal is applied through capacitor C7 to the base electrode of transistor Q17. Transistor Q17, together with transistors Q18 and Q19 form a three-stage amplifier circuit provided with feedback paths for stabilization thereof. The amplified output signal appears at the collector terminal 92 of transistor Q19 and is applied through capacitor C11 and the parallel connected circuit elements R49 and C12 to the base electrode of transistor Q20. Transistors Q20 and Q21 are connected to form a Schmitt trigger circuit. The output of the Schmitt trigger circuit is taken from the common terminal 93 between resistors R52 and R53 which are series-connected between the +22 v. DC bus 94 and the collector electrode of transistor Q2 l. Terminal 93 is coupled to the base electrode of transistor Q22 which Is coupled to operate as a pulse amplifier. The output of the circuit appears at terminal 95. The level of the output voltage at terminal 95 is normally at ground. potential except In the presence of a Z (i.e. an unblanltirig pulse). In order that terminal 95 be at ground potential, transistor 022 is maintained nonconductive by the Schmitt trigger circuit. In the presence of a pulse, the Schmitt trigger circuit comprised of transistors Q20 and Q21, turns ON transistor Q22 driving the output terminal 95 to nearly +22 v. DC. Reset of the Schmitt trigger circuit is determined by the common emitter resistor R51 which controls the circuit hysteresis for causing reset of the circuit at a voltage level substantially lower than the setting of the circuit. Diode D7 is provided to cause more rapid triggering operation of the Schmitt circuit. Thus, each positive-going unblanking pulse such as the pulse 26' shown in waveform 26 of FIG. 1a, causes the generation of a pulse at output terminal 95, while its associated negative-going pulse 26" terminates the square pulse such as, for example, square pulse 27' produced at output terminal 95. The pulse duration of the pulses of waveform 27 is dependent upon the time interval between the positive and negative pulses of waveform 26. FIG. 4b shows a ramp-generating circuit which may be employed for the purpose of generating a ramp applied to the X" deflection plates of a cathode-ray tube. The circuit 100 of FIG. 4b is comprised of transistor 013 which is connected to operate as a constant current generator for charging capacitor C13 which has one of its terminals coupled to +22 v. DC through conductor 101 while its remaining terminal is coupled in common to the collector electrode of transistor Q and to output terminal 102. Transistor 014 is also connected between conductor 101 and terminal 102 in parallel with capacitor C13. The output terminal 58 is coupled to the input terminal 103 of circuit 100 for driving transistor Q13. Transistor 013 is normally maintained nonconductive in the absence of an output pulse from terminal 58 maintaining terminal 104 in its collector circuit near +22 v. DC, which level is applied to the base electrode of transistor Q14 to maintain this transistor nonconductive. As soon as a trigger pulse is removed from input 103 capacitor C13 begins to charge, developing a voltage across its electrodes with the charging rate controlled by constant current generator transistor 015. The current supplied by transistor Q15 is controlled by transistor Q16 which is normally maintained in the conductive state. The voltage drop developed across resistor R35 by transistor O16 establishes the bias level at the base electrode of transistor Q15 which is connected to resistor R35 at ter minal 105.

The primary function performed by the ramp generator circuit in FIG. 4b is to cause the ramp signal to experience a voltage swing bctween its start and end points at fixed upper and lower voltage levels regardless of the deviation in pulse rate 01 the synchronizing pulses applied to the circuit input terminal 103. Such changes in the pulse rate may, for example, be due to changes in the rotating speed of the rotatable memory. In conventional ramp generators, changes in the pulse rate will cause the ramp signal to swing between a greater or lesser voltage range. The advantageous feature of the circuit of FIG. 4b is such as to cause the initial and final points of the ramp to be absolutely fixed between upper and lower voltage levels in spite of the fact that there may be as much as a i20 percent deviation pulse rate and hence the rotating speed of triggering pulses applied to terminal 103. This unique operation is obtained through the use of capacitor C14 whose terminals are coupled between -22 v. DC bus 106 and terminal 107 which, in turn, is coupled to output terminal 102 and hence one terminal of capacitor C13 through diode D4.

The operation of the circuit of FIG. 4b is as follows:

Let it be assumed that the control circuitry is energized and a synchronizing pulse is applied to input terminal 103. This renders transistor Q13 conductive which causes a voltage drop to be developed across resistors R31 and R32. The voltage drop developed across resistor R32 places the base electrode of transistor 0141 at a voltage substantially less than +22 v. DC, causing conduction of transistor 014. This causes instantaneous discharge of capacitor C13, driving output terminal 102 to +22 v, DC. At 1,, (see FIG. 45]) the synchronizing pulse of waveform is removed from input terminal 103 and the constant current generator comprised of transistor Q15 begins charging capacitor C13 so that its output terminal 102 is driven negative at a constant and substantially linear rate. The charging rate is extremely fast due to the high positive voltage at terminal 107 (relative to bus 106). Terminal 102 will therefore reach the negative voltage level at I, (see waveform 111), well before the arrival of the next trigger pulse occurring at 1 Terminal 102 thus (momentarily) goes more negative than terminal 107 causing C14 to discharge somewhat through Q15 making the voltage at 107 more negative reducing the current through Q16 and the voltage drop across R35. This reduced voltage drop reduces the Q15 current. At 1 the trigger pulse discharges C13 which charges at a rate now determined by the present Q15 current. C14 charges less rapidly reaching the negative level at t; just before the next trigger pulse at time I The ramp signal ultimately settles at a constant slope after just a few trigger pulses, and ramp generation continues at this rate, locked between the fixed upper and lower voltage levels until another shift in trigger pulse repetition rate occurs. It has been found that the ramp generator is capable of accommodating frequency shift of greater than i2.5 times a center frequency value which the circuit would normally be designed for and still accurately generate ramp signals which swing between the fixed upper and lower voltage levels.

Consider the case where the ramp generator has settled down to a predetermined repetition rate (determined by the rotational speed of memory 16) and swings between the fixed voltage levels. Let it be assumed that the memory-rotating speed decreases. The charging rate determined by the original memory-rotating speed causes C13 to reach the fixed level before the advent of the next trigger pulse. The voltage at 102 goes more negative than the voltage at 107 causing C14 to discharge. The Q16 current is thereby reduced reducing the voltage drop across R35 which causes the Q15 current to be reduced. In a few short cycles the ramp signal settles in at the new repetition rate.

Consider the case where the memory-rotating speed increases. The constant current of Q15 is insufficient to cause C13 to fully charge causing terminal 102 to reach a voltage level above the fixed lower level. C14 thereby charges, slightly increasing the Q16 current, increasing the R35 voltage drop and increasing the Q15 current to thereby increase the charging rate ofCl3. The change occurs in a few cycles and assures exact centering of the images to be displayed upon the face of the CRT without the need for a highly accurate and expensive constant-speed drive means for the memory 16 (such as a synchronous motor). Actually a simple AC or DC motor of only reasonably constant speed need be employed.

This operation may be used to great advantage in character display systems of the type described in the above-mentioned copending application Ser. No. 718,553 wherein the circuit 100 of FIG. 4b will guarantee absolute centering of the character displayed upon the face of the cathode-ray tube in spite of the fact that changes in the rotating speed of the drum may occur. The advantageous feature of the circuit 100 is used to great advantage thereby greatly reducing the cost of the memory apparatus, since deviations in the rotating speed of nonsynchronous motors will be more than compensated for by the operation of the ramp generator circuit 100.

FIG. 4c shows a ramp generator circuit substantially similar to FIG. 417 for generating the ramp signals applied to the Y" or vertical deflection plates of a cathode-ray tube. The circuit of FIG. 40 has been shown substantially in block diagram form since it is substantially identical to that shown in FIG. 4b except that the values of capacitors C13 and C14 are modified to generate one ramp signal in the time that it takes to generate a plurality of ramp signals employed for driving the X" or horizontal deflection plates of a cathode-ray tube. For example, see FIG. 1 wherein a single ramp signal shown by waveform 23 is generated for a plurality of ramp signals shown by waveform 25. The circuitry 100 of FIG. 40 is further provided with an output terminal 108 coupled to the collector of transistor Q13 which output terminal 108 is coupled to terminal 78 of FIG. 4a.

The output terminal 95 of FIG. 4e is coupled to terminal 79 of FIG. 4a. As was previously described, output terminal 95 goes positive in the presence of a Z" pulse applying positive voltage to terminal 79. The positive going voltage applied to terminal 79 occurs in coincidence with a negative-going pulse applied to terminal 78 only once per revolution of the drum. The negative-going pulse or inverted Y" signal applied to terminal 78 is inverted by virtue of the operation of transistor 013 of FIG. 4c which, when a pulse is applied to its input terminal 103 inverts the pulse at its collector electrode to develop the inverted "Y signal at its output terminal 108. The simultaneous occurrence of an inverted Y" pulse at terminal 78 and a positive pulse at terminal 79 causes conduction of transistor 08 of FIG. 4a for the purpose of resetting all stages of counter 66 to the binary ZERO state once er revolution of the drum 16.

FIG. shows a portion of yet another embodiment of the invention useful in an arrangement similar to that described with respect to FIG. 4a. For the sake of simplicity, only that portion of the embodiment of FIG. 5 which differs from that of FIG. 4a is illustrated. Thus, input terminal 150 of FIG. 5 will be understood to be connected to the collector electrode of transistor 04 of that drawing, while output terminal 151 will be understood to be connected to the base electrode of transistor Q6. The signal applied to input terminal 150 is generally of the type shown in waveform 153 of FIG. 5a.

In FIG. 5, transistors Q23 and 024 form part of a gating or monostable multivibrator circuit 152, which together with diodes D and D21, condition the output transistor Q25 to respond only to the presence of the Y" double pulse at terminal 150. In the discussion that follows, it will be assumed that the transient condition of multivibrator 152 exists for a period greater than the time between the leading edge of the first of the double pulses and the trailing edge of the second of those pulses. It will also be assumed that the transient period is significantly less than the time between successive X" pulses and that transistor Q24 of multivibrator 152 is initially in its steady state or conductive condition.

In operation, resistor R59 couples the positive portion of the first single pulse 160, applied to input terminal 150, to the impedance presented by conductive transistor Q24. At that time, however, that signal is bypassed through diode D20 directly to the ground bus 60 (through Q24). Diode D22 then couples the negative portion of pulse 160 to the base electrode of transistor Q24, switching that transistor from its conductive to its nonconductive condition. However, before any second single pulse 161 is applied to input terminal 150, multivibrator 152 reverts to its normal steady-state condition, rendering transistor Q24 conductive once again to thereby reestablish the short circuit or shunt path from the common terminal between D20 and D21 to ground potential.

The illustrated circuit responds to the pulse 161 in the same way as with pulse 160. Since the sequence is repetitive, no signal will be coupled through diode D2] to output transistor Q25 in response to these single pulse X" signals.

In response to the first of the Y double pulse signals 170' applied to terminal 150, the operation is basically the same. Thus, the positive portion is coupled by way of resistor R59, diode D20 and transistor 024 to the ground bus 60, while the negative portion is coupled via diode D22 to transistor 024 to render transistor Q24 nonconductive.

However, by virtue of the relative time periods previously assumed, the second of the Y double pulses 171 is coupled to input terminal while transistor 024 is still in its nonconductive condition. Because of the relatively high impedance presented by transistor 024 at that time, .the positive portion of the signal 171 coupled by resistor R59 to the junction of diodes D20 and D21 is gated through diode D21 to the-base electrode of transistor 025, wherein it is effective to produce a negative-going pulse signal at output terminal 151 coupled to the collector electrode of that transistor. Upon completion of its transient period, multivibrator 152 reverts to its steadystate condition, in readiness for the next recurring X" single pulse.

It will be noted in these respects that the polarity of diode D22 is such as to prevent the positive portion of pulse 171 from coupling through to the base electrode of transistor 024 to switch that transistor from its then nonconductive state to its conductive state. It will also be noted that the negative portion of pulse 171, when coupled to the base electrode of transistor 024, is ineffective to turn off that already nonconducting transistor.

The resulting signal developed at output terminal 151 is then operated upon by the remainder of the FIG. 4a circuit' in the manner therein described. It will be apparent, therefore, that a Y" output pulse is developed as in that circuit, only upon the occurrence of the Y double-pulse synchronizing signal.

It can be seen from the foregoing that the present invention provides circuitry capable of controlling the deflection and modulation of electron beams and cathode-ray tubes through: the use of a single memory means wherein the memory locations provided in memory may be reduced while at the same time all of the functions necessary for controlling modulation and deflection of the electron beam are performed, resulting in a simplified control apparatus having fewer components. In addition thereto, novel ramp-generating circuits are provided to generate ramp signals having their upper and lower limits absolutely fixed between two voltage values regardless of rather substantial changes in the operating speed of the memory to assure accurate and reliable centering of the image displayed upon the face of the cathode-ray tube.

Although there has been described a preferred embodiment of this novel invention, many variations'and modifications will now be apparent to those skilled in the art. Therefore, this invention is to be limited, not by the specific disclosure herein, but only by the appending claims.

What I claim is:

1. Apparatus for controlling the deflection of a cathode-raytube electron beam and for controlling the modulation of the electron beam comprising:

a cathode-ray tube having horizontal and vertical deflection means and a control electrode for modulating the intensity of the electron beam;

horizontal and vertical ramp-generating means for generating ramp signals each of a different constant slope, which ramp signals are respectively applied to said horizontal and vertical deflection means;

a rotating memory having a first track;

first readout means associated with said first track for sensing information in said track;

the information in said first track comprising indicia which form a pattern representing signals for triggering the operation of said horizontal and vertical ramp-generating means;

a first type of indicia being arranged at first equally spaced intervals around said first track;

a second type of indicia being arranged at second equally spaced intervals between adjacent indicia of said first type, the length of each of said second intervals being an integral multiple of said first intervals;

said first readout means being adapted to generate signals of a first and a second type as said first and second types of indicia respectively pass said readout means;

said first type of signal being a single-pulse signal;

said second type of signal being a double-pulse signal, each pulse of the double-pulse signal being substantially identical to said first type of signal;

said double-pulse signal occurring with substantially no time delay separating its two pulse signals as compared with the time delay between adjacent single-pulse signals of the first signal type;

first circuit means for coupling the signals generated by said first readout means to said horizontal ramp-generating means for terminating a previously generated ramp signal and initiating a new ramp signal;

second circuit means coupled to said first circuit means for applying a trigger signal to said vertical ramp-generating means for terminating a previously generated ramp signal and initiating a new ramp signal when a second type of signal generated by said first readout means is applied to said first circuit means.

2. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and second ramp signals, each of a different constant slope, to deflect the electron beam in said mutually perpendicular direction;

third means for applying first and second synchronizing signals to said first and second ramp'generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining rampgenerating means;

said third means further comprised of memory readout means;

rotating memory means comprising a rotating member having a single track for storing information representing both said first and said second synchronizing signals;

said track including predetermined indicia arranged at spaced intervals about said track;

said memory means including means for generating one of said first synchronizing signals each time one of said indicia moves past said memory readout means;

means for counting said first synchronizing signal;

means for generating one of said second synchronizing signals each time said counter accumulates a predetermined count,

3. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising:

first and second ramp-generating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions;

third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining rampgenerating means;

said third means being further comprised of memory readout means;

every Nth indicia being ofa configuration different from all remaining indicia where N is an integer greater than I and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions;

said readout means respectively generating a first type of signal when one of said Nth indicia passes said readout means and generates a second type of signal when one of the remaining indicia passes said readout means;

said first and second signal types differing in amplitude;

first threshold circuit means having a low threshold level sufi'lcient for detecting the presence of both said first and second types of signals for producing said first synchronizing signals;

second threshold circuit means having a higher threshold level insufficient for detecting the presence of said first type of signal and sufficient for detecting the presence of said second type of signal for generating said second synchronizing signals.

4. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising:

said third means being further comprised of memory readout means;

rotating memory means comprising a rotating member having a single track for storing information representing both said first and second synchronizing signals;

every Nth indicia being of a configuration different from all remaining indicia wherein N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions;

said readout means respectively generating a first type of signal when one of said Nth indicia passes said readout means and generating a second type of signal when one of the remaining indicia passes said readout means;

said first and second signal types differing in pulse duration;

amplifier means coupled to said readout means for amplifying the first and second types of signals;

one of said ramp-generating means being coupled to said amplifying means for successively generating ramp signals upon receipt of each signal from said amplifying means;

llulunr integrating means coupled to said amplifying means for integrating each signal applied thereto; said integrating means including means for discharging each integrated signal prior to receipt of the next signal from said amplifying means;

threshold circuit means coupled to said integrating means having a threshold level insufficient for detecting the presence of an integrated signal representing the shorter duration signals and sufficient for detecting the presence of an integrated signal of the longer duration to generate a triggering pulse for operating the remaining one of said ramp-generating means to initiate a ramp signal each time the threshold circuit detects an integrated signal which represents a signal of longer time duration 5. Apparatus for controlling the deflection of a cathode-ray tube electron beam and for controlling the modulation of the electron beam comprising:

horizontal and vertical ramp-generating means for generating ramp signals each being of a different constant slope which are respectively applied to said horizontal and vertical deflection means;

rotating memory means having a single output for generating a continuous train of pulses spaced at substantially equal intervals, every Nth pulse in said pulse train being of a greater duration than the remaining pulses in said pulse train;

first circuit means for coupling the signals appearing at said single output to said horizontal ramp-generating means for triggering the termination of a previously generated horizontal ramp signal and initiating a new horizontal ramp signal;

second circuit means coupled to said first circuit means for applying a trigger signal to said vertical ramp-generating means for triggering the termination of a previously generated vertical ramp signal and initiating a new vertical ramp signal only when a pulse of a greater duration is detected;

means for counting the number of Nth pulses of said greater duration occurring per revolution of the rotating memory;

said memory having a second output for generating unblanking signals for controlling the modulation of electron beam intensity;

only one of said unblanking signals being arranged to occur in time synchronism with only one of said pulses of greater duration;

means responsive to the simultaneous occurrence of said one of said pulses of greater duration and said one of said unblanking signals for resetting said counting means.

6. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising:

first and second rampgenerating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions;

said third means being further comprised of memory readout means;

every Nth indicia being of a configuration different from all remaining indicia where N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions;

said readout means respectively generating a first type of pulse signal when one of said Nth indicia passes said readout means and a second type of pulse signal when one of the remaining indicia passes said readout means,

said first and second signal types differing in the number of individual pulses in each of said types, and further comprising:

threshold circuit means for detecting the presence of both said first and second types of pulse signals for producing said first synchronizing signals and applying these signals to said first ramp-generating means; and

gating circuit means coupled to said threshold circuit means and adapted to receive both said first and second types of pulse signals but responsive only to said first type for producing said second synchronizing signals and applying these signals to said second rampgenerating means.

7. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising:

said third means being further comprised of memory readout means;

rotating memory means comprising a'rotating member having a single track for storing information representing both said first and second synchronizing signals;

said track including predetermined indicia arranged. at

spaced intervals about said track;

said first and second types differing in the number of individual pulses in each of said types, and further comprisamplifier means coupled to said readout means for amplifying the first and second types of signals;

and gating circuit means coupled to said amplifying means for controlling the application of pulse signals, to the remaining one of said ramp-generating means, said gating circuit means including a monostable mul tivibrator having a transient duration greater than the time between the first leading edge and last trailing edge of the number of individual pulses of said first signal type but of a transient duration less than the time between leading edges of successive pulses of said signal type to thereafter couple a second pulse of said second type; first signal type to said remaining ramp-generator said monostable multivibrator being in its steady-state means to terminate a previously generated ramp signal condition upon application of successive pulses of said and initiate a new p Signal each time Said second signal type to bypass said remaining ramptivibrator couples a pulse to said remaining rampgenerating means, and being triggered to its transient generator meanscondition by a trailing edge of a first pulse of said first

Claims

1. Apparatus for controlling the deflection of a cathode-raytube electron beam and for controlling the modulation of the electron beam comprising: a cathode-ray tube having horizontal and vertical deflection means and a control electrode for modulating the intensity of the electron beam; horizontal and vertical ramp-generating means for generating ramp signals each of a different constant slope, which ramp signals are respectively applied to said horizontal and vertical deflection means; a rotating memory having a first track; first readout means associated with said first track for sensing information in said track; the information in said first track comprising indicia which form a pattern representing signals for triggering the operation of said horizontal and vertical ramp-generating means; a first type of indicia being arranged at first equally spaced intervals around said firsT track; a second type of indicia being arranged at second equally spaced intervals between adjacent indicia of said first type, the length of each of said second intervals being an integral multiple of said first intervals; said first readout means being adapted to generate signals of a first and a second type as said first and second types of indicia respectively pass said readout means; said first type of signal being a single-pulse signal; said second type of signal being a double-pulse signal, each pulse of the double-pulse signal being substantially identical to said first type of signal; said double-pulse signal occurring with substantially no time delay separating its two pulse signals as compared with the time delay between adjacent single-pulse signals of the first signal type; first circuit means for coupling the signals generated by said first readout means to said horizontal ramp-generating means for terminating a previously generated ramp signal and initiating a new ramp signal; second circuit means coupled to said first circuit means for applying a trigger signal to said vertical ramp-generating means for terminating a previously generated ramp signal and initiating a new ramp signal when a second type of signal generated by said first readout means is applied to said first circuit means.

2. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising: first and second ramp-generating means for generating first and second ramp signals, each of a different constant slope, to deflect the electron beam in said mutually perpendicular direction; third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining ramp-generating means; said third means further comprised of memory readout means; rotating memory means comprising a rotating member having a single track for storing information representing both said first and said second synchronizing signals; said track including predetermined indicia arranged at spaced intervals about said track; said memory means including means for generating one of said first synchronizing signals each time one of said indicia moves past said memory readout means; means for counting said first synchronizing signal; means for generating one of said second synchronizing signals each time said counter accumulates a predetermined count.

3. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising: first and second ramp-generating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions; third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining ramp-generating means; said third means being further comprised of memory readout means; rotating memory means comprising a rotating member having a single track for storing information representing both said first and said second synchronizing signAls; said track including predetermined indicia arranged at spaced intervals about said track; every Nth indicia being of a configuration different from all remaining indicia where N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions; said readout means respectively generating a first type of signal when one of said Nth indicia passes said readout means and generates a second type of signal when one of the remaining indicia passes said readout means; said first and second signal types differing in amplitude; first threshold circuit means having a low threshold level sufficient for detecting the presence of both said first and second types of signals for producing said first synchronizing signals; second threshold circuit means having a higher threshold level insufficient for detecting the presence of said first type of signal and sufficient for detecting the presence of said second type of signal for generating said second synchronizing signals.

4. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising: first and second ramp-generating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions; third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining ramp-generating means; said third means being further comprised of memory readout means; rotating memory means comprising a rotating member having a single track for storing information representing both said first and second synchronizing signals; said track including predetermined indicia arranged at spaced intervals about said track; every Nth indicia being of a configuration different from all remaining indicia wherein N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions; said readout means respectively generating a first type of signal when one of said Nth indicia passes said readout means and generating a second type of signal when one of the remaining indicia passes said readout means; said first and second signal types differing in pulse duration; amplifier means coupled to said readout means for amplifying the first and second types of signals; one of said ramp-generating means being coupled to said amplifying means for successively generating ramp signals upon receipt of each signal from said amplifying means; integrating means coupled to said amplifying means for integrating each signal applied thereto; said integrating means including means for discharging each integrated signal prior to receipt of the next signal from said amplifying means; threshold circuit means coupled to said integrating means having a threshold level insufficient for detecting the presence of an integrated signal representing the shorter duration signals and sufficient for detecting the presence of an integrated signal of the longer duration to generate a triggering pulse for operating the remaining one of said ramp-generating means to initiate a ramp signal each time the threshold circuit detects an integrated signal which represents a signal of longer time duration.

5. Apparatus for controlling the deflection of a cathode-ray tube electron beam and for controlling the modulation of the electRon beam comprising: a cathode-ray tube having horizontal and vertical deflection means and a control electrode for modulating the intensity of the electron beam; horizontal and vertical ramp-generating means for generating ramp signals each being of a different constant slope which are respectively applied to said horizontal and vertical deflection means; rotating memory means having a single output for generating a continuous train of pulses spaced at substantially equal intervals, every Nth pulse in said pulse train being of a greater duration than the remaining pulses in said pulse train; first circuit means for coupling the signals appearing at said single output to said horizontal ramp-generating means for triggering the termination of a previously generated horizontal ramp signal and initiating a new horizontal ramp signal; second circuit means coupled to said first circuit means for applying a trigger signal to said vertical ramp-generating means for triggering the termination of a previously generated vertical ramp signal and initiating a new vertical ramp signal only when a pulse of a greater duration is detected; means for counting the number of Nth pulses of said greater duration occurring per revolution of the rotating memory; said memory having a second output for generating unblanking signals for controlling the modulation of electron beam intensity; only one of said unblanking signals being arranged to occur in time synchronism with only one of said pulses of greater duration; means responsive to the simultaneous occurrence of said one of said pulses of greater duration and said one of said unblanking signals for resetting said counting means.

6. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising: first and second ramp-generating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions; third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining ramp-generating means; said third means being further comprised of memory readout means; rotating memory means comprising a rotating member having a single track for storing information representing both said first and second synchronizing signals; said track including predetermined indicia arranged at spaced intervals about said track; every Nth indicia being of a configuration different from all remaining indicia where N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions; said readout means respectively generating a first type of pulse signal when one of said Nth indicia passes said readout means and a second type of pulse signal when one of the remaining indicia passes said readout means, said first and second signal types differing in the number of individual pulses in each of said types, and further comprising: threshold circuit means for detecting the presence of both said first and second types of pulse signals for producing said first synchronizing signals and applying these signals to said first ramp-generating means; and gating circuit means coupled to said threshold circuit means and adapted to receive both said first and second types of pulse signals but responsive only to said first type for producing said second synchronizing signals and applying these signals to said Second ramp-generating means.

7. Control means for deflecting the electron beam of a cathode-ray tube in mutually perpendicular directions wherein the electron beam is deflected a number of times in a first of said perpendicular directions during the time interval in which the electron beam is deflected once in the remaining perpendicular direction, said means comprising: first and second ramp-generating means for generating first and second ramp signals each of a different constant slope to deflect the electron beam in said mutually perpendicular directions; third means for applying first and second synchronizing signals to said first and second ramp-generating means respectively, for controlling the duration of the ramp signals wherein one of said ramp-generating means generates a number of consecutive ramp signals for each single ramp signal produced by the remaining ramp-generating means; said third means being further comprised of memory readout means; rotating memory means comprising a rotating member having a single track for storing information representing both said first and second synchronizing signals; said track including predetermined indicia arranged at spaced intervals about said track; every Nth indicia being of a configuration different from all remaining indicia where N is an integer greater than 1 and is equal to the number of deflections which the electron beam undergoes in one of said mutually perpendicular directions; said readout means respectively generating a first type of pulse signal when one of said Nth indicia passes said readout means and a second type of pulse signal when one of the remaining indicia passes said readout means, said first and second types differing in the number of individual pulses in each of said types, and further comprising: amplifier means coupled to said readout means for amplifying the first and second types of signals; one of said ramp-generating means being coupled to said amplifying means for successively generating ramp signals upon receipt of each signal from said amplifying means; and gating circuit means coupled to said amplifying means for controlling the application of pulse signals to the remaining one of said ramp-generating means, said gating circuit means including a monostable multivibrator having a transient duration greater than the time between the first leading edge and last trailing edge of the number of individual pulses of said first signal type but of a transient duration less than the time between leading edges of successive pulses of said second type; said monostable multivibrator being in its steady-state condition upon application of successive pulses of said second signal type to bypass said remaining ramp-generating means, and being triggered to its transient condition by a trailing edge of a first pulse of said first signal type to thereafter couple a second pulse of said first signal type to said remaining ramp-generator means to terminate a previously generated ramp signal and initiate a new ramp signal each time said multivibrator couples a pulse to said remaining ramp-generator means.