US3707621A

US3707621A - Successive addition utilizing a bistable latch

Info

Publication number: US3707621A
Application number: US122726A
Authority: US
Inventors: Ronald L Krutz; Thomas J Villella
Original assignee: Gulf Research and Development Co
Current assignee: Chevron USA Inc
Priority date: 1971-03-10
Filing date: 1971-03-10
Publication date: 1972-12-26
Anticipated expiration: 1989-12-26

Abstract

An improved electronic latch for causing a train of pulses to operate an adding device which is constantly fed a signal proportional to some number in such a way that for each pulse of said train of pulses said number will be added to the previous total in said adding device.

Description

United States Patent Krutz et a1.

14 1 Dec. 26, 1972 [54] SUCCESSIVE ADDITION UTILIZING A [56] References Cited I BISTABLE LATCH UNITED STATES PATENTS [72] Inventors: Ronald L. Krutz; Thomas J. Vlllella,

both of 0/0 Research 2,936,! 17 5/1960 Younker ..235 175 x Development Co Pa Drawer 3,202,805 8/1965 Amdahletal. ..235/l64 2038 Pittsburgh Pa. 15230 3,511,978 5/1970 Margulius ..235/l75 1 1 Filed: March 10, 1971 Primary Examiner-Malcolm A. Morrison {21] APPL 22 72 Assistant Examiner-David H. Malzahn Attorney-Meyer Neishloss, Deane E. Keith and Wil- Related U.S. Application Data am Kovensky [63] Continuation-impart of Ser. No. 815,838, April 14,

1969, Pat No. 3,598,283. [57] ABSTRACT U S Cl 235/174 235/173 An improved electronic latch for causing a train of 51 in 'c1 'If'1"IIIIIII'IIIII'I'III 60617/50 Perate addmg device which is wmtamly [58] Field of Search ..235 174, 173, 175, 159, 156, fed a Signal Pmpmkma' some number such 8 235/164 way that for each pulse of said train of pulses said number will be added to the previous total in said adding device.

9 Claims, 1 Drawing Figure 1 1 1 /a4 70 //2 am ONE SUBSEOUENT 0/6/7 /ea-2'\ DIG/TS A005? /66-4 FLIP FLOPS SHOTS ML FLOPS 7'0 0/5PLAY 'SUCCESSIVE ADDITION UTILIZING A BISTABLE LATCH This application is a continuation-in-part of copending application Ser. No. 815,838, filed Apr. 14, 1969, by Ronald L. Krutz and Thomas J. Villella, entitled Gasoline Pump Computer, and now issued as U. S. Pat. No. 3,598,283.

The above identified prior parent invention pertains to a computer for the retail marketing of gasoline, or other liquids. The present invention is disclosed therein as a part of its computation machinery or circuitry, and reference may be had to said prior patent for a fuller explanation of one specific usage of the present inventron.

An advantage of the present invention is its adaptability to fabrication by modern large scale integrated 'circuit techniques. Thus, the invention could be economically produced with components of low cost and small size. The invention comprises an array of electronic components arranged around an adding circuit which has two inputs. The first input is a train of pulses, the only intelligence associated therewith being the pulses themselves. That is, all pulses are the same and the only variety is pulse frequency. In said prior patent these pulses correspond to volume of gasoline dispensed, e.g., 100 pulses per gallon. The second input to the adding circuit is a steady signal on a cable which corresponds to some specific data or number. This signal can vary if desired. In said prior patent this signal corresponded to the price ofa gallon of gasoline as supplied from a digiswitch or other signal supplying means.

The desired result is that for each pulse in the train of pulses the number represented by said signal shall be added into the value present in the adding circuit to produce a total therein, and then for the next pulse this number be again added to that total, etc. The latch of the invention, which 5 called an accumulator in said prior patent, comprises means to rapidly produce new totals by adding the value of this signal each time is a pulse of the train occurs, and to do so in a fool-proof manner, i.e., avoiding any false counts.

in addition to the use as a gasoline pump computer as disclosed in said prior patent, the present invention could be used in any instance where a value per unit quantity must be multiplied by a fixed (or variable) number, i.e., pounds/square foot times square feet, miles per gallon times gallons, or kilowatt-hours times cost/kilowatt hour. In addition, in any application requiring an accruing of the result over a fixed period oftime, the invention is capable ofintegrating the value ofa quantity over a fixed time interval.

The above and other advantages of the invention will he pointed out or will become evident in the following detailed description and claims, and in the accompanying drawing also forming a part of the disclosure, in which the sole FIGURE is an electrical schematic diagram ofthe circuit ofthe invention.

The drawing has been adapted from FIG. 5 0f the drawing of the parent issued patent mentioned above. All of the reference numerals used herein correspond to those of said patent, although some changes have been made by way of simplification of the drawing itself. The reader may wish to refer to said patent for a fuller explanation of one specific environment in which the invention can be used. To the extent that said prior disclosure is needed to fully describe the present invention, if at all, to that extent said prior disclosure is hereby incorporated herein by reference.

The two inputs to the circuit of the invention are supplied on a line 48 and a line 54. Line 48 delivers a train of pulses which are to operate the latch or accumulator 60. In said prior patent, line 48 extended from a pulse generator and delivered lOO pulses per gallon of gasoline dispensed. Line 54, in reality of cable containing many conductors, carries a signal proportional to some number, the value of which is to be repeatedly added and accumulated in adder 104, once for each pulse of the train of pulses on line 48. The signal on cable 54 may change between pulses, and more generally, the output would be the integrated result of the varying unit cost times units dispensed.

The line 112 from adder 104 indicates that, as a practical matter, most circuits will require the ability to handle more than one digit. Line 112 indicates that values are carried from one digit to another. The digit adder 104 shown represents a least count position. Each digit adder will require its own latch 60, as will appear more clearly below, and as shown in the parent patent. In said parent patent the invention operated with binary coded decimals, known as the BCD" code. The present invention is not so limited, and can operate with ordinary decimals, binary numbers, or in any other manner. The showing of the latch was taken from said FIG. 5, and hence is in the form required by BCD code, but it is to be understood that this showing is by way of example only.

In said BCD or 8421 code, each digit is made up of four parallel signals. Said prior patent sets forth a brief explanation of the theory of binary numbers and gives a text reference to which the reader mayrefer to for a fuller explanation. In order for the adder 104 to operate properly, each of the four signals must be separately handled as it passed to, and through, and then out of the adder.

In said prior patent, the logic of the computing circuitry includes utilizing each pulse delivered on line 48 from the pulse generating portion to cause the signal from the digiswitch, proportional to one-hundredth of the price of a gallon of gasoline, to be entered into the circuitry and added to the previously accumulated total. The present invention provides means to cause the circuitry to hold each total, feed each total back to the front end of the adder, and add each incoming signal to the previously accumulated total to thereby generate a new previously generated total, which is then added to the next incoming signal, etc.

To this end, means are provided to, in effect, make each pulse delivered on line 48 into two signals which have a time delay between them. These two signals are utilized in the circuit, as will appear below, to inherently and automatically provide timing between the various computational operations. To this end, a series array of one-shot multi-vibrators 152 are provided in line 48. In the embodiment of the invention which has been successfully built and used, for one-shots 152 were utilized, and signal 48 was tapped by a line" 154 after the first two one-shots, and again by a line 156 at the end of the array. It should be understood that the work line" as used herein, very frequently will refer to a multiplicity of conductors, which may be cables, as

are

lines

154 and 156, or printed circuit conductors, or internal connections in the solid state devices, or the like. Thus, each individual pulse on line 48 is first present on line 154, and some length of time later, the same pulse is present on line 156. As will appear below, the exact length of time is unimportant, so long as it is finite and long enough to allow latch 60 to operate. As is known, other devices such as delay lines, and, for short delays (one-tenth microsecond or less) the propagation delay through multiple nand or nor gates could be used in place of the one-shots 152. I

Latch 60 utilizes these two signals which are created from each individual pulse to accomplish the above stated mode of operation. Only selected portions of the circuit are shown in the drawing, it being understood that other conventional capabilities, such as means to reset to zero, and the like, will be provided. In the successfully built and used embodiment of the invention, the portion of the latch or accumulator 60 associated with each digit adding device 104 was built up of an array of eight modified flip-flops. The nature of these modified flip-flops is that of a normally closed, momentary make switch. However, the memory capacity of a flip-flop to hold signals received on its input side is utilized.

Referring back to the drawing, the eight flip-flops are arranged in an upper row of four indicated by reference numeral 158 followed by a dash number, and a lower row of four indicated by reference numeral 160 followed by a dash number. The dash number indicates which digit of the 8421 code the particular line or device is associated with. A line 162, followed by the appropriate dash number, interconnects thev output side of each upper row flip-flop with the input side of each lower row flip-flop 160. An output line 164, followed by the appropriate dash number, interconnects the output side of each lower row flip-flop with suitable display means, not shown.

Means are provided to feed each total as generated back to the input side of the adding device 104. To this end, a conductor 168, followed by the appropriate dash number, taps into conductors 164, and feeds the signal present thereon as one of the inputs to adder 104.

The manner of operation of this part of the circuitry may be best understood by an example, taken, for convenience, from said parent patent. Initially, prior to commencement of pumping of gasoline, all the flipflops 158 and 160 are in their normally closed condition. A zero re-set button, not shown, may be so con nected as to establish all initial conditions throughout the circuit, as will be obvious to those skilled in the art. When the circuitry is thereafter turned on, a price signal is immediately present on line 54, is added to zero in adder 104, and the total signal is immediately present on the conductors feeding the input sides of the upper row 158 in accumulator 60. The solid state devices utilized in the circuit respond in very short periods of time, a few millionths of a second as an indication of orders of magnitude. Therefore, the word immediately"as used herein is not literally correct, but is effectively correct.

Upon commencement of dispensing of gasoline, the first pulse arrives on conductor 48. This pulse proceeds through the first two one-shots 152 and is then present on conductor 154. The signal on line 154 opens the upper row in the accumulator, i.e., momentarily makes these normally closed switches", so that the previous total produced by adder 104, which in this case is zero plus the signal in line 54, proceeds to the input side of the lower row 160. Chronologically, first the upper row 158 closes, and thereafter the initial pulse on line 48 will have passed through the second two one-shots 152 and be present on line 156. The signal on line 156 momentarily makes the normally closed switches 160 of the lower row, which causes the previous total signal to pass through conductors 164 and be-displayed on the display means. For purposes of a specific explanation, let it be assumed that the signal on line 54 which feeds adding device 104 is the digit 2. Thus, the display means first showed zero as its initial condition, and now shows 2. Further, assume that digit adding device 104, because of the nature of the price, should display a 4 (2+2) upon receipt of the next pulse on line 48. The first pulse has now completed its course through the circuitry and assume a second pulse from the pulse generating means is present on line 48. Of course, the solid state circuitry will handle the pulses very much faster than they could possibly be mechanically produced.

in the time prior to arrival of the second pulse, adder 104 has received a signal proportional to the prior generated total 2, as an input via conductors 168. Adder 104 has immediately added this prior total to the price signal present on line 54, and has caused this new total, namely 4, to be present on lines 58a feeding the input side of the upper row 158. The second pulse on line 48 proceeds through the first two one-shots 152, and is present on line 154, thus momentarily opening the upper row and causing the new total of 4 to be present on line 162. The upper row then closes. Thereafter, the second pulse on line 48 proceeds through the second two one-shots 152 and is present on line 156, thus causing the lower row to open, which permits the new total of 4 to pass on to the display means. Lower row 160 immediately closes, the signal proportional to 4 feeds back through line 168; and the new signal, proportional to 6, is immediately present on lines 58a. However, it is significant that each new total, 6 up to this point, is prevented from proceeding any further since the upper row 158 has heretofore been closed awaiting receipt of the next, third, pulse. The circuit, of course, continues to operate in this manner so long as additional pulses are received.

Thus, foolproof, inherent, and automatic timing between the various portions of the circuitry are provided by the array of one-shots 152, and the array of flip-flops 158 and 160 in latch or accumulator 60.

An advantage of the invention in the field of high speed computing is that the actual addition of the two quantities takes place during the dead time between input pulses, and the new total is available at the output of the adder even before the application of the next input pulse. Thus, said next input pulse releases the new sum to the output means immediately and without having to wait for the time required for addition to be accomplished.

While the invention has been described in detail above, it is to be understood that this detailed description is byway of example only, and the protection granted is to be limited only within the spirit of the invention and the scope of the following claims. I

lO60l 2 0074 We claim:

1. In combination, a computation circuit including adding means to repeatedly add a signal supplied to the circuit representing a number to the accumulated total of said numbers in the adding means each time a pulse of a series of pulses is supplied to the circuit, means to create first one pulse and then another pulse from each pulse of said series of pulses, said computation circuit including a bistable latch comprising a first normally closed stage and a second normally closed stage arranged in series circuit and connected to the output of said adding means, means to utilize the first created of said pair of pulses to momentarily open the first stage of said bistable latch, means to utilize the last created of said pair of pulses to momentarily open said second stage of said bistable latch, means to feed back the output of said bistable latch to the input of said adding.

means, and wherein the time required for the first stage of said bistable latch to open and then reclose is less than the time elapsed between creation of the first and the last of said two pulses.

2. The combination of claim 1, said pulse creating means comprising a series circuit arrangement ofa plurality of one-shot multi-vibrators, means to tap a pulse of said series of pulses after it has passed through some of the multi-vibrators of said plurality of multi-vibrators less than all of them to thereby create said first created pulse, and means to tap the same said pulse of said series of pulses after it has passed through all ofthe multivibrators of said plurality of multivibrators to thereby create the last created pulse of said two pulses.

3. The combination of claim 2, wherein said plurality comprises four one-shot multi-vibrators, and wherein said first created pulse is created after two of said four one-shot multi-vibrators.

4. The combination of claim 1, wherein said adder operates on BCD numbers, and said latch comprises separate means to handle each of the four signals needed to make up each BCD number.

5. The combination of claim 1, wherein said computation circuit is included in a retail marketing gasoline pump, and wherein said series of pulses is proportional to the amount of gasoline dispensed.

6. A method of repeatedly adding the value proportional to a signal supplied to a circuit to an accumulated total of said values in said circuit each time a pulse of a series of pulses is supplied to the circuit, comprising the steps of creating first one pulse and then another pulse from each pulse of said series of pulses, utilizing said pair of pulses to operate bistable latch means to feed signals back from the output side of adding means in said circuit to the input side of said adding means, and feeding said signal to said input side of said adding means, whereby the addition function takes place between the pulses of said series of pulses, and whereby the new sum to be generated by each pulse of said series of pulses is present between the output end of said adding means and the input end of said bistable latch means after the end of each previous pulse of said series of pulses.

7. The method of claim 6, wherein said pair of pulses is created from each pulse of said series of pulses by passing each pulse of said series of pulses through delay means, and tapping said delay means mediately the ends thereof and at the end thereof to thereby sequentially create said pair of pulses.

he method of claim 6, wherein said adder operates on BCD numbers, and said latch comprises separate means to handle each of the four signals needed to make up each BCD number.

9. The method of claim 6, wherein said circuit is included in a retail marketing gasoline pump, and wherein said series of pulses is proportional to the amount of gasoline dispensed.

Claims

1. In combination, a computation circuit including adding means to repeatedly add a signal supplied to the circuit representing a number to the accumulated total of said numbers in the adding means each time a pulse of a series of pulses is supplied to the circuit, means to create first one pulse and then another pulse from each pulse of said series of pulses, said computation circuit including a bistable latch comprising a first normally closed stage and a second normally closed stage arranged in series circuit and connected to the output of said adding means, means to utilize the first created of said pair of pulses to momentarily open the first stage of said bistable latch, means to utilize the last created of said pair of pulses to momentarily open said second stage of said bistable latch, means to feed back the output of said bistable latch to the input of said adding means, and wherein the time required for the first stage of said bistable latch to open and then reclose is less than the time elapsed between creation of the first and the last of said two pulses.

2. The combinatiOn of claim 1, said pulse creating means comprising a series circuit arrangement of a plurality of one-shot multi-vibrators, means to tap a pulse of said series of pulses after it has passed through some of the multi-vibrators of said plurality of multi-vibrators less than all of them to thereby create said first created pulse, and means to tap the same said pulse of said series of pulses after it has passed through all of the multi-vibrators of said plurality of multivibrators to thereby create the last created pulse of said two pulses.

8. The method of claim 6, wherein said adder operates on BCD numbers, and said latch comprises separate means to handle each of the four signals needed to make up each BCD number.