US 3803576 A
Description (Le texte OCR peut contenir des erreurs.)
United States Patent [191 Dobrzanski et al.
[ RESIDENTIAL ALARM SYSTEM  Inventors: John J. Dobrzanski, New Britain,
Conn.; Willaim J. Doyle,'La Habra, Calif.
 Assignee: Emhart Corporation, Bloomfield,
22 Filed: July 12,1972
21 Appl. No.: 271,110
Primary Examiner-John W. Caldwell Assistant Examiner-Scott F. Partridge Attorney, Agent, or Firm-McCormick, Paulding & Huber  ABSTRACT Circuitry is disclosed for sounding an alarm horn when 1451 Apr. 9, 1974 a window or door is opened, and an associated limit switch'is closed, the circuitry providing for predetermined time delays suitable for use in either one of two possible modes of operation. A console is provided in the residence to be protected, and contains a battery power source foroperating the circuitry, a key control switch, and a mode selector switch. One mode is suitable for use at night when the occupant of the residence is at home, and the circuitry provides for a time delay in sounding the alarm following closing of one of the limit switches, in order to allow the occupant time to close any open exit door or window. The second mode is for use when the occupant leaves his residence unattended, and two time delays are provided for in this second mode prior to sounding any alarm, and after switching the system on. One of these delays is the same as that outlined above, the other delay being of variable duration and in sequence with the first mentioned delay. The occupant has the same nine seconds to re-enter and deactivate the system once he has left his residence, but he also has the benefit of a secondary delay on leaving his residence. Thus, he may activate the system in mode two, open an exit door within a certain time, and procrastinate for any amount of time before leaving and closing the door behind him. Having closed the door behind him he will have the benefit of a short delay on re-entry to allow him to deactivate the system.
5 Claims, 1 Drawing Figure RESIDENTIAL ALARM SYSTEM SUMMARY OF INVENTION This invention relates to residential alarm systems, and deals more particularly with a circuit capable of two modes of operation, one for use when the occupant is at home, and the second when he intends to leave, and return at a later time.
Normally closed sensor switches are mounted at the various doors and windows, and these switches are held open when these various exit openings are suitably secured. A control console located inside the residence contains a battery, a mode selector switch, and a keylock control switch for energizing circuitry which includes these sensor switches arranged in parallel.
The system also includes an alarm device, selectively operated from the battery by a sensing circuit, and the sensing circuit has solid state gate means which can be triggered following a known delay by a threshold device. The sensing switches are preferably arranged between a resistance-capacitance grouping associated with and the gate, in order to minimize drain on the battery when the system is operating, and to permit the alarm to operate only after a known delay following reclosing of the sensing switch in the second mode. This feature permits the occupant to close the keylock or control switch allowing him time to open one of his exit doors within the known delay period, and to then have an undetermined length of time within which to exit and reclose the door. Once the door, or any other secured opening has been tampered with, reclosing an associated sensing switch, the alarm device will operate normally, that is with the limited delay period built into the circuit as described above.
In both mode one and in mode two following the above preliminary situation, the alarm will be energized from the battery following the brief delay dictated in mode one, and in mode two be a secondary gate and triggering circuit network.
BRIEF DESCRIPTION OF THE DRAWING The single view shows in schematic fashion the circuitry included in an alarm system constructed in accordance with 'the present invention.
DETAILED DESCRIPTION In order to equip a typical residence with a burglar alarm system in accordance with the present invention, a plurality of normally closed limit switches, or other sensing devices with contacts arranged so as to close in response to a condition to be detected, are provided at the various exits and windows of the residence to be secured in such a way as to close when the exit door or window is opened or otherwise tampered with. As shown in FIG. 1 these. sensing devices may comprise limit switches, such as LS l and LS 2, arranged in parallel with respect to one another, or may comprise contacts engageable by a deadbolt, or latch bolt, or may comprise contacts in a magnetic motion detector or sensor or any other known intrusion device. Such devices will be arranged so as to be held in a normally open circuit condition, and are adapted to close whenever the secured condition is violated. The electrical connection of these devices, in paralleL'back to a control console located within the residence may be accomplished in a well known manner, and the remaining elements shown in FIG. I are provided in the control console.
Turning now to the system components shown in FIG. 1 a self-contained battery pack 10 is provided to achieve a voltage potential between the lines L-l and L-2. A push to test switch 12 is provided to check the status of the battery when the key control lock switch 14 is turned on by an appropriately shaped key. A gallium arsenide light emitting diode 16 is mounted on the console and adapted to be energized when the push to test switch is closed and a resistive load is applied across the battery as shown at 18. If the load resistor drops the battery voltage below horn operating specifications, the blocking zener 20 connected in series with the light emitting diode 16 will not function below its threshold and the light will not indicate telling the occupant of the house to replace the battery as soon as possible.
A mode selector switch 22 is provided on the console, and permits the occupant to select an in mode or an out mode. This selection will be dictated by virtue of whether the occupant intends to remain in his residence or to go out for any reason. For example, when the system is activated at. night when the occupant retires for the evening, the mode selector switch 22 would be placed in the in position. The control switch 14 can be closed from the open position shown and a nine second time delay provided for last minute checking of doors and windows. An alarm will occur after a lapse of nine seconds if entry is attempted. The alarm device 24 is also provided in the console, and the sensing circuit for operation of the horn 24 from the battery source 10 with the mode selector switch in the in position will now be described in detail.
With the system turned on as described above battery voltage is applied across a time delay network consisting of a resistor R and capacitor C When a conventional 6 volt battery is used as the power source for a typical circuit, R preferably comprises a relatively large resistance as for example 690K ohms. The capacitor C is chosen to have a capacitance of 22 microfarads. When the capacitor C is fully charged the only current being drawn from the battery, will be due to minute capacitor leakage. The capacitor, when charged above the threshold voltage of zener Z will provide a triggering voltage to a silicon control rectifier SCR, or solid state gate means through one or more of the sensing devices which may have been closed as for example by an intruder in opening or otherwise tampering with a window or door. If one or more of the limit switches LS and LS are closed momentarily prior to the nine second time delay, achieved through the capacitive resistive grouping mentioned above, the zener threshold voltage level will not have been reached, resulting in continual blocking of the triggering circuit associated with the gate means SCR,. Thus, the occupant might close control key switch 14, and subsequently close an exit door within the nine second time delay provided for, and no alarm willbe sounded. Capacitor C 9 preferably has a capacitance of .05 microfarads and serves only to assure the proper operation of the triggering circuitry described above. Resistor R serves to cooperate with the resistor R to define a voltage dividing network in combination with the zener Z and one or more of the limit switches L8,, LS for a purpose to be described in greater detail hereinbelow.
Once an intrusion occurs, and a limit switch such as LS closes, capacitor C discharges through the zener Z triggering the silicon control rectifier SCR, allowing current to be conducted through this SCR gate, providing battery voltage in the line L with respect to the ground line L Resistor R serves to latch SCR in its conductive state. If the in" position of the mode switch 22 has been selected, the horn 24 will sound immediately or nearly so. A voltage dividing network is formed by resistors R and R through the mode switch 22 providing a triggering voltage for a unijunction transistor 26, charging of capacitor C in this particular mode of operation of the system is accomplished virtually instantaneously due to the fact that resistor R comprises only 6,8K ohms. The unijunction transistor 26 comprises a threshold voltage device which triggers a secondary gate means, in the form of silicon control rectifier SCR to conduct with the result that the horn 24 will have one side grounded by line L and the other side provided with six volts through the line L,,. The resistor R associated with the vibrating horn 24 allows its satisfactory operation, and
also serves to latch the gate SCR in its conductive state. Thus, in the case of a forced entry, with the occupant in his residence, and the in position of the mode switch selected, as mentioned above the alarm will sound virtually instantaneously following any intrusion. Actually, with the capacitances and resistances mentioned above a delay time of approximately 1/ 10 of a second will occur. The operation of the abovedescribed circuitry in the out" mode position of selector switch 22 will now be described.
Upon leaving this residence the occupant uses his key to close key control switch 14 allowing capacitor C to charge as described above, with the resistor R serving to limit the current flow to approximately 9p. amperes with the result that when capacitor C is fully charged a 9 second delay will have occured. Within this 9 second delay the occupant may open one of the secured exits, his front door for example if he intends to exit through the front door, and having opened one of the limit switches, such as LS during this 9 second delay, no alarm will sound. This important feature of the present invention is possible by virtue of the placement of the limit switches LS and LS between the zener Z and the gate means SCR As mentioned above a voltage dividing network is formed consisting of resistor R zener Z one or more of the limit switches LS, and resistor R,,, to prevent the capacitor C from charging above the required zener threshold voltage until one or the other limit switches, LS and LS for example, is again closed. In other words, the front door, or other exit through which the occupant intends to leave his premises may be held open as long as desired. The system only being armed when this door is reclosed and capacitor C is recharged.
Once this door is closed, the capacitor C is charged within the nine seconds mentioned above. The next entry will of coursevclose one or more of the limit switches LS providing a discharge path for the capacitor C through the zener Z triggering the silicon control rectifier gate SCR As mentioned above, this will provide lines L and L at different potentials with respect to one another with no time delay.
With the out mode of selector switch 22 selected resistor R with its limited resistance of 6.8K ohms is out of circuit, and resistor R at 270K ohms controls the charging of capacitor C. At the expiration of a predetermined time delay, dictated by this capacitor resistive group C and R the unijunction transistor 26 will conduct triggering the gate SCR when the threshold voltage of the unijunction transistor is exceeded. The horn 24 will thus be grounded, and line L, will carry the audio horn to sound, resistor R serving not only to provide the necessary voltage on the intermittent horn device but also serving to latch the SCR in its conductive state, and to retain this condition until key control switch 14 is switched to its off position.
Assuming that the key control switch 14 is turned on with the mode switch 22 in its out position the predetermined time delay mentioned in the preceeding paragraph will allow the occupant to secure any open door or window, after which time the alarm device will function so as to sound the alarm whenever an unauthorized entry closes one of the limit switches LS, or LS or more particularly after the nine second delay following such unauthorized entry. This latter 9 second delay is intended to allow the occupant to return to his residence, to open the door with his usual household key, and to give him 9 seconds within which to get to the key control switch 14 and to turn it off. Once turned off, the occupant can reclose the door by which he just entered, and switch the mode selector switch to the in position, and reclose the key control switch 14 thereby activating the alarm system for the continued security of his residence.
A status check circuit is provided when the control switch 14 is first turned on, a timing network consisting of capacitor C and resistor R providing a short duration pulse via the charging of the capacitor C to be applied through diode D to the limit switches LS and LS If any such switch is closed, indicating that a door or window is not secure, a pulse path is provided to the gate SCR The triggering of SCR will of course initiate an alarm immediately if the mode switch is positioned to in. i v
The timing network pulse of capacitor C is also applied simultaneously through diode D to a test circuit gate SCR Triggering gate SCR initiates an effective bridge of the mode switch, permitting capacitor C to be charged in a reduced time since the normal timing network for triggering SCR will have been parallelled by the combination of resistance R and resistance R leading to capacitor C Thus, this circuitry performs in the same manner as the night in mode selector switch position. In conclusion then, the status network described above in affect overrides the time delay networks in both the primary sensing circuit and the secondary sensing circuit described above to provide an immediate audio alann if any limit switch LS, or LS is closed indicating an unsecure condition at a door or window or the like.
1. An alarm system comprising:
a. a source of electrical energy,
b. a sensing circuit having at least one sensing device with contacts adapted to close in response to a condition to be detected,
c. a control switch for connecting said sensing circuit to said source,
(1. an electrically energizable alarm device,
c. said sensing circuit further including selectively conductive solid state gate means for operating said sensing circuit to said alarm device,
f. said sensing circuit further including a first gate triggering network which includes said sensing de- 5 vice contacts,
g. said gate triggering network including a capacitive resistance group for delaying said first gate from conducting for a first predetermined time delay,
h. second solid state gate means in said sensing circuit and including a second triggering network which network includes a second capacitive resistance group for delaying said second gate from conducting for a second predetermined time delay, and
i. a mode switch forming a part of a paralleled resistive network to reduce said second delay when said mode switch is closed and to provide said second time delay following closing .of said control switch and one of said sensing device contacts when said mode switch is opened.
2. The alarm system of claim 1 further characterized by a voltage threshold device in each of said gate triggering networks for controlling the voltage at which said gate is triggered by its associated capacitive resistance group.
3. The alarm system of claim 2 wherein at least one of said threshold devices comprises a zener so arranged that when the capacitive portion of said group is charged above the threshold associated with said zener, triggering voltage is available at the first solid state gate means via the closed contacts of said sensing device.
4. The alarm system of-claim 3 further characterized in that said mode switch is more particularly located between said second threshold device and said second capacitive resistance group, and said parallel resistance network comprising a by-pass resistor so arranged as to increase the rate at which the capacitance portion of said second group is charged to the threshold voltage of said threshold device.
5. The alarm system of claim 4 further characterized by a sensing device status check circuit which permits said first gate triggering network to be by-passed in checking for closed contacts in said sensing device without encountering said first delay.
Pat t N 3,803,576 Dated April 9, 1974 Inventor s John J. Dobrzanski and William J. Doyle It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:
Inventor's name: Willgim J. Doyle should be WillEm J. Doyle C01. 1, line 39, "be" should be --by--.
C01. 3, line 15, "6,8K" should be --6.8K--.
Signed and sealed this 1st day of October 1974.
McCOY M. GIBSON JR. 0. MARSHALL DANN Attesting Officer Commissioner of Patents FORM powso (10-69) uscoMM-Dc 60376-P69 9 .5. GOVERNMENT 'RINTING OFFICE I," 0-365'33,