|Numéro de publication||US3889568 A|
|Type de publication||Octroi|
|Date de publication||17 juin 1975|
|Date de dépôt||31 janv. 1974|
|Date de priorité||31 janv. 1974|
|Numéro de publication||US 3889568 A, US 3889568A, US-A-3889568, US3889568 A, US3889568A|
|Cessionnaire d'origine||Pioneer Electric Corp|
|Exporter la citation||BiBTeX, EndNote, RefMan|
|Citations de brevets (13), Référencé par (50), Classifications (15)|
|Liens externes: USPTO, Cession USPTO, Espacenet|
United States Patent [191 [111 3,889,568 Amaya June 17, 1975 AUTOMATIC CHORD PERFORMANCE APPARATUS FOR A CHORD ORGAN Primary ExaminerRichard B. Wilkinson Assistant Examiner-Stanley J. Witkowski  Inventor: Toshlyukl Amaya Tokyo Japan Attorney, Agent, or FirmSughrue, RothweII, Mion,  Assignee: Pioneer Electric Corporation, Zinn and Macpeak Tokyo, Japan  Filed: Jan. 31, 1974  ABSTRACT  Appl. No.: 438,515 An automatic chord performance apparatus for a chord organ is disclosed. The apparatus includes a chord selection switch which permits the player or  US. Cl. 84/1.01; 84/1.03; 84/D1G. 12, performer to Select both the tone or root (e g C, C 22 sharp, D, B) and the type of pattern (e.g. major,  Int. Cl G10h 1/00, GlOh 5/00 minor, Seventh) of the chords to be played for a  new of Search desired muscial composition. These selections are en- 84/DIG 22 coded and stored in a random access memory. The apparatus further includes a program switch operated by  References cued the player to store the sequence of musical phrases to UNITED STATES PATENTS be played back to accordance with chord patterns of 3,544,693 12/1970 Tripp 84/1.01 the music to be performed. Memory addressing cir- ,5 6,355 2/ Maynard 84/l-03 cuits controlled by the program switch and responsive 3,567,833 3/1971 Termes et 84/10] to a clock-pulse generating circuit cause the chord in- 3,610,799 10/1971 Watson 84/1.01 formation previously stored in the memory to be 3624263 11/1971 h i lectively read out to a decoder during the musical per- 3707594 12/1972 l formance. A chord selection circuit controlled by the 3,708,602 l/1973 Hiyama 84/1.03 3711618 H1973 Freemanum 84,103 decoded informatlon from the decoder then repro- 3:715:442 2/1973 Freemannm 841/101 duces the desired chord signal. A gate circuit means 3,760,088 9 1973 Nakada s4/1.03 g g a rhythm pattern on the chord slgnal provldes 3,763,305 10/1973 Nakada et a1 84/1.03 an output to an audio amplifier and speaker system. 3,764,722 10/1973 Southard 84/1.03 3,795,755 3/1974 Uchiyama 84/103 8 Clam, 6 Drawmg Flgllres ITCH 4 I 2 PROGRAM ENCODER SWITCH I I I I 5 U 3 Y-ADDRESS DESIGNATION CIRCUIT MEMORY TCLOCK-PULSE is 6 X-ADDRESS DESIGNATION CIRCUIT TCLOCK- PULSE J L CLOCK \7 DECODER s IcLocK PULSE U I 9 TONE cuono RHYTHM GENERATING SELECTION PATTERN CIRCUIT CIRCUIT M ATRI X I I I I I I I2 RHYTHM PATTERN SELECTION SWITCH Gm OUTPUT To AUDIO AMPLIFIER AND SPEAKER PATENTEDJUM I 7 I975 SHEET 1 CHORD SELECTION I SWITCH PM V 4 ENCODER /2 PROGRAM SWITCH i T T T 5 3' Y-ADDRESS DESIGNATION V CIRCUIT V MEMORY CLOCK-PULSE I6 s XADDRESS OEsIOMATIOII CIRCUIT I CLOCK-PULSE Ll CLOCK DECODER 8 IO ,OLOOK PULSE 9 TONE CHORD RHYTHM OEMERATIMO sELEcTIOM PATTERM cIRcuIT cIRcuIT MATRIX Z T T T T T A4 SELECTION SWITCH U II- vOuTPuT TO AUDIO AMPLIFIER AND SPEAKER I CHORD SELECTION SWITCH\ P CHORD TYPE SELECTION SWITEH ROOT SELECTION SWITCTD g E 2 E -----2 2 2 E 0 0 "CD 5 2 y mi? "5P" 2 EN 0 ODER O O 0 D4 O O 0 Y-BIT BINARY CODE T0 MEMORY 3 PATENTEDJLIN I 7 I975 8 89 I 568 SHEET 2 ROOT 0 D3 0 DI CHORD TYPE 1 6 5 0 0 0 0 I MAJOR 0 0 0 c 0 0 I 0 R 0 0 I D 0 0 l I R 6Ih 0 I 0 I) 0 I 0 0 MINOR 6Ih 0 I I E 0 I 0 I 7Ih I 0 0 F o I I o MINOR 7III I 0 I E 0 I I AUGMENT I I 0 e I 0 0 0 DIMINISH I I I 6 I 0 0 I A I 0 I 0 A I 0 I I B I I 0 0 (5.3
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CH J J J 4 5 J i E JIW'E EN CQCkPLLSE GENERATING CIRCUIT GROUND J MULTIVIBRATOR AUTOMATIC CHORD PERFORMANCE APPARATUS FOR A CHORD ORGAN BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to electronic musical instruments, and, more particularly, to an automatic chord performance apparatus for a chord organ which permits the average player to attain a higher level of musical performance with relative case.
2. Description of the Prior Art There is known a chord technique which is one of the normal techniques for playing an electronic organ. This technique is to play a melody on the upper keyboard or manual and a chord on the lower keyboard or manual. The main chord patterns or types in the tempered scale used most commonly for musical performances are as follows:
The roots of the above-mentioned eight kinds of chord patterns or types are of 12 tones, namely, C, C sharp, D, D sharp, E, F, F sharp, G, G sharp, A, A sharp, and B, respectively. Thus, there are a total of 96 main chords (eight chord types multiplied by 12 roots). Consequently, it is too difficult for the beginner or casual player to master this many chords.
In order to eliminate this difficulty, electronic organs have been manufactured which automatically construct the desired chord when one key or switch knob is touched or pushed thereby making a chord performance easier. An organ having such functions is called a chord organ. In playing a chord organ, a player is able to play all desired chords only by touching one chord selection switch at a time in accordance with the progress of the musical composition being performed.
If this kind of chord organ further had the function of storing the progress pattern of the chords for a particular musical composition and then automatically playing preselected chords in order, musical performances could be made even easier. Such a chord organ would be ideally suited for accompanying another musical instrument or a song.
SUMMARY OF THE INVENTION It is, therefore, the primary object of this invention to improve the chord performance function of the chord organ of the prior art.
This and other objects of the invention are attained by providing an automatic chord performance apparatus which selectively stores typical chord patterns and then automatically plays them back during a musical performance thereby making easier a higher level of musical performance.
The invention is based in part on the recognition that most musical compositions, be it folk music, popular music or jazz, can be classified into any one of the following musical construction patterns:
The symbols A, A, A, and B represent musical phrases which are generally composed of either four or eight bars, and the arrows indicating the progression of musical phrases.
If the total sequence of chords to be played for a long musical composition were to'be stored for subsequent atuomatic playing, a memory of huge capacity would be required. The present invention avoids this problem by storing chord information in musical phrases thereby greatly reducing the required memory capacity. In the storing operation, each musical phrase is separately stored in blocks addressed Y1, Y2, Yn. As an example, the progress of the chords arranged in playing order for a particular song may be as follows:
It will be recognized that for the song assumed above,.
the composition is in the form of a musical composition having the musical phrase pattern of A A B A where each phrase is composed of eight bars.
It is generally necessary in playing this song to store the progress of the chords of all the 32 bars, but in the practice of this invention it is enough only to store each eight bars of the musical phrases A and B, or a total of only sixteen bars, in the addresses Y1 and Y2, respectively. During the performance of the song when the Y-address is designated in the order of Y1 Y1 Y2 Y1, the chord performance progresses in the form of the musical composition having the musical phrase pattern A A B A.
BRIEF DESCRIPTION OF THE DRAWINGS The specific nature of the invention, as well as other objects, aspects, uses and advantages thereof, will clearly appear from the following description and from the accompanying drawings, in which:
FIG. 1 is a block diagram showing the entire construction of a chord organ in accordance with the present invention.
FIG. 2 is a block diagram showing a chord selection switch and an encoder.
FIG. 3 is a table showing the binary codes encoded by said encoder.
FIG. 4 is a block diagram showing a Y-address programing switch, a Y-address designation circuit, an X- address designation circuit and a clock-pulse generating circuit.
FIG. 5 is a block diagram showing a decoder, a tone generating circuit and a chord selection circuit.
FIG. 6 is a block diagram showing a rhythm pattern matrix, a rhythm pattern selection switch and a signal gate.
DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to the drawings, and more particularly to FIG. 1, the chord performance apparatus according to the invention includes a chord selection switch 1 which permits the player or performer to select both the tone or root (e.g. C, C sharp, D, B) and the type or pattern (e.g. major, minor, seventh) of the chords to be played for a desired musical composition. These selections are encoded by an encoder 2 in the form of a 7-bit binary word and stored in a random access memory 3. Memory 3 may be of any well known 'type such as, for example, a magnetic core memory,
but preferably takes the form of a solid-state memory of the type employing field-effect transistors in an integrated circuit structure. A commercially available integrated circuit which could be used for the memory 3 is SN 7481A or SN 7484A sold by Texas Instruments Incorporated. This integrated circuit membry is a sixteenbit active-element memory so that memory 3 may be made up of 28 of these memories to provide 448-bit capacity.
The apparatus further includes a Y-address program switch 4 also operated by the player for storing the sequence of the musical phrases such as Y1 Y1 Y2 Y1 to be played back in accordance with the chord patterns of the music to be performed. A Y- address designation circuit 5 is controlled by the Y- address program switch and responsive to a clock pulse frequency divided by 16 to generate a signal designating one of four Y-addresses in the memory 3. An X- address designation circuit 6 responsive to the clock pulse input from clock pulse generating circuit 7 produces the clock pulse frequency divided by 16 for the Y-address designation circuit and also generates a signal designating one of sixteen X-addresses in the memory 3.
The information read out of the memory 3 by the signals generated by the Y-acldress and the X-address designating circuits 5 and 6, respectively, is decoded by decoder 8 to provide root and chord type information to the chord selection circuit 9. The chord selection circuit 9 also receives tone signals from the tone generating circuit 10 and, under the control of the root and chord information from decoder 8, generates the desired chord signals.
The clock pulse generating circuit 7 also provides a clock pulse signal to a rhythm pattern matrix 13 which generates a plurality of rhythm patterns suitable for most popular music compositions. The rhythm pattern selection switch 14 is operated by the player to select the desired rhythm pattern for the music composition to be played.
The gate circuit 12 receives the chord signals generated by the chord selection circuit 9 and is controlled by the selected rhythm pattern signal from the rhythm pattern selection switch 14 to provide an output to an audio amplifier and speaker adapted to be connected to the output terminal 11.
The invention will now be described in more detail with reference to FIGS. 2 through 6 wherein like reference numerals designate like or corresponding parts throughout the several figures. In FIG. 2 the chord selection switch 1 is shown as composed of two groups of switches 11 and 1-2. The switch group l1 is used to select one of the twelve roots C, C sharp, D, B,
and the switch group 1-2 is used to select one out of the eight chord types major, minor, seventh. The chord information produced by operating the chord selection switch groups 11 and 1-2 is encoded by encoder 2 as a 7-bit binary word wherein four bits of the word specify the root and the remaining three bits specify the type. The table shown in FIG. 3 provides an example of the codes encoded by the encoder 2. Taking as a specific illustration, suppose that the D minor seventh chord has been selected on the chord selection switch 1. Then, the encoded binary word as shown in the table of FIG. 3 is 1010011, reading the most significant bit from the left to the least significant bit at the right. I
The encoder 2 is of simple construction and preferably takes the form of a diode matrix. The 7-bit binary word from encoder 2 is stored in the memory 3 which has sixteen X-addresses and four Y-addresses, and thus a capacity of sixty-four 7-bit words. Memory 3 stores the information coming from encoder 2 in accordance with the following address array:
X1 X2 X3 X4 X16 Y] 101 102 103 I04 116 Y2 201 202 203 204 216 Y3 30] 302 303 304 .316 Y4 401 402 403 404 416 Progress Code of Chord Address D7 D6 D5 D4 D3 D2 D1 c 101 0 0 0 0 0 0 1 c 102 0 0 0 0 0 0 1 Dm7 103 1 0 1 0 0 1 1 Dm7 104 1 0 1 0 0 1 1 07 105 1 0 0 1 0 0 0 A 07 106 1 .0 0 1 0 0 0 c 0 0 0 0 0 0 1 I c 116 0 0 0 0 0 0 1 Dm7 201 1 0 1 0 0 1 1 G7 202 1 0 0 1 0 0 0 c 203 0 0 0 0 0 0 1 A7 204 1 0 0 1 o 1 0 As shown in FIG. 4, the switch group 4 for programing the Y-address is composed of switches Y1, Y2, Y3, and Y4, which are preset in accordance with the form of the musical composition. Still referring to the example of the above-mentioned music, the switches are preset in the sequential order of Y1 Y1 Y2 Y1.
The Y-address designation circuit 5 has the ability of storing any combination of Y-addresses up to sixteen steps. The sequential operation of the switches in the switch group 4 are sensed by the encoder. 5-2 which generates a 2-bit binary code word output each time a switch is operated. This binary word is fed in parallel to a l6-stage, 2-bit shift register 5-1. The output of the shift register 5-1 is fed in parallel to the decoder 5-3 which generates the Y-address designation signal.
In the automatic chord performance-operation, the Y-address designation circuit 5 sends out'Y-address designation signals according to the-program stored inthe shift register 5-1. These signals designate one of the four Y-addresses stored in the memory 3, namely, the musical phrase to be played.
An X-address designation circuit 6 sends out the sixteenX-address designation signals to the-memory 3. This circuit i's'composed of a 4-bit binary counter 6-1 and a decoder '6-2. The decoder 6-2 has four inputs fromthe counter 6-1 and generates, one by one,each of the sixteen X-addresses for the memory 3. These addresses, as previously indicated, correspond to the bars in order of a musical phrase.
The Y-address designation circuit 5 and the X- address designation circuit 6 operate in synchronism under the control of the clock pulse generating circuit 7, which is preferably a multivilrator circuit of well known design. The clock pulses from the clock circuit 7 are connected to the 4-bit counter 6-1 in the X- address designation circuit 6. This counter operates as a frequency divider dividing the clock pulse signal by sixteen. The thus divided clock pulse signal is then supplied as the shift pulse through OR gate 5-4 to each stage of the shift register 5-1.
The information read out of the memory 3 due to the X and Y address designating signals is, as shown in FIG. 5, decoded by means of a decoder 8, again of the diode matrix type. Decoder 8 provides as its outputs root and chord type information which is applied to the chord selection circuit 9. A detailed description of the chord selection circuit may be had by reference to co-pending patent application Ser. No. 429,002 filed by Toshiyuki Amaya on Dec. 27, 1973, for A Chord Selection Apparatus for an Electronic Musical Instrument" and assigned to a common assignee with the present application. Only a summary of the description of the chord selection circuit 9 is presented here to facilitate an understanding of the present invention.
First and second ring-counters 9-1 and 9-7 are associated respectively with key-tone selection gates 9-5 and chord pattern selection gates 99. Gates 9-5 are enabled by the root information from decoder 8, and gates 99 are enabled by the chord type information from decoder 8. The ring-counters 91 and 9-7 are driven by opposite phase outputs of a common clock 9-2. An output from one of the gates 95 is differentiated by the differentiator circuit 9-6 to generate a reset pulse for ring-counter 9-7 with the result that ringcounter 97 will be counting in synchronism but delayed with respect to ring-counter 9-1. The outputs of ring-counter 9-1 successively enable D-type latching circuits 9-3 which are connected to the signal output gates 9-4. The diode matrix 9-8 receives the outputs from ring-counter 9-7 and provides outputs to the chord pattern selection gates 99. The outputs of gates 9-9 are connected to the inputs of the latching circuits 9-3. Thus, the signal gates 94 are enabled upon the coincidence of signals from the ring-counter 9-1 and one of the chord pattern selection gates 99.
It will therefore be understood that the chord selection circuit 9 constructs designated chords by selecting by means of the signal gates 94 some of the tones from the tone generating circuit 10 in accordance with the desired chord type and root. The tone signals from the tone generating circuit 10, which are composed of the 12 tones from C to B, are sent out of the chord selection circuit 9 as chord signals which are applied to the signal gate 12.
Referring now to FIG. 6, the rhythm pattern matrix 13 is composed ofa 4-stage binary counter 13-1 having a 32-bit capacity when the input clock pulse from clock pulse generating circuit 7 is taken as the least significant bit. The output of counter 13-1 is decoded by a decoder 13-2 to sequentially generate 32 inputs to the diode matrix 13-3. Diode matrix 13-3 is designed in a well known manner to generate a number of rhythm patterns suitable for most popular music compositions.
The player selects a rhythm pattern matching the musical composition to be played by operating the rhythm pattern selection switch 14. The selected rhythm pattern signal is connected to the signal gate 12, which is an analog switch such as a field effect transistor. The switch 12 thus serves to give a desired rhythm pattern on the chord signals produced by the chord selection circuit 9. Alternatively, the signal gate 12 may be a manually operable switch operated by the player to provide the rhythm directly.
It will be apparent that, by employing the present invention, the chords harmonious with a played melody are automatically played without the player having to play the chords during a musical performance. Further, by storing the chords in musical phrases in the memory, a relatively simple memory can be used to store enough chords to perform most popular music.
Although an exemplary embodiment has been described, it will be understood that various modifications can be made in construction and arrangement within the scope of the invention as defined in the appended claims.
1. An automatic chord performance apparatus for a chord organ comprising:
a. chord selection switch means on said chord organ permitting a player to preselect chord information in accordance with a musical composition to be performed, said chord information including both chord pattern and chord tone;
b. memory means for storing said chord information as a plurality of musical phrases, each of said musical phrases comprising a plurality of bars of said musical composition;
0. program means for storing the sequence of musical phrases to be played back in accordance with chord patterns of said musical composition;
d. address means controlled by said program means and connected to said memory means for reading out said chord information;
e. tone generating means; and
f. chord selection circuit means responsive to the chord information read out of said memory means for controlling the output of said tone generating means to reproduce chord signals.
2. An automatic chord performance apparatus as recited in claim 1 further comprising gate circuit means connected to receive said chord signals and adapted to be controlled to give a rhythm pattern on said chord signals.
3. An automatic chord performance apparatus as recited in claim 2 further comprising automatic rhythm generating means synchronized with said address means and controlling said gate circuit means for generating a preselected rhythm pattern.
4. An automatic chord performance apparatus as recited in claim 2 wherein said gate circuit means is manually controlled by the player to provide said rhythm pattern.
5. An automatic chord performance apparatus as recited in claim 1 wherein said chord selection means includes two groups of manually operable switches, one of said groups of switches designating chord tone information and the other of said groups of switches designating chord type information.
6. An automatic chord performance apparatus as recited in claim 5 wherein said memory means is a random access binary memory, said apparatus further including:
a. encoder means connected between said chord selection means and said memory means for encoding said chord tone and said chord type information as binary words, each of said binary words being composed of bits designating both chord tone and chord type information; and
b. decoder means connected between said memory means and said chord selection means for decoding said binary words read out under the control of said address means into chord tone and chord type information.
7. An automatic chord performance apparatus as recited in claim 6 wherein said random access binary memory has information stored therein in accordance with a Y-address and an X-address, said address means including:
a. Y-address designation circuit means controlled by said program means for generating a Y-address signal to said random access binary memory; and
b. X-address designation circuit means synchronized with said Y-address designation circuit means for generating an X-address signal to said random access binary memory, said X-address signal designating the bars in said musical phrases and said Y- address signal designating said musical phrases.
8. An automatic chord performance apparatus as recited in claim 7 wherein said program means includes a Y-address program switch means manually operable for setting said sequence of musical phrases to be played back.
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|Classification aux États-Unis||84/611, 84/DIG.220, 984/348, 84/613, 84/DIG.120|
|Classification coopérative||G10H2210/596, G10H2210/601, Y10S84/22, G10H1/38, G10H2210/626, Y10S84/12, G10H2210/616, G10H2210/576|