US4768076A - Recrystallized CMOS with different crystal planes - Google Patents
Recrystallized CMOS with different crystal planes Download PDFInfo
- Publication number
- US4768076A US4768076A US06/774,705 US77470585A US4768076A US 4768076 A US4768076 A US 4768076A US 77470585 A US77470585 A US 77470585A US 4768076 A US4768076 A US 4768076A
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- US
- United States
- Prior art keywords
- plane
- mos transistor
- channel mos
- cmos
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000013078 crystal Substances 0.000 title description 2
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims description 33
- 229910052710 silicon Inorganic materials 0.000 claims description 24
- 239000010703 silicon Substances 0.000 claims description 24
- 229910007277 Si3 N4 Inorganic materials 0.000 claims description 10
- 230000000694 effects Effects 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 20
- 238000010586 diagram Methods 0.000 description 11
- 229910052681 coesite Inorganic materials 0.000 description 10
- 229910052906 cristobalite Inorganic materials 0.000 description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 239000000377 silicon dioxide Substances 0.000 description 10
- 229910052682 stishovite Inorganic materials 0.000 description 10
- 229910052905 tridymite Inorganic materials 0.000 description 10
- 239000012535 impurity Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- -1 Boron ions Chemical class 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000001953 recrystallisation Methods 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
- H01L27/0922—Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
Abstract
Description
Claims (12)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59-191542 | 1984-09-14 | ||
JP59191542A JPS6170748A (en) | 1984-09-14 | 1984-09-14 | Semiconductor device |
JP59260698A JPH0673366B2 (en) | 1984-12-12 | 1984-12-12 | Semiconductor device |
JP59-260698 | 1984-12-12 |
Publications (1)
Publication Number | Publication Date |
---|---|
US4768076A true US4768076A (en) | 1988-08-30 |
Family
ID=26506766
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US06/774,705 Expired - Fee Related US4768076A (en) | 1984-09-14 | 1985-09-11 | Recrystallized CMOS with different crystal planes |
Country Status (1)
Country | Link |
---|---|
US (1) | US4768076A (en) |
Cited By (62)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4857986A (en) * | 1985-10-17 | 1989-08-15 | Kabushiki Kaisha Toshiba | Short channel CMOS on 110 crystal plane |
US4933298A (en) * | 1987-12-18 | 1990-06-12 | Fujitsu Limited | Method of making high speed semiconductor device having a silicon-on-insulator structure |
US5057898A (en) * | 1989-11-24 | 1991-10-15 | Sharp Kabushiki Kaisha | Double-gated semiconductor memory device |
US5116768A (en) * | 1989-03-20 | 1992-05-26 | Fujitsu Limited | Fabrication method of a semiconductor integrated circuit having an SOI device and a bulk semiconductor device on a common semiconductor substrate |
US5153702A (en) * | 1987-06-10 | 1992-10-06 | Hitachi, Ltd. | Thin film semiconductor device and method for fabricating the same |
US5155058A (en) * | 1986-11-07 | 1992-10-13 | Canon Kabushiki Kaisha | Method of making semiconductor memory device |
US5177578A (en) * | 1989-08-31 | 1993-01-05 | Tonen Corporation | Polycrystalline silicon thin film and transistor using the same |
US5243206A (en) * | 1991-07-02 | 1993-09-07 | Motorola, Inc. | Logic circuit using vertically stacked heterojunction field effect transistors |
US5315143A (en) * | 1992-04-28 | 1994-05-24 | Matsushita Electric Industrial Co., Ltd. | High density integrated semiconductor device |
US5317178A (en) * | 1992-05-18 | 1994-05-31 | Industrial Technology Research Institute | Offset dual gate thin film field effect transistor |
US5365080A (en) * | 1991-02-22 | 1994-11-15 | Simiconductor Energy Laboratory Co., Ltd. | Field effect transistor with crystallized channel region |
US5378914A (en) * | 1990-05-31 | 1995-01-03 | Canon Kabushiki Kaisha | Semiconductor device with a particular source/drain and gate structure |
US5384473A (en) * | 1991-10-01 | 1995-01-24 | Kabushiki Kaisha Toshiba | Semiconductor body having element formation surfaces with different orientations |
US5684320A (en) * | 1991-01-09 | 1997-11-04 | Fujitsu Limited | Semiconductor device having transistor pair |
US5714394A (en) * | 1996-11-07 | 1998-02-03 | Advanced Micro Devices, Inc. | Method of making an ultra high density NAND gate using a stacked transistor arrangement |
US5883404A (en) * | 1994-08-29 | 1999-03-16 | Motorola, Inc. | Complementary heterojunction semiconductor device |
US5930608A (en) * | 1992-02-21 | 1999-07-27 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor in which the channel region of the transistor consists of two portions of differing crystallinity |
US5982461A (en) * | 1990-04-27 | 1999-11-09 | Hayashi; Yutaka | Light valve device |
US6075268A (en) * | 1996-11-07 | 2000-06-13 | Advanced Micro Devices, Inc. | Ultra high density inverter using a stacked transistor arrangement |
US6172381B1 (en) | 1997-06-20 | 2001-01-09 | Advanced Micro Devices, Inc. | Source/drain junction areas self aligned between a sidewall spacer and an etched lateral sidewall |
US6190949B1 (en) * | 1996-05-22 | 2001-02-20 | Sony Corporation | Silicon thin film, group of silicon single crystal grains and formation process thereof, and semiconductor device, flash memory cell and fabrication process thereof |
US6232637B1 (en) | 1997-05-02 | 2001-05-15 | Advanced Micro Devices, Inc. | Semiconductor fabrication having multi-level transistors and high density interconnect therebetween |
US6242759B1 (en) | 1991-03-27 | 2001-06-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6245615B1 (en) | 1999-08-31 | 2001-06-12 | Micron Technology, Inc. | Method and apparatus on (110) surfaces of silicon structures with conduction in the <110> direction |
US6335231B1 (en) * | 1998-09-04 | 2002-01-01 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a high reliable SOI substrate |
US6358828B1 (en) | 1997-06-20 | 2002-03-19 | Advanced Micro Devices, Inc. | Ultra high density series-connected transistors formed on separate elevational levels |
US6383871B1 (en) | 1999-08-31 | 2002-05-07 | Micron Technology, Inc. | Method of forming multiple oxide thicknesses for merged memory and logic applications |
US6483171B1 (en) | 1999-08-13 | 2002-11-19 | Micron Technology, Inc. | Vertical sub-micron CMOS transistors on (110), (111), (311), (511), and higher order surfaces of bulk, SOI and thin film structures and method of forming same |
US20030102518A1 (en) * | 2001-12-04 | 2003-06-05 | International Business Machines Corporation | Finfet SRAM cell using low mobility plane for cell stability and method for forming |
US20030178654A1 (en) * | 1999-06-02 | 2003-09-25 | Thornton Trevor J. | Complementary Schottky junction transistors and methods of forming the same |
US20030190791A1 (en) * | 2002-04-04 | 2003-10-09 | International Business Machines Corporation | Germanium field effect transistor and method of fabricating the same |
US6657259B2 (en) | 2001-12-04 | 2003-12-02 | International Business Machines Corporation | Multiple-plane FinFET CMOS |
US20040065884A1 (en) * | 2002-10-03 | 2004-04-08 | Arup Bhattacharyya | High performance three-dimensional TFT-based CMOS inverters, and computer systems utilizing such novel CMOS inverters |
US20040119100A1 (en) * | 2002-12-19 | 2004-06-24 | International Business Machines Corporation | Dense dual-plane devices |
WO2004070798A1 (en) * | 2003-02-07 | 2004-08-19 | Shin-Etsu Handotai Co., Ltd. | Silicon semiconductor substrate and its manufacturing method |
US20040195646A1 (en) * | 2003-04-04 | 2004-10-07 | Yee-Chia Yeo | Silicon-on-insulator chip with multiple crystal orientations |
US20040245579A1 (en) * | 2001-12-13 | 2004-12-09 | Tadahiro Ohmi | Complementary mis device |
US20050067620A1 (en) * | 2003-09-30 | 2005-03-31 | International Business Machines Corporation | Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers |
US20050093105A1 (en) * | 2003-10-31 | 2005-05-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator chip with<100>-oriented transistors |
US6897526B1 (en) | 1998-02-12 | 2005-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and process for producing the same |
US20050116290A1 (en) * | 2003-12-02 | 2005-06-02 | De Souza Joel P. | Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers |
US20050184343A1 (en) * | 1999-06-02 | 2005-08-25 | Thornton Trevor J. | MESFETs integrated with MOSFETs on common substrate and methods of forming the same |
US20060014359A1 (en) * | 2004-07-15 | 2006-01-19 | Jiang Yan | Formation of active area using semiconductor growth process without STI integration |
US20060138425A1 (en) * | 2002-10-03 | 2006-06-29 | Arup Bhattacharyya | Methods of forming semiconductor constructions |
US20060170045A1 (en) * | 2005-02-01 | 2006-08-03 | Jiang Yan | Semiconductor method and device with mixed orientation substrate |
US20060275971A1 (en) * | 2005-06-01 | 2006-12-07 | International Business Machines Corporation | Laser processing method for trench-edge-defect-free solid phase epitaxy in confined geometrics |
US20070108510A1 (en) * | 1998-07-29 | 2007-05-17 | Takeshi Fukunaga | Process for production of SOI substrate and process for production of semiconductor device |
US20070148921A1 (en) * | 2005-12-23 | 2007-06-28 | Jiang Yan | Mixed orientation semiconductor device and method |
US20070145535A1 (en) * | 2002-12-02 | 2007-06-28 | Foundation For Advancement Of International Science | Semiconductor device and method of manufacturing the same |
US20070190795A1 (en) * | 2006-02-13 | 2007-08-16 | Haoren Zhuang | Method for fabricating a semiconductor device with a high-K dielectric |
CN100339975C (en) * | 2003-08-25 | 2007-09-26 | 国际商业机器公司 | Integrated semiconductor structure and strained insulated silicon mfg. method and strained insulated silicon |
US20070252206A1 (en) * | 1996-02-23 | 2007-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film and method of manufacturing the same and semiconductor device and method of manufacturing the same |
EP1906440A1 (en) * | 2005-06-17 | 2008-04-02 | Tohoku University | Semiconductor device |
US20080083953A1 (en) * | 1998-06-22 | 2008-04-10 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
EP1959492A1 (en) * | 2005-12-02 | 2008-08-20 | Tohoku University | Semiconductor device |
CN100423265C (en) * | 2004-10-15 | 2008-10-01 | 中国科学院上海微系统与信息技术研究所 | Three dimension complementary metal oxide semiconductor transistor structure and it spreparing method |
US7521993B1 (en) * | 2005-05-13 | 2009-04-21 | Sun Microsystems, Inc. | Substrate stress signal amplifier |
US7863619B2 (en) | 1993-10-01 | 2011-01-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method for manufacturing the same |
US7863713B2 (en) * | 2005-12-22 | 2011-01-04 | Tohoku University | Semiconductor device |
US8222696B2 (en) | 1997-11-18 | 2012-07-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having buried oxide film |
US20160293583A1 (en) * | 2015-04-01 | 2016-10-06 | Kabushiki Kaisha Toshiba | Semiconductor integrated circuit |
US11107733B2 (en) | 2019-08-06 | 2021-08-31 | Tokyo Electron Limited | Multi-dimensional planes of logic and memory formation using single crystal silicon orientations |
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Cited By (176)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4857986A (en) * | 1985-10-17 | 1989-08-15 | Kabushiki Kaisha Toshiba | Short channel CMOS on 110 crystal plane |
US5155058A (en) * | 1986-11-07 | 1992-10-13 | Canon Kabushiki Kaisha | Method of making semiconductor memory device |
US5153702A (en) * | 1987-06-10 | 1992-10-06 | Hitachi, Ltd. | Thin film semiconductor device and method for fabricating the same |
US4933298A (en) * | 1987-12-18 | 1990-06-12 | Fujitsu Limited | Method of making high speed semiconductor device having a silicon-on-insulator structure |
US5116768A (en) * | 1989-03-20 | 1992-05-26 | Fujitsu Limited | Fabrication method of a semiconductor integrated circuit having an SOI device and a bulk semiconductor device on a common semiconductor substrate |
US5177578A (en) * | 1989-08-31 | 1993-01-05 | Tonen Corporation | Polycrystalline silicon thin film and transistor using the same |
US5057898A (en) * | 1989-11-24 | 1991-10-15 | Sharp Kabushiki Kaisha | Double-gated semiconductor memory device |
US5982461A (en) * | 1990-04-27 | 1999-11-09 | Hayashi; Yutaka | Light valve device |
US5583075A (en) * | 1990-05-13 | 1996-12-10 | Canon Kabushiki Kaisha | Method for producing a semiconductor device with a particular source/drain and gate structure |
US5378914A (en) * | 1990-05-31 | 1995-01-03 | Canon Kabushiki Kaisha | Semiconductor device with a particular source/drain and gate structure |
US5684320A (en) * | 1991-01-09 | 1997-11-04 | Fujitsu Limited | Semiconductor device having transistor pair |
US6352883B1 (en) | 1991-02-22 | 2002-03-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US5365080A (en) * | 1991-02-22 | 1994-11-15 | Simiconductor Energy Laboratory Co., Ltd. | Field effect transistor with crystallized channel region |
US6717180B2 (en) | 1991-02-22 | 2004-04-06 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6337236B2 (en) | 1991-03-27 | 2002-01-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6242759B1 (en) | 1991-03-27 | 2001-06-05 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US6589829B2 (en) | 1991-03-27 | 2003-07-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for forming the same |
US5243206A (en) * | 1991-07-02 | 1993-09-07 | Motorola, Inc. | Logic circuit using vertically stacked heterojunction field effect transistors |
US5384473A (en) * | 1991-10-01 | 1995-01-24 | Kabushiki Kaisha Toshiba | Semiconductor body having element formation surfaces with different orientations |
US5930608A (en) * | 1992-02-21 | 1999-07-27 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor in which the channel region of the transistor consists of two portions of differing crystallinity |
US5409850A (en) * | 1992-04-28 | 1995-04-25 | Matsushita Electric Industrial Co., Ltd. | Method of manufacturing a high density semiconductor device |
US5315143A (en) * | 1992-04-28 | 1994-05-24 | Matsushita Electric Industrial Co., Ltd. | High density integrated semiconductor device |
US5317178A (en) * | 1992-05-18 | 1994-05-31 | Industrial Technology Research Institute | Offset dual gate thin film field effect transistor |
US8324693B2 (en) | 1993-10-01 | 2012-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method for manufacturing the same |
US8053778B2 (en) | 1993-10-01 | 2011-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method for manufacturing the same |
US7863619B2 (en) | 1993-10-01 | 2011-01-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method for manufacturing the same |
US5883404A (en) * | 1994-08-29 | 1999-03-16 | Motorola, Inc. | Complementary heterojunction semiconductor device |
US20070252206A1 (en) * | 1996-02-23 | 2007-11-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film and method of manufacturing the same and semiconductor device and method of manufacturing the same |
US8008693B2 (en) | 1996-02-23 | 2011-08-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor thin film and method of manufacturing the same and semiconductor device and method of manufacturing the same |
US6548830B1 (en) | 1996-05-22 | 2003-04-15 | Sony Corporation | Semiconductor device formed of single crystal grains in a grid pattern |
US6190949B1 (en) * | 1996-05-22 | 2001-02-20 | Sony Corporation | Silicon thin film, group of silicon single crystal grains and formation process thereof, and semiconductor device, flash memory cell and fabrication process thereof |
US5714394A (en) * | 1996-11-07 | 1998-02-03 | Advanced Micro Devices, Inc. | Method of making an ultra high density NAND gate using a stacked transistor arrangement |
US6075268A (en) * | 1996-11-07 | 2000-06-13 | Advanced Micro Devices, Inc. | Ultra high density inverter using a stacked transistor arrangement |
US6232637B1 (en) | 1997-05-02 | 2001-05-15 | Advanced Micro Devices, Inc. | Semiconductor fabrication having multi-level transistors and high density interconnect therebetween |
US6358828B1 (en) | 1997-06-20 | 2002-03-19 | Advanced Micro Devices, Inc. | Ultra high density series-connected transistors formed on separate elevational levels |
US6172381B1 (en) | 1997-06-20 | 2001-01-09 | Advanced Micro Devices, Inc. | Source/drain junction areas self aligned between a sidewall spacer and an etched lateral sidewall |
US8222696B2 (en) | 1997-11-18 | 2012-07-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having buried oxide film |
US8482069B2 (en) | 1997-11-18 | 2013-07-09 | Semiconductor Energy Laboratory Co., Ltd. | Nonvolatile memory and electronic apparatus |
US20050156209A1 (en) * | 1998-02-12 | 2005-07-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and process for producing the same |
US6897526B1 (en) | 1998-02-12 | 2005-05-24 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and process for producing the same |
US7687855B2 (en) | 1998-02-12 | 2010-03-30 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having impurity region |
US8187926B2 (en) | 1998-06-22 | 2012-05-29 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing a semiconductor device |
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