US5349494A - Semiconductor device with capacitor insulating film and method for fabricating the same - Google Patents

Semiconductor device with capacitor insulating film and method for fabricating the same Download PDF

Info

Publication number
US5349494A
US5349494A US07/920,921 US92092192A US5349494A US 5349494 A US5349494 A US 5349494A US 92092192 A US92092192 A US 92092192A US 5349494 A US5349494 A US 5349494A
Authority
US
United States
Prior art keywords
silicon nitride
nitride film
film
semiconductor device
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US07/920,921
Inventor
Koichi Ando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Assigned to NEC CORPORATION reassignment NEC CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: ANDO, KOICHI
Application granted granted Critical
Publication of US5349494A publication Critical patent/US5349494A/en
Assigned to NEC ELECTRONICS CORPORATION reassignment NEC ELECTRONICS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: NEC CORPORATION
Assigned to RENESAS ELECTRONICS CORPORATION reassignment RENESAS ELECTRONICS CORPORATION CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: NEC ELECTRONICS CORPORATION
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02323—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen
    • H01L21/02326—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of oxygen into a nitride layer, e.g. changing SiN to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/318—Inorganic layers composed of nitrides
    • H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3211—Nitridation of silicon-containing layers

Definitions

  • the present invention relates to a semiconductor device and a method for fabricating it, and more particularly to a structure of a capacitor insulating film and a method for fabricating it.
  • FIG. 1 shows the structure of one example of these conventional films.
  • a lower electrode 3 having a predetermined shape and made of impurity-doped polysilicone (also called polycrystalline silicon) is formed on the surface of the silicon oxide film 5 on a semiconductor substrate 6.
  • a silicon nitride film 2 having a thickness of about 10 nm is formed by chemical vapor deposition techniques so as to cover the surface of the lower electrode 3. Thereafter, the surface of the silicon nitride film 2 is thermally oxidized to be converted into a silicon oxide film 7 having a thickness of about 2-3 nm. Subsequently, an upper electrode 4 made of polysilicon is formed so as to cover the silicon oxide film 7.
  • the capacitor insulating film is composed of the silicon nitride film 2 formed by the chemical vapor deposition and the silicon oxide film 7 formed by the thermal oxidation. The capacitor insulating film has a thickness of about 7-8 nm in equivalent thickness of an oxide film.
  • the conventional capacitor insulating film has the Following defects.
  • the conventional silicon nitride film formed by the chemical vapor deposition contains many weak-spots so that a single silicon nitride film of 8 nm or less presents difficulties in its use as a stabilized capacitor insulating film with less leakage current.
  • a double layered SiO 2 /Si 3 N 4 film wherein the weak spots are covered by oxidation film on tile surface of the silicon nitride film is now widely used in the current DRAMs, etc.
  • this double layered film when it has a thickness of, 5 nm or less in equivalent thickness of an oxide film, also suffers from an abrupt increase in the leakage current.
  • the chemical vapor deposition tends to introduce oxygen into the silicon nitride film. This introduction of oxygen is remarkable particularly in the initial process where the silicon nitride film grows on the oxide film. Also where a silicon nitride film is to be grown on polysilicone from a vapor phase, it will actually grow on the native oxide film formed on the polysilicone surface. Thus, it was difficult to form a stoichiometric silicon nitride film 10 nm or less thick on polysilicon by the chemical vapor deposition techniques. Reference is made to "J. A. Wurzbach and F. J. Grunthaner, J. Electrochem. Soc., Vol 130, No.3 (1983) p.691" .
  • An object of the present invention is to provide a semiconductor device with a capacitor insulating film including a silicon nitride film formed by thermal nitriding.
  • Another object of the present invention is to provide a method for fabricating a semiconductor device comprising tile step of thermally nitriding the surface of a lower polysilicon electrode.
  • the semiconductor device according to tile present invention includes a capacitor insulating film composed of a silicon nitride film which is provided by thermally nitriding the surface of the lower electrode of polysilicon, and another silicon nitride film formed by the chemical vapor deposition.
  • the method for fabricating a semiconductor device includes the steps of forming a silicon nitride film by thermally nitriding the surface of a lower electrode made of polysilicon, and forming another silicon nitride film by the chemical vapor deposition.
  • the thermal nitriding is carried out preferably in a nitriding atmosphere of any of nitrogen, ammonia, hydrazine, etc.
  • the silicon nitride film formed by chemical vapor deposition contains much oxygen.
  • the silicon nitride film directly formed by thermal nitriding is stoichiometric and has a higher permittivity than the former. In equivalent thickness of an oxide film, therefore, the latter silicon nitride film actually has a larger thickness than tile former silicon nitride film.
  • the silicon nitride film formed by tile thermal nitriding is more effective in reducing a leakage current.
  • the thermal nitriding enables to removal of the native oxide film existing between tile polysilicon film and the silicon nitride film formed by tile chemical vapor deposition in the semiconductor device structure fabricated by the conventional method.
  • the capacitor insulating film according to the present invention is a film with improved reliability for dielectric breakdown.
  • FIG. 1 is a sectional view of a semiconductor device For explaining the conventional semiconductor device structure and its fabrication method
  • FIG. 2 is a sectional view of a semiconductor device for explaining a first embodiment according to the present invention
  • FIGS. 3A to 3C are sectional views of a semiconductor device for explaining main steps for tile fabricating method according to the first embodiment of the present invention
  • FIGS. 4 and 5 are graphs for explaining the effects of the first embodiment according to the present invention in comparison with the prior art.
  • FIGS. 6A and 6B are sectional views of a semiconductor device for explaining steps for the fabrication method of a second embodiment according to the present invention.
  • FIG. 2 is a sectional view of tile structure of a semiconductor device according to the first embodiment of the present invention.
  • a lower electrode 3 having a predetermined shape and made of impurity-doped polysilicon is formed on the surface of a silicon oxide film 5 on a semiconductor substrate 6.
  • a capacitor insulating film covering the lower electrode 3 is composed of a silicon nitride film 1 formed by the thermal nitriding (thermal nitridation) and another silicon nitride film 2 formed by the chemical vapor deposition.
  • the thickness of the silicon nitride film 1 is several nanometers and that of the silicon nitride film 2 is 4 nm or so.
  • An upper electrode 4 made of polysilicon is formed on tile surface of the capacitor insulating film.
  • the capacitor insulating film is composed of only the silicon nitride Film 1, it is too thin so that the silicon nitride film 2 is added to the silicon nitride film 1. It should be noted that the silicon nitride film 1 is a stoichiometric film with less weak-spots.
  • FIGS. 3A to 3C showing main process steps and FIG. 2, an explanation will be given of a method of fabricating the semiconductor device according to the present invention.
  • impurity-doped polysilicon is formed on the surface of the silicon oxide film 5 on the semiconductor substrate 6.
  • the polysilicon is then patterned into a predetermined shape to form tile lower electrode 3 (Fig. 3A).
  • fast thermal nitriding at 850° C. for 60 seconds using a rapid thermal processing equipment is done, so that the silicon nitride film i having a thickness of several nanometers is formed on the surface of the lower electrode 3 (FIG. 3B) due to the thermal nitriding.
  • another silicon nitride film 2 is deposited to a thickness of 4 nm or so, by the low pressure chemical vapor deposition, on the silicon nitride film 1 formed due to the thermal nitriding (FIG.
  • tile capacitor insulating film has a thickness of about 4.5 nm in equivalent thickness of an oxide film.
  • FIGS. 4 and 5 are graphs showing tile effects of this embodiment in comparison with tile semiconductor device including the conventional capacitor insulating film.
  • FIG. 4 shows the strength of the applied electric field versus the thickness of the capacitor insulating film in equivalent thickness of an oxide film.
  • the strength of the applied electric field represents the value corresponding to the leakage current density of 10 -8 A/cm 2 .
  • the applied electric field strength in this embodiment is higher by about 2 MV/cm than in the prior art.
  • this embodiment provides an improvement in the leakage current characteristics over the prior art.
  • FIG. 5 shows Weibull distribution plots of a cumulative failure rate P versus a stress applying time when an electric field is applied to the capacitors including the respective capacitor insulating films according to this embodiment and the prior art.
  • the capacitor according to this embodiment provides a more excellent long-term reliability than the prior art.
  • FIGS. 6A and 6B show process steps for explaining the semiconductor device according to a second embodiment of the present invention.
  • the method of fabricating the semiconductor device according to this embodiment is entirely the same as that in the first embodiment up to the step of FIG. 3C.
  • a silicon oxide film 7 is formed by the thermal oxidation method on the surface of the silicon nitride film 2 formed by the chemical vapor deposition (FIG. 6A).
  • polysilicon is deposited on the silicon oxide film 7 by the low pressure chemical vapor deposition, and doped with impurities.
  • the polysilicone is then patterned to form an upper electrode 4 (FIG. 6B).
  • tile silicon oxide film 7 is Formed by thermally oxidizing tile surface of the silicon nitride film 2 due to the chemical vapor deposition, provides a further improvement in the leakage current characteristic and long-term reliability over the first embodiment described above.
  • the semiconductor device has a capacitor insulating film including a silicon nitride film Formed due to the thermal nitriding.
  • the method for fabricating it includes the step of thermally nitriding tile surface of a lower electrode of polysilicon to provide the silicon nitride film to be used as a part of the capacitor insulating film.
  • the native oxide film on the lower electrode surface can be transformed into a silicon nitride film with reduced density of weak spots, reduced leakage current and improved long-term reliability.

Abstract

A semiconductor device has a capacitor insulating film composed of a first and a second silicon nitride film. The surface of a lower electrode of impurity-doped polysilicon is transformed into the first silicon nitride film by thermal nitriding, and thereafter the second silicon nitride film is formed by chemical vapor deposition. An upper electrode is formed on the second silicon nitride film. A silicon oxide film may be formed on the second silicon nitride film by thermal oxidation. The capacitor insulating film which has a thickness of 5 nm or less in equivalent thickness of an oxide film reduces a leakage current and improves a long-term product reliability.

Description

BACKGROUND OF THE INVENTION
(1) Field of the Invention
The present invention relates to a semiconductor device and a method for fabricating it, and more particularly to a structure of a capacitor insulating film and a method for fabricating it.
(2) Description of the Prior Art
Conventionally, as capacitor insulating films, there are used a silicon oxide film (SiO2), a silicon nitride Film (Si3 N4) and a composite film of these films (e.g., a double layered film of SiO2 /Si3 N4, film of SiO2 /Si3 N4 /SiO2). FIG. 1 shows the structure of one example of these conventional films. In FIG. 1, a lower electrode 3 having a predetermined shape and made of impurity-doped polysilicone (also called polycrystalline silicon) is formed on the surface of the silicon oxide film 5 on a semiconductor substrate 6. A silicon nitride film 2 having a thickness of about 10 nm is formed by chemical vapor deposition techniques so as to cover the surface of the lower electrode 3. Thereafter, the surface of the silicon nitride film 2 is thermally oxidized to be converted into a silicon oxide film 7 having a thickness of about 2-3 nm. Subsequently, an upper electrode 4 made of polysilicon is formed so as to cover the silicon oxide film 7. In the above structure, the capacitor insulating film is composed of the silicon nitride film 2 formed by the chemical vapor deposition and the silicon oxide film 7 formed by the thermal oxidation. The capacitor insulating film has a thickness of about 7-8 nm in equivalent thickness of an oxide film. Reference is made to "Y. Ohji et al., Proceedings of 25th Annual IEEE Reliability Physics Symposium (1987) p. "55
The conventional capacitor insulating film has the Following defects. The conventional silicon nitride film formed by the chemical vapor deposition contains many weak-spots so that a single silicon nitride film of 8 nm or less presents difficulties in its use as a stabilized capacitor insulating film with less leakage current. For this reason, a double layered SiO2 /Si3 N4 film wherein the weak spots are covered by oxidation film on tile surface of the silicon nitride film is now widely used in the current DRAMs, etc. However, this double layered film, when it has a thickness of, 5 nm or less in equivalent thickness of an oxide film, also suffers from an abrupt increase in the leakage current. Reference is made to "J. Yugami et al., Extended Abstracts on the 20th Conference on Solid State Devices and Materials (1988) p.173"
Further, the chemical vapor deposition tends to introduce oxygen into the silicon nitride film. This introduction of oxygen is remarkable particularly in the initial process where the silicon nitride film grows on the oxide film. Also where a silicon nitride film is to be grown on polysilicone from a vapor phase, it will actually grow on the native oxide film formed on the polysilicone surface. Thus, it was difficult to form a stoichiometric silicon nitride film 10 nm or less thick on polysilicon by the chemical vapor deposition techniques. Reference is made to "J. A. Wurzbach and F. J. Grunthaner, J. Electrochem. Soc., Vol 130, No.3 (1983) p.691" .
SUMMARY OF THE INVENTION
An object of the present invention is to provide a semiconductor device with a capacitor insulating film including a silicon nitride film formed by thermal nitriding.
Another object of the present invention is to provide a method for fabricating a semiconductor device comprising tile step of thermally nitriding the surface of a lower polysilicon electrode.
The semiconductor device according to tile present invention includes a capacitor insulating film composed of a silicon nitride film which is provided by thermally nitriding the surface of the lower electrode of polysilicon, and another silicon nitride film formed by the chemical vapor deposition.
The method for fabricating a semiconductor device according to the present invention includes the steps of forming a silicon nitride film by thermally nitriding the surface of a lower electrode made of polysilicon, and forming another silicon nitride film by the chemical vapor deposition. The thermal nitriding is carried out preferably in a nitriding atmosphere of any of nitrogen, ammonia, hydrazine, etc.
The silicon nitride film formed by chemical vapor deposition contains much oxygen. On the other hand, the silicon nitride film directly formed by thermal nitriding is stoichiometric and has a higher permittivity than the former. In equivalent thickness of an oxide film, therefore, the latter silicon nitride film actually has a larger thickness than tile former silicon nitride film. The silicon nitride film formed by tile thermal nitriding is more effective in reducing a leakage current.
The thermal nitriding enables to removal of the native oxide film existing between tile polysilicon film and the silicon nitride film formed by tile chemical vapor deposition in the semiconductor device structure fabricated by the conventional method. The capacitor insulating film according to the present invention is a film with improved reliability for dielectric breakdown.
BRIEF DESCRIPTION OF THE DRAWINGS
The above and other objects, features and advantages of the present invention will be apparent from the following description of preferred embodiments of the invention explained with reference to the accompanying drawings, in which:
FIG. 1 is a sectional view of a semiconductor device For explaining the conventional semiconductor device structure and its fabrication method;
FIG. 2 is a sectional view of a semiconductor device for explaining a first embodiment according to the present invention;
FIGS. 3A to 3C are sectional views of a semiconductor device for explaining main steps for tile fabricating method according to the first embodiment of the present invention;
FIGS. 4 and 5 are graphs for explaining the effects of the first embodiment according to the present invention in comparison with the prior art; and
FIGS. 6A and 6B are sectional views of a semiconductor device for explaining steps for the fabrication method of a second embodiment according to the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
Now, referring to the drawings, an explanation will be given of embodiments of tile present invention. Throughout the following explanation, similar reference symbols or numerals refer to the same or similar elements in all figures of the drawings.
FIG. 2 is a sectional view of tile structure of a semiconductor device according to the first embodiment of the present invention.
As seen from FIG. 2, a lower electrode 3 having a predetermined shape and made of impurity-doped polysilicon is formed on the surface of a silicon oxide film 5 on a semiconductor substrate 6. A capacitor insulating film covering the lower electrode 3 is composed of a silicon nitride film 1 formed by the thermal nitriding (thermal nitridation) and another silicon nitride film 2 formed by the chemical vapor deposition. The thickness of the silicon nitride film 1 is several nanometers and that of the silicon nitride film 2 is 4 nm or so. An upper electrode 4 made of polysilicon is formed on tile surface of the capacitor insulating film. If the capacitor insulating film is composed of only the silicon nitride Film 1, it is too thin so that the silicon nitride film 2 is added to the silicon nitride film 1. It should be noted that the silicon nitride film 1 is a stoichiometric film with less weak-spots.
Referring to FIGS. 3A to 3C showing main process steps and FIG. 2, an explanation will be given of a method of fabricating the semiconductor device according to the present invention.
First, impurity-doped polysilicon is formed on the surface of the silicon oxide film 5 on the semiconductor substrate 6. The polysilicon is then patterned into a predetermined shape to form tile lower electrode 3 (Fig. 3A). Secondly, fast thermal nitriding at 850° C. for 60 seconds using a rapid thermal processing equipment is done, so that the silicon nitride film i having a thickness of several nanometers is formed on the surface of the lower electrode 3 (FIG. 3B) due to the thermal nitriding. Thereafter, another silicon nitride film 2 is deposited to a thickness of 4 nm or so, by the low pressure chemical vapor deposition, on the silicon nitride film 1 formed due to the thermal nitriding (FIG. 3C). Finally, polysilicon is deposited on the resultant surface by the low pressure chemical vapor deposition, and doped with impurities. The polysilicon is patterned to form the upper electrode 4 (FIG. 2). In this embodiment, tile capacitor insulating film has a thickness of about 4.5 nm in equivalent thickness of an oxide film.
FIGS. 4 and 5 are graphs showing tile effects of this embodiment in comparison with tile semiconductor device including the conventional capacitor insulating film.
FIG. 4 shows the strength of the applied electric field versus the thickness of the capacitor insulating film in equivalent thickness of an oxide film. The strength of the applied electric field represents the value corresponding to the leakage current density of 10-8 A/cm2. As can be seen from FIG. 4, with the same film thickness in terms of an oxide film, the applied electric field strength in this embodiment is higher by about 2 MV/cm than in the prior art. Thus, this embodiment provides an improvement in the leakage current characteristics over the prior art.
FIG. 5 shows Weibull distribution plots of a cumulative failure rate P versus a stress applying time when an electric field is applied to the capacitors including the respective capacitor insulating films according to this embodiment and the prior art. As apparent from the figure, the capacitor according to this embodiment provides a more excellent long-term reliability than the prior art.
FIGS. 6A and 6B show process steps for explaining the semiconductor device according to a second embodiment of the present invention.
The method of fabricating the semiconductor device according to this embodiment is entirely the same as that in the first embodiment up to the step of FIG. 3C. Subsequently, a silicon oxide film 7 is formed by the thermal oxidation method on the surface of the silicon nitride film 2 formed by the chemical vapor deposition (FIG. 6A). Further, as in the first embodiment, finally, polysilicon is deposited on the silicon oxide film 7 by the low pressure chemical vapor deposition, and doped with impurities. The polysilicone is then patterned to form an upper electrode 4 (FIG. 6B).
This embodiment, in which tile silicon oxide film 7 is Formed by thermally oxidizing tile surface of the silicon nitride film 2 due to the chemical vapor deposition, provides a further improvement in the leakage current characteristic and long-term reliability over the first embodiment described above.
As described above, the semiconductor device according to the present invention has a capacitor insulating film including a silicon nitride film Formed due to the thermal nitriding. The method for fabricating it includes the step of thermally nitriding tile surface of a lower electrode of polysilicon to provide the silicon nitride film to be used as a part of the capacitor insulating film. Thus, the native oxide film on the lower electrode surface can be transformed into a silicon nitride film with reduced density of weak spots, reduced leakage current and improved long-term reliability.
While the invention has been described in its preferred embodiments, it is to be understood that the words which have been used are words of description rather than limitation and that changes within the purview of the appended claims may be made without departing from the true scope and spirit of the invention in its broader aspects.

Claims (7)

What is claimed is:
1. A semiconductor device comprising:
a lower electrode of impurity-doped polysilicon formed on an electrical insulating film on a semiconductor substrate;
a capacitor insulating film covering said lower electrode, said capacitor insulating film including a first silicon nitride film formed by thermal nitriding and a second silicon nitride film formed by chemical vapor deposition, said first silicon nitride film being disposed on essentially only said lower electrode and said second silicon nitride film being disposed on an entire surface of said semiconductor device; and
an upper electrode covering said capacitor insulating film.
2. A semiconductor device according to claim 1, wherein said second silicon nitride film has a thickness of approximately 4 nanometers.
3. A semiconductor device according to claim 1, wherein said first silicon nitride film has a greater thickness than that of said second silicon nitride film as measured by capacitance of an equivalent thickness of a silicon oxide film.
4. A semiconductor device according to claim 1, wherein said capacitor insulating film further includes a silicon oxide film formed on said second silicon nitride film by thermal oxidation.
5. A semiconductor device according to claim 1, wherein said upper electrode is made of polycrystalline silicon.
6. A method for fabricating a semiconductor device having a lower electrode of impurity-doped polysilicon formed on an electrical insulating film on a semiconductor substrate, a capacitor insulating film covering said lower electrode, and an upper electrode covering said capacitor insulating film, comprising the steps of:
forming a first silicon nitride film essentially only on a surface of said lower electrode by thermal nitriding of said lower electrode after forming said lower electrode at a predetermined position on a surface of said electrical insulating film, said electrical insulating film being formed on said semiconductor substrate;
forming a second silicon nitride film by chemical vapor deposition to cover an entire resultant surface after a formation of said first silicon nitride film in the previous step; and
forming said upper electrode to cover said second silicon nitride film.
7. A method for fabricating a semiconductor device according to claim 6, further comprising, after the step of forming the second silicon nitride film, tile step of forming a silicon oxide film on said second silicon nitride film by thermal oxidation.
US07/920,921 1991-07-29 1992-07-28 Semiconductor device with capacitor insulating film and method for fabricating the same Expired - Lifetime US5349494A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP3-188512 1991-07-29
JP3188512A JP2722873B2 (en) 1991-07-29 1991-07-29 Semiconductor device and manufacturing method thereof

Publications (1)

Publication Number Publication Date
US5349494A true US5349494A (en) 1994-09-20

Family

ID=16225021

Family Applications (1)

Application Number Title Priority Date Filing Date
US07/920,921 Expired - Lifetime US5349494A (en) 1991-07-29 1992-07-28 Semiconductor device with capacitor insulating film and method for fabricating the same

Country Status (5)

Country Link
US (1) US5349494A (en)
EP (2) EP0525650B1 (en)
JP (1) JP2722873B2 (en)
KR (1) KR0131448B1 (en)
DE (1) DE69232131T2 (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5508221A (en) * 1993-12-02 1996-04-16 Nec Corporation Method for forming capacitor element of DRAM
US5519323A (en) * 1992-05-15 1996-05-21 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Integrable conductivity measuring device
US5631804A (en) * 1995-11-13 1997-05-20 Micron Technology, Inc. Contact fill capacitor having a sidewall that connects the upper and lower surfaces of the dielectric and partially surrounds an insulating layer
US5691556A (en) * 1993-02-17 1997-11-25 Seiko Instruments Inc. Step-up semiconductor integrated circuit and electronic equipment using the semiconductor integrated circuit
US5753963A (en) * 1994-11-07 1998-05-19 International Busness Machines Corp. Multi-surfaced capacitor for storing more charge per horizontal chip area
US5793076A (en) * 1995-09-21 1998-08-11 Micron Technology, Inc. Scalable high dielectric constant capacitor
US5801916A (en) * 1995-11-13 1998-09-01 Micron Technology, Inc. Pre-patterned contact fill capacitor for dielectric etch protection
US5812364A (en) * 1996-07-03 1998-09-22 Mitsubishi Denki Kabushiki Kaisha Capacitor
US5843830A (en) * 1996-06-26 1998-12-01 Micron Technology, Inc. Capacitor, and methods for forming a capacitor
US5917213A (en) * 1997-08-21 1999-06-29 Micron Technology, Inc. Depletion compensated polysilicon electrodes
US6037639A (en) * 1997-06-09 2000-03-14 Micron Technology, Inc. Fabrication of integrated devices using nitrogen implantation
US6124164A (en) * 1998-09-17 2000-09-26 Micron Technology, Inc. Method of making integrated capacitor incorporating high K dielectric
US6133094A (en) * 1993-03-09 2000-10-17 Hitachi Ltd Semiconductor device and process of producing the same
US6258690B1 (en) * 1996-03-29 2001-07-10 Nec Corporation Method of manufacturing semiconductor device
US6284663B1 (en) * 1998-04-15 2001-09-04 Agere Systems Guardian Corp. Method for making field effect devices and capacitors with thin film dielectrics and resulting devices
US6373114B1 (en) 1998-10-23 2002-04-16 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US6458714B1 (en) 2000-11-22 2002-10-01 Micron Technology, Inc. Method of selective oxidation in semiconductor manufacture
US6483691B1 (en) * 1999-02-04 2002-11-19 Rohm Co., Ltd. Capacitor and method for manufacturing the same
US6614643B1 (en) * 2002-04-24 2003-09-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a capacitor element
US20030224563A1 (en) * 2001-12-28 2003-12-04 Stmicroelectronics S.R.L. Manufacturing process of a semiconductor non-volatile memory cell and corresponding memory cell
US20080170346A1 (en) * 2007-01-17 2008-07-17 Andrew Corporation Folded Surface Capacitor In-line Assembly

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5563762A (en) * 1994-11-28 1996-10-08 Northern Telecom Limited Capacitor for an integrated circuit and method of formation thereof, and a method of adding on-chip capacitors to an integrated circuit
US5711891A (en) * 1995-09-20 1998-01-27 Lucent Technologies Inc. Wafer processing using thermal nitride etch mask
KR100259038B1 (en) * 1997-03-31 2000-06-15 윤종용 Method for manufacturing semiconductor capacitor and semiconductor capacitor manufactured thereby
KR100745495B1 (en) 1999-03-10 2007-08-03 동경 엘렉트론 주식회사 Semiconductor fabrication method and semiconductor fabrication equipment

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143393A (en) * 1977-06-21 1979-03-06 International Business Machines Corporation High field capacitor structure employing a carrier trapping region
US4746630A (en) * 1986-09-17 1988-05-24 Hewlett-Packard Company Method for producing recessed field oxide with improved sidewall characteristics
US4882649A (en) * 1988-03-29 1989-11-21 Texas Instruments Incorporated Nitride/oxide/nitride capacitor dielectric
US4980307A (en) * 1978-06-14 1990-12-25 Fujitsu Limited Process for producing a semiconductor device having a silicon oxynitride insulative film
US4990463A (en) * 1988-07-05 1991-02-05 Kabushiki Kaisha Toshiba Method of manufacturing capacitor
US5049975A (en) * 1989-03-14 1991-09-17 Mitsubishi Denki Kabushiki Kaisha Multi-layered interconnection structure for a semiconductor device
US5091761A (en) * 1988-08-22 1992-02-25 Hitachi, Ltd. Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4789560A (en) * 1986-01-08 1988-12-06 Advanced Micro Devices, Inc. Diffusion stop method for forming silicon oxide during the fabrication of IC devices
JP2564316B2 (en) * 1987-08-10 1996-12-18 株式会社日立製作所 Semiconductor device and manufacturing method thereof

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143393A (en) * 1977-06-21 1979-03-06 International Business Machines Corporation High field capacitor structure employing a carrier trapping region
US4980307A (en) * 1978-06-14 1990-12-25 Fujitsu Limited Process for producing a semiconductor device having a silicon oxynitride insulative film
US4746630A (en) * 1986-09-17 1988-05-24 Hewlett-Packard Company Method for producing recessed field oxide with improved sidewall characteristics
US4882649A (en) * 1988-03-29 1989-11-21 Texas Instruments Incorporated Nitride/oxide/nitride capacitor dielectric
US4990463A (en) * 1988-07-05 1991-02-05 Kabushiki Kaisha Toshiba Method of manufacturing capacitor
US5091761A (en) * 1988-08-22 1992-02-25 Hitachi, Ltd. Semiconductor device having an arrangement of IGFETs and capacitors stacked thereover
US5049975A (en) * 1989-03-14 1991-09-17 Mitsubishi Denki Kabushiki Kaisha Multi-layered interconnection structure for a semiconductor device

Non-Patent Citations (7)

* Cited by examiner, † Cited by third party
Title
Compositional Depth Profile of a Native Oxide LPCVD MNOS Structure Using X Ray Photoelectron Spectroscopy and Chemical Etching, J. Electrochem Soc.; Solid State Science and Technology, Vol. 130, No. 3 (1983), pp. 691 699, by Wurzbach, et al. *
Compositional Depth Profile of a Native Oxide LPCVD MNOS Structure Using X-Ray Photoelectron Spectroscopy and Chemical Etching, J. Electrochem Soc.; Solid-State Science and Technology, Vol. 130, No. 3 (1983), pp. 691-699, by Wurzbach, et al.
European Search Report for Application No. EP 92112613 and annex thereto. *
Inter Poly SiO 2 /Si 3 N 4 Capacitor Films 5 nm Thick for Deep Submicron LSIs, Extended Abstracts of the 20th (1988 International) Conference on Solid State Devices and Materials (1988), pp. 173 176, by J. Yugami, et al. *
Inter-Poly SiO2 /Si3 N4 Capacitor Films 5 nm Thick for Deep Submicron LSIs, Extended Abstracts of the 20th (1988 International) Conference on Solid State Devices and Materials (1988), pp. 173-176, by J. Yugami, et al.
Relibility of Nano Meter Thick Multi Layer Dielectric Films on Poly Crystalline Silicon, Proceedings of 25th Annual IEEE Reliability Physics Symposium (1987), pp. 55 59, by Y. Ohji, et al. *
Relibility of Nano-Meter Thick Multi-Layer Dielectric Films on Poly-Crystalline Silicon, Proceedings of 25th Annual IEEE Reliability Physics Symposium (1987), pp. 55-59, by Y. Ohji, et al.

Cited By (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5519323A (en) * 1992-05-15 1996-05-21 Fraunhofer-Gesellschaft Zur Forderung Der Angewandten Forschung E.V. Integrable conductivity measuring device
US5691556A (en) * 1993-02-17 1997-11-25 Seiko Instruments Inc. Step-up semiconductor integrated circuit and electronic equipment using the semiconductor integrated circuit
US7238582B2 (en) 1993-03-09 2007-07-03 Hitachi, Ltd. Semiconductor device and process of producing the same
US20050101097A1 (en) * 1993-03-09 2005-05-12 Hiromi Shimamoto Semiconductor device and process of producing the same
US6835632B2 (en) 1993-03-09 2004-12-28 Hitachi, Ltd. Semiconductor device and process of producing the same
US6610569B1 (en) 1993-03-09 2003-08-26 Hitachi, Ltd. Semiconductor device and process of producing the same
US6524924B1 (en) 1993-03-09 2003-02-25 Hitachi, Ltd. Semiconductor device and process of producing the same
US6133094A (en) * 1993-03-09 2000-10-17 Hitachi Ltd Semiconductor device and process of producing the same
US5508221A (en) * 1993-12-02 1996-04-16 Nec Corporation Method for forming capacitor element of DRAM
US5753963A (en) * 1994-11-07 1998-05-19 International Busness Machines Corp. Multi-surfaced capacitor for storing more charge per horizontal chip area
US5940676A (en) * 1995-09-21 1999-08-17 Micron Technology, Inc. Scalable high dielectric constant capacitor
US5793076A (en) * 1995-09-21 1998-08-11 Micron Technology, Inc. Scalable high dielectric constant capacitor
US6165804A (en) * 1995-09-21 2000-12-26 Micron Technology, Inc. Scalable high dielectric constant capacitor
US6259125B1 (en) 1995-09-21 2001-07-10 Micron Technology, Inc. Scalable high dielectric constant capacitor
US5985676A (en) * 1995-11-13 1999-11-16 Micron Technology, Inc. Method of forming capacitor while protecting dielectric from etchants
US5631804A (en) * 1995-11-13 1997-05-20 Micron Technology, Inc. Contact fill capacitor having a sidewall that connects the upper and lower surfaces of the dielectric and partially surrounds an insulating layer
US6133108A (en) * 1995-11-13 2000-10-17 Micron Technology, Inc. Dielectric etch protection using a pre-patterned via-fill capacitor
US5801916A (en) * 1995-11-13 1998-09-01 Micron Technology, Inc. Pre-patterned contact fill capacitor for dielectric etch protection
US6331442B1 (en) 1995-11-13 2001-12-18 Micron Technology, Inc. Pre-patterned contact fill capacitor for dielectric etch protection
US6258690B1 (en) * 1996-03-29 2001-07-10 Nec Corporation Method of manufacturing semiconductor device
US5844771A (en) * 1996-06-26 1998-12-01 Micron Technology, Inc. Capacitor construction
US6171925B1 (en) 1996-06-26 2001-01-09 Micron Technology, Inc. Capacitor, and methods for forming a capacitor
US5843830A (en) * 1996-06-26 1998-12-01 Micron Technology, Inc. Capacitor, and methods for forming a capacitor
US5812364A (en) * 1996-07-03 1998-09-22 Mitsubishi Denki Kabushiki Kaisha Capacitor
US7071067B1 (en) 1997-06-09 2006-07-04 Micron Technology, Inc. Fabrication of integrated devices using nitrogen implantation
US6037639A (en) * 1997-06-09 2000-03-14 Micron Technology, Inc. Fabrication of integrated devices using nitrogen implantation
US6180449B1 (en) 1997-08-21 2001-01-30 Micron Technology, Inc. Depletion compensated polysilicon electrodes
US6333536B1 (en) 1997-08-21 2001-12-25 Micron Technology, Inc. Depletion compensated polysilicon electrodes
US5917213A (en) * 1997-08-21 1999-06-29 Micron Technology, Inc. Depletion compensated polysilicon electrodes
US6506645B2 (en) 1997-08-21 2003-01-14 Micron Technology, Inc. Depletion compensated polysilicon electrodes
US6284663B1 (en) * 1998-04-15 2001-09-04 Agere Systems Guardian Corp. Method for making field effect devices and capacitors with thin film dielectrics and resulting devices
US6351005B1 (en) 1998-09-17 2002-02-26 Micron Technology, Inc. Integrated capacitor incorporating high K dielectric
US6124164A (en) * 1998-09-17 2000-09-26 Micron Technology, Inc. Method of making integrated capacitor incorporating high K dielectric
US20030139061A1 (en) * 1998-10-23 2003-07-24 Nanseng Jeng Barrier in gate stack for improved gate dielectric integrity
US6562730B2 (en) 1998-10-23 2003-05-13 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US6373114B1 (en) 1998-10-23 2002-04-16 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US6770571B2 (en) 1998-10-23 2004-08-03 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US6930363B2 (en) 1998-10-23 2005-08-16 Micron Technology, Inc. Barrier in gate stack for improved gate dielectric integrity
US20050017312A1 (en) * 1998-10-23 2005-01-27 Nanseng Jeng Barrier in gate stack for improved gate dielectric integrity
US6483691B1 (en) * 1999-02-04 2002-11-19 Rohm Co., Ltd. Capacitor and method for manufacturing the same
US6458714B1 (en) 2000-11-22 2002-10-01 Micron Technology, Inc. Method of selective oxidation in semiconductor manufacture
US20030224563A1 (en) * 2001-12-28 2003-12-04 Stmicroelectronics S.R.L. Manufacturing process of a semiconductor non-volatile memory cell and corresponding memory cell
US7262098B2 (en) * 2001-12-28 2007-08-28 Stmicroelectronics S.R.L. Manufacturing process of a semiconductor non-volatile memory cell
US6614643B1 (en) * 2002-04-24 2003-09-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a capacitor element
US20080170346A1 (en) * 2007-01-17 2008-07-17 Andrew Corporation Folded Surface Capacitor In-line Assembly
US8174132B2 (en) 2007-01-17 2012-05-08 Andrew Llc Folded surface capacitor in-line assembly

Also Published As

Publication number Publication date
JP2722873B2 (en) 1998-03-09
DE69232131T2 (en) 2002-07-11
EP0525650A3 (en) 1993-04-07
KR0131448B1 (en) 1998-04-15
DE69232131D1 (en) 2001-11-22
EP0525650A2 (en) 1993-02-03
EP0525650B1 (en) 2001-10-17
KR940002375A (en) 1994-02-17
EP1143490A1 (en) 2001-10-10
JPH0536899A (en) 1993-02-12

Similar Documents

Publication Publication Date Title
US5349494A (en) Semiconductor device with capacitor insulating film and method for fabricating the same
US4464701A (en) Process for making high dielectric constant nitride based materials and devices using the same
US4996081A (en) Method of forming multiple nitride coating on silicon
US5780115A (en) Methods for fabricating electrode structures including oxygen and nitrogen plasma treatments
US7489000B2 (en) Capacitor structures with oxynitride layer between capacitor plate and capacitor dielectric layer
US4432035A (en) Method of making high dielectric constant insulators and capacitors using same
US4874716A (en) Process for fabricating integrated circuit structure with extremely smooth polysilicone dielectric interface
US20020197790A1 (en) Method of making a compound, high-K, gate and capacitor insulator layer
US6734068B2 (en) Method to form silicates as high dielectric constant materials
US4603059A (en) Method of manufacturing MIS capacitors for semiconductor IC devices
US6235594B1 (en) Methods of fabricating an integrated circuit device with composite oxide dielectric
JPH11233723A (en) Electronic element and its manufacture, and dielectric capacitor and its manufacture, and optical element and its manufacture
US5013692A (en) Process for preparing a silicon nitride insulating film for semiconductor memory device
EP0851473A2 (en) Method of making a layer with high dielectric K, gate and capacitor insulator layer and device
US6548854B1 (en) Compound, high-K, gate and capacitor insulator layer
US5470611A (en) Method for forming an oxide film of a semiconductor
EP0154670B1 (en) Process for producing a semiconductor device having insulating film
US6323114B1 (en) Stacked/composite gate dielectric which incorporates nitrogen at an interface
EP0418468B1 (en) Method for producing an ultra-thin dielectric for microelectronics applications
US4840917A (en) Method of interface state reduction in MNOS capacitors
US20010013616A1 (en) Integrated circuit device with composite oxide dielectric
JPH0561783B2 (en)
JPS5984570A (en) Manufacture of capacitor for semiconductor device
JP2612098B2 (en) Manufacturing method of insulating film
JPH0680738B2 (en) Method for manufacturing semiconductor device

Legal Events

Date Code Title Description
AS Assignment

Owner name: NEC CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:ANDO, KOICHI;REEL/FRAME:006214/0300

Effective date: 19920710

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STCF Information on status: patent grant

Free format text: PATENTED CASE

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

AS Assignment

Owner name: NEC ELECTRONICS CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:NEC CORPORATION;REEL/FRAME:013758/0440

Effective date: 20021101

FPAY Fee payment

Year of fee payment: 12

AS Assignment

Owner name: RENESAS ELECTRONICS CORPORATION, JAPAN

Free format text: CHANGE OF NAME;ASSIGNOR:NEC ELECTRONICS CORPORATION;REEL/FRAME:025148/0001

Effective date: 20100401