US5408251A - Memory system for storing two-dimensional digitized image signals - Google Patents
Memory system for storing two-dimensional digitized image signals Download PDFInfo
- Publication number
- US5408251A US5408251A US08/146,425 US14642593A US5408251A US 5408251 A US5408251 A US 5408251A US 14642593 A US14642593 A US 14642593A US 5408251 A US5408251 A US 5408251A
- Authority
- US
- United States
- Prior art keywords
- address
- region
- bits
- storage locations
- storing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/24—Systems for the transmission of television signals using pulse code modulation
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/12—Frame memory handling
Abstract
Description
(2.sup.M +X)×(2.sup.N +Y)=2.sup.M+N +2.sup.M Y+X2.sup.N +XY(1)
(2.sup.M +X)×(2.sup.N +Y)≦2.sup.M+N +2.sup.M+N-1 +2.sup.N+N-2 +2.sup.M+N-3 (2)
Claims (3)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920020081A KR950005650B1 (en) | 1992-10-29 | 1992-10-29 | Address converting method and apparatus |
KR92-20081 | 1992-10-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
US5408251A true US5408251A (en) | 1995-04-18 |
Family
ID=19342038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/146,425 Expired - Lifetime US5408251A (en) | 1992-10-29 | 1993-10-29 | Memory system for storing two-dimensional digitized image signals |
Country Status (3)
Country | Link |
---|---|
US (1) | US5408251A (en) |
JP (1) | JP2677954B2 (en) |
KR (1) | KR950005650B1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5596376A (en) * | 1995-02-16 | 1997-01-21 | C-Cube Microsystems, Inc. | Structure and method for a multistandard video encoder including an addressing scheme supporting two banks of memory |
US5886705A (en) * | 1996-05-17 | 1999-03-23 | Seiko Epson Corporation | Texture memory organization based on data locality |
USRE41967E1 (en) | 2002-02-22 | 2010-11-30 | Takatoshi Ishii | Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3974493A (en) * | 1974-04-29 | 1976-08-10 | Vydec, Inc. | Cursor find system for the display of a word processing system |
US4249172A (en) * | 1979-09-04 | 1981-02-03 | Honeywell Information Systems Inc. | Row address linking control system for video display terminal |
US4404554A (en) * | 1980-10-06 | 1983-09-13 | Standard Microsystems Corp. | Video address generator and timer for creating a flexible CRT display |
US4617564A (en) * | 1983-02-24 | 1986-10-14 | International Business Machines Corporation | Graphic display system with display line scan based other than power of 2 refresh memory based on power of 2 |
US4618858A (en) * | 1982-11-03 | 1986-10-21 | Ferranti Plc | Information display system having a multiple cell raster scan display |
US4790025A (en) * | 1984-12-07 | 1988-12-06 | Dainippon Screen Mfg. Co., Ltd. | Processing method of image data and system therefor |
US5095422A (en) * | 1986-03-27 | 1992-03-10 | Nec Corporation | Information transferring method and apparatus for transferring information from one memory area to another memory area |
-
1992
- 1992-10-29 KR KR1019920020081A patent/KR950005650B1/en not_active IP Right Cessation
-
1993
- 1993-10-29 US US08/146,425 patent/US5408251A/en not_active Expired - Lifetime
- 1993-10-29 JP JP5272667A patent/JP2677954B2/en not_active Expired - Lifetime
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3974493A (en) * | 1974-04-29 | 1976-08-10 | Vydec, Inc. | Cursor find system for the display of a word processing system |
US4249172A (en) * | 1979-09-04 | 1981-02-03 | Honeywell Information Systems Inc. | Row address linking control system for video display terminal |
US4404554A (en) * | 1980-10-06 | 1983-09-13 | Standard Microsystems Corp. | Video address generator and timer for creating a flexible CRT display |
US4618858A (en) * | 1982-11-03 | 1986-10-21 | Ferranti Plc | Information display system having a multiple cell raster scan display |
US4617564A (en) * | 1983-02-24 | 1986-10-14 | International Business Machines Corporation | Graphic display system with display line scan based other than power of 2 refresh memory based on power of 2 |
US4790025A (en) * | 1984-12-07 | 1988-12-06 | Dainippon Screen Mfg. Co., Ltd. | Processing method of image data and system therefor |
US5095422A (en) * | 1986-03-27 | 1992-03-10 | Nec Corporation | Information transferring method and apparatus for transferring information from one memory area to another memory area |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5596376A (en) * | 1995-02-16 | 1997-01-21 | C-Cube Microsystems, Inc. | Structure and method for a multistandard video encoder including an addressing scheme supporting two banks of memory |
US5604540A (en) * | 1995-02-16 | 1997-02-18 | C-Cube Microsystems, Inc. | Structure and method for a multistandard video encoder |
US5900865A (en) * | 1995-02-16 | 1999-05-04 | C-Cube Microsystems, Inc. | Method and circuit for fetching a 2-D reference picture area from an external memory |
US5886705A (en) * | 1996-05-17 | 1999-03-23 | Seiko Epson Corporation | Texture memory organization based on data locality |
USRE41967E1 (en) | 2002-02-22 | 2010-11-30 | Takatoshi Ishii | Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator |
USRE43235E1 (en) | 2002-02-22 | 2012-03-13 | Faust Communications, Llc | Single-block virtual frame buffer translated to multiple physical blocks for multi-block display refresh generator |
Also Published As
Publication number | Publication date |
---|---|
KR940010796A (en) | 1994-05-26 |
JP2677954B2 (en) | 1997-11-17 |
KR950005650B1 (en) | 1995-05-27 |
JPH06208615A (en) | 1994-07-26 |
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Legal Events
Date | Code | Title | Description |
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AS | Assignment |
Owner name: DAEWOO ELECTRONICS CO., LTD., KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KWON, OH-SANG;REEL/FRAME:006992/0088 Effective date: 19931020 |
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Free format text: PATENTED CASE |
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Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
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FPAY | Fee payment |
Year of fee payment: 4 |
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Year of fee payment: 8 |
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AS | Assignment |
Owner name: DAEWOO ELECTRONICS CORPORATION, KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:DAEWOO ELECTRONICS CO., LTD.;REEL/FRAME:013645/0159 Effective date: 20021231 |
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FPAY | Fee payment |
Year of fee payment: 12 |
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Owner name: MAPLE VISION TECHNOLOGIES INC., CANADA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:DAEWOO ELECTRONICS CORPORATION;REEL/FRAME:027437/0345 Effective date: 20111215 |
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AS | Assignment |
Owner name: QUARTERHILL INC., CANADA Free format text: MERGER AND CHANGE OF NAME;ASSIGNORS:MAPLE VISION TECHNOLOGIES INC.;QUARTERHILL INC.;REEL/FRAME:042936/0464 Effective date: 20170601 |
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AS | Assignment |
Owner name: WI-LAN INC., CANADA Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:QUARTERHILL INC.;REEL/FRAME:043181/0001 Effective date: 20170601 |