US5543822A - Method for increasing the video throughput in computer systems - Google Patents
Method for increasing the video throughput in computer systems Download PDFInfo
- Publication number
- US5543822A US5543822A US08/069,139 US6913993A US5543822A US 5543822 A US5543822 A US 5543822A US 6913993 A US6913993 A US 6913993A US 5543822 A US5543822 A US 5543822A
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- 238000000034 method Methods 0.000 title claims abstract description 27
- 238000012986 modification Methods 0.000 claims description 8
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- 239000003086 colorant Substances 0.000 claims description 5
- 238000003491 array Methods 0.000 claims description 3
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- 230000000977 initiatory effect Effects 0.000 claims 1
- 230000000737 periodic effect Effects 0.000 claims 1
- 238000006467 substitution reaction Methods 0.000 claims 1
- 238000012545 processing Methods 0.000 description 6
- 238000013459 approach Methods 0.000 description 5
- 238000013461 design Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
Definitions
- the present invention relates to personal computer systems, and graphics and engineering microprocessor-based workstations.
- the invention more particularly relates to a software-based method for increasing the efficiency of memory mapped video sub-systems, as may be utilized in such computer systems and workstations.
- the ability to display graphical images is provided by an adapter or interface card that is connected to the system's central processing unit (CPU) through an I/O bus.
- the bus serves as the conduit for data into and out of the CPU. Due to limitations in the operational properties of the CPU, the CPU can only directly drive a small number of devices at the same speed as the CPU. Since most I/O operations are substantially slower than the CPU's speed, the I/O bus is generally designed to operate at a lower speed than the CPU. The design speed is further slower than the operational speed for system random access memory (RAM). In today's high-speed machine, CPU speeds of 50 MHz are not uncommon. The video busses, however, typically run at 8 or 16 MHz, substantially slower than that of a fast CPU.
- the prevailing methods include co-processing--a method for allowing the CPU to off-load the graphic to a separate processor which is given high-level commands by the system processor and which is then employed to do the bulk processing of the image; and direct memory access (DMA)--a method for allowing the CPU to copy data to the video RAM in a manner that does not require direct CPU supervision.
- VESA Video Electronics Standards Association
- VL bus standard high speed I/O bus design
- VL bus approach although effective for most operations, increases the drain on the CPU, thus increasing the operating temperature of the system and reducing its reliability.
- the VL bus approach also frequently introduces CPU wait states, which reduce overall system performance.
- a further, and most significant drawback, of the VL bus is that it requires a completely new system and is thus incompatible with some 96 million PCs in use at the present time.
- DOS disc operating systems
- FIG. 1 is a block diagram of conventional video display methodology
- FIG. 2 is a block diagram of the methodology employed in the present invention.
- FIG. 3 is a block diagram of the elements of a personal computer system with which the present invention is employed.
- the invention replaces or intercepts the standard video interface between the computer's operating system and the graphical display device.
- Standard system memory is used to perform the drawing operations, upon a stored image of the display device, which is maintained in system memory in an optimal configuration.
- the video interface is utilized to update the screen on an intermittent basis, and preferably after sufficient modification to the graphic display has occurred to warrant update.
- the speed bottleneck of the interface is significantly decreased.
- the form in which the graphical data is maintained in system memory is optimized for fast response.
- the operating system 10 of a conventional personal computer system utilizes a display driver 12 which communicates with the computer operating system 10 to generate the needed information for the display of video data on an appropriate display device such as a CRT.
- the display driver 12 further communicates with a graphics layer 14 and the application program 16 in preparing and arranging the data for transfer to the video subsystem 18 which includes display memory in which the video data is assembled into a bitmap of the screen.
- the I/O bus 20 which is utilized between the display driver and the video subsystem is of low speed, typically a small fraction of the speed of the central processing unit of the operation system. This requires the CPU to periodically wait for the bus to "catch up" with the amount of video data made available to it for the display memory by the processing speed of the CPU.
- the present invention provides for communication between the operating system 10 with the display driver 12 through video control software 22, which utilizes a portion of system RAM 24 as an optimized bitmap of the display, utilizing otherwise idle time of the CPU to perform the necessary procedures at high speed.
- video control software 22 utilizes a portion of system RAM 24 as an optimized bitmap of the display, utilizing otherwise idle time of the CPU to perform the necessary procedures at high speed.
- This allows the Ram bitmap to be created and updated substantially faster than the rate available to the conventional display RAM memory for such data passed through the low bandwidth I/O bus to the video subsystem.
- the software 22 communicates with the graphics layer and application program 16 in place of the display driver 12, which is updated asynchronously as required to maintain proper video operation. As shown in FIG.
- the video control software of the present invention allows RAM, which is coupled to the CPU by a high-speed bus, to be operated at the speed of CPU 24, to assemble and maintain an optimized video bitmap without the necessity of continuous data passage through the I/O bus.
- the updates of the video system's memory are performed asynchronously, on an as-required basis, the passage of video data through the I/O bus, and allowing such passage to be conducted efficiently only lessening when needed, resulting in a significant overall boosting of the response speed of the video monitor.
- the present invention contemplates the incorporation of a video data processing methodology which is optimized for the computer system in which the invention is implemented.
- the optimal configuration is dictated by machine architecture. A determination must be made as to what method of accessing main memory allows the maximum number of picture or image elements (pixels) to be drawn with a single machine instruction.
- the method used to determine the optimal configuration involves comparing the number of CPU clock pulses (i.e. time) and instructions required to modify a single pixel configured in an image memory map organized in each of the following ways:
- a bitmap composed of consecutive arrays of planes where each plane contains packed pixel data at one pixel per bit.
- the number of planes is equal to the base 2 logarithm of the number of display colors of the video system.
- a "monochromatic" video system has two colors (e.g. black and white).
- a "bit” is a single binary position.
- a bitmap in which a bit represents a pixel requires a number of "planes” equal to the number of colors available, each pixel bit denoting the presence or absence of that color at that pixel position;
- a bitmap composed of planes where adjacent words contain adjacent planes. Since "words" are strings of bits, a word can embody a greater amount of data than a bit.
- the words may be configured and arranged such that a word carries multiple color information for a pixel.
- the words are arranged in a pixel by pixel orientation in the bitmap;
- the bytes are arrayed in a pixel by pixel orientation;
- each data .word represents a single color coded pixel (65,536 colors).
- full-color (64 k color) systems the words are of sufficient length to provide full color data for a single pixel. Again, the words are arrayed in a pixel-by-pixel orientation; and
- a multi-part bitmap in which one part contains one or more bitmaps for single color access to the pixels and the other is comprised of one of the previous multi-color bitmaps. This structure has value when both monochrome and multi-color video presentations are utilized.
- the totality of the data planes fully describe the appearance of the display screen at any time.
- the data content of the planes must constantly be refreshed to maintain an up-to-date representation of the data to be displayed.
- the instruction timing for modifying a single pixel in an array and the instruction time for multi-pixel modification are determined and combined to provide a weighted total figure of merit.
- the instruction for multi-pixel operation is typically given a weighting factor of 5 (or more) in importance.
- Our studies have shown that multi-pixel instructions are used about 5 times more often than single-pixel instructions; so the weighting applied reflects this ratio of use.
- the total time required by the instructions required to compute a starting pixel location is computed for single and multi-pixel access. These values are then compared against the same values determined for direct access to the video adapter.
- the bitmap scheme giving the highest ratio, representing the greatest improvement over direct access, should be used as the format for the RAM interface buffer created.
- the bitmap is developed in RAM and all video operations are directed to it.
- the actual video display is then updated by determining what portions of the developed bitmap have been modified (the method for the determination is discussed below) followed by either use of a conventional display driver to update the display memory, or by directly modifying the display memory.
- Such direct modification can be performed at regular, preferably user-settable, intervals (since the user may have more or less tolerance for sudden changes to large portions of video memory); when there is keyboard or mouse activity; and/or when the system has ceased display activity for a given period of time.
- a display device driver In a Microsoft Windows or similar operating environment a display device driver is configured which behaves like a completely functional display device driver. Rather than modifying the display hardware, though, this device driver creates the memory based bitmap and loads the existing display device driver as a Windows DLL (Dynamic Link Library) to itself. All graphics calls are thus received by the new device driver, and the video environment appears as being organized in the "optimal configuration" chosen in accordance herewith.
- This device driver is a software instruction set, able to be programmed by one skilled in the art, and is substituted for the existing driver in the system's System.INI file.
- the Windows GetProAddress routine By use of the Windows GetProAddress routine, the entry points to the existing driver's drawing and initialization routines can be determined. These entry points are then used by the new driver to access the original driver as required, such as during video update.
- Video operations performed by the graphics display interface are stored in the bitmap, and updates to the screen memory are performed asychronously at intervals and on the occasion of certain events as detailed below.
- the screen memory may be either modified by the new device driver, or in the case of non-standard display environments, the new driver can call the old driver since it is a DLL of the new driver.
- an identification and analysis of each individual pixel should be performed so that only those reflecting a change would be modified in the corresponding display memory.
- the overhead involved in making such a determination is, however, greater than the optimization it provides.
- the present invention uses one of two alternative methods, and in some cases both.
- the first method involves using memory access hardware of the CPU.
- the CPU is the 80386, which provides memory access information in hardware on a 4 k granular basis automatically. This information is used to determine what part of the bitmap has been modified and to make corresponding modifications to the video memory. This degree of "fineness" is generally sufficient.
- a second approach is also advisable and may be used to enhance the performance and the appearance of the screen updates.
- the 4 k access map provided by the CPU is linear (i.e., horizontal rather than vertical across the screen image).
- a narrow but vertically long object is drawn, such as a vertical line, the access may indicate that a substantial number of regions have undergone "modification", even though actually only a small portion of the overall bitmap has been modified.
- Such an access map configuration can be optimized or even completely replaced by maintaining a representation of what we term a "modified rectangle". This is a value containing the lowest and highest x and y (horizontal and vertical) location values that have been modified since the last video update, and provides a more accurate indication of the screen area which has undergone change.
- This modified rectangle can be maintained with low overhead by a simple comparison of a drawing region at the start and/or end of each drawing operation for a region with the existing modified rectangle (which at first is nonexistent, i.e. 0, 0, 0, 0) and resetting new values as required.
- increases to the drawing area are recorded and reset when a redraw occurs.
- This procedure provides sufficient information so that the CPU access map need not be used, or can be used in an "intersect" fashion, allowing the video update of only that region of the video memory that represents the overlap of the 4 k linear regions provided by the CPU and the video area defined by modified rectangle coordinates.
Abstract
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US08/069,139 US5543822A (en) | 1993-05-28 | 1993-05-28 | Method for increasing the video throughput in computer systems |
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US08/069,139 US5543822A (en) | 1993-05-28 | 1993-05-28 | Method for increasing the video throughput in computer systems |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5875474A (en) * | 1995-11-14 | 1999-02-23 | Helix Software Co. | Method for caching virtual memory paging and disk input/output requests using off screen video memory |
US6321293B1 (en) | 1995-11-14 | 2001-11-20 | Networks Associates, Inc. | Method for caching virtual memory paging and disk input/output requests |
US6779181B1 (en) * | 1999-07-10 | 2004-08-17 | Samsung Electronics Co., Ltd. | Micro-scheduling method and operating system kernel |
US20040210911A1 (en) * | 1998-10-08 | 2004-10-21 | Bodin William Kress | Generic virtual device driver |
US20070139450A1 (en) * | 2003-10-29 | 2007-06-21 | Koninkijkle Phillips Electronics N.V. | Method and apparatus for rendering smooth teletext graphics |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4656596A (en) * | 1984-07-23 | 1987-04-07 | Texas Instruments Incorporated | Video memory controller |
US4777486A (en) * | 1986-05-09 | 1988-10-11 | A-Squared Systems | Video signal receiver for computer graphics system |
US4803476A (en) * | 1986-10-24 | 1989-02-07 | Visual Technology Incorporated | Video terminal for use in graphics and alphanumeric applications |
US5103499A (en) * | 1986-07-18 | 1992-04-07 | Commodore-Amiga, Inc. | Beam synchronized coprocessor |
US5250940A (en) * | 1991-01-18 | 1993-10-05 | National Semiconductor Corporation | Multi-mode home terminal system that utilizes a single embedded general purpose/DSP processor and a single random access memory |
US5335322A (en) * | 1992-03-31 | 1994-08-02 | Vlsi Technology, Inc. | Computer display system using system memory in place or dedicated display memory and method therefor |
US8361387B2 (en) * | 2008-11-28 | 2013-01-29 | Roche Diagnostics Operations, Inc. | System and method for the processing of liquid samples |
-
1993
- 1993-05-28 US US08/069,139 patent/US5543822A/en not_active Expired - Lifetime
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4656596A (en) * | 1984-07-23 | 1987-04-07 | Texas Instruments Incorporated | Video memory controller |
US4777486A (en) * | 1986-05-09 | 1988-10-11 | A-Squared Systems | Video signal receiver for computer graphics system |
US5103499A (en) * | 1986-07-18 | 1992-04-07 | Commodore-Amiga, Inc. | Beam synchronized coprocessor |
US4803476A (en) * | 1986-10-24 | 1989-02-07 | Visual Technology Incorporated | Video terminal for use in graphics and alphanumeric applications |
US5250940A (en) * | 1991-01-18 | 1993-10-05 | National Semiconductor Corporation | Multi-mode home terminal system that utilizes a single embedded general purpose/DSP processor and a single random access memory |
US5335322A (en) * | 1992-03-31 | 1994-08-02 | Vlsi Technology, Inc. | Computer display system using system memory in place or dedicated display memory and method therefor |
US8361387B2 (en) * | 2008-11-28 | 2013-01-29 | Roche Diagnostics Operations, Inc. | System and method for the processing of liquid samples |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5875474A (en) * | 1995-11-14 | 1999-02-23 | Helix Software Co. | Method for caching virtual memory paging and disk input/output requests using off screen video memory |
US6321293B1 (en) | 1995-11-14 | 2001-11-20 | Networks Associates, Inc. | Method for caching virtual memory paging and disk input/output requests |
US20040210911A1 (en) * | 1998-10-08 | 2004-10-21 | Bodin William Kress | Generic virtual device driver |
US7269832B2 (en) * | 1998-10-08 | 2007-09-11 | International Business Machines Corporation | Generic virtual device driver |
US6779181B1 (en) * | 1999-07-10 | 2004-08-17 | Samsung Electronics Co., Ltd. | Micro-scheduling method and operating system kernel |
US20070139450A1 (en) * | 2003-10-29 | 2007-06-21 | Koninkijkle Phillips Electronics N.V. | Method and apparatus for rendering smooth teletext graphics |
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