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A thin film transistor of reversed stagger type having improved characteristics and yet obtained by a simple process, which is fabricated by selectively doping the semiconductor region on the gate dielectric to form the source, drain, and channel forming regions by using ion implantation, ion doping, or doping a plasma of ions; and then effecting rapid thermal annealing by irradiating a ultraviolet radiation, a visible light, or a near-infrared radiation for a short period of time. The source, drain, and channel forming regions are formed substantially within a single plane.

InventeurYasuhiko Takemura
Cessionnaire d'origineSemiconductor Energy Laboratory Co., Ltd.
Classification américaine actuelle438/158; 438/166
Classification internationale: H01L 2184

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Citations

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Revendications

1. A method for manufacturing an insulated gate semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film on said gate electrode;
forming an amorphous semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound on said amorphous semiconductor film;
introducing a dopant impurity into selected portions of said amorphous semiconductor film using said mask;
removing the photoresist film after the introduction of the dopant impurity
activating said selected portions of said amorphous semiconductor film by lamp annealing wherein said silicon compound film remains on said amorphous semiconductor film during the lamp annealing; and
forming at least on electrode in contact with one of said selected portions of the amorphous semiconductor film after the lamp annealing wherein said silicon compound film remains on said amorphous semiconductor film.

2. The method of claim 1 further comprising a step of heating said amorphous semiconductor film to a first temperature prior to the lamp annealing whereby temperature of said amorphous semiconductor film is raised from said first temperature to a second temperature higher than said first temperature.

3. The method of claim 2 wherein said first temperature is from 200 to 500.degree. C.

4. The method of claim 1 wherein said lamp annealing is carried out with a light having a wavelength of 0.5 to 4 .mu.m.

5. A method according to claim 24 wherein said lamp annealing utilizes a tungsten-halogen lamp.

6. A method for fabricating an insulated gate semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film on said gate electrode;
forming a polycrystalline semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said polycrystalline semiconductor film;
introducing a dopant impurity into selected portions of said polycrystalline semiconductor film;
removing the photoresist film after the introduction of the dopant impurity;
activating said selected portions of said polycrystalline semiconductor film by lamp annealing wherein said silicon compound film remains on said polycrystalline semiconductor film during the lamp annealing; and
forming at least one electrode in contact with one of said selected portions of the polycrystalline semiconductor film after lamp annealing wherein said silicon compound film remains on said polycrystalline semiconductor film.

7. A method according to claim 6 wherein said impurity is introduced by using a mask provided on said semiconductor film.

8. A method according to claim 6 wherein said lamp annealing utilizes a halogen-tungsten as a light source.

9. A method according to claim 9 wherein said lamp annealing is carried out with a light having a wavelength of 0.5 to 4 .mu.m.

10. A method according to claim 6 further comprising a step of heating the polycrystalline semiconductor film to a first temperature prior to the lamp annealing.

11. A method according to claim 9 wherein said first temperature is from 200 to 500.degree. C.

12. A method for fabricating an insulated gate semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film on said gate electrode;
forming an amorphous semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said amorphous semiconductor film;
introducing a dopant impurity into selected portions of said amorphous semiconductor film using said mask;
removing the photoresist film after the introduction of the dopant impurity;
activating said selected portions of said amorphous semiconductor film by irradiating with a light wherein said silicon compound film remains on said amorphous semiconductor film while irradiating said light; and
forming at least one electrode in contact with one of said selected portions of the amorphous semiconductor film after the lamp annealing wherein said silicon compound film remains on said amorphous semiconductor film.

13. A method according to claim 12 wherein said light has a wavelength between 0.5 and 4 .mu.m.

14. A method according to claim 12 further comprising a step of heating said amorphous semiconductor film to a first temperature prior to irradiating said light to the amorphous semiconductor film.

15. A method according to claim 14 wherein said first temperature is from 200 to 500.degree. C.

16. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film over said gate electrode;
forming a polycrystalline semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said polycrystalline semiconductor film;
introducing a dopant impurity into selected portions of said polycrystalline semiconductor film using said mask;
removing the photoresist film after the introduction of the dopant impurity
activating said selected portions of said polycrystalline semiconductor film by irradiating with a light wherein said silicon compound film remains on said polycrystalline semiconductor film while irradiating said light; and
forming at least one electrode in contact with one of said selected portions of the polycrystalline semiconductor film after the lamp annealing wherein said silicon compound film remains on said polycrystalline silicon film.

17. A method according to claim 16 wherein said semiconductor film is doped with an impurity for giving one conductivity type thereto.

18. A method according to claim 1 wherein said impurity is introduced by ion doping.

19. A method according to claim 6 wherein said impurity is introduced by ion doping.

20. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film over said gate electrode;
forming an amorphous semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said amorphous semiconductor film;
introducing a dopant impurity into selected portions of said amorphous semiconductor film using said mask;
activating said selected portions of said amorphous semiconductor film by annealing wherein said silicon compound film remains on said amorphous semiconductor film while annealing; and
forming at least one electrode in contact with one of said selected portions of the amorphous semiconductor film after the annealing wherein said silicon compound film remains on said amorphous semiconductor film.

21. A method according to claim 20 wherein said substrate is a transparent glass substrate.

22. A method according to claim 20 wherein said gate insulating film comprises silicon nitride.

23. A method according to claim 20 wherein said dopant impurity is introduced by ion doping.

24. A method according to claim 20 wherein said dopant impurity is phosphorus.

25. A method according to claim 20 wherein said lamp annealing is conducted with a light having a wavelength of 0.5 .mu.m to 4 m.

26. A method according to claim 20 wherein said mask comprises silicon nitride.

27. A method according to claim 20 wherein said gate electrode comprises a metal having a melting point which resists the lamp annealing.

28. A method according to claim 20 wherein said gate electrode comprises a material selected from the group consisting of tantalum and titanium.

29. A method according to claim 20 wherein said lamp annealing is conducted for 10 to 1000 seconds.

30. A method according to claim 20 wherein said lamp annealing is carried out with an infrared light having a peak at a wavelength of 1.3 .mu.m.

31. A method according to claim 20 wherein said gate electrode is covered by an anodic oxide film formed by anodic oxidizing a surface of said gate electrode.

32. A method according to claim 20 wherein said lamp annealing is carried out with a halogen tungsten lamp.

33. A method according to claim 20 further comprising a step of controlling an intensity of the lamp annealing by measuring a temperature of a monitoring silicon wafer.

34. A method according to claim 20 further comprising a step of annealing in a hydrogen atmosphere after said lamp annealing.

35. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film over said gate electrode;
forming a semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said semiconductor film;
introducing a dopant impurity into selected portions of said semiconductor film using said mask;
removing the photoresist film after the introduction of the dopant impurity;
activating the dopant impurity in said selected portions of the semiconductor film by lamp annealing wherein said silicon compound film remains on said semiconductor film during the lamp annealing; and
forming at least one electrode in contact with one of said selected portions of the semiconductor film after the lamp annealing wherein said silicon compound film remains on said semiconductor film.

36. A method according to claim 35 wherein said substrate is a transparent glass substrate.

37. A method according to claim 35 wherein said gate insulating film comprises silicon nitride.

38. A method according to claim 35 wherein said semiconductor film comprises amorphous silicon or polycrystal silicon.

39. A method according to claim 35 wherein said dopant impurity is phosphorus.

40. A method according to claim 35 wherein said lamp annealing is conducted with a light having a wavelength of 0.5 .mu.m to 4 .mu.m.

41. A method according to claim 35 wherein said mask comprises silicon nitride.

42. A method according to claim 35 wherein said gate electrode comprises a metal having a melting point which resists the lamp annealing.

43. A method according to claim 35 wherein said gate electrode comprises a material selected from the group consisting of tantalum and titanium.

44. A method according to claim 35 wherein said lamp annealing is conducted for 10 to 1000 seconds.

45. A method according to claim 35 wherein said lamp annealing is carried out with an infrared light having a peak at a wavelength of 1.3 .mu.m.

46. A method according to claim 35 wherein said gate electrode is covered by an anodic oxide film formed by anodic oxidizing a surface of said gate electrode.

47. A method according to claim 35 wherein said lamp annealing is carried out with a halogen tungsten lamp.

48. A method according to claim 35 further comprising a step of controlling an intensity of the lamp annealing by measuring a temperature of a monitoring silicon wafer.

49. A method according to claim 35 further comprising a step of annealing in a hydrogen atmosphere after said lamp annealing.

50. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film over said gate electrode;
forming a semiconductor film on said gate insulating film;
forming a mask on said semiconductor film;
introducing a dopant impurity into selected portions of said semiconductor film wherein said selected portions are not covered by said mask;
activating the dopant impurity in said selected portions of the semiconductor film by lamp annealing, wherein the lamp annealing is conducted from both upper and lower sides of the substrate.

51. A method according to claim 50 wherein said substrate is a transparent glass substrate.

52. A method according to claim 50 wherein said gate insulating film comprises silicon nitride.

53. A method according to claim 50 wherein said semiconductor film comprises amorphous silicon or polycrystal silicon.

54. A method according to claim 50 wherein said dopant impurity is phosphorus.

55. A method according to claim 50 wherein said lamp annealing is conducted with a light having a wavelength of 0.5 .mu.m to 4 .mu.m.

56. A method according to claim 50 wherein said mask comprises silicon nitride.

57. A method according to claim 50 wherein said gate electrode comprises a metal having a melting point which resists the lamp annealing.

58. A method according to claim 50 wherein said gate electrode comprises a material selected from the group consisting of tantalum and titanium.

59. A method according to claim 50 wherein said lamp annealing is conducted for 10 to 1000 seconds.

60. A method according to claim 50 wherein said lamp annealing is carried out with an infrared light having a peak at a wavelength of 1.3 .mu.m.

61. A method according to claim 50 wherein said gate electrode is covered by an anodic oxide film formed by anodic oxidizing a surface of said gate electrode.

62. A method according to claim 50 wherein said lamp annealing is carried out with a halogen tungsten lamp.

63. A method according to claim 50 further comprising a step of controlling an intensity of the lamp annealing by measuring a temperature of a monitoring silicon wafer.

64. A method according to claim 50 further comprising a step of annealing in a hydrogen atmosphere after said lamp annealing.

65. A method of manufacturing a semiconductor device comprising the steps of:

forming a gate electrode over a substrate;
forming a gate insulating film over said gate electrode;
forming a polycrystalline semiconductor film on said gate insulating film;
forming a mask comprising a photoresist film and a silicon compound film on said polycrystalline semiconductor film;
introducing a dopant impurity into selected portions of said polycrystalline semiconductor film wherein said selected portions are not covered by said mask;
removing the photoresist film after the introduction of the dopant impurity:
activating said selected portions of said polycrystalline semiconductor film by annealing wherein said silicon compound film remains on said semiconductor film during the annealing; and
forming at least one electrode in contact with one of said selected portions of the semiconductor film after the annealing wherein said silicon compound film remains on said polycrystalline semiconductor film.

66. A method according to claim 65 wherein said substrate is a transparent glass substrate.

67. A method according to claim 65 wherein said gate insulating film comprises silicon nitride.

68. A method according to claim 65 wherein said dopant impurity is introduced by ion doping.

69. A method according to claim 65 wherein said dopant impurity is phosphorus.

70. A method according to claim 65 wherein said lamp annealing is conducted with a light having a wavelength of 0.5 .mu.m to 4 .mu.m.

71. A method according to claim 70 wherein said mask comprises silicon nitride.

72. A method according to claim 70 wherein said gate electrode comprises a metal having a melting point which resists the lamp annealing.

73. A method according to claim 70 wherein said gate electrode comprises a material selected from the group consisting of tantalum and titanium.

74. A method according to claim 70 wherein said lamp annealing is conducted for 10 to 1000 seconds.

75. A method according to claim 70 wherein said lamp annealing is carried out with an infrared light having a peak at a wavelength of 1.3 .mu.m.

76. A method according to claim 70 wherein said gate electrode is covered by an anodic oxide film formed by anodic oxidizing a surface of said gate electrode.

77. A method according to claim 70 wherein said lamp annealing is carried out with a halogen tungsten lamp.

78. A method according to claim 70 further comprising a step of controlling an intensity of the lamp annealing by measuring a temperature of a monitoring silicon wafer.

79. A method according to claim 70 further comprising a step of annealing in a hydrogen atmosphere after said lamp annealing.