US6198265B1 - Fixed frequency switching regulator with improved dynamic response - Google Patents
Fixed frequency switching regulator with improved dynamic response Download PDFInfo
- Publication number
- US6198265B1 US6198265B1 US09/099,998 US9999898A US6198265B1 US 6198265 B1 US6198265 B1 US 6198265B1 US 9999898 A US9999898 A US 9999898A US 6198265 B1 US6198265 B1 US 6198265B1
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- voltage
- timing capacitor
- comparator
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Definitions
- This invention relates generally to fixed frequency switching regulators, and more particularly to such a regulator having improved dynamic response, a low count of external discrete elements, can be used at 100% duty cycle, does not require a minimum load, and does not require compensation components.
- U.S. Pat. No. 5,233,509 describes an adjustable device with near unity power factor that is achieved while reducing harmonics in a switch-mode power supply by replacing the conventional diode bridge in the front end with an H-bridge driver.
- Two feedback loops are required, one feedback loop is used to regulate a DC bulk voltage by comparing the DC bulk voltage to a reference voltage and generating an error signal therefrom.
- a programmable offset is applied to the error signal for adjusting the power factor.
- a second feedback loop samples and scales the AC input voltage for use as a scaled replica of the input current The actual input current is then compared to the scaled replica current to produce a second error signal.
- the two error signals are multiplied to determine the desired input current wherein the desired input current follows the AC input voltage.
- the desired input current is pulse width modulated by a fixed frequency sawtooth waveform for providing switching signals for controlling the H-bridge driver.
- the H-bridge driver thus operates such that the input current closely follows the AC input voltage and near unity power factor is maintained.
- a DC-to-DC converter follows the H-Bridge driver using a single feedback loop for regulating desired DC output voltage.
- Harris, U.S. Pat. No. 5,489,831 a pulse width modulation controller particularly useful for a variable speed variable torque electric motor.
- Inputs to the controller are a desired RPM signal, a motor electrical signal which is a function of the RPM of the rotor of the motor and its angular position relative to the stator, and a torque feed back signal derived from the power phase winding circuits of the motor.
- the controller produces pulse width modulated power drive signals which are applied to power switches of the power phase winding circuits of the motor to allow electric current to flow through the power phase winding circuits when power phase enable signals produced by the controller sequentially enable the power switch of a power phase winding circuit to do so.
- the duty cycle of the power drive signals is a function of the difference between the desired and actual RPM of the motor and the torque of the motor.
- the frequency of the power drive signals is a fixed integral multiple of the frequency of the power phase enable signals over the fill operating range of RPMs of the motor.
- a pulse width modulator voltage feedforward circuit which includes a gating circuit for providing a control signal to a charge circuit which charges an integration circuit with a current proportional to an input voltage.
- the integration circuit provides an output ramp signal waveform having a slope proportional to the input voltage value.
- the gating circuit also provide a control signal to a discharge circuit, to thus alternately charge and discharge the integration circuit The gating circuit insures that a minimum deadtime for a transformer reset will occur regardless of input voltage variations by preventing a fixed frequency signal provided by an oscillator from beginning a new ramp waveform signal period until the integration circuit is discharged to a minimum reference voltage level.
- Green et al., U.S. Pat. No. 5,404,094 describes a method and system of converting a wide range of DC input voltages from a DC power source to a substantially lower regulated DC output voltage.
- a pulse width modulated (PWM) signal is generated from an applied DC input voltage to obtain a desired regulated DC output voltage.
- the PWM signal has a fixed frequency and a variable duty cycle.
- the PWM signal is filtered to provide a DC output voltage proportional to the amount of time the PWM signal spent in the ON or HIGH state.
- the duty cycle of the PWM signal is controlled based on an error signal generated by comparing an error voltage level that is proportional to the output voltage to a voltage reference. High voltage protection is provided to the controller during the period the PWM signal is in the OFF or LOW state.
- the prior art teaches the use of a pulse-width modulated controller for several applications. However, the prior art does not teach that such a controller may be used for controlling a fixed frequency switching regulator.
- the present invention fulfills these needs and provides further related advantages as described in the following summary.
- the present invention teaches certain benefits in construction and use which give rise to the objectives described below.
- the present invention teaches a fixed frequency switching regulator with improved dynamic response.
- the regulator uses an open loop comparator to set the output voltage. When the output voltage moves above a selected level a state change occurs.
- the output voltage of the circuit (Vout) is sensed by the open loop comparator rather then by a compensated error amplifier. Slope compensation is provided in order to stabilize the circuit at duty cycles greater then 0.5.
- the slope compensation is derived from a linear ramp operating between zero volts and Vin, the input voltage level.
- the circuit can be used at 100% duty cycle and does not require a minimum load or external loop compensation.
- a current source is used to charge a timing capacitor.
- a comparator is used in conjunction with a hysteresis circuit so that as the timing capacitor is charged the voltage on one input of the comparator rises to a set input voltage level whereupon the timing capacitor is discharged to ground.
- a pulse-width modulated latching controller logic element is used to control output to a control switch, a field-effect transistor, providing positive going output pulses to an output terminal.
- a divider network between the output terminal and the timing capacitor along with a switch controlled by the PWM latch element are used for slope compensation and for maintaining operational synchronization to the oscillator.
- a primary objective of the present invention is to provide a fixed frequency switching regulator with improved dynamic response and other advantages not taught by the prior art.
- Another objective is provide such a regulator which requires no minimum load.
- a further objective of the present invention is to provide such a regulator which can operate at a 100% duty cycle.
- a still further objective of the present invention is to provide such a regulator that requires no compensation components and generally, fewer external components.
- FIG. 1 is an electrical schematic diagram of an embodiment of the present invention showing a preferred manner of making the invention
- FIG. 2 is a timing diagram comparing smoothed waveforms at points B, C, D, F, and G of FIG. 1, where the horizontal axis is Time and the vertical axis is Voltage Level; and
- FIG. 3 is a timing diagram similar to that of FIG. 2, comparing smoothed waveforms at points B, G, and H of FIG. 1 .
- FIG. 1 illustrates the preferred embodiment of the present invention in schematic form.
- the invention is as shown within the dashed line box in FIG. 1 with the input/output circuit containing the FET Q 1 being considered as ancillary to the invention.
- the electrical circuit of the invention operates as a fixed frequency switching regulator comprising electrical circuit elements including an oscillator means having a current source CS 1 , a comparator U 3 , a discharge switch Q 3 , a timing capacitor C 2 and a hysteresis circuit R 1 , R 2 and Q 2 .
- Certain points “A” through “H” in the circuit of FIG. 1 are referenced to more particularly point out the operation of the circuit and to define the corresponding operating waveforms shown in FIGS. 2 and 3.
- circuit elements of the present inventive circuit are common elements presently commercially available. Novelty in the present invention is based upon the specific combination of elements used and in the fact that this combination provides novel and useful operation for achieving the previously stated objectives of the invention. Operation of the circuit is as described in the following description.
- the cycle period may be lengthened by increasing the value of C 2 , by increasing the input voltage, or by decreasing the value of the current source CS 1 .
- CS 1 is modulated by Vin to minimize cycle period variations due to changes at Vin.
- the waveform at (G) is a linear up-going ramp as C 2 charges, and a fast down-going ramp as C 2 discharges through Q 3 to ground.
- the period of the ramp-up is much greater than the period of the ramp-down.
- the low going pulses from U 3 are received at (F), the input of the PWM latch U 2 .
- U 2 is a reset dominant latch which means that if Set terminal “S” and Reset terminal “R” of U 2 are both low, terminal “Q” will also be low.
- the voltage at (E) is the sum of Vout and the voltage across C 2 , i.e., point (G).
- the output of U 5 (D) goes low thereby resetting the PWM latch U 2 , turning Q 1 off, and opening SW 1 .
- RS 1 , RS 2 and SW 1 couple a portion of the ramp on C 2 to point (E) when the “Q” terminal of U 2 is high, thereby providing slope compensation for stabilizing operation and providing synchronization with the oscillator means.
- the present invention may particularly be described as a fixed frequency switching regulator device interconnected for driving an output switch Q 1 for enabling an input voltage level Vin at an output terminal, Vout, the device comprising: a current source CS 1 , a comparator U 3 , a discharge switch Q 3 , a timing capacitor C 2 and a hysteresis circuit (R 1 , R 2 , Q 2 ) interconnected for charging the timing capacitor C 2 from the current source CS 1 until a timing capacitor voltage level exceeds the input voltage level Vin, so as to enable the comparator U 3 to turn on the discharge switch Q 3 for draining the timing capacitor C 2 so as to drive the comparator U 3 into a low state, thereby enabling the hysteresis circuit to develop hysteresis.
- a current source CS 1 , a comparator U 3 , a discharge switch Q 3 , a timing capacitor C 2 and a hysteresis circuit (R 1 , R 2 , Q 2 ) interconnected for
- the device further includes a reset dominant pulse-width modulated latching device U 2 having a set “S” and a reset “R” input terminals, the latching device U 2 driving an output terminal, “Q” to a low state when both the set and reset input terminals are driven to a low state; the latching device U 2 being switched by the comparator U 3 so that at the start of a timing cycle, the set input terminal of the latching device U 2 assumes a low state when the comparator U 3 moves to a low state momentarily so that the output terminal (C) of the latching device moves to a high state thereby turning on the output switch Q 1 and enabling feedback from the timing capacitor C 2 to an error comparator U 5 so that the output switch SW 1 remains in an on state until a portion of the output voltage Vout, determined by a voltage divider RS 1 & RS 2 , exceeds a reference voltage Vref at the error comparator U 5 so that the latching device U 2 turns the output switch SW 1 off and disables feedback from the timing capacitor
- the voltage divider RS 1 & RS 2 preferably providing a voltage ratio of approximately fifty to one is preferably coupled to a feedback switch device for enabling a feedback signal from the timing capacitor at the error comparator for providing slope compensation so as to stabilize operation of the device.
- a voltage ramp at the timing capacitor is preferably linear from zero volts to Vin, enabling coupling of a portion of the timing capacitor voltage for loop compensation without introducing a significant error at Vout.
- the current source is preferably modulated by Vin so as to minimize frequency variations due to level changes at Vin.
Abstract
Description
Claims (4)
Priority Applications (1)
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US09/099,998 US6198265B1 (en) | 1998-06-19 | 1998-06-19 | Fixed frequency switching regulator with improved dynamic response |
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US09/099,998 US6198265B1 (en) | 1998-06-19 | 1998-06-19 | Fixed frequency switching regulator with improved dynamic response |
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Cited By (23)
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---|---|---|---|---|
US6366070B1 (en) * | 2001-07-12 | 2002-04-02 | Analog Devices, Inc. | Switching voltage regulator with dual modulation control scheme |
US6828836B1 (en) | 2003-09-09 | 2004-12-07 | National Semiconductor Corporation | Two comparator voltage mode PWM |
US20050017764A1 (en) * | 2003-06-05 | 2005-01-27 | Infineon Technologies Ag | Drive circuit for a switch in a switching converter |
US20050093527A1 (en) * | 2003-10-31 | 2005-05-05 | An-Tung Chen | [pulse width modulation power regulator and power supply system thereof] |
US20050104570A1 (en) * | 2003-11-14 | 2005-05-19 | Joshru Lee | [pulse width modulator and loading system thereof] |
US20050152164A1 (en) * | 1999-09-24 | 2005-07-14 | Balu Balakrishnan | Method and apparatus providing a multi-function terminal for a power supply controller |
US20050218874A1 (en) * | 2004-03-30 | 2005-10-06 | Neil Gibson | Switch mode power converter |
US20060055387A1 (en) * | 2004-09-16 | 2006-03-16 | Semiconductor Components Industries, Llc | PWM power supply controller and method therefor |
US20060197515A1 (en) * | 2003-12-15 | 2006-09-07 | An-Tung Chen | Pulse width modulation power regulator and power supply system thereof |
US20060284607A1 (en) * | 2005-06-16 | 2006-12-21 | Yuji Isobe | Slope compensation circuit |
US20070075790A1 (en) * | 2005-10-03 | 2007-04-05 | Linear Technology Corp. | Switching regulator duty cycle control in a fixed frequency operation |
CN100355191C (en) * | 2003-08-29 | 2007-12-12 | 沛亨半导体股份有限公司 | Controlling circuit, controlling method and sequence generator for dc-dc converter |
CN100367643C (en) * | 2003-12-19 | 2008-02-06 | 夏普株式会社 | Switching power supply apparatus and electric appliance therewith |
CN100466439C (en) * | 2006-01-13 | 2009-03-04 | 通嘉科技股份有限公司 | Apparatus for preventing capacitor charger from overcharging and method thereof |
US20090146618A1 (en) * | 2006-08-07 | 2009-06-11 | Stmicroelectronics S.R.L. | Fixed-off-time power factor correction controller |
US20090174383A1 (en) * | 2008-01-07 | 2009-07-09 | The Hong Kong University Of Science And Technology | Frequency compensation based on dual signal paths for voltage-mode switching regulators |
US7919952B1 (en) | 2005-03-21 | 2011-04-05 | Microsemi Corporation | Automatic gain control technique for current monitoring in current-mode switching regulators |
WO2012082106A1 (en) * | 2010-12-14 | 2012-06-21 | Semiconductor Components Industries, Llc | Method of forming a low power dissipation regulator and structure therefor |
CN102751870A (en) * | 2011-04-21 | 2012-10-24 | 登丰微电子股份有限公司 | DC-to-DC (Direct Current to Direct Current) voltage-reduction conversion controller |
US20140103896A1 (en) * | 2011-04-21 | 2014-04-17 | Green Solution Technology Co., Ltd. | Dc to dc buck converting controller with programmable on-time period unit |
CN104596722A (en) * | 2015-02-16 | 2015-05-06 | 哈尔滨工程大学 | Multifunctional broadband deck simulator of floating shock platform |
TWI488397B (en) * | 2008-11-12 | 2015-06-11 | Semiconductor Components Ind | Method for limiting current and circuit therefor |
US20170264185A1 (en) * | 2015-08-27 | 2017-09-14 | Telefonaktiebolaget Lm Ericsson (Publ) | Switched mode power supply compensation loop |
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Cited By (45)
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US7876587B2 (en) | 1999-09-24 | 2011-01-25 | Power Integrations, Inc, | Method and apparatus providing a multi-function terminal for a power supply controller |
US20110085360A1 (en) * | 1999-09-24 | 2011-04-14 | Power Integrations, Inc. | Method and apparatus providing a multi-function terminal for a power supply controller |
US20080186747A1 (en) * | 1999-09-24 | 2008-08-07 | Balu Balakrishnan | Method and apparatus providing a multi-function terminal for a power supply controller |
US8482938B2 (en) | 1999-09-24 | 2013-07-09 | Power Integrations, Inc. | Method and apparatus providing a multi-function terminal for a power supply controller |
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CN100355191C (en) * | 2003-08-29 | 2007-12-12 | 沛亨半导体股份有限公司 | Controlling circuit, controlling method and sequence generator for dc-dc converter |
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US20050093527A1 (en) * | 2003-10-31 | 2005-05-05 | An-Tung Chen | [pulse width modulation power regulator and power supply system thereof] |
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US20060197515A1 (en) * | 2003-12-15 | 2006-09-07 | An-Tung Chen | Pulse width modulation power regulator and power supply system thereof |
US7262589B2 (en) * | 2003-12-15 | 2007-08-28 | Winbond Electronics Corp. | Pulse width modulation power regulator and power supply system thereof |
CN100367643C (en) * | 2003-12-19 | 2008-02-06 | 夏普株式会社 | Switching power supply apparatus and electric appliance therewith |
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US20050218874A1 (en) * | 2004-03-30 | 2005-10-06 | Neil Gibson | Switch mode power converter |
US7345464B2 (en) * | 2004-09-16 | 2008-03-18 | Semiconductor Components Industries, L.L.C. | PWM power supply controller having multiple PWM signal assertions and method therefor |
US20060055387A1 (en) * | 2004-09-16 | 2006-03-16 | Semiconductor Components Industries, Llc | PWM power supply controller and method therefor |
US7919952B1 (en) | 2005-03-21 | 2011-04-05 | Microsemi Corporation | Automatic gain control technique for current monitoring in current-mode switching regulators |
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US20060284607A1 (en) * | 2005-06-16 | 2006-12-21 | Yuji Isobe | Slope compensation circuit |
US7388444B2 (en) | 2005-10-03 | 2008-06-17 | Linear Technology Corporation | Switching regulator duty cycle control in a fixed frequency operation |
WO2007040814A1 (en) | 2005-10-03 | 2007-04-12 | Linear Technology Corp. | Switching regulator duty cycle control in a fixed frequency operation |
US20070075790A1 (en) * | 2005-10-03 | 2007-04-05 | Linear Technology Corp. | Switching regulator duty cycle control in a fixed frequency operation |
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US20090146618A1 (en) * | 2006-08-07 | 2009-06-11 | Stmicroelectronics S.R.L. | Fixed-off-time power factor correction controller |
US8270190B2 (en) * | 2006-08-07 | 2012-09-18 | Stmicroelectronics S.R.L. | Fixed-off-time power factor correction controller |
US8217637B2 (en) | 2008-01-07 | 2012-07-10 | The Hong Kong University Of Science And Technology | Frequency compensation based on dual signal paths for voltage-mode switching regulators |
US20090174383A1 (en) * | 2008-01-07 | 2009-07-09 | The Hong Kong University Of Science And Technology | Frequency compensation based on dual signal paths for voltage-mode switching regulators |
TWI488397B (en) * | 2008-11-12 | 2015-06-11 | Semiconductor Components Ind | Method for limiting current and circuit therefor |
WO2012082106A1 (en) * | 2010-12-14 | 2012-06-21 | Semiconductor Components Industries, Llc | Method of forming a low power dissipation regulator and structure therefor |
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US20140103896A1 (en) * | 2011-04-21 | 2014-04-17 | Green Solution Technology Co., Ltd. | Dc to dc buck converting controller with programmable on-time period unit |
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US20120268088A1 (en) * | 2011-04-21 | 2012-10-25 | Green Solution Technology Co., Ltd. | Dc to dc buck converting controller |
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