US6675281B1 - Distributed mapping scheme for mass storage system - Google Patents
Distributed mapping scheme for mass storage system Download PDFInfo
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- US6675281B1 US6675281B1 US10/054,560 US5456002A US6675281B1 US 6675281 B1 US6675281 B1 US 6675281B1 US 5456002 A US5456002 A US 5456002A US 6675281 B1 US6675281 B1 US 6675281B1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
Definitions
- the invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of rapidly updating the content of an arbitrarily selected flash memory cell and evenly spreading out the erasing of the blocks of data.
- Flash memory is presently being used for mass storage, the above indicated characteristics highlight that there are a number of obvious advantages of the flash memory when compared with hard disk data storage, such as durability, having a small form factor, having short access time and relatively low power consumption.
- disadvantages of the flash memory must be cited low storage capacity (presently available up to 1 Giga-byte which must be compared with 30 Giga-byte for a hard disk) while the flash memory is also more costly to create when compare with disk storage devices.
- One notable difference between the flash memory and disk storage is that flash memory is limited in its erasing capability, a drawback that does not exist for disk storage devices.
- the flash memory must be erased before write
- the erase is bounded by a limited number of times that the erase operation can be performed, typically between 100,000 and 1,000,000 times.
- a wear-level algorithm must be part of the design.
- the system must be provided with a dynamic mapping table of logical and physical addresses so that the data does not need to be frequently erased.
- an algorithm must be provided that assures even wear of the memory cells, such that the entire memory does not become inoperative due to a portion of the memory reaching the end of life of the memory.
- FIG. 3 shows that:
- a flash memory is divided in to blocks or cylinders, a block forms a unit of erasure
- a block of a flash memory consists of pages or sectors, typically up to 16 pages, a page forms a unit of read/write, and
- each of the pages of the flash memory contains 16 bytes of header information and 512 bytes of data.
- the conventional method of erasing one block of data at the time present problems for a conventional flash memory. If for instance only one byte of data needs to be changed in the flash memory, the data that is contained in the block (that comprises this byte) must be copied to a buffer, the buffer must then be updated, then the old data must be erased in the original block and finally a copy of the new data must be copied from the buffer to the block since erasing a block of data is a relatively time consuming operation, most systems will not approach data update operations in this manner.
- this empty block is identified by a physical address
- mapping table can be created as follows:
- mapping table provides and maintains a one-to-one correspondence between logical data addresses and the physical addresses where the data resides on a data storage medium.
- mapping table The conventional methods that are applied for the storage of a mapping table comprises one of the following:
- CAM Content Addressable Memory
- mapping table is stored in any location of the flash memory.
- U.S. Pat. No. 6,230,233 discloses a mass storage system made of flash EEPROM cells. The relative usage of memory banks is monitored, and physical addresses are periodically changed to even-out flash cell wear.
- U.S. Pat. No. 6,000,006 (Bruce et al.) describes a flash memory-based mass storage system. The physical address map is maintained in RAM. Wear leveling is performed.
- U.S. Pat. No. 5,742,934 (Shinohara) teaches a flash memory-based hard disk. An address conversion table that depends on logical and physical sector numbers is used to extend the memory life.
- U.S. Pat. No. 5,740,396 (Mason) describes a solid state disk comprising a flash memory. An address conversion method is used to convert the logical address to the physical address.
- a main objective of the invention is to improve the procedure that is used to update data contained in the flash memory cell.
- Another objective of the invention is to spread the erasing of data from a flash memory cell over the sequence of blocks that is being erased.
- a new algorithm for the updating and erasing of flash memory data.
- the new algorithm effects and improves the write, the update and the read operations of the flash memory cell.
- FIG. 1 shows a flow diagram of a conventional scheme for updating data in a flash memory cell.
- FIG. 2 shows a flow diagram of the new Distributed Mapping Scheme of the invention.
- FIG. 3 highlights the conventional organization of a flash memory.
- FIG. 4 shows how a one-to-one correspondence between logical and physical addresses is maintained.
- FIGS. 5 through 9 show the content of a block of data at various stages of update.
- the flash memory As the density of the flash memory increases and the price decreases, the flash memory has became the favorite storing device for the portable systems.
- the current method of updating flash memory will be highlighted first in order to highlight the shortcomings of this method.
- One drawback with using flash memory devices is that it is difficult to change the content of an arbitrary memory cell.
- This patent is designed to remedy the above highlighted drawbacks of the flash memory by defining a procedure, which can update the data quickly and spread the erasing of the blocks evenly over the whole memory that is being erased.
- the flash memory is currently being treated as a hard disk in which the memory area is partitioned into blocks for mass-storage.
- the flash memory controller which interfaces with a host software function, is the principal control mechanism for reading, writing and updating data is the flash memory cell.
- Data from the host is written to the flash memory by making reference to a mapping table of logical and physical addresses, the host controls and updates the mapping table, the mapping table can be stored internally in the flash memory or externally to the flash memory.
- the host views the flash memory as one continuous area of data that is partitioned into blocks of the (flash memory) data.
- the flash memory data are defined by the host as continuous logical addresses, the logical addresses are part of the mapping table.
- each block of the physical memory is being defined by a physical address.
- a given logical address may have a different physical address at different times.
- the host maintains the logical addresses for a block of data, each logical address corresponds with a physical flash memory address.
- the flash memory is addressed only via the logical addresses that are maintained by the host.
- the method that is used to identify unusable data in the flash memory cell is not germane to the invention and is typically a method of testing the flash memory cell. As part of the tests results is indicated the physical location in the flash memory that is found to be defective, this physical location is referred to by a physical address that is maintained by a host software function.
- the logical addresses of the host software function are sequential addresses ranging from for instance 1 through 1,000. Within each of these logical addresses a record of information (that relates to the memory of the flash memory cell) is maintained by the host software function, the most important of these records is the physical address in the flash memory cell to which this logical address points. By searching the logical address and the records that are maintained associated with these logical addresses, the host can find a physical address or location of the flash memory cell and can determine data in this physical location of the flash memory cell.
- mapping table is as follows. It thereby assumed that initially logical and physical addresses have a one-to-one correspondence, a correspondence that is valid as long as no data update to the flash memory cell have been performed.
- the host system will retrieve this data from the physical location 1001 of the flash memory.
- the current procedure for updating the data in the flash memory cell is as follows, see also FIG. 1 :
- step 10 copy the data from the flash memory data block to a buffer; the data in the flash memory that needs to be updated is pointed to by the logical address that is maintained by the host in the logical mapping table; testing or other intervention have indicated to the host the logical address of the data in the flash memory that must be updated; the host finds the physical address for this data by doing a table look-up of the physical flash memory address and reading out the physical address that corresponds, in the logical to physical mapping table, with the physical address of the to be replaced data; FIG. 1, step 10
- step 12 2. update the data in the buffer; the host has maintained the address of the buffer into which the to be updated data has been copied, the update data has been provided to the host and is entered by the host into the buffer, overlying and thereby erasing the unusable data; FIG. 1, step 12
- step 14 look, by doing a table look-up in the logical mapping table of the host, for an empty block in the flash memory; FIG. 1, step 14
- the host writes the data from the buffer to the empty block in the flash memory; FIG. 1, step 16 , and
- the host updates the physical address of the previously empty block in the logical address or mapping table of the host; FIG. 1, step 18 .
- mapping table is as follow:
- the physical flash memory block 1 will be written to a different flash memory location each time an update takes place. In this way, the flash memory will not be damaged due to frequent updating of one flash memory.
- mapping table The deficiencies of the present procedure, which has been highlighted above, will now be indicated.
- the problem with the mapping table is that the host system must maintain the mapping table, from which follows that:
- losing power source means losing the data that is stored
- mapping table is not stored in a particular location but is distributed all over the flash memory.
- each block of data is partitioned into multiple pages and each page contains two parts, a data part and a spare part.
- the data part is used for storing data from the host while the spare part is for the user to define.
- the mapping table for this patent uses the spare part.
- the algorithm for this patent can be illustrated in the following examples, making use of the three main operations of the flash memory cell, that is a write, an update and a read operation of the flash memory cell.
- the flash memory cell does not contain any data, so the system logical addresses will be the same as the physical addresses.
- the system will place the data at the data portion of physical address 2 , the spare portion of the physical address will be empty.
- step 28 enter the physical address of the new block in the spare portion of the original unusable page in flash memory; step 30 , FIG. 2.; the host support function is then available for additional updates, function 34 , FIG. 2
- step 28 create a pointer to the updated data in the spare portion of the preceding usable data; step 32 , FIG. 2; the host support function is then available for additional updates, function 36 , FIG. 2 .
- the new address will be appended to the old address in the spare portion of the page. So checking the last entry of the address will point to the latest updated data.
- the system needs to update the data in the logical address 2 .
- the system has located an empty block at the physical address 7 and has written the updated data into this address.
- the following table illustrates the operation.
- the host system When the host system retrieves the data, the host system will check whether the spare portion of the data is empty. For this procedure:
- the data that needs to be retrieved is identified by the physical address of these data in flash memory (original) physical address of these data in flash memory
- the host does a table search and locates this original physical address
- the host finds the data page which has no entry in the spare part of the data page, identifying the (last) page that has not been updated and that therefore contains usable data.
- the unusable data is copied to a buffer
- the buffer is updated with new data
- the new data is written to the data portion of the new block
- the host finds the data page which has no entry in the spare part of the data page, identifying the (last) page that has not been updated and that therefore contains usable data.
- FIG. 4 there is shown how a one-to-one correspondence between logical and physical addresses is maintained.
- Each of the blocks of data, starting with block 1 and from there incrementally proceeding to additional blocks of data controlled by the distributive mapping table that is shown in overview in FIG. 4, is referred to by 16 Logical addresses (LA), each logical address containing a first or spare part and a second or data part, as highlighted in FIG. 4 .
- the distributive mapping table of the invention will be stored in the header section of the flash memory.
- the physical address will be the same as the logical address unless otherwise noted in the table.
- the block of data that is shown in FIG. 5 contains, as a first record in the block, an index that points to the most up-to-date physical address for this block.
- the first spare and data records of the block form page 0 of this block.
- the index INDX therefore points to the location of PBA 4 since the balance of the spare part of page 2 is empty (FFFF entries or all ones).
- PBAX refers to the physical block address replacing this block of data while INDX is the index that indicated which page in the block has the most up-to-date physical address.
- the most up-to-date physical address is stored in the spare or header record of page 2 .
- the first four bytes of the header record can be used to store the physical address of the updated data for the block
- the INDX shown indicates that the third page will be read and that the physical address PBA 4 will be obtained. The new address for this block will be found in location PBA 4 .
- FIG. 6 shows an example of an initial write operation, immediately after the initialization, all bytes will contain “1” values while date will be written as “data 0”, “data 1” etc.
- FIG. 7 shows the updating of “data 1”, the “1001” record in the header record of “data 0” is the location of the block having the new “data 1”.
- the new “data 1” is placed in the first empty physical block at “1001”, the INDX is still at page 0 .
- FIG. 8 shows that block 1001 contains the updated data.
- FIG. 9 shows updating data 1 again, the new physical address is now in block 1002 , which is located in page 1 .
- the INDX is therefore defined at this time as 1111 1111 1111 1110, whereby the page number is defined by the first “1” bit from the right of the string. Hence “FFFE” indicates that the page number is “1”.
- a read operation that is reading data 1, comprises:
- the invention provides for:
Abstract
Description
Logical address | |
||
0 | 0 | ||
1 | 1 | ||
2 | 1000 | ||
3 | 3 | ||
4 | 1001 | ||
Logical address | |
||
1 | 1 | ||
2 | 2 | ||
3 | 1001 | ||
4 | 4 | ||
5 | 5 | ||
6 | 6 | ||
7 | 1002 | ||
8 | 8 | ||
Logical address | |
||
1 | 1003 | ||
2 | 2 | ||
3 | 1001 | ||
4 | 4 | ||
5 | 5 | ||
6 | 6 | ||
7 | 1002 | ||
8 | 8 | ||
Physical Address | Data | Spare portion | |
2 | Old data | Empty | |
7 | Empty | Empty | |
Physical Address | Data | Spare portion | |
2 | Old data | Pointer to block | |
7 | New data | Empty | |
Physical Address | Data | Spare portion | |
2 | Old data | Pointer to block 7 | |
7 | Old data | Empty | |
9 | New data | Empty | |
Claims (9)
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US10/054,560 US6675281B1 (en) | 2002-01-22 | 2002-01-22 | Distributed mapping scheme for mass storage system |
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