US7023518B1 - Semiconductor device having a non-conductive material or a weakly conductive material applied to a side edge of a substrate and a method of fabricating the same - Google Patents

Semiconductor device having a non-conductive material or a weakly conductive material applied to a side edge of a substrate and a method of fabricating the same Download PDF

Info

Publication number
US7023518B1
US7023518B1 US08/770,792 US77079296A US7023518B1 US 7023518 B1 US7023518 B1 US 7023518B1 US 77079296 A US77079296 A US 77079296A US 7023518 B1 US7023518 B1 US 7023518B1
Authority
US
United States
Prior art keywords
tft substrate
substrate
tft
control circuit
side edge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
US08/770,792
Inventor
Jun Koyama
Yoshitaka Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Sharp Corp
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd, Sharp Corp filed Critical Semiconductor Energy Laboratory Co Ltd
Assigned to SHARP KABUSHIKI KAISHA, SEMICONDUCTOR ENERGY LABORATORY COMPANY, LTD. reassignment SHARP KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KOYAMA, JUN, YAMAMOTO, YOSHITAKA
Application granted granted Critical
Publication of US7023518B1 publication Critical patent/US7023518B1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/35—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being liquid crystals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133388—Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells

Definitions

  • the present invention relates to an active matrix liquid crystal display and, more particularly, to a miniaturized active matrix liquid crystal display having high reliability.
  • An active matrix liquid crystal display uses a liquid crystal as a display medium.
  • a pixel is disposed at each intersection in a matrix construction. Every pixel is equipped with a switching device. Information about the pixels is represented by turning on and off the switching devices.
  • Three-terminal devices which are thin-film transistors having gate, source, and drain are most often used as the switching devices.
  • the thin-film transistors are hereinafter often abbreviated as TFTs.
  • scanning lines (gate lines) extending parallel to a row are connected with the gate electrodes of the TFTs in this row.
  • Signal lines (source lines) running parallel to a column are connected with the source (or drain) electrodes of the TFTs in this column.
  • a circuit for driving the scanning lines and a circuit for driving the signal lines are also provided.
  • FIG. 2 shows one conventional active matrix liquid crystal display.
  • a signal line driver circuit 202 for driving signal lines is mounted above the pixel matrix 201 of this active matrix liquid crystal display.
  • a scanning line driver circuit 203 for driving scanning lines is disposed to the left.
  • Indicated by 204 is a sealant material region.
  • FIG. 3 is a cross section of FIG. 2 .
  • pixel TFTs 301 are covered by a liquid crystal material 302 , which is held between a TFT substrate 303 and a counter substrate 304 .
  • signal line driver circuit and scanning line driver circuit are protected only by a thin film 306 of oxide or nitride.
  • Indicated by 307 is a sealant material. Therefore, TFTs 305 forming these driver circuits are placed in a harsher environment than the pixel TFTs located inside the liquid crystal material.
  • both signal line driver circuit and scanning line driver circuit are placed within a liquid crystal material, as well as pixel TFTs.
  • FIG. 4 shows a known device of this improved structure.
  • a sealant material or sealing material 403 is located outside both a signal line driver circuit 401 and a scanning line driver circuit 402 . Therefore, the driver circuit TFTs are covered by the liquid crystal material, as well as the pixel TFTS. Furthermore, to miniaturize the liquid crystal display, three end surfaces (in FIG. 4 , the top end surface, bottom end surface, and right end surface) of the counter substrate are made to conform to three end surfaces of the TFT substrate. Indicated by 404 is a pixel matrix.
  • a short ring 501 is formed around the pixel matrix to protect the TFT devices from static charges. Since the signal lines 503 and scanning lines 504 connected with pixel TFTs 502 are all shorted, static charges produced during manufacturing steps, especially during rubbing steps, are prevented from being applied across the terminals of each pixel TFT 502 .
  • Indicated by 505 is a TFT substrate. Indicated by 506 are positions at which the device is cut by a laser beam.
  • the counter substrate and the TFT substrate are preferably cut along common planes (in FIG. 4 , the top end surface, bottom end surface, and right end surface of each substrate) from which no terminals are brought out. Accordingly, it is difficult to cut the short ring with a laser beam in the final step. In particular, the short ring is cut together with the substrates along a common plane. As shown in FIG. 6 , after the cutting, the end surfaces of the substrates are exposed. If static charges are produced on the exposed end surface after the cutting, the internal pixel TFTs will be destroyed, thus making the display device defective.
  • Indicated by 507 is the counter substrate.
  • Indicated by 508 is a sealant material.
  • Indicated by 503 is a liquid crystal material.
  • Indicated by 504 is a bus line.
  • Indicated by 505 is the TFT substrate. Indicated by 506 are the exposed end surfaces.
  • An active matrix liquid crystal display is free of the foregoing problems and has a plurality of pixel TFTs arranged in rows and columns on a TFT substrate, driver TFTs formed on the TFT substrate and forming a driver circuit for driving the pixel TFTs, a counter substrate, and a liquid crystal material.
  • the pixel TFTs and the driver TFTs are in contact with the liquid crystal material directly or via a thin film.
  • a method of fabricating this active matrix liquid crystal display in accordance with the invention comprises the steps of: cutting at least one unexposed end surface of the substrates and the counter substrate along a common plane to form an exposed end surface; and applying or bonding a nonconductive or weakly conductive material to at least one of the exposed end surfaces.
  • FIG. 1 is a cross-sectional view of an active matrix liquid crystal display according to the present invention
  • FIG. 2 is a schematic diagram of a conventional active matrix liquid crystal display
  • FIG. 3 is a cross-sectional view of the conventional active matrix liquid crystal display shown in FIG. 2 ;
  • FIG. 4 is a diagram of another conventional active matrix liquid crystal display
  • FIG. 5 is a diagram of a short ring used in a known active matrix liquid crystal display
  • FIG. 6 is a cross-sectional view of the conventional active matrix liquid crystal display shown in FIG. 4 ;
  • FIGS. 7(A)–7(D) and 8 (A)– 8 (B) are cross-sectional views of a monolithic active matrix liquid crystal display according to the invention, illustrating its process sequence
  • FIG. 9 is a cross-sectional view of another active matrix liquid crystal display according to the invention.
  • FIG. 1 A specific example of configuration of active matrix liquid crystal display obtained by making use of the above-described structure is shown in FIG. 1 , where a plurality of pixel TFTs are arranged in rows and columns on a TFT substrate 101 .
  • Driver TFTs forming a driver circuit for driving the pixel TFTs are also formed on the TFT substrate.
  • a liquid crystal material 104 is sealed between a counter substrate 102 and the TFT substrate 101 by a sealing material 103 . Since the driver TFTs are present inside the liquid crystal material along with the pixel TFTs, the driver TFTs can be protected.
  • a nonconductive or weakly conductive resin 105 is applied to the cut end surface of the short ring to prevent the cut end surfaces from touching the outside. Consequently, a bus line 106 connected with the pixel TFTs can be shielded from the outside. Hence, the pixel TFTs can be protected from static charges.
  • LCD liquid crystal display
  • FIGS. 7(A)–7(D) are low-temperature polysilicon processes.
  • the left half of each figure illustrates steps for fabricating TFTs forming a driver circuit.
  • the right half illustrates steps for fabricating TFTs forming an active matrix circuit.
  • a silicon oxide film 702 is first formed as a buffer layer 702 on a glass substrate 701 to a thickness of 1000 to 3000 ⁇ .
  • This silicon oxide film may be formed in an oxygen ambient by sputtering or plasma CVD.
  • an amorphous silicon film is formed to a thickness of 300 to 1500 ⁇ , preferably 500 to 1000 ⁇ , by plasma CVD or LPCVD.
  • the amorphous silicon film is thermally annealed at a temperature higher than 500° C., preferably 500–600° C., to crystallize the film or to enhance its crystallinity. After the crystallization, the crystallinity may be further enhanced by carrying out photo-annealing making use of laser light or the like. Furthermore, during the crystallization making use of the thermal annealing, an element (or, a catalytic element) such as nickel for promoting crystallization of silicon may be added, as described in Japanese Unexamined Patent Publication Nos. 244103/1994 and 244104/1994.
  • the crystallized silicon film is etched to form islands of an active layer 703 for P-channel TFTs forming a driver circuit, islands of an active layer 704 for N-channel TFTs forming the driver circuit, and islands of an active layer 705 for pixel TFTs forming a matrix circuit.
  • a gate-insulating film 706 of silicon oxide is formed to a thickness of 500 to 2000 ⁇ by sputtering in an oxygen ambient.
  • the gate-insulating film 706 may be formed by plasma CVD. Where the silicon oxide film is formed by plasma CVD, it is desired to use monosilane (SiH 4 ) and oxygen (O 2 ) or nitrogen monoxide (N 2 O) as a gaseous raw material.
  • an aluminum layer having a thickness of 2000 to 6000 ⁇ is formed by sputtering over the whole surface of the laminate.
  • the aluminum may contain silicon, scandium, palladium, or other material to prevent generation of hillocks in thermal processing steps conducted later.
  • the aluminum film is etched to form gate electrodes 707 , 708 , and 709 ( FIG. 7(A) ).
  • the gate electrodes 707 , 708 , and 709 consisting of aluminum is anodized.
  • surfaces of the gate electrodes 707 , 708 , 709 are changed into aluminum oxide, 710 , 711 , and 712 .
  • These aluminum oxide regions act as an insulator ( FIG. 7(B) ).
  • a photoresist mask 713 covering the active layer 703 of the P-channel TFTs is formed.
  • Phosphorus ions are introduced into the active layers, 704 and 705 , by ion doping while using phosphine as a dopant gas.
  • the dose is 1 ⁇ 10 12 to 5 ⁇ 10 13 atoms/cm 2 .
  • heavily doped N-type regions 714 , 715 , or sources and drains, are formed in the active layers, 704 and 705 ( FIG. 7(C) ).
  • a photoresist mask 716 for covering both active layer 704 for the N-channel TFTs and active layer 705 for the pixel TFTs is formed.
  • Boron ions 72 are introduced again into the active layer 703 by ion doping, using diborane (B 2 H 6 ) as a dopant gas.
  • the dose is 5 ⁇ 10 14 to 8 ⁇ 10 15 atoms/cm 2 .
  • heavily doped P-type regions 717 are formed. Because of the doping steps described thus far, heavily doped N-type regions 714 , 715 (sources and drains) and heavily doped P-type regions 717 (source and drain) are formed ( FIG. 7(D) ).
  • the laminate is thermally annealed at 450–850° C. for 0.5 to 3 hours to activate the dopants and to repair the damage created by the doping. In this way, the dopants are activated. At the same time, the crystallinity of the silicon is recovered.
  • a silicon oxide film having a thickness of 3000 to 6000 ⁇ is formed as an interlayer dielectric 718 over the whole surface by plasma CVD.
  • This interlayer dielectric 718 may be a monolayer of silicon nitride or a multilayer film of silicon oxide and silicon nitride.
  • the interlayer dielectric 718 is etched by a wet etching process or a dry etching process to form contact holes in the source/drain regions.
  • an aluminum film or a multilayer film of titanium and aluminum is formed to a thickness of 2000 to 6000 ⁇ by sputtering techniques. This film is etched so as to create electrodes/interconnects, 719 , 720 , and 721 , for a peripheral circuit and electrodes/interconnects, 722 and 723 , for pixel TFTs ( FIG. 8(A) ).
  • a silicon nitride film 724 is formed as a passivation film having a thickness of 1000 to 3000 ⁇ by plasma CVD. This silicon nitride film is etched to create contact holes extending to the electrodes 723 of the pixel TFTs.
  • An ITO (indium-tin oxide) film having a thickness of 500 to 1500 ⁇ is formed by sputtering. Finally, the ITO film is etched to form pixel electrodes 725 . In this manner, the peripheral driver circuit 726 and active matrix circuit 727 are formed integrally ( FIG. 8(B) ).
  • Steps for assembling the active matrix liquid crystal display is now described.
  • the TFT substrate and the counter substrate are cleaned to clean up chemicals etc.
  • orientation film is made to adhere to each of the TFT substrate and counter substrate.
  • the orientation film is provided with grooves lying in a given direction. Liquid crystal molecules are oriented uniformly along the grooves.
  • the orientation film material is created by preparing a solvent such as butyl Cellosolve or n-methyl-pyrrolidone and dissolving about 10% by weight of polyimide in the solvent. This is referred to as polyimide varnish and printed with a flexo-printing machine.
  • the orientation films adhering to the TFT substrate and the counter substrate, respectively, are heated to cure them. This is known as baking.
  • hot air having a maximum temperature of approximately 300° C. is blown against the orientation films to heat them.
  • the polyimide varnish is sintered and cured.
  • a rubbing step is carried out.
  • Each glass substrate having the orientation film adhering thereto is rubbed in a given direction with buff cloth consisting of fibers of rayon, nylon, or the like having fiber lengths of 2 to 3 mm to form minute grooves.
  • Spherical spacers of a polymer-, glass-, or silica-based material are sprayed either at the TFT substrate or at the counter substrate.
  • the method of spraying the spacers can be a wet process in which spacers are mixed into a solvent such as pure water or alcohol and the solvent is sprayed onto the glass substrate.
  • the method can also be a dry process in which spacers are sprayed without using solvent at all.
  • a sealant material is applied to the outer frame of the pixel region of the TFT substrate, in order to bond together the TFT substrate and the counter substrate and to prevent the injected liquid crystal material from flowing out.
  • the used sealant material is prepared by dissolving epoxy resin and a phenolic curing agent in a solvent of ethyl Cellosolve. After the application of the sealant material, the two glass substrates are bonded together by a high-temperature pressing process at 160° C. so that the sealant material is cured in about 3 hours.
  • the TFT substrate and the counter substrate are bonded together.
  • the liquid crystal material is injected through a liquid crystal injection port, followed by sealing of the port. After the completion of the sealing, the glass substrates, or the TFT substrate and counter substrate, are cut along the common planes lying in three directions (top side, bottom side, and right side of the display device shown in FIG. 2 ).
  • a nonconductive or weakly conductive resin is applied to the cut surfaces.
  • a nonconductive or weakly conductive resin is applied to the cut surfaces.
  • an epoxy resin is applied.
  • FIG. 9 A second embodiment of the invention is shown in FIG. 9 .
  • a control circuit 901 for controlling a driver circuit made up of TFTs is located under a sealant material 902 to reduce the packing area and to enhance the reliability.
  • the control circuit 901 is made of a single-crystal silicon chip and thicker than a layer of a liquid crystal material 903 . Therefore, it is impossible to place the control circuit in the sealant material 902 as it is.
  • a counter substrate 904 is made thinner by an amount equal to the height of the protruding portion of the control circuit above the substrate gap to accommodate this problem.
  • Indicated by 906 is a nonconductive material.
  • Indicated by 907 is a bus line.
  • the thickness of the TFT substrate 905 may be reduced.
  • thicknesses of both counter substrate 904 and TFT substrate 905 may be reduced.
  • the control circuit 901 for controlling the aforementioned driver circuit is mounted on the TFT substrate 905 by COG (chip-on-glass) technology.
  • COG chip-on-glass
  • This COG technology is carried out either by a wire bonding operation in which the rear surface of the control circuit chip is bonded to the TFT substrate 905 and electrically connected with the conductors on the TFT substrate by wire bonding, or by a face-down operation in which the chip is turned upside down and the pads on the chip are connected with the conductors on the TFT substrate by conductive paste or the like.
  • the TFT substrate 905 and the counter substrate 904 may be partially thinned by previously mechanically grinding away or chemically etching away portions of the counter substrate of interest.
  • the driver TFTs are hermetically sealed in a liquid crystal, as well as the pixel TFTs, as described above. Therefore, the temperature resistance and the contamination resistance of the driver TFTs can be improved. Furthermore, the active matrix liquid crystal display can be miniaturized.
  • a nonconductive or weakly conductive resin is applied or bonded to the cut surfaces of the substrates.
  • the reliability especially the reliability against electrostatic damage, can be enhanced.
  • all necessary circuits including a control circuit for a driver circuit can be placed between a pair of substrates by partially thinning at least one of TFT and counter substrates.
  • the active matrix liquid crystal display can be reduced in size by sealing these circuits in a liquid crystal material. Also, the reliability can be improved.

Abstract

There is disclosed a small-sized, active matrix liquid crystal display having high reliability. The liquid crystal display comprises a TFT substrate, a counter substrate, and a layer of a liquid crystal material held between these two substrates. A plurality of pixel TFTs are arranged in rows and columns on the TFT substrate. Driver TFTs forming a driver circuit for driving the pixel TFTs are formed also on the TFT substrate. All of these TFTs are in contact with the liquid crystal material directly or via a thin film. At least one end surface of the TFT substrate and the counter substrate is cut at a common position. A nonconductive or weakly conductive material is applied or adhesively bonded to at least one cut end surface. Thus, the TFTs are protected from static charges.

Description

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an active matrix liquid crystal display and, more particularly, to a miniaturized active matrix liquid crystal display having high reliability.
2. Description of the Related Art
An active matrix liquid crystal display uses a liquid crystal as a display medium. A pixel is disposed at each intersection in a matrix construction. Every pixel is equipped with a switching device. Information about the pixels is represented by turning on and off the switching devices. Three-terminal devices which are thin-film transistors having gate, source, and drain are most often used as the switching devices. The thin-film transistors are hereinafter often abbreviated as TFTs.
In the matrix construction, scanning lines (gate lines) extending parallel to a row are connected with the gate electrodes of the TFTs in this row. Signal lines (source lines) running parallel to a column are connected with the source (or drain) electrodes of the TFTs in this column. A circuit for driving the scanning lines and a circuit for driving the signal lines are also provided.
FIG. 2 shows one conventional active matrix liquid crystal display. A signal line driver circuit 202 for driving signal lines is mounted above the pixel matrix 201 of this active matrix liquid crystal display. A scanning line driver circuit 203 for driving scanning lines is disposed to the left. Indicated by 204 is a sealant material region.
FIG. 3 is a cross section of FIG. 2. As shown in FIG. 3 pixel TFTs 301 are covered by a liquid crystal material 302, which is held between a TFT substrate 303 and a counter substrate 304. On the other hand, signal line driver circuit and scanning line driver circuit are protected only by a thin film 306 of oxide or nitride. Indicated by 307 is a sealant material. Therefore, TFTs 305 forming these driver circuits are placed in a harsher environment than the pixel TFTs located inside the liquid crystal material.
In an attempt to solve the foregoing problems and to obtain long-term reliability, a display device structure having improved reliability has been devised. In this structure, both signal line driver circuit and scanning line driver circuit are placed within a liquid crystal material, as well as pixel TFTs.
FIG. 4 shows a known device of this improved structure. In this known structure, a sealant material or sealing material 403 is located outside both a signal line driver circuit 401 and a scanning line driver circuit 402. Therefore, the driver circuit TFTs are covered by the liquid crystal material, as well as the pixel TFTS. Furthermore, to miniaturize the liquid crystal display, three end surfaces (in FIG. 4, the top end surface, bottom end surface, and right end surface) of the counter substrate are made to conform to three end surfaces of the TFT substrate. Indicated by 404 is a pixel matrix.
These two conventional structures suffer from the following problems.
As shown in FIG. 5, in the conventional active matrix liquid crystal display, a short ring 501 is formed around the pixel matrix to protect the TFT devices from static charges. Since the signal lines 503 and scanning lines 504 connected with pixel TFTs 502 are all shorted, static charges produced during manufacturing steps, especially during rubbing steps, are prevented from being applied across the terminals of each pixel TFT 502. Indicated by 505 is a TFT substrate. Indicated by 506 are positions at which the device is cut by a laser beam.
In the first-mentioned conventional structure shown in FIGS. 2 and 3, it is common practice to cut the short ring together with glass substrates with a laser beam or the like in the final manufacturing step for the liquid crystal display.
However, in the second-mentioned conventional structure, in an attempt to minimize the size of the liquid crystal display, the counter substrate and the TFT substrate are preferably cut along common planes (in FIG. 4, the top end surface, bottom end surface, and right end surface of each substrate) from which no terminals are brought out. Accordingly, it is difficult to cut the short ring with a laser beam in the final step. In particular, the short ring is cut together with the substrates along a common plane. As shown in FIG. 6, after the cutting, the end surfaces of the substrates are exposed. If static charges are produced on the exposed end surface after the cutting, the internal pixel TFTs will be destroyed, thus making the display device defective. Indicated by 507 is the counter substrate. Indicated by 508 is a sealant material. Indicated by 503 is a liquid crystal material. Indicated by 504 is a bus line. Indicated by 505 is the TFT substrate. Indicated by 506 are the exposed end surfaces.
SUMMARY OF THE INVENTION
An active matrix liquid crystal display according to the invention is free of the foregoing problems and has a plurality of pixel TFTs arranged in rows and columns on a TFT substrate, driver TFTs formed on the TFT substrate and forming a driver circuit for driving the pixel TFTs, a counter substrate, and a liquid crystal material. The pixel TFTs and the driver TFTs are in contact with the liquid crystal material directly or via a thin film. A method of fabricating this active matrix liquid crystal display in accordance with the invention comprises the steps of: cutting at least one unexposed end surface of the substrates and the counter substrate along a common plane to form an exposed end surface; and applying or bonding a nonconductive or weakly conductive material to at least one of the exposed end surfaces.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross-sectional view of an active matrix liquid crystal display according to the present invention;
FIG. 2 is a schematic diagram of a conventional active matrix liquid crystal display;
FIG. 3 is a cross-sectional view of the conventional active matrix liquid crystal display shown in FIG. 2;
FIG. 4 is a diagram of another conventional active matrix liquid crystal display;
FIG. 5 is a diagram of a short ring used in a known active matrix liquid crystal display;
FIG. 6 is a cross-sectional view of the conventional active matrix liquid crystal display shown in FIG. 4;
FIGS. 7(A)–7(D) and 8(A)–8(B) are cross-sectional views of a monolithic active matrix liquid crystal display according to the invention, illustrating its process sequence; and
FIG. 9 is a cross-sectional view of another active matrix liquid crystal display according to the invention.
 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
A specific example of configuration of active matrix liquid crystal display obtained by making use of the above-described structure is shown in FIG. 1, where a plurality of pixel TFTs are arranged in rows and columns on a TFT substrate 101. Driver TFTs forming a driver circuit for driving the pixel TFTs are also formed on the TFT substrate. A liquid crystal material 104 is sealed between a counter substrate 102 and the TFT substrate 101 by a sealing material 103. Since the driver TFTs are present inside the liquid crystal material along with the pixel TFTs, the driver TFTs can be protected.
In one feature of the invention, after the counter substrate and TFT substrate are cut, a nonconductive or weakly conductive resin 105 is applied to the cut end surface of the short ring to prevent the cut end surfaces from touching the outside. Consequently, a bus line 106 connected with the pixel TFTs can be shielded from the outside. Hence, the pixel TFTs can be protected from static charges.
A method of fabricating LCD (liquid crystal display) panels using active matrix circuits according to the invention will hereinafter be described in its illustrated embodiments 1 and 2.
Embodiment 1
Manufacturing steps for obtaining a monolithic active matrix circuit of the present embodiment are now described by referring to FIGS. 7(A)–7(D). These are low-temperature polysilicon processes. The left half of each figure illustrates steps for fabricating TFTs forming a driver circuit. The right half illustrates steps for fabricating TFTs forming an active matrix circuit.
As shown in FIG. 7(A), a silicon oxide film 702 is first formed as a buffer layer 702 on a glass substrate 701 to a thickness of 1000 to 3000 Å. This silicon oxide film may be formed in an oxygen ambient by sputtering or plasma CVD. Then, an amorphous silicon film is formed to a thickness of 300 to 1500 Å, preferably 500 to 1000 Å, by plasma CVD or LPCVD.
The amorphous silicon film is thermally annealed at a temperature higher than 500° C., preferably 500–600° C., to crystallize the film or to enhance its crystallinity. After the crystallization, the crystallinity may be further enhanced by carrying out photo-annealing making use of laser light or the like. Furthermore, during the crystallization making use of the thermal annealing, an element (or, a catalytic element) such as nickel for promoting crystallization of silicon may be added, as described in Japanese Unexamined Patent Publication Nos. 244103/1994 and 244104/1994.
Then, the crystallized silicon film is etched to form islands of an active layer 703 for P-channel TFTs forming a driver circuit, islands of an active layer 704 for N-channel TFTs forming the driver circuit, and islands of an active layer 705 for pixel TFTs forming a matrix circuit. Furthermore, a gate-insulating film 706 of silicon oxide is formed to a thickness of 500 to 2000 Å by sputtering in an oxygen ambient. The gate-insulating film 706 may be formed by plasma CVD. Where the silicon oxide film is formed by plasma CVD, it is desired to use monosilane (SiH4) and oxygen (O2) or nitrogen monoxide (N2O) as a gaseous raw material.
Subsequently, an aluminum layer having a thickness of 2000 to 6000 Å is formed by sputtering over the whole surface of the laminate. The aluminum may contain silicon, scandium, palladium, or other material to prevent generation of hillocks in thermal processing steps conducted later. The aluminum film is etched to form gate electrodes 707, 708, and 709 (FIG. 7(A)).
Thereafter, the gate electrodes 707, 708, and 709 consisting of aluminum is anodized. As a result, surfaces of the gate electrodes 707, 708, 709 are changed into aluminum oxide, 710, 711, and 712. These aluminum oxide regions act as an insulator (FIG. 7(B)).
Then, a photoresist mask 713 covering the active layer 703 of the P-channel TFTs is formed. Phosphorus ions are introduced into the active layers, 704 and 705, by ion doping while using phosphine as a dopant gas. The dose is 1×1012 to 5×1013 atoms/cm2. As a result, heavily doped N-type regions 714, 715, or sources and drains, are formed in the active layers, 704 and 705 (FIG. 7(C)).
Thereafter, a photoresist mask 716 for covering both active layer 704 for the N-channel TFTs and active layer 705 for the pixel TFTs is formed. Boron ions 72 are introduced again into the active layer 703 by ion doping, using diborane (B2H6) as a dopant gas. The dose is 5×1014 to 8×1015 atoms/cm2. As a result, heavily doped P-type regions 717 are formed. Because of the doping steps described thus far, heavily doped N-type regions 714, 715 (sources and drains) and heavily doped P-type regions 717 (source and drain) are formed (FIG. 7(D)).
Then, the laminate is thermally annealed at 450–850° C. for 0.5 to 3 hours to activate the dopants and to repair the damage created by the doping. In this way, the dopants are activated. At the same time, the crystallinity of the silicon is recovered.
Thereafter, as shown in FIG. 8(A), a silicon oxide film having a thickness of 3000 to 6000 Å is formed as an interlayer dielectric 718 over the whole surface by plasma CVD. This interlayer dielectric 718 may be a monolayer of silicon nitride or a multilayer film of silicon oxide and silicon nitride. The interlayer dielectric 718 is etched by a wet etching process or a dry etching process to form contact holes in the source/drain regions.
Then, an aluminum film or a multilayer film of titanium and aluminum is formed to a thickness of 2000 to 6000 Å by sputtering techniques. This film is etched so as to create electrodes/interconnects, 719, 720, and 721, for a peripheral circuit and electrodes/interconnects, 722 and 723, for pixel TFTs (FIG. 8(A)).
Subsequently, a silicon nitride film 724 is formed as a passivation film having a thickness of 1000 to 3000 Å by plasma CVD. This silicon nitride film is etched to create contact holes extending to the electrodes 723 of the pixel TFTs. An ITO (indium-tin oxide) film having a thickness of 500 to 1500 Å is formed by sputtering. Finally, the ITO film is etched to form pixel electrodes 725. In this manner, the peripheral driver circuit 726 and active matrix circuit 727 are formed integrally (FIG. 8(B)).
Steps for assembling the active matrix liquid crystal display is now described. The TFT substrate and the counter substrate are cleaned to clean up chemicals etc.
Then, an orientation film is made to adhere to each of the TFT substrate and counter substrate. The orientation film is provided with grooves lying in a given direction. Liquid crystal molecules are oriented uniformly along the grooves. The orientation film material is created by preparing a solvent such as butyl Cellosolve or n-methyl-pyrrolidone and dissolving about 10% by weight of polyimide in the solvent. This is referred to as polyimide varnish and printed with a flexo-printing machine.
The orientation films adhering to the TFT substrate and the counter substrate, respectively, are heated to cure them. This is known as baking. For this purpose, hot air having a maximum temperature of approximately 300° C. is blown against the orientation films to heat them. As a result, the polyimide varnish is sintered and cured. Then, a rubbing step is carried out. Each glass substrate having the orientation film adhering thereto is rubbed in a given direction with buff cloth consisting of fibers of rayon, nylon, or the like having fiber lengths of 2 to 3 mm to form minute grooves.
Spherical spacers of a polymer-, glass-, or silica-based material are sprayed either at the TFT substrate or at the counter substrate. The method of spraying the spacers can be a wet process in which spacers are mixed into a solvent such as pure water or alcohol and the solvent is sprayed onto the glass substrate. The method can also be a dry process in which spacers are sprayed without using solvent at all.
Thereafter, a sealant material is applied to the outer frame of the pixel region of the TFT substrate, in order to bond together the TFT substrate and the counter substrate and to prevent the injected liquid crystal material from flowing out. The used sealant material is prepared by dissolving epoxy resin and a phenolic curing agent in a solvent of ethyl Cellosolve. After the application of the sealant material, the two glass substrates are bonded together by a high-temperature pressing process at 160° C. so that the sealant material is cured in about 3 hours.
Then, the TFT substrate and the counter substrate are bonded together. The liquid crystal material is injected through a liquid crystal injection port, followed by sealing of the port. After the completion of the sealing, the glass substrates, or the TFT substrate and counter substrate, are cut along the common planes lying in three directions (top side, bottom side, and right side of the display device shown in FIG. 2).
Subsequently, a nonconductive or weakly conductive resin is applied to the cut surfaces. For example, an epoxy resin is applied. As a result of the manufacturing steps described thus far, the liquid crystal display shown in FIG. 1 is completed.
Embodiment 2
A second embodiment of the invention is shown in FIG. 9. In this embodiment, a control circuit 901 for controlling a driver circuit made up of TFTs is located under a sealant material 902 to reduce the packing area and to enhance the reliability. Normally, the control circuit 901 is made of a single-crystal silicon chip and thicker than a layer of a liquid crystal material 903. Therefore, it is impossible to place the control circuit in the sealant material 902 as it is. Accordingly, in the present embodiment, a counter substrate 904 is made thinner by an amount equal to the height of the protruding portion of the control circuit above the substrate gap to accommodate this problem. Indicated by 906 is a nonconductive material. Indicated by 907 is a bus line.
Instead of reducing the thickness of the counter substrate, the thickness of the TFT substrate 905 may be reduced. Alternatively, thicknesses of both counter substrate 904 and TFT substrate 905 may be reduced.
The control circuit 901 for controlling the aforementioned driver circuit is mounted on the TFT substrate 905 by COG (chip-on-glass) technology. This COG technology is carried out either by a wire bonding operation in which the rear surface of the control circuit chip is bonded to the TFT substrate 905 and electrically connected with the conductors on the TFT substrate by wire bonding, or by a face-down operation in which the chip is turned upside down and the pads on the chip are connected with the conductors on the TFT substrate by conductive paste or the like.
The TFT substrate 905 and the counter substrate 904 may be partially thinned by previously mechanically grinding away or chemically etching away portions of the counter substrate of interest.
In the present invention, the driver TFTs are hermetically sealed in a liquid crystal, as well as the pixel TFTs, as described above. Therefore, the temperature resistance and the contamination resistance of the driver TFTs can be improved. Furthermore, the active matrix liquid crystal display can be miniaturized.
In addition, a nonconductive or weakly conductive resin is applied or bonded to the cut surfaces of the substrates. Hence, the reliability, especially the reliability against electrostatic damage, can be enhanced.
Moreover, in the present invention, all necessary circuits including a control circuit for a driver circuit, can be placed between a pair of substrates by partially thinning at least one of TFT and counter substrates. Further, the active matrix liquid crystal display can be reduced in size by sealing these circuits in a liquid crystal material. Also, the reliability can be improved.

Claims (21)

1. An active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit being provided over said TFT substrate for controlling said driver TFT,
wherein at least one of a portion of said TFT substrate over which said control circuit chip is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
2. The display of claim 1, wherein in order to install said control circuit in a control circuit accommodation portion of said TFT substrate, said control circuit accommodation portion is made thinner than other portions of said TFT substrate.
3. The display of claim 1, wherein said control circuit is packed over said TFT substrate by COG (chip-on-glass) technology.
4. An active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a bus line provided over said TFT substrate and connected with at least one of said pixel TFTs;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit provided over said TFT substrate for controlling said driver TFT,
wherein at least one of a portion of said TFT substrate over which said control circuit chip is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
5. The display of claim 4, wherein in order to install said control circuit in a control circuit accommodation portion of said TFT substrate, said counter substrate has a thinned portion located opposite to said control circuit accommodation portion.
6. The display of claim 4, wherein said control circuit is packed over said TFT substrate by COG (chip-on-glass) technology.
7. An active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate, said sealing material being provided outside at least said pixel TFTs;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit provided over said TFT substrate for controlling said driver TFT,
wherein at least one of a portion of said TFT substrate over which said control circuit chip is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
8. The display of claim 7, wherein in order to install said control circuit in a control circuit accommodation portion of said TFT substrate, said counter substrate has a thinned portion located opposite to said control circuit accommodation portion.
9. The display of claim 7, wherein said control circuit is packed over said TFT substrate by COG (chip-on-glass) technology.
10. An active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a bus line provided over said TFT substrate and connected with at least one of said pixel TFTs;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate, said sealing material being provided outside at least said pixel TFTs;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit provided over said TFT substrate for controlling said driver TFT,
wherein at least one of a portion of said TFT substrate over which said control circuit chip, is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
11. The display of claim 10, wherein in order to install said control circuit in a control circuit accommodation portion of said TFT substrate, said counter substrate has a thinned portion located opposite to said control circuit accommodation portion.
12. The display of claim 10, wherein said control circuit is packed over said TFT substrate by COG (chip-on-glass) technology.
13. A method of fabricating an active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a bus line provided over said TFT substrate and connected with at least one of said pixel TFTs;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate and outside at least said pixel TFTs;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit provided over said TFT substrate for controlling said driver TFT,
said method comprising:
cutting said TFT substrate and said counter substrate outside said sealing material having said control circuit sealed in said sealing material,
wherein at least one of a portion of said TFT substrate over which said control circuit chip is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
14. The method of claim 13, further comprising the step of thinning a portion of said counter substrate which is located opposite to a control circuit for controlling said driver circuit made up of said driver TFTs, to install said control circuit.
15. The method of claim 13, wherein said control circuit is packed over said TFT substrate by COG (chip-on-glass) technology.
16. A method of fabricating an active matrix liquid crystal display comprising:
a plurality of pixel TFTs arranged in rows and columns over a TFT substrate and arrayed in a matrix;
a bus line provided over said TFT substrate and connected with at least one of said pixel TFTs;
a counter substrate located opposite to said TFT substrate;
a layer of a liquid crystal material provided between said TFT substrate and said counter substrate;
a sealing material sealing around said liquid crystal material and provided between said TFT substrate and said counter substrate;
a driver TFT provided over said TFT substrate; and
a control circuit comprising a control circuit chip sealed in said sealing material, said control circuit provided over said TFT substrate for controlling said driver TFT,
said method comprising:
cutting said TFT substrate and said counter substrate outside said sealing material having said control circuit sealed in said sealing material,
wherein at least one of a portion of said TFT substrate over which said control circuit chip is provided and a portion of said counter substrate adjacent to said control circuit is made thinner than other portions of said TFT substrate and said counter substrate.
17. The method of claim 16, further comprising the step of thinning a portion of said counter substrate which is located opposite to said control circuit, to install said control circuit.
18. A semiconductor device including one liquid crystal panel comprising a TFT substrate and a counter substrate,
wherein said TFT substrate and said counter substrate each comprises a first side edge, a second side edge, a third side edge, and a fourth side edge;
wherein said TFT substrate comprises a glass; and
wherein said counter substrate is located opposite to said TFT substrate,
said semiconductor device comprising:
a pixel TFT provided over said TFT substrate;
a channel formation region provided in a semiconductor film provided over said TFT substrate;
a gate electrode provided adjacent to said channel formation region with a gate insulating film therebetween, said pixel TFT comprising said channel formation region and said gate electrode and said gate insulating film;
a bus line provided over said TFT substrate and connected with said pixel TFT, said bus line having a part located adjacent to at least one of the first side edge, the second side edge and the third side edge of said TFT substrate;
a sealing material provided between said TFT substrate and said counter substrate; and
a nonconductive material applied to the first side edge, the second side edge, and the third side edge of said TFT substrate and said counter substrate of said liquid crystal panel,
wherein said nonconductive material is provided on an outer side of said sealing material,
wherein said nonconductive material is not applied to the fourth side edge of said TFT substrate and said counter substrate of said liquid crystal panel, and
wherein said nonconductive material covers the part of the bus line.
19. A semiconductor device including one liquid crystal panel comprising a TFT substrate and a counter substrate,
wherein said TFT substrate and said counter substrate each comprises a first side edge, a second side edge, a third side edge, and a fourth side edge;
wherein said TFT substrate comprises a glass; and
wherein said counter substrate is located opposite to said TFT substrate,
said semiconductor device comprising:
a pixel TFT provided over said TFT substrate;
a channel formation region provided in a semiconductor film provided over said TFT substrate;
a gate electrode provided adjacent to said channel formation region with a gate insulating film therebetween, said pixel TFT comprising said channel formation region and said gate electrode and said gate insulating film;
a bus line provided over said TFT substrate and connected with said pixel TFT, said bus line having a part located adjacent to a side edge at least one of the first side edge, the second side edge and the third side edge of said TFT substrate;
a sealing material provided between said TFT substrate and said counter substrate; and
a weakly conductive material applied to the first side edge, the second side edge, and the third side edge of said TFT substrate and said counter substrate of said liquid crystal panel,
wherein said weakly conductive material is provided on an outer side of said sealing material,
wherein said weakly conductive material is not applied to the fourth side edge of said TFT substrate and said counter substrate of said liquid crystal panel, and
wherein said weakly conductive material covers the part of the bus line.
20. A semiconductor device including one liquid crystal panel comprising a TFT substrate and a counter substrate,
wherein said TFT substrate and said counter substrate each comprises a first side edge, a second side edge, a third side edge, and a fourth side edge;
wherein said TFT substrate comprises a glass; and
wherein said counter substrate is located opposite to said TFT substrate,
said semiconductor device comprising:
a pixel TFT provided over a TFT substrate;
a channel formation region provided in a semiconductor film provided over said TFT substrate;
a gate electrode provided adjacent to said channel formation region with a gate insulating film therebetween, said pixel TFT comprising said channel formation region and said gate electrode and said gate insulating film;
a driver TFT provided over said TFT substrate;
a bus line provided over said TFT substrate and connected with said pixel TFT, said bus line having a part located adjacent to at least one of the first side edge, the second side edge and the third side edge of said TFT substrate;
a sealing material provided between said TFT substrate and said counter substrate; and
a nonconductive material applied to the first side edge, the second side edge, and the third side edge of said TFT substrate and said counter substrate of said liquid crystal panel,
wherein said nonconductive material is provided on an outer side of said sealing material,
wherein said nonconductive material is not applied to the fourth side edge of said TFT substrate and said counter substrate of said liquid crystal panel, and
wherein said nonconductive material covers the part of the bus line.
21. A semiconductor device including one liquid crystal panel comprising a TFT substrate and a counter substrate,
wherein said TFT substrate and said counter substrate each comprises a first side edge, a second side edge, a third side edge, and a fourth side edge;
wherein said TFT substrate comprises a glass; and
wherein said counter substrate located opposite to said TFT substrate,
said semiconductor device comprising:
a pixel TFT provided over a TFT substrate;
a channel formation region provided in a semiconductor film provided over said TFT substrate;
a gate electrode provided adjacent to said channel formation region with a gate insulating film therebetween, said pixel TFT comprising said channel formation region and said gate electrode and said gate insulating film;
a driver TFT provided over said TFT substrate;
a bus line provided over said TFT substrate and connected with said pixel TFT, said bus line having a part located adjacent to at least one of the first side edge, the second side edge and the third side edge of said TFT substrate;
a sealing material provided between said TFT substrate and said counter substrate; and
a weakly conductive material applied to the first side edge, the second side edge, and the third side edge of said TFT substrate and said counter substrate of said liquid crystal panel,
wherein said weakly conductive material is provided on an outer side of said sealing material, and
wherein said weakly conductive material is not applied to the fourth side edge of said TFT substrate and said counter substrate of said liquid crystal panel, and
wherein said weakly conductive material covers the part of the bus line.
US08/770,792 1995-12-19 1996-12-19 Semiconductor device having a non-conductive material or a weakly conductive material applied to a side edge of a substrate and a method of fabricating the same Expired - Fee Related US7023518B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34922895A JPH09171192A (en) 1995-12-19 1995-12-19 Active matrix type liquid crystal display device and its manufacture

Publications (1)

Publication Number Publication Date
US7023518B1 true US7023518B1 (en) 2006-04-04

Family

ID=18402352

Family Applications (1)

Application Number Title Priority Date Filing Date
US08/770,792 Expired - Fee Related US7023518B1 (en) 1995-12-19 1996-12-19 Semiconductor device having a non-conductive material or a weakly conductive material applied to a side edge of a substrate and a method of fabricating the same

Country Status (3)

Country Link
US (1) US7023518B1 (en)
JP (1) JPH09171192A (en)
KR (1) KR100425874B1 (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040141128A1 (en) * 2003-01-08 2004-07-22 Bong-Ju Kim Upper substrate and liquid crystal display device having the same
US20040141139A1 (en) * 1995-02-15 2004-07-22 Semiconductor Energy Laboratory Co., Ltd., A Japan Corporation Active matrix display and forming method thereof
US20040150771A1 (en) * 2003-01-30 2004-08-05 Dong-Ho Lee Liquid crystal display device
US20050017940A1 (en) * 1997-08-20 2005-01-27 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US20050056849A1 (en) * 1996-03-21 2005-03-17 Semiconductor Energy Laboratory Co., Ltd., A Japan Corporation Semiconductor device and method of making thereof
US20050219454A1 (en) * 2004-04-02 2005-10-06 L.G. Philips Lcd Co., Ltd. Liquid crystal display device and repairing method thereof
US20060221293A1 (en) * 1997-04-24 2006-10-05 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal panel and equipment comprising said liquid crystal panel
EP1750170A1 (en) * 2005-08-05 2007-02-07 Seiko Epson Corporation Liquid crystal device, electro-optical device, projector, and micro-device
US20070126955A1 (en) * 2005-12-01 2007-06-07 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of display device
US20070170855A1 (en) * 2006-01-25 2007-07-26 Choi Dong-Soo Organic light emitting display device and method of fabricating the same
US20080088569A1 (en) * 2006-10-13 2008-04-17 Seiko Epson Corporation Electro-optical device and electronic apparatus
US20130135830A1 (en) * 2011-11-16 2013-05-30 Au Optronics Corporation Display Device with Flexible Substrate and Manufacturing Method Thereof
US20130237115A1 (en) * 2006-01-20 2013-09-12 Samsung Display Co., Ltd. Organic light-emitting display device with frit seal and reinforcing structure
US8674369B2 (en) 2004-03-25 2014-03-18 Semiconductor Energy Laboratory Co., Ltd. Light emitting device, method for manufacturing thereof and electronic appliance
US9791753B2 (en) 2013-01-10 2017-10-17 E Ink Holdings Inc. Circuit substrate structure and method for manufacturing thereof
US10199295B2 (en) * 2015-08-31 2019-02-05 Boe Technology Group Co., Ltd. Display panel and method for forming the same
US11133580B2 (en) * 2017-06-22 2021-09-28 Innolux Corporation Antenna device
CN113741077A (en) * 2021-08-13 2021-12-03 山东蓝贝思特教装集团股份有限公司 Single-layer bistable liquid crystal copying device and method
US11211579B2 (en) * 2017-09-27 2021-12-28 Sharp Kabushiki Kaisha Substrate sealing structure body, and, display device and production method therefor
US11567359B2 (en) * 2020-03-25 2023-01-31 Samsung Electronics Co., Ltd. Display panel and display apparatus including same

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3477301B2 (en) 1995-12-19 2003-12-10 株式会社半導体エネルギー研究所 Active matrix type liquid crystal display device and manufacturing method thereof
TW468269B (en) * 1999-01-28 2001-12-11 Semiconductor Energy Lab Serial-to-parallel conversion circuit, and semiconductor display device employing the same
JP2002287653A (en) * 2001-01-19 2002-10-04 Sony Corp Display device, manufacturing method therefor, portable terminal and manufacturing method therefor
JP2002329576A (en) 2001-04-27 2002-11-15 Semiconductor Energy Lab Co Ltd Light emitting device and its manufacturing method
JP2005122108A (en) * 2003-09-22 2005-05-12 Sharp Corp Liquid crystal display device
CN105572953A (en) * 2015-12-22 2016-05-11 上海天马微电子有限公司 Liquid crystal display panel
JP2020530139A (en) * 2017-08-11 2020-10-15 華為技術有限公司Ｈｕａｗｅｉ Ｔｅｃｈｎｏｌｏｇｉｅｓ Ｃｏ．，Ｌｔｄ． Display panels and their manufacturing methods, display devices, and terminals

Citations (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3954325A (en) * 1974-05-28 1976-05-04 Ceramic Systems Multilayer ceramic-based liquid crystal display
JPS5329098A (en) 1976-08-30 1978-03-17 Seiko Instr & Electronics Ltd Glass plate of liquid crystal panel and its production
JPS5732419A (en) 1980-08-06 1982-02-22 Hitachi Ltd Liquid crystal display element
JPS5799615A (en) * 1980-12-11 1982-06-21 Matsushita Electric Ind Co Ltd Liquid crystal display cell
US4394067A (en) * 1979-09-07 1983-07-19 U.S. Philips Corporation Display device
JPS59166984A (en) * 1983-03-14 1984-09-20 三菱電機株式会社 Manufacture of matrix type liquid crystal display
JPS59214075A (en) 1983-05-19 1984-12-03 セイコーエプソン株式会社 Ic substrate for active panel
US4494825A (en) * 1981-03-04 1985-01-22 Hitachi, Ltd. Fill port seal with first and second photosensitizers
JPS6129821A (en) 1984-07-20 1986-02-10 Ricoh Co Ltd Liquid crystal display element
JPS61177481A (en) 1985-02-01 1986-08-09 セイコーインスツルメンツ株式会社 Sealing construction of liquid crystal display unit
JPS6449022A (en) * 1987-08-20 1989-02-23 Seiko Epson Corp Liquid crystal panel housing driver in the panel
JPH0413116A (en) 1990-05-07 1992-01-17 Fujitsu Ltd Method for packaging ic for driving liquid crystal display panel
EP0474508A2 (en) 1990-09-07 1992-03-11 Seiko Epson Corporation Liquid crystal display device and mounting arrangement therefor
JPH04179245A (en) * 1990-11-13 1992-06-25 Hitachi Ltd Semiconductor device
JPH04192446A (en) * 1990-11-26 1992-07-10 Nippondenso Co Ltd Resin-sealed semiconductor device
US5148301A (en) * 1990-02-27 1992-09-15 Casio Computer Co., Ltd. Liquid crystal display device having a driving circuit inside the seal boundary
JPH04352131A (en) 1991-05-30 1992-12-07 Toshiba Corp Plane type display device
JPH04355720A (en) * 1991-06-04 1992-12-09 Matsushita Electric Ind Co Ltd Liquid crystal display device
JPH04362921A (en) 1991-08-07 1992-12-15 Hitachi Ltd Manufacture of liquid crystal display element
JPH05113555A (en) * 1991-10-23 1993-05-07 Fujitsu Ltd Liquid crystal display unit
EP0593266A2 (en) 1992-10-12 1994-04-20 Seiko Instruments Inc. Active matrix light valve device
JPH06123882A (en) * 1992-10-13 1994-05-06 Sony Corp Liquid crystal display device
JPH06186578A (en) * 1992-12-17 1994-07-08 Seiko Epson Corp Liquid crystal display device
JPH06186580A (en) 1992-12-17 1994-07-08 Seiko Epson Corp Liquid crystal display device
JPH06244104A (en) 1993-02-15 1994-09-02 Semiconductor Energy Lab Co Ltd Semiconductor and its manufacture
JPH06244103A (en) 1993-02-15 1994-09-02 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor
JPH06258659A (en) * 1993-03-02 1994-09-16 Seiko Epson Corp Liquid crystal display device
JPH06258660A (en) * 1993-03-02 1994-09-16 Seiko Epson Corp Liquid crystal display device
JPH06289414A (en) 1993-04-06 1994-10-18 Seiko Epson Corp Liquid crystal display device
JPH07218883A (en) 1994-02-01 1995-08-18 Matsushita Electron Corp Production of liquid crystal display device
US5608232A (en) 1993-02-15 1997-03-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US5610742A (en) * 1991-08-01 1997-03-11 Seiko Epson Corporation Liquid crystal display element, methods of producing and storing the same, and electronic equipment on which the same is mounted
JPH1010544A (en) * 1996-06-25 1998-01-16 Semiconductor Energy Lab Co Ltd Liquid crystal display device, photographic device, and information processor
US5854664A (en) * 1994-09-26 1998-12-29 Matsushita Electric Industrial Co., Ltd. Liquid crystal display panel and method and device for manufacturing the same
US6011607A (en) * 1995-02-15 2000-01-04 Semiconductor Energy Laboratory Co., Active matrix display with sealing material
US6055034A (en) * 1996-06-25 2000-04-25 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display panel
US6072556A (en) * 1997-10-06 2000-06-06 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display with an adjustment layer to even out height difference in the sealant region
US6163357A (en) * 1996-09-26 2000-12-19 Kabushiki Kaisha Toshiba Liquid crystal display device having the driving circuit disposed in the seal area, with different spacer density in driving circuit area than display area
US6246454B1 (en) * 1995-12-19 2001-06-12 Semiconductor Energy Laboratory Co., Ltd. Active matrix liquid crystal display and method of fabricating same
US6288764B1 (en) * 1996-06-25 2001-09-11 Semiconductor Energy Laboratory Co., Ltd. Display device or electronic device having liquid crystal display panel

Patent Citations (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3954325A (en) * 1974-05-28 1976-05-04 Ceramic Systems Multilayer ceramic-based liquid crystal display
JPS5329098A (en) 1976-08-30 1978-03-17 Seiko Instr & Electronics Ltd Glass plate of liquid crystal panel and its production
US4394067A (en) * 1979-09-07 1983-07-19 U.S. Philips Corporation Display device
JPS5732419A (en) 1980-08-06 1982-02-22 Hitachi Ltd Liquid crystal display element
JPS5799615A (en) * 1980-12-11 1982-06-21 Matsushita Electric Ind Co Ltd Liquid crystal display cell
US4494825A (en) * 1981-03-04 1985-01-22 Hitachi, Ltd. Fill port seal with first and second photosensitizers
JPS59166984A (en) * 1983-03-14 1984-09-20 三菱電機株式会社 Manufacture of matrix type liquid crystal display
JPS59214075A (en) 1983-05-19 1984-12-03 セイコーエプソン株式会社 Ic substrate for active panel
JPS6129821A (en) 1984-07-20 1986-02-10 Ricoh Co Ltd Liquid crystal display element
JPS61177481A (en) 1985-02-01 1986-08-09 セイコーインスツルメンツ株式会社 Sealing construction of liquid crystal display unit
JPS6449022A (en) * 1987-08-20 1989-02-23 Seiko Epson Corp Liquid crystal panel housing driver in the panel
US5148301A (en) * 1990-02-27 1992-09-15 Casio Computer Co., Ltd. Liquid crystal display device having a driving circuit inside the seal boundary
JPH0413116A (en) 1990-05-07 1992-01-17 Fujitsu Ltd Method for packaging ic for driving liquid crystal display panel
EP0474508A2 (en) 1990-09-07 1992-03-11 Seiko Epson Corporation Liquid crystal display device and mounting arrangement therefor
JPH04116625A (en) 1990-09-07 1992-04-17 Seiko Epson Corp Packaging structure for driving circuit in liquid crystal display device or the like
JPH04179245A (en) * 1990-11-13 1992-06-25 Hitachi Ltd Semiconductor device
JPH04192446A (en) * 1990-11-26 1992-07-10 Nippondenso Co Ltd Resin-sealed semiconductor device
JPH04352131A (en) 1991-05-30 1992-12-07 Toshiba Corp Plane type display device
JPH04355720A (en) * 1991-06-04 1992-12-09 Matsushita Electric Ind Co Ltd Liquid crystal display device
US5610742A (en) * 1991-08-01 1997-03-11 Seiko Epson Corporation Liquid crystal display element, methods of producing and storing the same, and electronic equipment on which the same is mounted
JPH04362921A (en) 1991-08-07 1992-12-15 Hitachi Ltd Manufacture of liquid crystal display element
JPH05113555A (en) * 1991-10-23 1993-05-07 Fujitsu Ltd Liquid crystal display unit
EP0593266A2 (en) 1992-10-12 1994-04-20 Seiko Instruments Inc. Active matrix light valve device
JPH06202160A (en) 1992-10-12 1994-07-22 Seiko Instr Inc Light valve device, stereoscopic image display device, and image projector
US6304243B1 (en) 1992-10-12 2001-10-16 Seiko Instruments Inc. Light valve device
JPH06123882A (en) * 1992-10-13 1994-05-06 Sony Corp Liquid crystal display device
JPH06186578A (en) * 1992-12-17 1994-07-08 Seiko Epson Corp Liquid crystal display device
JPH06186580A (en) 1992-12-17 1994-07-08 Seiko Epson Corp Liquid crystal display device
US5608232A (en) 1993-02-15 1997-03-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US5879977A (en) 1993-02-15 1999-03-09 Semiconductor Energy Laboratory Co., Ltd. Process for fabricating a thin film transistor semiconductor device
JPH06244104A (en) 1993-02-15 1994-09-02 Semiconductor Energy Lab Co Ltd Semiconductor and its manufacture
US5956579A (en) 1993-02-15 1999-09-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
US5897347A (en) 1993-02-15 1999-04-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
JPH06244103A (en) 1993-02-15 1994-09-02 Semiconductor Energy Lab Co Ltd Manufacture of semiconductor
US5639698A (en) 1993-02-15 1997-06-17 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
JPH06258660A (en) * 1993-03-02 1994-09-16 Seiko Epson Corp Liquid crystal display device
JPH06258659A (en) * 1993-03-02 1994-09-16 Seiko Epson Corp Liquid crystal display device
JPH06289414A (en) 1993-04-06 1994-10-18 Seiko Epson Corp Liquid crystal display device
JPH07218883A (en) 1994-02-01 1995-08-18 Matsushita Electron Corp Production of liquid crystal display device
US5854664A (en) * 1994-09-26 1998-12-29 Matsushita Electric Industrial Co., Ltd. Liquid crystal display panel and method and device for manufacturing the same
US6011607A (en) * 1995-02-15 2000-01-04 Semiconductor Energy Laboratory Co., Active matrix display with sealing material
US6246454B1 (en) * 1995-12-19 2001-06-12 Semiconductor Energy Laboratory Co., Ltd. Active matrix liquid crystal display and method of fabricating same
JPH1010544A (en) * 1996-06-25 1998-01-16 Semiconductor Energy Lab Co Ltd Liquid crystal display device, photographic device, and information processor
US6055034A (en) * 1996-06-25 2000-04-25 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display panel
US6288764B1 (en) * 1996-06-25 2001-09-11 Semiconductor Energy Laboratory Co., Ltd. Display device or electronic device having liquid crystal display panel
US6163357A (en) * 1996-09-26 2000-12-19 Kabushiki Kaisha Toshiba Liquid crystal display device having the driving circuit disposed in the seal area, with different spacer density in driving circuit area than display area
US6072556A (en) * 1997-10-06 2000-06-06 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal display with an adjustment layer to even out height difference in the sealant region

Cited By (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040141139A1 (en) * 1995-02-15 2004-07-22 Semiconductor Energy Laboratory Co., Ltd., A Japan Corporation Active matrix display and forming method thereof
US7924392B2 (en) 1995-02-15 2011-04-12 Semiconductor Energy Laboratory Co., Ltd. Active matrix display and forming method thereof
US20090291612A1 (en) * 1995-02-15 2009-11-26 Semiconductor Energy Laboratory Co., Ltd. Active matrix display and forming method thereof
US7538849B2 (en) 1995-02-15 2009-05-26 Semiconductor Energy Laboratory Co., Ltd. Active matrix display and forming method thereof
US20050056849A1 (en) * 1996-03-21 2005-03-17 Semiconductor Energy Laboratory Co., Ltd., A Japan Corporation Semiconductor device and method of making thereof
US7335950B2 (en) 1996-03-21 2008-02-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of making thereof
US7289184B2 (en) * 1997-04-24 2007-10-30 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal panel and equipment comprising said liquid crystal panel
US8045120B2 (en) 1997-04-24 2011-10-25 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal panel and equipment comprising said liquid crystal panel
US20060221293A1 (en) * 1997-04-24 2006-10-05 Semiconductor Energy Laboratory Co., Ltd. Liquid crystal panel and equipment comprising said liquid crystal panel
US7978190B2 (en) 1997-08-20 2011-07-12 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US7256776B2 (en) 1997-08-20 2007-08-14 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US20050017940A1 (en) * 1997-08-20 2005-01-27 Semiconductor Energy Laboratory Co., Ltd. Electrooptical device
US8125601B2 (en) * 2003-01-08 2012-02-28 Samsung Electronics Co., Ltd. Upper substrate and liquid crystal display device having the same
US20040141128A1 (en) * 2003-01-08 2004-07-22 Bong-Ju Kim Upper substrate and liquid crystal display device having the same
US8149365B2 (en) 2003-01-08 2012-04-03 Samsung Electronics Co., Ltd. Upper substrate and liquid crystal display device having the same
US20100045916A1 (en) * 2003-01-08 2010-02-25 Samsung Electronics Co., Ltd. Upper substrate and liquid crystal display device having the same
US8867009B2 (en) 2003-01-30 2014-10-21 Samsung Display Co., Ltd. Liquid crystal display device
US8958045B2 (en) 2003-01-30 2015-02-17 Samsung Display Co., Ltd. Liquid crystal display device
US20150153604A1 (en) * 2003-01-30 2015-06-04 Samsung Display Co., Ltd. Liquid crystal display device
US20150153603A1 (en) * 2003-01-30 2015-06-04 Samsung Display Co., Ltd. Liquid crystal display device
US9785024B2 (en) * 2003-01-30 2017-10-10 Samsung Display Co., Ltd. Liquid crystal display device
US20110051072A1 (en) * 2003-01-30 2011-03-03 Samsung Electronics Co., Ltd. Liquid crystal display device
US10031386B2 (en) * 2003-01-30 2018-07-24 Samsung Display Co., Ltd. Liquid crystal display device
US7944539B2 (en) * 2003-01-30 2011-05-17 Samsung Electronics Co., Ltd. Liquid crystal display device
US10416510B2 (en) 2003-01-30 2019-09-17 Samsung Display Co., Ltd. Liquid crystal display device
US20110194064A1 (en) * 2003-01-30 2011-08-11 Samsung Electronics Co., Ltd. Liquid crystal display device
US20040150771A1 (en) * 2003-01-30 2004-08-05 Dong-Ho Lee Liquid crystal display device
US8674369B2 (en) 2004-03-25 2014-03-18 Semiconductor Energy Laboratory Co., Ltd. Light emitting device, method for manufacturing thereof and electronic appliance
US7808600B2 (en) * 2004-04-02 2010-10-05 Lg. Display Co., Ltd. Liquid crystal display (LCD) device for repairing
US7180566B2 (en) * 2004-04-02 2007-02-20 Lg Philips Lcd Co., Ltd. Liquid crystal display device and repairing method thereof
US20050219454A1 (en) * 2004-04-02 2005-10-06 L.G. Philips Lcd Co., Ltd. Liquid crystal display device and repairing method thereof
US20080094563A1 (en) * 2004-04-02 2008-04-24 Lee Sun A Liquid crystal display device and repairing method thereof
US20070030436A1 (en) * 2005-08-05 2007-02-08 Seiko Epson Corporation Liquid crystal device, electro-optical device, projector, and micro-device
EP1750170A1 (en) * 2005-08-05 2007-02-07 Seiko Epson Corporation Liquid crystal device, electro-optical device, projector, and micro-device
US20070126955A1 (en) * 2005-12-01 2007-06-07 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of display device
US7821587B2 (en) 2005-12-01 2010-10-26 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of display device
US9004972B2 (en) * 2006-01-20 2015-04-14 Samsung Display Co., Ltd. Organic light-emitting display device with frit seal and reinforcing structure
US20130237115A1 (en) * 2006-01-20 2013-09-12 Samsung Display Co., Ltd. Organic light-emitting display device with frit seal and reinforcing structure
US8729796B2 (en) 2006-01-25 2014-05-20 Samsung Display Co., Ltd. Organic light emitting display device including a gap to improve image quality and method of fabricating the same
US20070170855A1 (en) * 2006-01-25 2007-07-26 Choi Dong-Soo Organic light emitting display device and method of fabricating the same
US20080088569A1 (en) * 2006-10-13 2008-04-17 Seiko Epson Corporation Electro-optical device and electronic apparatus
US8436795B2 (en) * 2006-10-13 2013-05-07 Seiko Epson Corporation Electro-optical device and electronic apparatus
US20130135830A1 (en) * 2011-11-16 2013-05-30 Au Optronics Corporation Display Device with Flexible Substrate and Manufacturing Method Thereof
US8982575B2 (en) * 2011-11-16 2015-03-17 Au Optronics Corporation Display device with flexible substrate and manufacturing method thereof
US9791753B2 (en) 2013-01-10 2017-10-17 E Ink Holdings Inc. Circuit substrate structure and method for manufacturing thereof
US10199295B2 (en) * 2015-08-31 2019-02-05 Boe Technology Group Co., Ltd. Display panel and method for forming the same
US11133580B2 (en) * 2017-06-22 2021-09-28 Innolux Corporation Antenna device
US11211579B2 (en) * 2017-09-27 2021-12-28 Sharp Kabushiki Kaisha Substrate sealing structure body, and, display device and production method therefor
US11437600B2 (en) 2017-09-27 2022-09-06 Sharp Kabushiki Kaisha Substrate sealing structure body, and, display device and production method therefor
US11567359B2 (en) * 2020-03-25 2023-01-31 Samsung Electronics Co., Ltd. Display panel and display apparatus including same
CN113741077A (en) * 2021-08-13 2021-12-03 山东蓝贝思特教装集团股份有限公司 Single-layer bistable liquid crystal copying device and method
CN113741077B (en) * 2021-08-13 2023-05-02 山东蓝贝思特教装集团股份有限公司 Single-layer bistable liquid crystal copying device and method

Also Published As

Publication number Publication date
KR100425874B1 (en) 2004-07-19
KR970050008A (en) 1997-07-29
JPH09171192A (en) 1997-06-30

Similar Documents

Publication Publication Date Title
US6246454B1 (en) Active matrix liquid crystal display and method of fabricating same
US7023518B1 (en) Semiconductor device having a non-conductive material or a weakly conductive material applied to a side edge of a substrate and a method of fabricating the same
US8547516B2 (en) Display device and method of fabricating the same
US8576348B2 (en) Reflective liquid crystal display panel and device using same
JP3406727B2 (en) Display device
US9316880B2 (en) Liquid crystal display device
EP0372821B1 (en) Liquid crystal display panel with reduced pixel defects
US5764320A (en) Liquid crystal display device
JPH0618926A (en) Large-sized substrate for liquid crystal display and its production
JPH08320461A (en) Production of liquid crystal display device
JP3406894B2 (en) Method for manufacturing display device
JP3442726B2 (en) Method of mounting semiconductor integrated circuit for display device
JP3406893B2 (en) Method for manufacturing display device
JP3706867B2 (en) Method for manufacturing display device

Legal Events

Date Code Title Description
AS Assignment

Owner name: SHARP KABUSHIKI KAISHA, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KOYAMA, JUN;YAMAMOTO, YOSHITAKA;REEL/FRAME:008471/0713;SIGNING DATES FROM 19970328 TO 19970401

Owner name: SEMICONDUCTOR ENERGY LABORATORY COMPANY, LTD., JAP

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KOYAMA, JUN;YAMAMOTO, YOSHITAKA;REEL/FRAME:008471/0713;SIGNING DATES FROM 19970328 TO 19970401

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FPAY Fee payment

Year of fee payment: 8

FEPP Fee payment procedure

Free format text: MAINTENANCE FEE REMINDER MAILED (ORIGINAL EVENT CODE: REM.)

LAPS Lapse for failure to pay maintenance fees

Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.)

STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20180404